CN112760719A - Preparation method of semi-insulating silicon carbide single crystal wafer - Google Patents
Preparation method of semi-insulating silicon carbide single crystal wafer Download PDFInfo
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- CN112760719A CN112760719A CN202110043756.4A CN202110043756A CN112760719A CN 112760719 A CN112760719 A CN 112760719A CN 202110043756 A CN202110043756 A CN 202110043756A CN 112760719 A CN112760719 A CN 112760719A
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
- C30B33/04—After-treatment of single crystals or homogeneous polycrystalline material with defined structure using electric or magnetic fields or particle radiation
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/36—Carbides
Abstract
The invention provides a preparation method of a semi-insulating silicon carbide single crystal wafer, belonging to the technical field of monocrystalline silicon production and processing; specifically, high-energy particles are adopted to irradiate a silicon carbide wafer, and point defects are introduced into the silicon carbide wafer to compensate for the shallow level defects of the silicon carbide wafer; the Al impurity concentration in the silicon carbide wafer is less than 1E15cm‑3B, N concentration of two shallow impurities is less than 5E16cm‑3The irradiation dose of high-energy particles is 0.3-25 MeV; the irradiation time is 0.1-6 h; the invention overcomes the practical difficulty of realizing uniform distribution of the in-wafer and inter-wafer resistivity of the semi-insulating SiC wafer under the condition of not using a deep-level metal dopant, not only can effectively improve the performance of a radio frequency device, but also can improve the consistency of products.
Description
Technical Field
The invention belongs to the technical field of monocrystalline silicon production and processing, and relates to a preparation method of a semi-insulating silicon carbide monocrystalline wafer.
Background
Silicon carbide (SiC) is used as a wide band gap semiconductor material, has excellent physical properties such as high breakdown field strength, high working temperature, high electron saturation migration rate, high thermal conductivity and the like, and is an ideal material for preparing high-voltage power electronic devices and high-frequency high-power radio frequency devices. Particularly in the radio frequency field, the GaN radio frequency device prepared on the semi-insulating SiC single crystal wafer can process more than 5 times of the processing capacity of the device made of GaAs materials. High resistivity ("semi-insulating") substrates are generally required for rf devices to make coupling connections, which can cause serious problems with rf device frequencies once the substrate is conductive. The minimum value of resistivity calculated to obtain the passive performance of the radio frequency device needs more than 1500 ohm centimeters, and the resistivity needs to exceed 50000 ohm centimeters in order to minimize the back gate of the device (U.S. patent No. 5611955, No. 6218680).
The main Method for SiC single crystal growth is Physical Vapor Transport (PVT), in which silicon carbide powder is placed at the bottom of a graphite crucible, SiC seed crystal is placed at the top, and the graphite crucible is heated to 2000-2300 deg.C to sublimate the SiC powder in Vapor phase to form Si2C、SiC2And gas phase substances such as Si and the like are transported to the SiC seed crystal with lower temperature from the bottom of the crucible by utilizing a certain temperature gradient formed between the SiC seed crystal and the silicon carbide powder, react and deposit to form bulk SiC crystals。
At present, the semi-insulating property of SiC single crystal is mainly compensated by deep level defects to form shallow donor or acceptor concentration by unintentional doping, and the main method for forming the deep level comprises the following steps: (1) metal dopants such as vanadium, scandium, etc. are added to form deep level compensation as described in U.S. patent No. 5661955. When the impurity concentration of B, N etc. is high, it is generally more than 5E16cm-3Such concentrations compensated for with the dopant vanadium can impair electronic performance and high concentrations of doping or result in reduced substrate thermal conductivity limiting device output. When the concentration of impurities such as B, N and the like in the SiC crystal is low, the concentration of metal dopants such as N, B and the like, vanadium, scandium and the like is reduced along with the prolonging of the growth time, but the concentration decay rates of all the substances are different, and the uniformity of the in-wafer and inter-wafer resistivity of the SiC wafer is extremely difficult to regulate. (2) And forming related deep energy levels such as intrinsic point defects and the like in the crystal through heat treatment to compensate the shallow energy level impurities. The concentration of point defects in the crystal can be increased by a process such as rapid annealing, as described in patent US6814801, CN 101724893. However, the annealing process can increase a small concentration of point defects, and requires a great cooling rate, the production efficiency of the process is low, and the concentration of B, N and other impurities in the SiC crystal is reduced along with the growth time, so that the uniformity of the in-wafer and inter-wafer resistivity of the SiC wafer is difficult to control.
Disclosure of Invention
The invention overcomes the defects of the prior art, provides a preparation method of a semi-insulating silicon carbide single crystal wafer, and aims to realize uniform distribution of in-wafer and inter-wafer resistivity of the semi-insulating SiC wafer under the condition of not using a deep-level metal dopant, so that the manufacturing consistency of radio frequency devices is improved.
In order to achieve the above object, the present invention is achieved by the following technical solutions.
A preparation method of semi-insulating silicon carbide single crystal wafer adopts high-energy particles to irradiate a silicon carbide wafer, and introduces point defects in the silicon carbide wafer to compensate shallow level defects of the silicon carbide wafer; the Al impurity concentration in the silicon carbide wafer is less than 1E15cm-3B, N concentration of two shallow impurities is less than 5E16cm-3The irradiation dose of high-energy particles is 0.3-25 MeV; the irradiation time is 0.1-6 h.
Preferably, the concentration of Al impurities in the silicon carbide wafer is < 2E14cm-3The concentrations of the two shallow impurities of B, N are respectively less than 1E16cm-3The irradiation dose of the high-energy particles is 0.3-10 MeV.
Preferably, the energetic particle is an electron or a neutron or a gamma ray.
Preferably, the irradiation mode is that the silicon carbide wafer is fixed or moved relative to the irradiation device.
Preferably, the movement is that the silicon carbide wafer rotates and the high-energy particle beam penetrates through the silicon carbide wafer to move linearly or the high-energy particle beam moves on the surface of the silicon carbide wafer in a Z-shaped track.
Preferably, the speed of the linear motion or the Z-shaped track movement is 0.2-5 mm/h.
Preferably, the silicon carbide wafer is grown by adopting a physical vapor transport method, the growth temperature is 2000-2300 ℃, and the growth pressure is 0.1-500 Pa.
Preferably, the crystal form of the silicon carbide crystal is one of 3C, 4H, 6H and 15R.
Compared with the prior art, the invention has the beneficial effects that.
Compared with the prior art, the scheme overcomes the practical difficulty of realizing uniform distribution of the in-wafer and inter-wafer resistivity of the semi-insulating SiC wafer under the condition of not using a deep-level metal dopant, not only can effectively improve the performance of a radio frequency device, but also can improve the consistency of products.
Drawings
In order to make the technical problems, technical solutions and beneficial effects to be solved by the present invention more clearly understood, the following drawings are taken for illustration:
FIG. 1 is a schematic diagram of a growth chamber for growing SiC crystals by physical vapor transport.
FIG. 2 is a schematic view of the Z-shaped trajectory of the high energy particle beam relative to the SiC wafer.
FIG. 3 is a schematic view of the linear motion of the high energy particle beam relative to the SiC wafer.
FIG. 4 is the distribution of the resistivity test of the SiC crystal with the size of more than 20mm after the irradiation of high-energy particles.
In the figure, 1 is a crucible cover, 2 is a graphite holder, 3 is a binder, 4 is a seed crystal, 5 is a grown silicon carbide crystal, 6 is a silicon carbide powder, 7 is a graphite crucible, and 8 is a silicon carbide wafer.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is further described in detail with reference to the embodiments and the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. The technical solution of the present invention is described in detail below with reference to the embodiments and the drawings, but the scope of protection is not limited thereto.
The invention relates to a method for preparing a semi-insulating silicon carbide single crystal wafer, which comprises the steps of preparing a silicon carbide wafer, irradiating the silicon carbide wafer by adopting high-energy particles, and introducing point defects into the silicon carbide wafer to compensate the shallow energy level defects of the silicon carbide wafer. The specific process is as follows:
the graphite growth chamber is heated by a heating device, and the structural schematic diagram of the growth chamber is shown in the attached figure 1. The growth chamber mainly comprises the following parts: the device comprises a crucible cover 1, a graphite holder 2, a binder 3, seed crystals 4, a growing silicon carbide crystal 5, silicon carbide powder 6 and a graphite crucible 7. The seed crystal 4 is fixed on the graphite support 2 through the binder 3 and is placed on the upper part of the graphite crucible 7, and the silicon carbide powder 6 is placed on the lower part of the graphite crucible 7.
The graphite crucible is heated by a heating device, a vacuum pump is used for vacuumizing the reaction cavity before the temperature is 1500 ℃, and the vacuum value is lower than 1E-3Pa, so that the background nitrogen impurity concentration in the early stage of crystal growth is reduced. Introducing mixed gas of hydrogen and argon after the growth temperature reaches 1500 ℃, controlling the growth pressure to be in a set range of 0.1-500Pa, controlling the temperature range of 2000-2300 ℃ at the bottom of the graphite crucible, obtaining a certain temperature gradient, and growing for a certain growth time to obtain the silicon carbide crystals, including the silicon carbide crystals of single crystal forms such as 3C, 4H, 6H, 15R and the like.
Preferably, whereinThe growth speed range is 0.2-5 mm/h. The limited concentration of the prepared single-crystal silicon carbide crystal is that the Al impurity concentration is less than 1E15cm-3Preferably, the Al impurity concentration is less than 2E14cm-3B, N the concentration of two shallow impurities is 5E16cm-3Hereinafter, 1E16cm is preferred-3The following.
In the method for preparing the high-purity silicon carbide crystal, no intentional doping element exists, and the concentration of main shallow-level impurities such as B, Al, N and the like is below a limited concentration. After the silicon carbide wafer is obtained by cutting, the wafer is irradiated by high-energy particles, so that point defects with certain concentration are introduced to compensate the shallow-level defects, and the high-energy particles can be electrons, neutrons or gamma rays.
When the Al impurity concentration in the silicon carbide wafer is less than 1E15cm-3B, N concentration of two shallow impurities is less than 5E16cm-3In the range of (1), the irradiation dose of the high-energy particles is 0.3-25 MeV; the irradiation time is 0.1-6 h.
Preferably, when the Al impurity concentration in the silicon carbide wafer is < 2E14cm-3The concentrations of the two shallow impurities of B, N are respectively less than 1E16cm-3The irradiation dose of the high-energy particles is 0.3-10 MeV.
The irradiation mode is that the silicon carbide wafer is fixed or moved relative to the irradiation device. The movement is that the silicon carbide wafer rotates automatically, and simultaneously the high-energy particle beams penetrate through the silicon carbide wafer to do linear motion or the high-energy particle beams do Z-shaped track movement on the surface of the silicon carbide wafer. The speed of the linear motion or the Z-shaped track movement is 0.2-5 mm/h. (as shown in fig. 2 and 3) to ensure that each location of the wafer can be bombarded by the particle beam.
According to three shallow impurity concentrations of Al, B and N at different positions of the head, the middle and the tail of the SiC crystal, different irradiation doses and different irradiation times are designed, and the semi-insulating silicon carbide single crystal wafer with uniform in-chip and in-chip resistivity distribution can be obtained.
According to the method, the concentration of main shallow level impurities such as B, Al and N in the silicon carbide single crystal is controlled, the SiC single crystal wafer is bombarded by the high-energy particle beams, the bombardment time and the bombardment dose of the high-energy particle beams can be set according to the concentration of the main shallow level impurities in the wafer obtained in different growth periods, so that the point defect concentration (the number of each unit volume) with corresponding concentration can be obtained according to the concentration of the main shallow level impurities such as B, Al and N, the aim of compensating unintended shallow doped impurity elements is fulfilled, the semi-insulating silicon carbide wafer with the resistivity larger than 1E9 ohm cm can be obtained by the method, and the semi-insulating silicon carbide wafer with the resistivity larger than 1E12 ohm cm can be obtained under appropriate conditions. Wherein the conceptual depiction of "semi-insulating" and "high resistance" is consistent, i.e., a resistivity greater than 1E5 ohm-cm, without affecting the scope of the claimed invention.
The growth system of the present invention is preferably highly pure and free of deep level compensating elements, such as metallic elements like vanadium, scandium, etc. FIG. 4 shows the distribution of resistivity test after the wafers at the three positions of the head, the middle and the tail of the SiC crystal with the thickness of more than 20mm are processed. The overall resistivity distribution of the crystal is measured, the surface resistivity of the whole wafer can be larger than 1E11 ohm cm in the head stage, the middle stage and the tail stage, and the uniformity is good.
Compared with the prior art, the scheme overcomes the practical difficulty of realizing uniform distribution of the in-wafer and inter-wafer resistivity of the semi-insulating SiC wafer under the condition of not using a deep-level metal dopant, not only can effectively improve the performance of a radio frequency device, but also can improve the consistency of products.
While the invention has been described in further detail with reference to specific preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A preparation method of semi-insulating silicon carbide single crystal wafer is characterized in that high-energy particles are adopted to irradiate a silicon carbide wafer,
introducing point defects into the silicon carbide wafer to compensate for the shallow level defects of the silicon carbide wafer; the Al impurity concentration in the silicon carbide wafer is less than 1E15cm-3B, N concentration of two shallow impurities is less than 5E16cm-3The irradiation dose of high-energy particles is 0.3-25 MeV; the irradiation time is 0.1-6 h.
2. The method for producing a semi-insulating silicon carbide single crystal wafer according to claim 1, wherein the concentration of Al impurity in the silicon carbide wafer is < 2E14cm-3The concentrations of the two shallow impurities of B, N are respectively less than 1E16cm-3The irradiation dose of the high-energy particles is 0.3-10 MeV.
3. The method for preparing a semi-insulating silicon carbide single crystal wafer according to claim 1, wherein the high-energy particles are electrons, neutrons or gamma rays.
4. The method for producing a semi-insulating silicon carbide single crystal wafer according to claim 1, wherein the irradiation mode is a mode in which the silicon carbide wafer is fixed or moved relative to the irradiation apparatus.
5. The method for producing a semi-insulating silicon carbide single crystal wafer according to claim 4, wherein the movement is a rotation of the silicon carbide wafer while the high energy particle beam makes a linear motion through the silicon carbide wafer or a zigzag trajectory of the high energy particle beam on the surface of the silicon carbide wafer.
6. A method for producing a semi-insulating silicon carbide single crystal wafer according to claim 5, wherein the speed of the linear motion or the Z-shaped trajectory is 0.2 to 5 mm/h.
7. The method for preparing a semi-insulating silicon carbide single crystal wafer as claimed in claim 1, wherein the silicon carbide wafer is grown by physical vapor transport at a growth temperature of 2000-2300 ℃ and a growth pressure of 0.1-500 Pa.
8. The method for preparing a semi-insulating silicon carbide single crystal wafer according to claim 7, wherein the crystal form of the silicon carbide crystal is one of 3C, 4H, 6H and 15R.
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113668064A (en) * | 2021-07-29 | 2021-11-19 | 山西烁科晶体有限公司 | Irradiation method for optimizing resistivity of silicon carbide wafer |
| CN114457425A (en) * | 2022-04-12 | 2022-05-10 | 杭州乾晶半导体有限公司 | Method and device for recycling silicon carbide seed crystals |
| CN114864529A (en) * | 2022-05-18 | 2022-08-05 | 北京青禾晶元半导体科技有限责任公司 | Silicon carbide composite substrate and manufacturing method and application thereof |
| CN117166058A (en) * | 2023-09-27 | 2023-12-05 | 通威微电子有限公司 | Silicon carbide crystal growth device |
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| CN113668064A (en) * | 2021-07-29 | 2021-11-19 | 山西烁科晶体有限公司 | Irradiation method for optimizing resistivity of silicon carbide wafer |
| CN114457425A (en) * | 2022-04-12 | 2022-05-10 | 杭州乾晶半导体有限公司 | Method and device for recycling silicon carbide seed crystals |
| CN114457425B (en) * | 2022-04-12 | 2022-08-23 | 杭州乾晶半导体有限公司 | Method and device for recycling silicon carbide seed crystals |
| CN114864529A (en) * | 2022-05-18 | 2022-08-05 | 北京青禾晶元半导体科技有限责任公司 | Silicon carbide composite substrate and manufacturing method and application thereof |
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Application publication date: 20210507 |