CN112751548B - Filter and method of operation - Google Patents
Filter and method of operation Download PDFInfo
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- CN112751548B CN112751548B CN201911050709.1A CN201911050709A CN112751548B CN 112751548 B CN112751548 B CN 112751548B CN 201911050709 A CN201911050709 A CN 201911050709A CN 112751548 B CN112751548 B CN 112751548B
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- 238000000034 method Methods 0.000 title claims abstract description 47
- 239000003990 capacitor Substances 0.000 claims description 69
- 238000001914 filtration Methods 0.000 claims description 51
- 238000010586 diagram Methods 0.000 description 10
- 238000012546 transfer Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000013515 script Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/0202—Two or more dimensional filters; Filters for complex signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/0219—Compensation of undesirable effects, e.g. quantisation noise, overflow
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Networks Using Active Elements (AREA)
Abstract
The present disclosure provides a filter and a method of operation. The filter includes a switch circuit, a first filter circuit and a second filter circuit. The first filter circuit is coupled to the switch circuit. The second filter circuit is coupled to the switch circuit. The switch circuit is controlled to control the first filter circuit to execute a first filter program on an input signal or control the first filter circuit to execute a second filter program on the input signal in cooperation with the second filter circuit.
Description
Technical Field
Embodiments described in this disclosure relate to circuit technology, and more particularly, to a filter and a method of operation.
Background
With the development of technology, filters have been applied to various kinds of circuitry. The filter is used for filtering out the component signals of the frequency bands which are not needed in the signals for subsequent processing. When the circuitry is to be adapted to different applications, different filters are typically used to perform different filtering procedures.
Disclosure of Invention
Some embodiments of the present disclosure relate to a filter. The filter includes a switch circuit, a first filter circuit and a second filter circuit. The first filter circuit is coupled to the switch circuit. The second filter circuit is coupled to the switch circuit. The switch circuit is controlled to control the first filter circuit to execute a first filter program on an input signal or control the first filter circuit to execute a second filter program in cooperation with the input signal of the second filter circuit.
Some embodiments of the present disclosure relate to a method of operating a filter. The operation method comprises the following steps: controlling a switch to be turned on or turned off; when the switch is in a first state, a first filtering procedure is executed on an input signal through a first filtering circuit; and when the switch is in a second state, executing a second filtering program on the input signal through the first filtering circuit and the second filtering circuit.
In summary, the filter of the present disclosure may cover a variety of different filtering procedures.
Drawings
The foregoing and other objects, features, advantages and embodiments of the present disclosure will be apparent from the following description of the drawings in which:
FIG. 1 is a circuit diagram of a filter shown in accordance with some embodiments of the present disclosure;
FIG. 2 is a circuit diagram of a filter shown in accordance with some embodiments of the present disclosure;
FIG. 3 is a circuit diagram of a filter shown in accordance with some embodiments of the present disclosure;
FIGS. 4A-4H are circuit diagrams of various low pass filter circuits shown in accordance with some embodiments of the present disclosure;
FIGS. 5A-5G are circuit diagrams of various high pass filter circuits shown in accordance with some embodiments of the present disclosure; and
Fig. 6 is a flow chart illustrating a method of operating a filter according to some embodiments of the present disclosure.
Symbol description
100. 200, 300: Filter device
110. 210, 310: Switching circuit
120、130、220、230、320、330、
420-1 To 420-8, 530-1 to 530-7: filtering circuit
IN, IN3, IN4, IN5, IN6, IN7, IN8: input terminal
OUT, OT: an output terminal
V IN: input signal
V OUT: output signal
V IN+、VIN -: differential input signal
V OUT+、VOUT-: differential output signal
N1, N2: node
S: switch
GND: ground end
AM1 to AM12: amplifier
R A、RB、RC、RL, R1 to R33: resistor
C A、CB、Ci, C1-C28: capacitance device
L1 to L5: inductance
600: Method of operation
S602, S604, S606: operation of
Detailed Description
The term "coupled" as used herein may also refer to "electrically coupled," and the term "connected" may also refer to "electrically connected. "coupled" and "connected" may also mean that two or more elements co-operate or interact with each other.
Reference is made to fig. 1. Fig. 1 is a circuit diagram of a filter 100 shown in accordance with some embodiments of the present disclosure. The filter 100 has an input IN and an output OUT. The input terminal IN is used for receiving the input signal V IN. In this embodiment, the input signal V IN is a single-ended signal. The filter 100 is configured to perform filtering on the input signal V IN to filter OUT component signals of unwanted frequency bands, thereby generating an output signal V OUT at the output terminal OUT.
In some embodiments, the filter 100 is applied to an Ethernet (Ethernet) chip, but the disclosure is not limited thereto. Various applications are within the scope of the present disclosure.
For example, in fig. 1, the filter 100 includes a switch circuit 110, a filter circuit 120, and a filter circuit 130. The switch circuit 110 is coupled to the filter circuit 120 and the filter circuit 130. The filter circuit 120 is a low pass filter circuit. The filter circuit 130 is a high pass filter circuit. The input terminal IN of the filter 100 is coupled to the output terminal OUT of the filter 100 via the filter circuit 130 and the filter circuit 120 IN sequence. That is, IN fig. 1, the filter circuit 130 (high-pass filter circuit) is closer to the input terminal IN than the filter circuit 120.
The switching circuit 110 includes a switch S. The switch S may be implemented as a transistor. The switch S is controlled to control whether the filtering circuit 120 performs a low-pass filtering process on the input signal V IN or the filtering circuit 120 cooperates with the filtering circuit 130 to perform a band-pass filtering process on the input signal V IN. In other words, the filter 100 may perform different filtering procedures based on the state of the switch S (e.g., on or off).
For example, when the switch S is turned on, the input signal V IN is directly input into the filter circuit 120 via the path of the switch S. Since the filter circuit 120 is a low-pass filter circuit, the filter circuit 120 performs a low-pass filtering process on the input signal V IN. When the switch S is turned off, the input signal V IN is input into the filter circuit 120 through the filter circuit 130. Since the filter circuit 130 is a high-pass filter circuit and the filter circuit 120 is a low-pass filter circuit, the filter circuit 130 and the filter circuit 120 sequentially perform a high-pass filter process and a low-pass filter process on the input signal V IN. Equivalently, the filtering circuit 120 cooperates with the filtering circuit 130 to perform a band-pass filtering procedure on the input signal V IN.
Since the filter 100 can perform at least two filtering procedures, the circuitry can be adapted to a variety of different applications (e.g., ethernet GIGA mode and Ethernet 2.5G mode) if the filter 100 is configured into circuitry.
In addition, for example, the application of the Ethernet network, the input signal V IN is approximately equal to 1.65 volts. When the switch S is turned off, the filter circuit 130 (high-pass filter circuit) is disposed near the input terminal IN, so that the filter circuit 130 (high-pass filter circuit) can isolate the high-voltage input signal V IN before the filter circuit 130. Thus, the size of the components in the filter circuit 120 can be designed smaller and the reliability of the circuit can be improved. IN some embodiments, when the switch S is turned on, IN order to avoid the filter circuit 120 from directly receiving the input signal V IN with high voltage, a small current can be drawn at the node N1 or the input terminal IN4 of the amplifier AM1, so that the size of the components IN the filter circuit 120 can be designed smaller and the reliability of the circuit can be improved.
The filter circuit 120 includes an amplifier AM1, a resistor R A, a resistor R B, a resistor R C, a capacitor C A, and a capacitor C B. The amplifier AM1 includes an input terminal IN3, an input terminal IN4, and an output terminal (i.e., the output terminal OUT of the filter 100). The input terminal IN3 is a positive input terminal. The input IN4 is a negative input. The input terminal IN3 is coupled to the ground terminal GND. The capacitor C B and the resistor R B are coupled to the input IN4. Resistor R C and capacitor C B are coupled to the output terminal OUT. The capacitor C A is coupled between the node N1 and the ground GND. Resistor R A, resistor R B, resistor R C, and capacitor C A are coupled to node N1. Resistor R A, switch S, and filter circuit 130 are coupled to node N2.
The product of resistor R B, resistor R C, capacitor C A, and capacitor C B affects the cut-off frequency of filter circuit 120. For example, the larger the product of the resistor R B, the resistor R C, the capacitor C A, and the capacitor C B, the lower the cut-off frequency of the filter circuit 120.
The filter circuit 130 includes a capacitor C i and a resistor R L. The capacitor C i and the switch S are coupled IN parallel between the input IN and the node N2, and the resistor R L is coupled between the input IN and the ground GND. IN some embodiments, the capacitor C i and the switch S are coupled IN parallel between the input terminal IN and the node N2, and the resistor R L is coupled between the node N2 and the ground terminal GND.
The capacitor C i affects the cut-off frequency of the filter circuit 130. For example, the larger the capacitance value of the capacitor C i, the lower the cut-off frequency of the filter circuit 130.
In some embodiments, the resistance value of resistor R A is substantially between 100 and 1000 ohms (ohms). The resistance value of resistor R B is substantially equal to 1000 ohms. The resistance value of resistor R C is substantially equal to 2000 ohms. The resistance value of resistor R L is substantially between 50 and 15000 ohms. The capacitance of capacitor C A is substantially equal to 3 picofarads (pF). The capacitance of capacitor C B is substantially equal to 0.5 picofarads. The capacitance of capacitor C i is substantially equal to 40 picofarads. However, the disclosure is not limited to the above values, and various applicable values are within the scope of the disclosure.
Reference is made to fig. 2. Fig. 2 is a circuit diagram of a filter 200 shown in accordance with some embodiments of the present disclosure. In this embodiment, the input signals received at the two inputs of filter 200 are differential (differential) input signals, such as: differential input signal V IN+ and V IN-. The filter 200 is configured to perform filtering on the differential input signals V IN+ and V IN- to filter out component signals of unwanted frequency bands, thereby generating differential output signals V OUT+ and V OUT-. For ease of understanding, like elements in fig. 2 will be given the same reference numerals as in fig. 1.
For the example of fig. 2, filter 200 includes a switching circuit 210, a filtering circuit 220, and a filtering circuit 230. The filter circuit 220 is a low pass filter circuit. The filter circuit 230 is a high pass filter circuit. The switching circuit 210 includes two switches S. The two switches S are coupled between the filter circuit 220 and the filter circuit 230. The filter circuit 230 includes two capacitors C i and two resistors R L. Equivalently, the switch circuit 210 of fig. 2 includes two sets of switch circuits 110 of fig. 1, and the filter circuit 230 of fig. 2 includes two sets of filter circuits 130 of fig. 1. The coupling manners of the elements in the switch circuit 210 and the filter circuit 230 are similar to those of the switch circuit 110 and the filter circuit 130 in fig. 1, respectively, and thus are not repeated here. IN some embodiments, the capacitor C i and the switch S are coupled IN parallel between the input terminal IN and the node N2, and the resistor R L is coupled between the node N2 and the ground terminal GND.
The filter circuit 220 includes an amplifier AM2, two resistors R A, two resistors R B, two resistors R C, two capacitors C A, and two capacitors C B. Equivalently, the filter circuit 220 of fig. 2 includes two sets of the filter circuits 120 of fig. 1, but only one amplifier AM2 is configured. The amplifier AM2 comprises an input IN5, an input IN6 and two outputs. The input terminal IN5 is a positive input terminal. The input IN6 is a negative input. The two outputs of the amplifier AM2 are the two outputs of the filter 100. A resistor R B and a capacitor C B are coupled to the input terminal IN5. The other resistor R B and the other capacitor C B are coupled to the input terminal IN6. The coupling manner of other elements in the filter circuit 220 of fig. 2 is similar to that of the filter circuit 120 of fig. 1, and thus, the description thereof is omitted.
As described above, when the two switches S of the switch circuit 210 are turned on, the filter circuit 220 performs the low-pass filtering process on the differential input signals V IN+ and V IN-. When the two switches S of the switch circuit 210 are turned off, the filter circuit 220 performs a band-pass filtering procedure on the differential input signals V IN+ and V IN- in cooperation with the filter circuit 230.
Reference is made to fig. 3. Fig. 3 is a circuit diagram of a filter 300 shown in accordance with some embodiments of the present disclosure. For the example of fig. 3, filter 300 includes a switching circuit 310, a filtering circuit 320, and a filtering circuit 330. The switching circuit 310 of fig. 3 is similar to the switching circuit 110 of fig. 1. The filter circuit 320 of fig. 3 is similar to the filter circuit 120 of fig. 1. The filter circuit 330 of fig. 3 is similar to the filter circuit 130 of fig. 1. The difference between fig. 3 and fig. 1 is that the input terminal IN of the filter 300 is coupled to the output terminal OUT of the filter 300 via the filter circuit 320 and the filter circuit 330 IN sequence. The filter circuit 320 is a low pass filter circuit. The filter circuit 330 is a high pass filter circuit. That is, IN fig. 3, the filter circuit 320 (low-pass filter circuit) is closer to the input terminal IN than the filter circuit 330.
Specifically, the switching circuit 310 includes a switch S. The filter circuit 320 includes an amplifier AM3, a resistor R A, a resistor R B, a resistor R C, a capacitor C A, and a capacitor C B. The amplifier AM3 includes an input terminal IN7, an input terminal IN8, and an output terminal OT. The input terminal IN7 is a positive input terminal. The input IN8 is a negative input. The input terminal IN7 is coupled to the ground terminal GND. The capacitor C B and the resistor R B are coupled to the input IN8. Resistor R C and capacitor C B are coupled to the output terminal OT of the amplifier AM 3. The capacitor C A is coupled between the node N1 and the ground GND. Resistor R A, resistor R B, resistor R C, and capacitor C A are coupled to node N1. Resistor R A is coupled between input IN and node N1. The filter circuit 330 includes a capacitor C i. The capacitor C i is coupled in parallel with the switch S between the output OT of the amplifier AM3 and the output OUT of the filter 300.
When the switch S of the switching circuit 310 is turned on, the filtering circuit 320 performs a low-pass filtering procedure on the input signal V IN. When the switch S of the switch circuit 310 is turned off, the filter circuit 320 and the filter circuit 330 sequentially perform the low-pass filtering process and the high-pass filtering process on the input signal V IN. Equivalently, the filtering circuit 320 cooperates with the filtering circuit 330 to perform a band-pass filtering procedure on the input signal V IN.
Refer to fig. 4A to 4H. Fig. 4A-4H are circuit diagrams of various low pass filter circuits shown in accordance with some embodiments of the present disclosure. In some other embodiments, the filter circuit 120 of FIG. 1 or the filter circuit 320 of FIG. 3 may be replaced with one of the filter circuits 420-1-420-8 of FIGS. 4A-4H.
Specifically, the filter circuit 420-1 of fig. 4A includes a resistor R1 and a capacitor C1. The filter circuit 420-2 of fig. 4B includes an inductor L1 and a resistor R2. The filter circuit 420-3 of fig. 4C includes a resistor R3, an inductor L2, and a capacitor C2. The filter circuit 420-4 of fig. 4D includes an inductor L3, a capacitor C3, and a resistor R4. The filter circuit 420-5 of fig. 4E includes a resistor R5, a resistor R6, a capacitor C4, a capacitor C5, and an amplifier AM4. The filter circuit 420-6 of fig. 4F includes a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C6, a capacitor C7, and an amplifier AM5. The filter circuit 420-7 of fig. 4G includes a resistor R11, a resistor R12, a resistor R13, a resistor R14, a capacitor C8, a capacitor C9, a capacitor C10, and an amplifier AM6. The filter circuit 420-8 of fig. 4H includes a resistor R15, a resistor R16, a resistor R17, a capacitor C11, a capacitor C12, a capacitor C13, and an amplifier AM7.
Reference is made to fig. 5A to 5G. Fig. 5A-5G are circuit diagrams of various high pass filter circuits shown in accordance with some embodiments of the present disclosure. In some other embodiments, the filter circuit 130 of FIG. 1 or the filter circuit 330 of FIG. 3 may be replaced with one of the filter circuits 530-1-530-7 of FIGS. 5A-5G.
Specifically, the filter circuit 530-1 of FIG. 5A includes a resistor R18 and an inductor L4. The filter circuit 530-2 of fig. 5B includes a resistor R19, a capacitor C14, and an inductor L5. The filter circuit 530-3 of fig. 5C includes a resistor R20, a resistor R21, a capacitor C15, a capacitor C16, and an amplifier AM8. The filter circuit 530-4 of fig. 5D includes a resistor R22, a resistor R23, a resistor R24, a resistor R25, a capacitor C17, a capacitor C18, and an amplifier AM9. The filter circuit 530-5 of fig. 5E includes a resistor R26, a resistor R27, a capacitor C19, a capacitor C20, a capacitor C21, and an amplifier AM10. The filter circuit 530-6 of fig. 5F includes a resistor R28, a resistor R29, a resistor R30, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, and an amplifier AM11. The filter circuit 530-7 of fig. 5G includes a resistor R31, a resistor R32, a resistor R33, a capacitor C26, a capacitor C27, a capacitor C28, and an amplifier AM12.
Refer to fig. 6. Fig. 6 is a flow chart illustrating a method 600 of operating a filter according to some embodiments of the present disclosure. The operation method 600 includes operations S602, S604, and S606. In some embodiments, the method 600 of operation is applied to the filter 100 of fig. 1, the filter 200 of fig. 2, or the filter 300 of fig. 3, but the disclosure is not limited thereto. For ease of understanding, the method 600 of operation will be discussed in conjunction with FIG. 1 (or FIG. 3).
In operation S602, the control switch S is turned on or off. In some embodiments, switch S is implemented as a transistor. The voltage level of the control signal for controlling the switch S to be turned on or off may be designed according to the form of a transistor.
In operation S604, when the switch S is in the on state, the filter circuit 120 performs a low-pass filtering procedure on the input signal V IN. In some embodiments, as shown in fig. 3, the filter circuit 320 performs a low pass filter procedure on the input signal V IN.
In operation S606, when the switch S is turned off, the filter circuit 120 performs a band-pass filtering procedure on the input signal V IN in cooperation with the filter circuit 130. Specifically, the filtering circuits 130 and 120 sequentially perform a high-pass filtering process and a low-pass filtering process on the input signal V IN. In some embodiments, as shown in fig. 3, the filtering circuits 320 and 330 may also perform the low-pass filtering process and the high-pass filtering process on the input signal V IN sequentially. Equivalently, the filter circuit 120 (320) cooperates with the filter circuit 130 (330) to perform a bandpass filtering procedure on the input signal V IN.
In summary, the filter of the present disclosure may cover a variety of different filtering procedures.
Various functional elements and blocks are disclosed herein. It will be appreciated by those of ordinary skill in the art that the functional blocks may be implemented by circuits, whether special purpose circuits or general purpose circuits operating under the control of one or more processors and code instructions, which generally include transistors or other circuit elements to control the operation of an electrical circuit in accordance with the functions and operations described herein. As will be further appreciated, the specific structure and interconnection of circuit elements in general may be determined by a compiler (compiler), such as a Register Transfer Language (RTL) compiler. The register transfer language compiler operates on instruction codes (scripts) that are quite similar to the combined language code (assembly language code) to compile the instruction codes into a form for layout or fabrication of the final circuit. Indeed, register transfer languages are known for their role and purpose in facilitating the design of electronic and digital systems.
While the present disclosure has been described with reference to the embodiments, it should be understood that the invention is not limited thereto, but may be variously modified and modified by those skilled in the art without departing from the spirit and scope of the present disclosure, and thus the scope of the present disclosure is defined by the appended claims.
Claims (9)
1. A filter, comprising:
A switching circuit;
A first filter circuit coupled to the switch circuit; and
A second filter circuit coupled to the switch circuit, wherein the switch circuit is controlled to control the first filter circuit to perform a first filter procedure on an input signal or to control the first filter circuit to cooperate with the second filter circuit to perform a second filter procedure on the input signal,
Wherein the first filter circuit comprises:
An amplifier;
A first resistor;
a first capacitor coupled to a first input of the amplifier with the first resistor;
A second resistor coupled to a first output terminal of the amplifier with the first capacitor;
a second capacitor coupled between a first node and a ground; and
The third resistor, the first resistor, the second resistor and the second capacitor are coupled to the first node, and the third resistor, the switch circuit and the second filter circuit are coupled to a second node.
2. The filter of claim 1, wherein the first filter circuit is a low-pass filter circuit and the second filter circuit is a high-pass filter circuit, wherein the first filter process is a low-pass filter process and the second filter process is a band-pass filter process.
3. The filter of claim 1, wherein an input of the filter is coupled to an output of the filter via the second filter circuit and the first filter circuit in sequence, wherein the input is configured to receive the input signal.
4. The filter of claim 1, wherein the switching circuit comprises a first switch and the second filtering circuit comprises:
A third capacitor coupled in parallel with the first switch between the input terminal and the second node; and
A fourth resistor coupled between the input terminal and the ground terminal.
5. The filter of claim 1, wherein the input signal is a pair of differential input signals, and the filter is configured to output a pair of differential output signals according to the pair of differential input signals.
6. A filter, comprising:
A switching circuit;
A first filter circuit coupled to the switch circuit; and
The second filter circuit is coupled to the switch circuit, wherein the switch circuit is controlled to control the first filter circuit to execute a first filter program on an input signal or control the first filter circuit to execute a second filter program on the input signal in cooperation with the second filter circuit, wherein an input end of the filter is coupled to an output end of the filter through the first filter circuit and the second filter circuit in sequence, wherein the first filter circuit is a low-pass filter, and the second filter circuit is a high-pass filter.
7. The filter of claim 6, wherein the first filter circuit comprises:
An amplifier having a first input coupled to a ground;
A first resistor;
a first capacitor coupled to a second input of the amplifier with the first resistor;
a second resistor coupled to an output terminal of the amplifier with the first capacitor;
A second capacitor coupled between a node and the ground; and
And a third resistor coupled between the input terminal and the node.
8. The filter of claim 7, wherein the switching circuit comprises a first switch, and the second filtering circuit comprises:
And a third capacitor coupled in parallel with the first switch between the output end of the amplifier and an output end of the filter.
9. A method of operating a filter for a filter as claimed in any one of claims 1 to 8, comprising:
Controlling a switch to be turned on or turned off;
when the switch is in a first state, a first filtering procedure is executed on an input signal through a first filtering circuit; and
When the switch is in a second state, a second filtering procedure is executed on the input signal through the first filtering circuit and the second filtering circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911050709.1A CN112751548B (en) | 2019-10-31 | 2019-10-31 | Filter and method of operation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911050709.1A CN112751548B (en) | 2019-10-31 | 2019-10-31 | Filter and method of operation |
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| Publication Number | Publication Date |
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| CN112751548A CN112751548A (en) | 2021-05-04 |
| CN112751548B true CN112751548B (en) | 2024-06-18 |
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Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07303030A (en) * | 1994-05-02 | 1995-11-14 | Hitachi Ltd | Semiconductor integrated circuit |
| US6940365B2 (en) * | 2003-07-18 | 2005-09-06 | Rfstream Corporation | Methods and apparatus for an improved discrete LC filter |
| US7092534B2 (en) * | 2004-03-02 | 2006-08-15 | Via Telecom Co., Ltd. | Method and system for reducing pop noise of a sound broadcasting instrument |
| TWI456915B (en) * | 2012-06-07 | 2014-10-11 | Realtek Semiconductor Corp | Filtering device for transceivers |
| CN102983837A (en) * | 2012-11-21 | 2013-03-20 | 昆山北极光电子科技有限公司 | Bootstrap high-pass filtering circuit |
| US9647638B2 (en) * | 2014-07-15 | 2017-05-09 | Qualcomm Incorporated | Architecture to reject near end blockers and transmit leakage |
| CN105675906A (en) * | 2016-03-08 | 2016-06-15 | 江苏仁源电气有限公司 | Direct current brushed motor speed measurement device and speed measurement method |
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