CN112698715A - Execution control method, device, embedded system, equipment and medium - Google Patents
Execution control method, device, embedded system, equipment and medium Download PDFInfo
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
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- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
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Abstract
The invention discloses an execution control method, an execution control device, an embedded system, equipment and a medium, wherein the execution control method comprises the following steps: detecting whether the processor is in an idle state currently or not in real time; if yes, accessing a target address space with non-cache attribute, and positioning idle tasks stored in the target address space; and continuously accessing the target address space and circularly executing the idle task. The technical scheme of the embodiment of the invention can avoid frequent access to the cache when the processor executes the idle task, and can effectively reduce the power consumption of the embedded system.
Description
Technical Field
The embodiment of the invention relates to the technical field of computer application, in particular to an execution control method, an execution control device, an embedded system, equipment and a medium.
Background
The embedded system, as a computer system specially designed to meet a specific field, has a very strict requirement in design and application, and power consumption is an important performance index of the embedded system, and has an important influence on the equipment stability and the application field of the embedded system. In an embedded system, in order to reduce system power consumption, a Central Processing Unit (CPU) is usually controlled to enter a sleep mode by a power management module when the CPU is idle, and the CPU is awakened by the power management module when the CPU needs to execute a task.
In order to ensure the real-time performance of the CPU response task, in the existing embedded system, when the CPU is idle, the CPU is generally not controlled to enter the sleep mode, but is controlled to execute the task with the lowest priority, that is, the idle task (hereinafter referred to as idle task). The following two ways of executing idle tasks by the CPU are available: (1) executing a waiting operation under the waiting instruction wait; (2) and executing preset loop codes, wherein the loop codes correspond to the idle tasks.
However, for a CPU (e.g., a Loongson processor) that does not support wait instructions, the above second method can only be adopted when executing idle tasks, and since a loop code executed by the CPU is set in an address range of a cache memory, a cache hit rate is high, and power consumption of an embedded system is increased. Taking a Loongson processor in the road system as an example, assuming that the number of cores of the Loongson processor is 4, according to the test result, when 4 cores in the Loongson processor run idle tasks, the idle tasks are more than 20% more than that of 1 core running basic system tasks, and when the rest 3 cores run idle tasks.
Disclosure of Invention
Embodiments of the present invention provide an execution control method, an execution control apparatus, an embedded system, a device, and a medium, which can avoid frequent accesses to a cache when a processor executes an idle task, and can effectively reduce power consumption of the embedded system.
In a first aspect, an embodiment of the present invention provides an execution control method, which is executed by a processor in an embedded system, and includes:
detecting whether the processor is in an idle state currently or not in real time;
if yes, accessing a target address space with non-cache attribute, and positioning idle tasks stored in the target address space;
and continuously accessing the target address space and circularly executing the idle task.
In a second aspect, an embodiment of the present invention further provides an execution control apparatus, which is executed by a processor in an embedded system, and includes:
the idle state detection module is used for detecting whether the processor is in an idle state currently or not in real time;
the target address space access module is used for accessing a target address space with non-cache attribute and positioning an idle task stored in the target address space when detecting that the target address space is in an idle state;
and the idle task execution module is used for continuously accessing the target address space and circularly executing the idle task.
In a third aspect, an embodiment of the present invention further provides an embedded system, where the embedded system includes:
one or more processors;
storage means for storing one or more programs;
when the one or more programs are executed by the one or more processors, the one or more processors are caused to implement an execution control method provided in any embodiment of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a computer device, where the computer device includes the embedded system provided in any embodiment of the present invention.
In a fifth aspect, the embodiment of the present invention further provides a computer-readable storage medium, where a computer program is stored on the storage medium, and when the computer program is executed by a processor, the computer program implements an execution control method provided in any embodiment of the present invention.
The technical scheme of the embodiment of the invention detects whether the processor is in an idle state currently or not in real time; if yes, accessing a target address space with non-cache attribute, positioning an idle task stored in the target address space, then continuously accessing the target address space, and circularly executing the idle task.
Drawings
FIG. 1 is a flow chart of a control method according to a first embodiment of the present invention;
fig. 2 is a flowchart of an execution control method according to a second embodiment of the present invention;
fig. 3 is a structural diagram of an execution control apparatus in a third embodiment of the present invention;
FIG. 4 is a block diagram of an embedded system according to a fourth embodiment of the present invention;
fig. 5 is a schematic structural diagram of a computer device in the fifth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a flowchart of an execution control method according to an embodiment of the present invention, where this embodiment is applicable to a situation where a processor in an embedded system is controlled to execute tasks, and the method may be executed by an execution control apparatus, where the apparatus may be implemented by software and/or hardware, and may be generally integrated in a processor in an embedded system, and specifically includes the following steps:
In this embodiment, optionally, the number of task threads currently executed by the processor may be obtained in real time, and if the number of task threads is smaller than a preset threshold, it may be determined that the processor is currently in an idle state; otherwise, if the number of the task threads is larger than or equal to the preset threshold value, determining that the processor is not in an idle state currently.
In this embodiment, if it is detected that the processor is currently in an idle state, step 120 is executed; and if the processor is detected not to be in the idle state currently, continuously acquiring the number of the task threads currently executed by the processor in real time to detect whether the processor is in the idle state.
In this embodiment, when it is determined that the processor is in an idle state, the processor is controlled to access a target address space of a non-cache attribute, where an idle task is stored in advance.
The target address space is different from the address space specified in the cache memory, that is, the target address space has a non-cached attribute (Uncached). The idle task may specifically be a preset program loop code. Optionally, after the processor accesses the target address space, the idle task may be acquired in the target address space according to a preset identifier.
And step 130, continuously accessing the target address space and circularly executing the idle task.
In this embodiment, when the processor is in an idle state, the processor is controlled to continuously access the target address space with the non-cache attribute and circularly execute the idle task, so that on one hand, the real-time performance of the processor responding to the task can be ensured; on the other hand, frequent access to the cache can be avoided when the processor executes idle tasks, so that the power consumption of the embedded system can be effectively reduced.
The technical scheme of the embodiment of the invention detects whether the processor is in an idle state currently or not in real time; if yes, accessing a target address space with non-cache attribute, positioning an idle task stored in the target address space, then continuously accessing the target address space, and circularly executing the idle task.
Example two
This embodiment is a further refinement of the first embodiment, and the same or corresponding terms as those in the first embodiment are explained, and this embodiment is not repeated. Fig. 2 is a flowchart of an execution control method according to a second embodiment of the present invention, in this embodiment, the technical solution of this embodiment may be combined with one or more methods in the solutions of the foregoing embodiments, and in this embodiment, as shown in fig. 2, the method according to the second embodiment of the present invention may further include:
and step 210, acquiring at least one working parameter in real time.
In this step, the working parameters currently corresponding to the processor may be obtained, where the working parameters may include the number of task threads currently executed by the processor, the occupancy rate of the processor, and the like.
In one implementation manner of the embodiment of the present invention, the working parameters include processor occupancy and processor idle rate; detecting whether the processor is currently in an idle state according to the working parameters, wherein the detecting comprises the following steps: and if the occupancy rate of the processor is less than a preset first threshold value and the idle rate of the processor is greater than a preset second threshold value, determining that the processor is in an idle state.
In this step, the occupancy rate may be a percentage of the total resource occupied by the tasks executed by the processor on the processor, and the processor idle rate may be a percentage of the number of cores in the processor that do not execute the tasks and the total number of cores in the processor. In one embodiment, the processor may obtain the processor occupancy rate and the processor idle rate according to the GetSystemTimes function.
In this embodiment, after the processor occupancy rate and the processor idle rate are obtained, the processor occupancy rate is compared with a preset first threshold, the processor idle rate is compared with a preset second threshold, and if the processor occupancy rate is smaller than the preset first threshold and the processor idle rate is greater than the preset second threshold, it is determined that the processor is in an idle state; otherwise, if the occupancy rate of the processor is greater than or equal to a preset first threshold value, or the idle rate of the processor is less than or equal to a preset second threshold value, determining that the processor is not in an idle state, and continuously acquiring the current corresponding working parameters of the processor to detect whether the processor is in the idle state.
Therefore, the accuracy of the processor idle state detection result can be improved by acquiring the processor occupancy rate and the processor idle rate and determining whether the processor is in the idle state according to the processor occupancy rate and the processor idle rate.
In one embodiment of this embodiment, the idle task includes an absolute jump instruction pointing to the target address space to enable persistent access to the target address space.
The absolute jump instruction is set in the idle task, so that the idle task executed by the processor can be ensured to be always located in the target address space, and the situation that the address corresponding to the idle task is located outside the target address space in the process of circularly executing the idle task by the processor is avoided, so that frequent access to the cache when the processor executes the idle task can be avoided, and the power consumption of the embedded system can be effectively reduced.
In a specific embodiment, the idle task may be a program loop code composed of a plurality of assembler instructions, the target address space may be a kernel segment kseg1 in the processor, and the kseg1 segment has a non-cache attribute. Specifically, the processor may be a processor that does not support wait instructions, and typically, the processor may be a Loongson processor, and accordingly, the target address space may be kseg1 segment in the Loongson address space.
In this embodiment, the target address space may be 0xa0000000 to 0xbfffffff, and the idle task formed by the assembly instructions may specifically be as follows:
wherein "section" _ kseg1 "" in the assembly instruction indicates that the target address space is set to the kseg1 segment in the Loongson address space; ". ent idleloop" represents the name that defines the idle task; "1" indicates the start of loop execution of the idle task; "b 1 b" represents an absolute jump instruction pointing to the target address space; ". end idleloop" indicates that execution of the idle task is finished.
And step 240, continuously accessing the target address space, and circularly executing the idle task.
In this embodiment, in the process of executing the idle task in a loop, the method further includes: and when a new user task is detected, switching to execute the new user task.
In the process of circularly executing the idle task, if a new user task is detected, the processor finishes the execution process of the idle task and starts to execute the new user task, so that the real-time performance of the processor responding to the task can be ensured.
In a specific embodiment, taking a core processor in a road system as an example, according to the execution control method provided in this embodiment, after the control processor executes a task, it is shown according to a test result that the power consumption of the road system can be reduced by 15% to 25%.
The technical scheme of the embodiment of the invention can avoid frequent access to the cache when the processor executes the idle task and effectively reduce the power consumption of the embedded system by acquiring at least one item of working parameter in real time, detecting whether the processor is in the idle state currently according to each working parameter, if so, accessing the target address space with non-cache attribute, positioning the idle task stored in the target address space, then continuously accessing the target address space and circularly executing the idle task.
EXAMPLE III
Fig. 3 is a block diagram of an execution control apparatus according to a third embodiment of the present invention, where the execution control apparatus is executed by a processor in an embedded system, and the apparatus includes: an idle state detection module 310, a target address space access module 320, and an idle task execution module 330.
The idle state detection module 310 is configured to detect whether the processor is currently in an idle state in real time;
a target address space access module 320, configured to, when detecting that the processor is currently in an idle state, access a target address space with a non-cache attribute, and locate an idle task stored in the target address space;
an idle task execution module 330, configured to continuously access the target address space and execute the idle task in a loop.
The technical scheme of the embodiment of the invention detects whether the processor is in an idle state currently or not in real time; if yes, accessing a target address space with non-cache attribute, positioning an idle task stored in the target address space, then continuously accessing the target address space, and circularly executing the idle task.
On the basis of the above embodiments, the idle task includes an absolute jump instruction pointing to the target address space to achieve continuous access to the target address space; the target address space is kernel segment kseg 1;
the idle state detection module 310 may include:
the working parameter acquisition unit is used for acquiring at least one working parameter in real time and detecting whether the processor is in an idle state currently or not according to each working parameter; the working parameters comprise processor occupancy rate and processor idle rate;
and the idle state determining unit is used for determining that the processor is in an idle state when the occupancy rate of the processor is less than a preset first threshold and the idle rate of the processor is greater than a preset second threshold.
The idle task execution module 330 may include:
and the task switching unit is used for switching and executing the new user task when the new user task is detected.
The execution control device provided by the embodiment of the invention can execute the execution control method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method.
Example four
Fig. 4 is a schematic structural diagram of an embedded system according to a fourth embodiment of the present invention, as shown in fig. 4, the embedded system includes a processor 410, a memory 420, an input device 430, and an output device 440; the number of the processors 410 in the embedded system may be one or more, and one processor 410 is taken as an example in fig. 4; the processor 410, the memory 420, the input device 430, and the output device 440 in the embedded system may be connected by a bus or other means, as exemplified by the bus connection in fig. 4. The memory 420 serves as a computer-readable storage medium for storing software programs, computer-executable programs, and modules, such as program instructions/modules corresponding to an execution control method according to any embodiment of the present invention (e.g., the idle state detection module 310, the target address space access module 320, and the idle task execution module 330 in an execution control apparatus). The processor 410 executes various functional applications and data processing of the embedded system by executing software programs, instructions and modules stored in the memory 420, that is, implements one of the execution control methods described above. That is, the program when executed by the processor implements:
detecting whether the processor is in an idle state currently or not in real time;
if yes, accessing a target address space with non-cache attribute, and positioning idle tasks stored in the target address space;
and continuously accessing the target address space and circularly executing the idle task.
The memory 420 may mainly include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 420 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, the memory 420 may further include memory located remotely from the processor 410, which may be connected to the embedded system over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof. The input device 430 may be used to receive input numeric or character information and generate key signal inputs related to user settings and function controls of the embedded system, and may include a keyboard and a mouse, etc. The output device 440 may include a display device such as a display screen.
EXAMPLE five
Fig. 5 is a schematic structural diagram of a computer device in a fifth embodiment of the present invention, and as shown in fig. 5, the computer device 501 includes an embedded system 502 provided in any embodiment of the present invention, and the embedded system includes a processor 503 provided in any embodiment of the present invention. In this embodiment, the processor 503 detects whether the processor is currently in an idle state in real time; if yes, accessing a target address space with non-cache attribute, positioning an idle task stored in the target address space, then continuously accessing the target address space, and circularly executing the idle task.
EXAMPLE six
The sixth embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the method according to any embodiment of the present invention. Of course, the embodiment of the present invention provides a computer-readable storage medium, which can perform related operations in an execution control method provided in any embodiment of the present invention. That is, the program when executed by the processor implements:
detecting whether the processor is in an idle state currently or not in real time;
if yes, accessing a target address space with non-cache attribute, and positioning idle tasks stored in the target address space;
and continuously accessing the target address space and circularly executing the idle task.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention.
It should be noted that, in the above embodiment of the positioning apparatus for testing an exception, each unit and each module included in the positioning apparatus are only divided according to functional logic, but are not limited to the above division, as long as the corresponding function can be implemented; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. An execution control method executed by a processor in an embedded system, comprising:
detecting whether the processor is in an idle state currently or not in real time;
if yes, accessing a target address space with non-cache attribute, and positioning idle tasks stored in the target address space;
and continuously accessing the target address space and circularly executing the idle task.
2. The method of claim 1, wherein:
the idle task includes an absolute jump instruction that points to the target address space to enable continued access to the target address space.
3. The method of claim 1, wherein detecting whether the processor is currently in an idle state in real time comprises:
and acquiring at least one working parameter in real time, and detecting whether the processor is in an idle state currently according to each working parameter.
4. The method of claim 3, wherein the operating parameters include processor occupancy and processor idleness;
detecting whether the processor is currently in an idle state according to the working parameters, wherein the detecting comprises the following steps:
and if the occupancy rate of the processor is less than a preset first threshold value and the idle rate of the processor is greater than a preset second threshold value, determining that the processor is in an idle state.
5. The method of claim 1, wherein in the process of executing the idle task in a loop, further comprising:
and when a new user task is detected, switching to execute the new user task.
6. The method of any of claims 1-5, wherein the target address space is a kernel segment kseg 1.
7. An execution control apparatus to be executed by a processor in an embedded system, the apparatus comprising:
the idle state detection module is used for detecting whether the processor is in an idle state currently or not in real time;
the target address space access module is used for accessing a target address space with non-cache attribute and positioning an idle task stored in the target address space when detecting that the processor is in an idle state currently;
and the idle task execution module is used for continuously accessing the target address space and circularly executing the idle task.
8. An embedded system, comprising:
one or more processors;
storage means for storing one or more programs;
the execution control method according to any one of claims 1 to 6 is implemented when the one or more programs are executed by the one or more processors so that the one or more processors execute the programs.
9. A computer device comprising an embedded system according to claim 8.
10. A computer-readable storage medium on which a computer program is stored, characterized in that the program, when executed by a processor, implements the execution control method according to any one of claims 1 to 6.
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