CN112666582A - Satellite signal processing method and device, storage medium and electronic equipment - Google Patents

Satellite signal processing method and device, storage medium and electronic equipment Download PDF

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CN112666582A
CN112666582A CN202011463437.0A CN202011463437A CN112666582A CN 112666582 A CN112666582 A CN 112666582A CN 202011463437 A CN202011463437 A CN 202011463437A CN 112666582 A CN112666582 A CN 112666582A
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correlation
coherent accumulation
bit synchronization
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sequence
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CN112666582B (en
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朱凌
周彬
邓祝明
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Nanjing Dayu Semiconductor Co ltd
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Abstract

The present disclosure relates to a method, an apparatus, a storage medium, and an electronic device for processing a satellite signal, the method comprising: the method comprises the steps of carrying out down-mixing on satellite signals to obtain baseband signals, carrying out correlation processing on the baseband signals and local pseudo codes to obtain a correlation sequence corresponding to each data segment, dividing the correlation sequence according to each bit synchronization deviation value to obtain multiple groups of correlation sample point sets, scrambling each group of correlation sample point sets and scrambling sequences, carrying out coherent accumulation to obtain a first coherent accumulation value, determining a second coherent accumulation value corresponding to each bit synchronization deviation value according to the first coherent accumulation value corresponding to each group of correlation sample point sets, and taking the largest second coherent accumulation value as a coherent accumulation result of the data segment. The method and the device can reduce the influence of bit hopping on the useful signal power, are not limited by coherent integration time, and can improve the signal-to-noise ratio of the satellite signal, thereby improving the capacity of a satellite navigation receiver for capturing and tracking weak signals.

Description

Satellite signal processing method and device, storage medium and electronic equipment
Technical Field
The present disclosure relates to the field of signal processing technologies, and in particular, to a method and an apparatus for processing a satellite signal, a storage medium, and an electronic device.
Background
In recent years, navigation technology has been rapidly developed, and satellite navigation is widely applied to multiple fields such as military, meteorological application, transportation, agriculture and the like. In a weak signal environment (e.g., an occluded environment or indoors), a high-sensitivity satellite navigation receiver capable of operating normally in a weak signal environment is often used. In the related art, a coherent integration time is usually lengthened to increase the signal-to-noise ratio, so as to ensure that the satellite navigation receiver can correctly solve the required information from the satellite signals with low signal-to-noise ratio. However, any bit in the navigation message of the satellite signal may hop relative to the previous bit. Meanwhile, due to the periodicity of the navigation message bit, the coherent integration time is limited by the duration of the navigation message bit, so that the effect of prolonging the coherent integration time on improving the signal-to-noise ratio of the satellite signal is influenced, and the capability of a satellite navigation receiver on capturing and tracking weak signals is reduced.
Disclosure of Invention
In order to solve the problems in the related art, the present disclosure provides a method and apparatus for processing a satellite signal, a storage medium, and an electronic device.
According to a first aspect of the embodiments of the present disclosure, there is provided a method for processing a satellite signal, the method including:
carrying out down-mixing on the received satellite signal to obtain a baseband signal corresponding to the satellite signal;
performing correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, where the correlation sequence includes a correlation sampling point corresponding to each sampling point in the data segment, and the sampling points included in the data segment correspond to the sampling points included in the local pseudo code one to one;
dividing the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values to obtain a plurality of groups of correlation sample point sets corresponding to each bit synchronization deviation value, wherein each group of correlation sample point sets comprises at least one correlation sample point;
scrambling each group of related sample point sets in the multiple groups of related sample point sets with a preset scrambling sequence, and performing coherent accumulation on the related sample points in the scrambled group of related sample point sets to obtain a first coherent accumulation value corresponding to the group of related sample point sets;
determining a second coherent accumulation value corresponding to each bit synchronization deviation value according to a first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets;
and taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment.
Optionally, the down-mixing the received satellite signal to obtain a baseband signal corresponding to the satellite signal includes:
mixing the satellite signals by using an intermediate-frequency local oscillator signal to obtain an intermediate-frequency signal;
and mixing the intermediate frequency signal by using a local carrier to obtain the baseband signal.
Optionally, the performing correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal includes:
determining the relevant sequence corresponding to each data segment by using a first formula according to each data segment and the local pseudo code;
the first formula includes:
Figure BDA0002832320560000021
wherein,
Figure BDA0002832320560000022
is the correlation value of the ith correlation sample point in the correlation sequence, ci+nFor the i + n th sample point, p, in the data segmentnFor the nth chip, N, in the local pseudo codesegI is greater than or equal to 0 and less than or equal to N for the number of samples included in the data segmentseg-an integer of 1.
Optionally, the dividing the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values to obtain a plurality of groups of correlation sample sets corresponding to each bit synchronization deviation value includes:
for each bit synchronization deviation value, determining the target number of the relevant sample point set corresponding to the bit synchronization deviation value by using a second formula according to the first number and the second number; the first number is the number of the correlated sampling points included in the correlation sequence, and the second number is the number of chips included in the scrambling code sequence;
the second formula includes:
Figure BDA0002832320560000031
wherein navNum is the target number, N is the first number, NcodeFor the second number, s is the bit synchronization offset value;
and dividing the related sequence according to the target number, the first number, the second number and the bit synchronization deviation value to obtain the target number group of the related sample point set corresponding to the bit synchronization deviation value.
Optionally, the scrambling each group of correlated sample sets in the multiple groups of correlated sample sets with a preset scrambling sequence, and performing coherent accumulation on the correlated sample points in the scrambled group of correlated sample sets to obtain a first coherent accumulation value corresponding to the group of correlated sample sets includes:
determining a first coherent accumulation value corresponding to each group of related sample point sets by using a third formula;
the third formula includes:
Figure BDA0002832320560000041
wherein,
Figure BDA0002832320560000042
is the navldxA first coherent accumulation value of a set of group-correlated samples,
Figure BDA0002832320560000043
the correlation value of the mth correlation sample point in the correlation sequence,
Figure BDA0002832320560000044
for the Nth in the scrambling code sequencecode-s + m chips of the chip number,
Figure BDA0002832320560000045
for mod (m-s, N) in the scrambling sequencecode) Chip, mod () is a remainder function.
Optionally, the determining, according to the first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets, the second coherent accumulation value corresponding to each bit synchronization offset value includes:
and aiming at each bit synchronization deviation value, performing maximum likelihood coherent accumulation on a first coherent accumulation value corresponding to each group of related sample point sets corresponding to the bit synchronization deviation value to obtain a second coherent accumulation value corresponding to the bit synchronization deviation value.
According to a second aspect of the embodiments of the present disclosure, there is provided an apparatus for processing satellite signals, the apparatus comprising:
the frequency mixing module is used for carrying out frequency mixing on the received satellite signals to obtain baseband signals corresponding to the satellite signals;
a correlation module, configured to perform correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, where the correlation sequence includes a correlation sampling point corresponding to each sampling point in the data segment, and the sampling points included in the data segment correspond to the sampling points included in the local pseudo code one to one;
a dividing module, configured to divide the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values, so as to obtain a plurality of groups of correlated sample sets corresponding to each bit synchronization deviation value, where each group of correlated sample sets includes at least one correlated sample;
the processing module is used for scrambling each group of related sample point sets in the multiple groups of related sample point sets with a preset scrambling sequence and performing coherent accumulation on the related sample points in the scrambled group of related sample point sets to obtain a first coherent accumulation value corresponding to the group of related sample point sets;
a determining module, configured to determine a second coherent accumulation value corresponding to each bit synchronization deviation value according to a first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets;
the processing module is further configured to use the largest second coherent accumulation value as a target coherent accumulation value, and use the target coherent accumulation value as a coherent accumulation result of the data segment.
Optionally, the mixing module includes:
the first frequency mixing submodule is used for carrying out frequency mixing on the satellite signal by utilizing an intermediate frequency local oscillation signal to obtain an intermediate frequency signal;
and the second frequency mixing submodule is used for mixing the intermediate frequency signal by using a local carrier to obtain the baseband signal.
Optionally, the correlation module is configured to:
determining the relevant sequence corresponding to each data segment by using a first formula according to each data segment and the local pseudo code;
the first formula includes:
Figure BDA0002832320560000051
wherein,
Figure BDA0002832320560000052
is the correlation value of the ith correlation sample point in the correlation sequence, ci+nFor the i + n th sample point, p, in the data segmentnFor the nth chip, N, in the local pseudo codesegI is greater than or equal to 0 for the number of samples included in the data segmentAnd is less than or equal to Nseg-an integer of 1.
Optionally, the dividing module includes:
the calculation submodule is used for determining the target number of the relevant sample point set corresponding to the bit synchronization deviation value by using a second formula according to the first number and the second number aiming at each bit synchronization deviation value; the first number is the number of the correlated sampling points included in the correlation sequence, and the second number is the number of chips included in the scrambling code sequence;
the second formula includes:
Figure BDA0002832320560000061
wherein navNum is the target number, N is the first number, NcodeFor the second number, s is the bit synchronization offset value;
and the dividing submodule is used for dividing the related sequence according to the target number, the first number, the second number and the bit synchronization deviation value so as to obtain the target number group of the related sample point set corresponding to the bit synchronization deviation value.
Optionally, the processing module is configured to:
determining a first coherent accumulation value corresponding to each group of related sample point sets by using a third formula;
the third formula includes:
Figure BDA0002832320560000062
wherein,
Figure BDA0002832320560000063
a first coherent accumulation value for a second navldx group of correlated sample sets,
Figure BDA0002832320560000064
for the mth correlated sampling point in the correlated sequenceThe correlation value of (a) is calculated,
Figure BDA0002832320560000065
for the Nth in the scrambling code sequencecode-s + m chips of the chip number,
Figure BDA0002832320560000066
for mod (m-s, N) in the scrambling sequencecode) Chip, mod () is a remainder function.
Optionally, the determining module is configured to:
and aiming at each bit synchronization deviation value, performing maximum likelihood coherent accumulation on a first coherent accumulation value corresponding to each group of related sample point sets corresponding to the bit synchronization deviation value to obtain a second coherent accumulation value corresponding to the bit synchronization deviation value.
According to a third aspect of embodiments of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of the method described in the first aspect of embodiments of the present disclosure.
According to a fourth aspect of the embodiments of the present disclosure, there is provided an electronic apparatus including:
a memory having a computer program stored thereon;
a processor for executing the computer program in the memory to implement the steps of the method in the first aspect of an embodiment of the disclosure.
According to the technical scheme, the method comprises the steps of firstly carrying out down-mixing on received satellite signals to obtain baseband signals corresponding to the satellite signals, carrying out correlation processing on the baseband signals and local pseudo codes to obtain correlation sequences corresponding to each data section included in the baseband signals, then respectively dividing the correlation sequences according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values to obtain a plurality of groups of relevant sample point sets corresponding to each bit synchronization deviation value, scrambling each group of relevant sample point sets in the plurality of groups of relevant sample point sets with a scrambling code sequence, carrying out coherent accumulation on relevant sample points in the scrambled group of relevant sample point sets to obtain first coherent accumulation values corresponding to the group of relevant sample point sets, and then determining second coherent accumulation values corresponding to each bit synchronization deviation value according to the first coherent accumulation values corresponding to each group of relevant sample point sets in the plurality of groups of relevant sample point sets, and finally, taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment. According to the method, a plurality of groups of related sample sets and scrambling sequences are obtained by dividing related sequences through each bit synchronization offset value, a second coherent accumulated value corresponding to the bit synchronization offset value is determined, the largest second coherent accumulated value is used as a coherent accumulated result of a data segment, the influence of bit hopping on useful signal power can be reduced, the coherent accumulated result is not limited by coherent integration time, the signal to noise ratio of satellite signals can be improved, and therefore the capacity of a satellite navigation receiver for capturing and tracking weak signals is improved.
Additional features and advantages of the disclosure will be set forth in the detailed description which follows.
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The accompanying drawings, which are included to provide a further understanding of the disclosure and are incorporated in and constitute a part of this specification, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure without limiting the disclosure. In the drawings:
FIG. 1 is a flow diagram illustrating processing of a satellite signal in accordance with an exemplary embodiment;
FIG. 2 is a flow chart of one step 103 shown in the embodiment of FIG. 1;
FIG. 3 is a diagram illustrating a related set of sample points and scrambling code sequences, according to an example embodiment;
FIG. 4 is a block diagram illustrating a satellite signal processing apparatus according to an exemplary embodiment;
FIG. 5 is a block diagram of a mixing module shown in the embodiment of FIG. 4;
FIG. 6 is a block diagram of a partitioning module shown in the embodiment of FIG. 4;
FIG. 7 is a block diagram illustrating an electronic device in accordance with an example embodiment.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the exemplary embodiments below are not intended to represent all implementations consistent with the present disclosure. Rather, they are merely examples of methods and apparatus consistent with certain aspects of the present disclosure, as detailed in the appended claims.
Before introducing the method, the apparatus, the storage medium, and the electronic device for processing satellite signals provided by the present disclosure, an application scenario related to various embodiments of the present disclosure is first introduced. The application scenario may be a satellite navigation receiver, that is, the execution subject of the satellite signal processing method provided by the present disclosure is the satellite navigation receiver. A satellite navigation receiver may receive satellite signals transmitted by satellites. The Satellite signal may be a GPS (Global Positioning System, chinese), BDS (BeiDou Navigation Satellite System, chinese), or other GNSS (Global Navigation Satellite System, chinese), which is not limited in this disclosure.
FIG. 1 is a flow diagram illustrating processing of a satellite signal according to an exemplary embodiment. As shown in fig. 1, the method comprises the steps of:
step 101, performing down-mixing on the received satellite signal to obtain a baseband signal corresponding to the satellite signal.
For example, the satellite navigation receiver may receive a satellite signal sent by a target satellite through the radio frequency antenna, and after receiving the satellite signal, mix the satellite signal with an intermediate frequency local oscillator signal to obtain an intermediate frequency signal. The target satellite is any one of the satellites to be captured, and the specific way of obtaining the intermediate frequency signal may be as follows: firstly, the satellite signal is filtered and amplified through a pre-filter and a pre-amplifier, and meanwhile, a local oscillator is used for generating an intermediate-frequency local oscillation signal. The filtered and amplified satellite signals are then mixed by an intermediate frequency local oscillator signal, which may have a frequency of 4.076MHz, and sampled by an analog-to-digital converter to obtain an intermediate frequency signal corresponding to the satellite signals. The satellite navigation receiver may then mix the intermediate frequency signal with a local carrier to strip off the carrier signal included in the intermediate frequency signal to obtain a baseband signal. The period of the local carrier may be 1ms, for example.
And 102, performing correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal.
The correlation sequence comprises correlation sampling points corresponding to each sampling point in the data segment, and the sampling points in the data segment correspond to the sampling points in the local pseudo code one to one.
For example, after acquiring the baseband signal, the satellite navigation receiver may perform correlation calculation on the baseband signal and the local pseudo code to strip the pseudo code included in the baseband signal, so as to obtain a correlation sequence corresponding to each data segment. The manner of obtaining the correlation sequence corresponding to each data segment may be: firstly, the satellite navigation receiver can divide a baseband signal into a plurality of data sections, and perform sliding correlation on a plurality of sampling points included in each data section and a local pseudo code to obtain a correlation sequence including a correlation sampling point corresponding to each sampling point in the data section. The local pseudo code is a pseudo code sequence obtained by the satellite navigation receiver by generating a pseudo code sequence with a standard period according to the number of a target satellite and a pseudo code generation rule agreed in an ICD (Interface Control Document, Chinese) and resampling by a code NCO (Numerically Controlled Oscillator, Chinese). The period of each data segment is the same as that of the local pseudo code, for example, the period of the local pseudo code is 1ms, and then the period of each data segment is also 1ms, that is, the samples included in each data segment correspond to the samples included in the local pseudo code one to one.
Step 103, dividing the related sequences according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values, so as to obtain a plurality of groups of related sample point sets corresponding to each bit synchronization deviation value, wherein each group of related sample point sets comprises at least one related sample point.
Specifically, the satellite navigation receiver may be preset with a coherent integration module and a scrambling code sequence, and set a plurality of bit synchronization offset values according to the scrambling code sequence. When the satellite signals are satellite signals containing NH (NH-Hoffman) codes, such as beidou IGSO (incorporated GeoSynchronous Orbit, chinese) and MEO (Medium Earth Orbit, chinese), the scrambling sequence may be an NH sequence. When the satellite signal is a satellite signal that does not include an NH code, such as a GPS L1 frequency band signal or a beidou GEO Earth Orbit (english: Geostationary Earth Orbit), the scrambling code sequence may be a sequence that is entirely composed of 1.
The satellite navigation receiver may then feed the correlation sequence corresponding to each data segment into a coherent integration module. And the coherent integration module divides the related sequences according to each bit synchronization deviant in the plurality of bit synchronization deviants respectively to obtain a plurality of groups of related sample point sets which correspond to the bit synchronization deviant and comprise at least one related sample point. For example, the coherent integration module may divide the correlation sequence into a plurality of sets of correlation samples based on each of a plurality of bit synchronization offset values based on a number of cycles of the scrambling sequence within a duration of a one-bit navigation message. Where each bit synchronization offset value can be understood as an offset of an assumed scrambling code sequence relative to the correlation sequence. The relevant sequence is divided through a bit synchronization offset value, and actually, the boundaries of a plurality of bit navigation messages included in the relevant sequence are determined by using the offset of an assumed scrambling code sequence relative to the relevant sequence, wherein each bit navigation message corresponds to a group of relevant sample point sets.
And 104, scrambling each group of correlated sample point sets in the multiple groups of correlated sample point sets with a preset scrambling sequence, and performing coherent accumulation on the correlated sample points in the scrambled group of correlated sample point sets to obtain a first coherent accumulation value corresponding to the group of correlated sample point sets.
And 105, determining a second coherent accumulation value corresponding to each bit synchronization deviation value according to the first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets.
Further, after obtaining multiple groups of correlated sample sets corresponding to each bit synchronization offset value, the coherent integration module may scramble the correlated sample points included in each group of correlated sample sets corresponding to each bit synchronization offset value with the scrambling code sequence, and perform maximum likelihood coherent accumulation on the scrambled correlated sample points in the group of correlated sample sets to obtain a first coherent accumulation value corresponding to the group of correlated sample sets. Then, the coherent integration module may perform maximum likelihood coherent accumulation on the first coherent accumulation value corresponding to each group of correlated sample sets corresponding to the bit synchronization offset value to obtain a second coherent accumulation value corresponding to the bit synchronization offset value.
And step 106, taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment.
In this step, the largest second coherent accumulation value may be selected from the second coherent accumulation values corresponding to each bit synchronization offset value as the target coherent accumulation value. For example, when there are 20 bit synchronization offset values, there are also 20 second coherent accumulation values, and the largest second coherent accumulation value of the 20 second coherent accumulation values may be selected as the target coherent accumulation value. The target coherent accumulation value is then used as the coherent accumulation result for the data segment. Furthermore, the satellite signals can be subjected to subsequent processing such as acquisition and tracking according to the target coherent accumulation result.
To sum up, the present disclosure first performs down-mixing on a received satellite signal to obtain a baseband signal corresponding to the satellite signal, and performs correlation processing on the baseband signal and a local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, then divides the correlation sequence according to each bit synchronization offset value in a plurality of preset bit synchronization offset values to obtain a plurality of sets of correlation sample sets corresponding to each bit synchronization offset value, then scrambles each set of correlation sample sets in the plurality of sets of correlation sample sets with a scrambling code sequence, and performs coherent accumulation on the correlation sample points in the scrambled set of correlation sample sets to obtain a first coherent accumulation value corresponding to the set of correlation sample sets, and then determines a second coherent accumulation value corresponding to each bit synchronization offset value according to the first coherent accumulation value corresponding to each set of correlation sample sets in the plurality of sets of correlation sample sets, and finally, taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment. According to the method, a plurality of groups of related sample sets and scrambling sequences are obtained by dividing related sequences through each bit synchronization offset value, a second coherent accumulated value corresponding to the bit synchronization offset value is determined, the largest second coherent accumulated value is used as a coherent accumulated result of a data segment, the influence of bit hopping on useful signal power can be reduced, the coherent accumulated result is not limited by coherent integration time, the signal to noise ratio of satellite signals can be improved, and therefore the capacity of a satellite navigation receiver for capturing and tracking weak signals is improved.
Alternatively, step 102 may be implemented by:
and determining a correlation sequence corresponding to each data segment by using a first formula according to each data segment and the local pseudo code.
Wherein the first formula comprises:
Figure BDA0002832320560000121
Figure BDA0002832320560000122
for the correlation value of the ith correlation sample in the correlation sequence, ci+nFor the i + n th sample point, p, in the data segmentnFor the nth chip, N, in the local pseudo codesegI is greater than or equal to 0 and less than or equal to N for the number of samples included in the data segmentseg-an integer of 1.
For example, after acquiring the baseband signal, the satellite navigation receiver may include N in each data segmentsegN in individual samples and local pseudo-codesegA chip, performing sliding correlation using a first formula,and obtaining a correlation sequence corresponding to the data segment. Wherein N issegIf the period of the data segment is set to 1ms, then N is determined by the preset sampling rate of the sampling pointseg＝0.001×Fs，FsIs the sample rate, e.g., the number of samples (i.e., N) included in the data segment when the preset sample rate is 1023000seg) May be 1023.
Fig. 2 is a flow chart illustrating one step 103 of the embodiment shown in fig. 1. As shown in fig. 2, step 103 may include the steps of:
and step 1031, determining, by using a second formula, a target number of the relevant sample point set corresponding to each bit synchronization deviation value according to the first number and the second number.
Wherein the first number is the number of correlated sampling points included in the correlation sequence, and the second number is the number of chips included in the scrambling sequence.
The second formula includes:
Figure BDA0002832320560000131
where navNum is the target number, N is the first number, NcodeS is the bit sync offset value.
For example, after obtaining the correlation sequence corresponding to each data segment, the satellite navigation receiver may send the correlation sequence corresponding to each data segment to the coherent integration module. And determining the target number corresponding to the bit synchronization deviation value by a coherent integration module according to the first number of the correlated sampling points included in the correlation sequence and the second number of the chips included in the scrambling code sequence by using a second formula aiming at each bit synchronization deviation value. Wherein the bit synchronization offset value may be set according to the number of chips included in one period of the scrambling code sequence. For example, if the scrambling code sequence is an NH sequence and the NH sequence has 20 chips in one period, 0-19 can be set as the plurality of bit synchronization offset values.
Step 1032, the correlation sequence is divided according to the target number, the first number, the second number and the bit synchronization deviation value, so as to obtain a target number group correlation sample set corresponding to the bit synchronization deviation value.
Further, the coherent integration module may use the correlation samples with sequence numbers from 0 to s-1 in the correlation sequence as the 0 th group of correlation sample set, and use the sequence numbers in the correlation sequence from s + Ncode(j-1) to s + NcodeUsing the correlated sampling points of j-1 as the j-th group of correlated sampling point sets (j is an integer greater than 0 and less than or equal to navNum-2), and using the sequence number in the correlated sequence as s + NcodeThe related sample points from (navNum-2) to N-1 are used as the navNum-1 group related sample point set. Taking the example that the scrambling sequence is NH sequence, the correlation sequence includes 46 correlation samples (i.e. the first number is 46), the scrambling sequence includes 20 chips (i.e. the second number is 20), and the bit synchronization offset values are 0-19, as shown in fig. 3, if the bit synchronization offset value is 3, the target number is
Figure BDA0002832320560000141
I.e., when the bit synchronization offset value is 3, the coherent integration module may divide the correlation sequence into 4 sets of correlation samples. Then the correlated sampling points with sequence numbers from 0 to 2 in the correlated sequence can be used as the 0 th group correlated sampling point set, the correlated sampling points with sequence numbers from 3 to 22 in the correlated sequence can be used as the 1 st group correlated sampling point set, the correlated sampling points with sequence numbers from 23 to 42 in the correlated sequence can be used as the 2 nd group correlated sampling point set, and the correlated sampling points with sequence numbers from 43 to 45 in the correlated sequence can be used as the 3 rd group correlated sampling point set.
Alternatively, step 104 may be implemented by:
and determining a first coherent accumulation value corresponding to each group of related sample point sets by using a third formula.
Wherein the third formula comprises:
Figure BDA0002832320560000151
Figure BDA0002832320560000152
is the navldx group phaseWith respect to the first coherent accumulation value of the set of samples,
Figure BDA0002832320560000153
for the correlation value of the mth correlation sample in the correlation sequence,
Figure BDA0002832320560000154
for the Nth in the scrambling code sequencecode-s + m chips of the chip number,
Figure BDA0002832320560000155
for mod (m-s, N) in the scrambling sequencecode) Chip, mod () is a remainder function.
For example, after obtaining the multiple groups of correlated sample sets corresponding to each bit synchronization offset value, the coherent integration module may obtain the first coherent accumulation value of each group of correlated sample sets according to the correlated sample points included in each group of correlated sample sets corresponding to each bit synchronization offset value and the scrambling code sequence by using the third formula. Similarly, as illustrated in fig. 3, the correlation samples with the first coherent accumulation value of 0-2 in the 0 th group of correlation sample sets are scrambled with NH sequences with the numbers of 17-19, and then maximum likelihood coherent accumulation is performed. The coherent accumulation values of the 0 th group of correlated sample sets can be understood as the internal accumulation values of the one-bit navigation message corresponding to the 0 th group of correlated sample sets, and the first coherent accumulation values of the 1 st, 2 nd and 3 th group of correlated sample sets are calculated in the same manner as the 0 th group of correlated sample sets, and are not described in detail herein.
Alternatively, step 105 may be implemented by:
and aiming at each bit synchronization deviation value, performing maximum likelihood coherent accumulation on a first coherent accumulation value corresponding to each group of related sample point sets corresponding to the bit synchronization deviation value to obtain a second coherent accumulation value corresponding to the bit synchronization deviation value.
For example, after determining the first coherent accumulation value of each group of correlated sample sets, the coherent integration module may sequentially perform maximum likelihood coherent accumulation on the first coherent accumulation values of each group of correlated sample sets corresponding to each bit synchronization offset value in an order from small to large according to the bit synchronization offset valueTo obtain a second coherent accumulation value corresponding to the bit synchronization offset value. Still taking fig. 3 as an example for illustration, the first coherent accumulation values of the 0 th, 1 st, 2 nd and 3 rd groups of correlated sample sets in fig. 3 are respectively
Figure BDA0002832320560000161
The coherent integration module may first integrate the signal
Figure BDA0002832320560000162
Respectively adding and subtracting, and taking absolute value to obtain
Figure BDA0002832320560000163
And
Figure BDA0002832320560000164
then taking out
Figure BDA0002832320560000165
Figure BDA0002832320560000166
As a new coherent accumulation value (for example, the maximum value in (b) may be used
Figure BDA0002832320560000167
Expressed), i.e. the maximum of the two is taken as the first element of the next maximum likelihood coherent accumulation. Then adding new coherent accumulation value
Figure BDA0002832320560000168
And
Figure BDA0002832320560000169
carry out the above-mentioned pair
Figure BDA00028323205600001610
And repeating the operation until the accumulation operation of the first coherent accumulation values of the 0 th, 1 st, 2 nd and 3 rd groups of related sample point sets is completed to obtain the second coherent accumulation value corresponding to the bit synchronization deviation value 3.
To sum up, the present disclosure first performs down-mixing on a received satellite signal to obtain a baseband signal corresponding to the satellite signal, and performs correlation processing on the baseband signal and a local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, then divides the correlation sequence according to each bit synchronization offset value in a plurality of preset bit synchronization offset values to obtain a plurality of sets of correlation sample sets corresponding to each bit synchronization offset value, then scrambles each set of correlation sample sets in the plurality of sets of correlation sample sets with a scrambling code sequence, and performs coherent accumulation on the correlation sample points in the scrambled set of correlation sample sets to obtain a first coherent accumulation value corresponding to the set of correlation sample sets, and then determines a second coherent accumulation value corresponding to each bit synchronization offset value according to the first coherent accumulation value corresponding to each set of correlation sample sets in the plurality of sets of correlation sample sets, and finally, taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment. According to the method, a plurality of groups of related sample sets and scrambling sequences are obtained by dividing related sequences through each bit synchronization offset value, a second coherent accumulated value corresponding to the bit synchronization offset value is determined, the largest second coherent accumulated value is used as a coherent accumulated result of a data segment, the influence of bit hopping on useful signal power can be reduced, the coherent accumulated result is not limited by coherent integration time, the signal to noise ratio of satellite signals can be improved, and therefore the capacity of a satellite navigation receiver for capturing and tracking weak signals is improved.
Fig. 4 is a block diagram illustrating a satellite signal processing apparatus according to an example embodiment. As shown in fig. 4, the apparatus 200 includes:
the frequency mixing module 201 is configured to perform frequency mixing on the received satellite signal to obtain a baseband signal corresponding to the satellite signal.
The correlation module 202 is configured to perform correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, where the correlation sequence includes a correlation sampling point corresponding to each sampling point in the data segment, and the sampling points included in the data segment correspond to the sampling points included in the local pseudo code one to one.
The dividing module 203 is configured to divide the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values, so as to obtain a plurality of groups of correlated sample sets corresponding to each bit synchronization deviation value, where each group of correlated sample sets includes at least one correlated sample.
The processing module 204 is configured to scramble each group of correlated sample sets in the multiple groups of correlated sample sets with a preset scrambling sequence, and perform coherent accumulation on the scrambled correlated sample points in the group of correlated sample sets to obtain a first coherent accumulation value corresponding to the group of correlated sample sets.
The determining module 205 is configured to determine a second coherent accumulation value corresponding to each bit synchronization offset value according to the first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets.
The processing module 204 is further configured to use the largest second coherence accumulation value as a target coherence accumulation value, and use the target coherence accumulation value as a coherent accumulation result of the data segment.
Fig. 5 is a block diagram of a mixing module according to the embodiment shown in fig. 4. As shown in fig. 5, the mixing module 201 includes:
the first mixing submodule 2011 is configured to mix the satellite signal with the intermediate-frequency local oscillator signal to obtain an intermediate-frequency signal.
The second mixing submodule 2012 is configured to mix the intermediate frequency signal with a local carrier to obtain a baseband signal.
Optionally, the correlation module 202 is configured to:
and determining a correlation sequence corresponding to each data segment by using a first formula according to each data segment and the local pseudo code.
Wherein the first formula comprises:
Figure BDA0002832320560000181
wherein,
Figure BDA0002832320560000182
is the first in the correlation sequenceCorrelation values of i correlated samples, ci+nFor the i + n th sample point, p, in the data segmentnFor the nth chip, N, in the local pseudo codesegI is greater than or equal to 0 and less than or equal to N for the number of samples included in the data segmentseg-an integer of 1.
Fig. 6 is a block diagram of a partitioning module shown in the embodiment of fig. 4. As shown in fig. 6, the dividing module 203 includes:
the calculating sub-module 2031 is configured to determine, according to the first quantity and the second quantity, a target quantity of the correlated sample set corresponding to each bit synchronization offset value by using a second formula. The first number is the number of correlation samples comprised by the correlation sequence and the second number is the number of chips comprised by the scrambling sequence.
Wherein the second formula comprises:
Figure BDA0002832320560000183
navNum is a target number, N is a first number, NcodeS is the bit sync offset value.
The dividing submodule 2032 is configured to divide the correlation sequence according to the target number, the first number, the second number, and the bit synchronization offset value, so as to obtain a target number group correlation sample set corresponding to the bit synchronization offset value.
Optionally, the processing module 204 is configured to:
and determining a first coherent accumulation value corresponding to each group of related sample point sets by using a third formula.
The third formula includes:
Figure BDA0002832320560000191
wherein,
Figure BDA0002832320560000192
a first coherent accumulation value for a second navldx group of correlated sample sets,
Figure BDA0002832320560000193
for the correlation value of the mth correlation sample in the correlation sequence,
Figure BDA0002832320560000194
for the Nth in the scrambling code sequencecode-s + m chips of the chip number,
Figure BDA0002832320560000195
for mod (m-s, N) in the scrambling sequencecode) Chip, mod () is a remainder function.
Optionally, the determining module 205 is configured to:
and aiming at each bit synchronization deviation value, performing maximum likelihood coherent accumulation on a first coherent accumulation value corresponding to each group of related sample point sets corresponding to the bit synchronization deviation value to obtain a second coherent accumulation value corresponding to the bit synchronization deviation value.
With regard to the apparatus in the above-described embodiment, the specific manner in which each module performs the operation has been described in detail in the embodiment related to the method, and will not be elaborated here.
To sum up, the present disclosure first performs down-mixing on a received satellite signal to obtain a baseband signal corresponding to the satellite signal, and performs correlation processing on the baseband signal and a local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, then divides the correlation sequence according to each bit synchronization offset value in a plurality of preset bit synchronization offset values to obtain a plurality of sets of correlation sample sets corresponding to each bit synchronization offset value, then scrambles each set of correlation sample sets in the plurality of sets of correlation sample sets with a scrambling code sequence, and performs coherent accumulation on the correlation sample points in the scrambled set of correlation sample sets to obtain a first coherent accumulation value corresponding to the set of correlation sample sets, and then determines a second coherent accumulation value corresponding to each bit synchronization offset value according to the first coherent accumulation value corresponding to each set of correlation sample sets in the plurality of sets of correlation sample sets, and finally, taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment. According to the method, a plurality of groups of related sample sets and scrambling sequences are obtained by dividing related sequences through each bit synchronization offset value, a second coherent accumulated value corresponding to the bit synchronization offset value is determined, the largest second coherent accumulated value is used as a coherent accumulated result of a data segment, the influence of bit hopping on useful signal power can be reduced, the coherent accumulated result is not limited by coherent integration time, the signal to noise ratio of satellite signals can be improved, and therefore the capacity of a satellite navigation receiver for capturing and tracking weak signals is improved.
Fig. 7 is a block diagram illustrating an electronic device 700 in accordance with an example embodiment. As shown in fig. 7, the electronic device 700 may include: a processor 701 and a memory 702. The electronic device 700 may also include one or more of a multimedia component 703, an input/output (I/O) interface 704, and a communication component 705.
The processor 701 is configured to control the overall operation of the electronic device 700, so as to complete all or part of the steps in the satellite signal processing method. The memory 702 is used to store various types of data to support operation at the electronic device 700, such as instructions for any application or method operating on the electronic device 700 and application-related data, such as contact data, transmitted and received messages, pictures, audio, video, and the like. The Memory 702 may be implemented by any type of volatile or non-volatile Memory device or combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read-Only Memory (EPROM), Programmable Read-Only Memory (PROM), Read-Only Memory (ROM), magnetic Memory, flash Memory, magnetic disk, or optical disk. The multimedia components 703 may include screen and audio components. Wherein the screen may be, for example, a touch screen and the audio component is used for outputting and/or inputting audio signals. For example, the audio component may include a microphone for receiving external audio signals. The received audio signal may further be stored in the memory 702 or transmitted through the communication component 705. The audio assembly also includes at least one speaker for outputting audio signals. The I/O interface 704 provides an interface between the processor 701 and other interface modules, such as a keyboard, mouse, buttons, etc. These buttons may be virtual buttons or physical buttons. The communication component 705 is used for wired or wireless communication between the electronic device 700 and other devices. Wireless Communication, such as Wi-Fi, bluetooth, Near Field Communication (NFC), 2G, 3G, 4G, NB-IOT, eMTC, or other 5G, etc., or a combination of one or more of them, which is not limited herein. The corresponding communication component 705 may thus include: Wi-Fi module, Bluetooth module, NFC module, etc.
In an exemplary embodiment, the electronic Device 700 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components for performing the above-described satellite Signal Processing method.
In another exemplary embodiment, there is also provided a computer readable storage medium including program instructions, which when executed by a processor, implement the steps of the above-described satellite signal processing method. For example, the computer readable storage medium may be the memory 702 comprising program instructions executable by the processor 701 of the electronic device 700 to perform the satellite signal processing method described above.
In another exemplary embodiment, a computer program product is also provided, which comprises a computer program executable by a programmable apparatus, the computer program having code portions for performing the above-mentioned satellite signal processing method when executed by the programmable apparatus.
The preferred embodiments of the present disclosure are described in detail with reference to the accompanying drawings, however, the present disclosure is not limited to the specific details of the above embodiments, and various simple modifications may be made to the technical solution of the present disclosure within the technical idea of the present disclosure, and these simple modifications all belong to the protection scope of the present disclosure.
It should be noted that, in the foregoing embodiments, various features described in the above embodiments may be combined in any suitable manner, and in order to avoid unnecessary repetition, various combinations that are possible in the present disclosure are not described again.
In addition, any combination of various embodiments of the present disclosure may be made, and the same should be considered as the disclosure of the present disclosure, as long as it does not depart from the spirit of the present disclosure.

Claims (10)

1. A method for processing satellite signals, the method comprising:
carrying out down-mixing on the received satellite signal to obtain a baseband signal corresponding to the satellite signal;
performing correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, where the correlation sequence includes a correlation sampling point corresponding to each sampling point in the data segment, and the sampling points included in the data segment correspond to the sampling points included in the local pseudo code one to one;
dividing the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values to obtain a plurality of groups of correlation sample point sets corresponding to each bit synchronization deviation value, wherein each group of correlation sample point sets comprises at least one correlation sample point;
scrambling each group of related sample point sets in the multiple groups of related sample point sets with a preset scrambling sequence, and performing coherent accumulation on the related sample points in the scrambled group of related sample point sets to obtain a first coherent accumulation value corresponding to the group of related sample point sets;
determining a second coherent accumulation value corresponding to each bit synchronization deviation value according to a first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets;
and taking the maximum second coherent accumulation value as a target coherent accumulation value, and taking the target coherent accumulation value as a coherent accumulation result of the data segment.
2. The method of claim 1, wherein the down-mixing the received satellite signal to obtain a baseband signal corresponding to the satellite signal comprises:
mixing the satellite signals by using an intermediate-frequency local oscillator signal to obtain an intermediate-frequency signal;
and mixing the intermediate frequency signal by using a local carrier to obtain the baseband signal.
3. The method of claim 1, wherein the correlating the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal comprises:
determining the relevant sequence corresponding to each data segment by using a first formula according to each data segment and the local pseudo code;
the first formula includes:
Figure FDA0002832320550000021
wherein,
Figure FDA0002832320550000022
is the correlation value of the ith correlation sample point in the correlation sequence, ci+nFor the i + n th sample point, p, in the data segmentnFor the nth chip, N, in the local pseudo codesegFor the number of samples included in the data segment, i is largeIs equal to or greater than 0 and is less than or equal to Nseg-an integer of 1.
4. The method according to claim 1, wherein the dividing the correlation sequence according to each of a plurality of preset bit synchronization offset values to obtain a plurality of sets of correlation samples corresponding to each of the bit synchronization offset values comprises:
for each bit synchronization deviation value, determining the target number of the relevant sample point set corresponding to the bit synchronization deviation value by using a second formula according to the first number and the second number; the first number is the number of the correlated sampling points included in the correlation sequence, and the second number is the number of chips included in the scrambling code sequence;
the second formula includes:
Figure FDA0002832320550000023
wherein navNum is the target number, N is the first number, NcodeFor the second number, s is the bit synchronization offset value;
and dividing the related sequence according to the target number, the first number, the second number and the bit synchronization deviation value to obtain the target number group of the related sample point set corresponding to the bit synchronization deviation value.
5. The method of claim 4, wherein the scrambling each correlated sample set in the multiple correlated sample sets with a preset scrambling sequence, and performing coherent accumulation on the scrambled correlated sample points in the correlated sample set to obtain a first coherent accumulation value corresponding to the correlated sample set comprises:
determining a first coherent accumulation value corresponding to each group of related sample point sets by using a third formula;
the third formula includes:
Figure FDA0002832320550000031
wherein,
Figure FDA0002832320550000032
a first coherent accumulation value for a second navldx group of correlated sample sets,
Figure FDA0002832320550000033
the correlation value of the mth correlation sample point in the correlation sequence,
Figure FDA0002832320550000034
for the Nth in the scrambling code sequencecode-s + m chips of the chip number,
Figure FDA0002832320550000035
for mod (m-s, N) in the scrambling sequencecode) Chip, mod () is a remainder function.
6. The method of claim 1, wherein determining the second coherent accumulation value for each of the bit synchronization offset values according to the first coherent accumulation value for each of the sets of correlated samples in the sets of correlated samples comprises:
and aiming at each bit synchronization deviation value, performing maximum likelihood coherent accumulation on a first coherent accumulation value corresponding to each group of related sample point sets corresponding to the bit synchronization deviation value to obtain a second coherent accumulation value corresponding to the bit synchronization deviation value.
7. An apparatus for processing satellite signals, the apparatus comprising:
the frequency mixing module is used for carrying out frequency mixing on the received satellite signals to obtain baseband signals corresponding to the satellite signals;
a correlation module, configured to perform correlation processing on the baseband signal and the local pseudo code to obtain a correlation sequence corresponding to each data segment included in the baseband signal, where the correlation sequence includes a correlation sampling point corresponding to each sampling point in the data segment, and the sampling points included in the data segment correspond to the sampling points included in the local pseudo code one to one;
a dividing module, configured to divide the correlation sequence according to each bit synchronization deviation value in a plurality of preset bit synchronization deviation values, so as to obtain a plurality of groups of correlated sample sets corresponding to each bit synchronization deviation value, where each group of correlated sample sets includes at least one correlated sample;
the processing module is used for scrambling each group of related sample point sets in the multiple groups of related sample point sets with a preset scrambling sequence and performing coherent accumulation on the related sample points in the scrambled group of related sample point sets to obtain a first coherent accumulation value corresponding to the group of related sample point sets;
a determining module, configured to determine a second coherent accumulation value corresponding to each bit synchronization deviation value according to a first coherent accumulation value corresponding to each group of correlated sampling point sets in the multiple groups of correlated sampling point sets;
the processing module is further configured to use the largest second coherent accumulation value as a target coherent accumulation value, and use the target coherent accumulation value as a coherent accumulation result of the data segment.
8. The apparatus of claim 7, wherein the partitioning module comprises:
the calculation submodule is used for determining the target number of the relevant sample point set corresponding to the bit synchronization deviation value by using a second formula according to the first number and the second number aiming at each bit synchronization deviation value; the first number is the number of the correlated sampling points included in the correlation sequence, and the second number is the number of chips included in the scrambling code sequence;
the second formula includes:
Figure FDA0002832320550000051
wherein navNum is the target number, N is the first number, NcodeFor the second number, s is the bit synchronization offset value;
and the dividing submodule is used for dividing the related sequence according to the target number, the first number, the second number and the bit synchronization deviation value so as to obtain the target number group of the related sample point set corresponding to the bit synchronization deviation value.
9. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 6.
10. An electronic device, comprising:
a memory having a computer program stored thereon;
a processor for executing the computer program in the memory to carry out the steps of the method of any one of claims 1 to 6.
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