CN112653344A - High-power high-frequency inverter control method based on double E-type structures - Google Patents
High-power high-frequency inverter control method based on double E-type structures Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/4807—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode having a high frequency intermediate AC stage
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- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a high-power high-frequency inverter control method based on a double E-type structure, which is characterized in that a controller or a timer is adopted to compare voltage waveforms output by an inverter, when resonance parameters change, the working frequency is corrected in real time so as to maintain the inverter to work in an optimal state all the time, and the frequency tracking and control of a system specifically comprises the following steps: starting the inverter at low voltage, sampling a voltage signal, increasing the recorded time by a safe delay to update the previous period, judging whether the updated period is within an allowable error range, if so, taking the updated period as actual output and controlling the voltage to rise, otherwise, stopping the system and the like. Compared with the prior art, the invention has the advantages that the inverter is maintained to work in the optimal state all the time, the frequency can be ensured to track the actual frequency without premature conduction, and the device is always in the soft switch state, and the invention has simple control, high efficiency, low cost, safety and reliability.
Description
Technical Field
The invention relates to the technical field of high-frequency inverters, in particular to a control method of a high-power high-frequency inverter with a double E-type structure, which can be applied to wireless power transmission and high-frequency heating.
Background
The development of the switching power supply has entered a relatively mature stage, and the power conversion device will be developed towards a higher frequency plane and a higher power density in the future. The traditional high-power supply is limited by devices, and most of frequencies are between ten and a few KHz and two to three hundred KHz. With the application of SiC and GaN devices, the performance of the devices is greatly improved, so that the working frequency, the power density and the conversion efficiency of a power supply are greatly improved.
The application scenes of high-frequency inversion are many, one of the wireless power transmission technologies is adopted, the wireless power transmission can transmit energy to a load end under the condition of avoiding the contact of a physical lead, and the wireless power transmission technology has wide application in future mobile electric equipment, particularly industries such as mobile phones, robots and electric vehicles. The wireless power transmission requires the resonant frequencies of the transmitting end and the receiving end to be completely consistent to achieve the best effect. In practical applications, the size of the coil changes due to thermal expansion and contraction caused by changes in ambient temperature, or the resistance-capacitance changes due to aging of the device, etc., will cause slight changes in system parameters. Resulting in a reduction in the transmission efficiency of the system. At this time, the inversion frequency of the control system needs to be changed along with the actual frequency offset to ensure the stability of transmission. In addition, the high-frequency inverter can also be used in the induction heating industry, the principle of induction heating is that a high-frequency coil is used for surrounding the surface of a metal conductor, the purpose of heating metal is achieved through eddy currents generated on the surface of the metal by a high-frequency electromagnetic field, because a heated object in the middle of the coil is metal, the magnetic permeability of the heated object is high, the temperature change is large, the inductance change of the coil is large in the heating process, the resonance frequency can also generate large deviation, and the frequency also needs to be adjusted in real time.
Currently, the high-frequency inverter design mainly has the following four challenges:
1) since the switching of the device is not instantaneous, when the frequency increases, the rising and falling of the voltage and current coincide, and the loss of the switching device will increase in multiples with the frequency.
2) The higher the frequency the shorter the period, which makes the design of the control system very difficult. Taking the frequency of 1MHz as an example, the controller needs to complete the functions of sampling, counting, calculating, etc. within 1us, and it is very challenging for the control chip to complete so many instructions in such a short time. And the drive circuit still has certain delay and dead zone still must occupy partial time, and conventional control chip has not been able to reach the requirement of standard, and although the chip of GHz level has been more common now, its cost is expensive, and the cost is higher and is unfavorable for maintaining.
3) Because the system wire has a certain length, the distributed parameters of the wire after the operating frequency is increased will also have a great influence on the system, and the design scheme of the traditional system only considering lumped parameters is not applicable any more.
4) After the frequency is increased, the conversion speed of voltage and current is high, and the generated electromagnetic compatibility problem is one of the problems which need to be concerned by the power supply design.
The soft switching technology is used for controlling the switching tube to be switched on or switched off at the time of zero voltage and zero current so as to achieve the purpose of reducing the switching loss. Second, it is an optimization control scheme to reduce the requirements on the CPU. Then, negative effects caused by high frequency need to be considered in circuit design, and finally, certain shielding measures need to be added in electromagnetic compatibility design. The main topological structures of the traditional high-frequency inverter power supply comprise full-bridge inversion, half-bridge inversion and various power amplification circuits. The bridge inverter circuit is generally adopted to design on occasions with high power, the power which can be passed by the bridge inverter circuit is high, the theory is relatively mature, but the applied frequency is low, and the control is complex. With the increase of frequency, a control scheme has certain limitation, and in recent years, the topology of the dual-class-E inverter structure has attracted attention because of the advantages of simple control, high efficiency and the like.
Because the double E-type inverter works in a resonance state, the requirement on resonance parameters of a loop is extremely high, the load impedance is also one of the resonance parameters of the system, and the resonance frequency can be calculated according to the following formula a:
from the above equation, it can be seen that when operating at low frequencies, the values of L and C are relatively large, and therefore, small changes in impedance have a relatively small effect on the resonant frequency. When the frequency is increased, the values of L and C become small, and a slight change in impedance has a relatively large influence on the resonant frequency of the system. Ideally, the switching device is always in a soft switching state, so the theoretical efficiency is 100%, but when the load changes, the resonance state of the system changes, which affects the efficiency of the system. In this case, if the control frequency of the system is not changed, premature conduction, ideal conduction, and delayed conduction may occur. The occurrence of premature turn-on conditions is likely to result in device failure, and late turn-on, while not damaging the switch, can result in a system with reduced efficiency if the lag time is too long.
The traditional method needs the processes of sampling, AD conversion, analysis and calculation and PWM counter adjustment to change the PWM frequency, and the system cost is extremely high. Firstly, analog sampling is carried out on a high-frequency circuit, the high-frequency and high-speed AD conversion is influenced by line distribution parameters, secondly, the high-frequency and high-speed AD conversion is expensive, and finally, the links of analyzing, calculating and adjusting the PWM are usually controlled by adopting an optimal value mode, the optimal power needs to be fed back, and the system cost is increased. Meanwhile, a large amount of calculation is needed, and the requirement on CPU control is high. The calculation and feedback require a certain time, the system adjustment period is long, and the efficiency of the inverter is affected and even the risk of burning the switching devices is caused. Therefore, in the field of wireless power transmission and high-frequency heating applications, a fast, simple, efficient and low-cost control scheme is urgently needed, which can not only complete high-frequency control but also realize frequency adjustment.
The high-frequency inversion and control system soft switch in the prior art is difficult to realize, has extremely high requirements on a CPU, has high manufacturing cost of high-frequency AD sampling, can not automatically track the frequency after the circuit parameter changes, and has the bottleneck and the defect that the electromagnetic compatibility does not meet the standard in the prior art.
Disclosure of Invention
The invention aims to design a control method of a high-power high-frequency inverter based on a double-E structure aiming at the defects of the prior art, a controller or a timer is adopted to judge the current resonance state of a system according to the counting period obtained by a comparison link, if the system works in a premature conducting state, a certain delay is added to the counting result to prolong the period, and then the counting result is used as the period of the next control pulse; if the system works in the ideal conduction state, a certain delay is continuously added, so that the system runs in a relatively safe optimal state; if the system works in a lagging conduction state, the system adopts the same adjustment mode as the ideal state, the adjusted actual period is compared with the set frequency range, whether the frequency variation range is met or not is judged, if the frequency variation range is not met, the output is stopped, and if the frequency variation range is met, the adjusted actual period is used as the period of the next control pulse. The time of each period is the output value calibrated according to the actual period, so that the frequency tracking is realized, the soft switching of the device is realized, the frequency can be tracked to the actual frequency without the condition of premature conduction, the device is always in the soft switching state, the loss is extremely low during high-frequency operation, the efficiency can reach 100% theoretically, and the control is simple, the efficiency is high, the cost is low, and the safety and the reliability are realized.
The purpose of the invention is realized as follows: a high-power high-frequency inverter control method based on double E-type structures is characterized in that a controller or a timer is adopted to compare voltage signals output by an inverter, when resonance parameters change, the working frequency is corrected in real time, soft switching control of the inverter is realized, and frequency tracking and control of a system specifically comprise the following steps:
a, step a: and adjusting the voltage to a low-voltage state, and starting the system according to the set initial frequency to obtain the initial output waveform of the system.
b, step (b): and detecting the initial output waveform by adopting a comparator or a logic gate circuit to obtain a zero crossing characteristic signal of the actual output voltage waveform of the system.
c, step (c): inputting the output characteristic signal into a timer, triggering the timer to start timing, and recording corresponding time to obtain the actual resonance period of the system;
d, step: and increasing the safety value for the time recorded by the timer to enable the period after the safety value is increased to be slightly larger than the actual period obtained by the timer, and transmitting the period to the controller to update the previous control period to be used as the period of the next control pulse.
e, step (e): comparing the updated time period with the set frequency range, and if the updated time period is within the error range allowed by the frequency, taking the updated time period as the next period value of the control signal and increasing the output voltage value; if the frequency range is exceeded, the output is stopped, and the frequency tracking and soft switching of the system are realized.
One input end of the comparator or the logic gate circuit is connected with a sampling resistor of voltage, the other input end of the comparator or the logic gate circuit is connected with set voltage, the collection of output voltage characteristic signals is realized, if the collected voltage characteristic signals are zero-crossing points of resonance, the set voltage is near zero potential, when the voltage resonance is higher than the zero potential, the output of the logic gate circuit or the comparator jumps, and for the logic gate circuit, the zero potential is regarded as low level and is equivalent to a digital signal 0; on the contrary, when the voltage of the other input end is higher than the zero potential, the input end is changed into high level, and the gate circuit starts to output a high level signal; for the comparator, when the voltage signal is higher than zero potential, the voltage at two ends of the comparator has difference value, and high level is output.
The timer adopts a timer or a clock counter in a CPU to record an actual voltage period, a trigger signal of the timer is set as the output of a logic gate circuit or a comparator, when the voltage resonates to a set value, the timer receives the trigger signal and starts to time, when the voltage resonates to be lower than zero voltage, the signal output by the logic gate circuit or the comparator jumps, and the timer stops timing.
The inverter needs to monitor each updated control period, and once the control period exceeds an allowable error range, the system can stop running.
The PCB wiring of the two paths of single E-type structures of the double E-type inverters adopts an isometric line symmetrical design, and the lead connection adopts a litz wire to carry out close winding twisted pair connection.
And a sampling point of the sampling resistor is connected with a voltage stabilizing diode, and the voltage stabilizing diode starts to work when the output resonant voltage exceeds the input range of the comparator or the logic circuit.
Compared with the prior art, the invention has the advantages of maintaining the inverter to work in the optimal state all the time, simple control, stability, safety, easy popularization, high reliability, lower cost and the like, does not need to carry out AD conversion and complex signal processing, does not need to detect the rising edge and the falling edge of the output voltage, can realize the frequency tracking and the soft switching control of the system only by adding the set dead time to the obtained clock counting period value and then comparing whether the obtained period time is in the allowed frequency offset range, and has extremely low requirement on a control chip. When the frequency deviates, the system can automatically adjust the working frequency in real time according to the change of actual parameters, and because the inverter works in the optimal state all the time and the switching device is soft-switched all the time, the inverter efficiency is high and the system is safe and stable. The invention greatly reduces the complexity of the system, ensures that the frequency can track the actual frequency without premature conduction, keeps the device in a soft switching state all the time, has extremely low loss in high-frequency operation, can theoretically reach 100 percent of efficiency, and has the advantages of simple control, high efficiency, low cost, safety and reliability. The method has great advantages and commercial prospects in the fields of high-frequency inversion, wireless power transmission, high-frequency amplifiers, induction heating and the like.
Drawings
FIG. 1 is a schematic diagram of a topology of a dual class E inverter;
FIG. 2 is a waveform diagram of the output of a dual class E inverter;
FIG. 3 is a waveform diagram of three conduction waveforms of a class E inverter;
FIG. 4 is a flow chart of the present invention;
FIG. 5 is a waveform illustrating an adjustment control for premature turn-on;
fig. 6 is a waveform diagram of the adjustment control of the hysteresis conduction.
Detailed Description
Referring to fig. 1, the dual class-E inverter system used in the present invention is composed of two single class-E inverters, and is controlled by two control pulses. The double-E inverter structure controls the on-off of the switch tube through two paths of complementary rectangular PWM waves, greatly simplifies the complexity of system control, and the output of the system is sine waves, so that the safety of the system is realized that the overall operation of the system cannot be influenced even if a coil is in a short circuit condition in the working process of the system.
Referring to fig. 2, two single-mode E-type inverters are separated by 180 degrees from each other, and the waveform output by a dual-mode E-type inverter structure operating under an ideal state is a complete sine wave, so that the safety and stability are high.
The high-power high-frequency inverter with the double E-type structure can be switched on prematurely or switched on late in actual operation, in order to ensure that the working conditions of the two E-type amplifiers are completely consistent, all PCB wiring of the two E-type amplifiers are designed in a symmetrical mode, and the symmetrical design is adopted to avoid the influence of distribution parameters on a system. The class-E inverter has three working states, and the working in the optimal state refers to the state that the switching device is controlled to be in lagging conduction.
Referring to fig. 3, three operating conditions are as follows:
1) premature turn-on condition: assuming that the time constant of the resonant circuit is constant, the voltage thereof is t ═ t2At time, resonate to 0 if t is t1At the moment, the voltage is a higher forward value, the two ends of the switch tube are also connected with a capacitor Ce in parallel, the voltage is instantly reduced to 0 when the switch tube is switched on, the capacitor is equivalent to a voltage source in a circuit and is directly short-circuited at the moment, the current impulse of the switch tube is very large, the higher the voltage is, the larger the current is, if the voltage is lower, the device can bear the impulse, the switching-on loss is very large, and particularly when the frequency is too high, the loss and the heat generation of the device are very high,if the voltage is high, the device will not withstand the voltage surge and will be directly damaged, and this is generally not allowed.
2) Ideal conduction condition: this is the case when the turn-on pulse comes at a voltage of just 0. At this time, although there is current in the switching tube, there is no loss, which is also the best condition. However, it is difficult to control the conduction at the zero crossing point every time in practical application, because the zero crossing point of the resonance may be slightly shifted due to the external environmental influence.
3) Hysteretic conduction conditions: when the voltage resonates to the zero crossing point, the conduction pulse does not arrive, the voltage resonates to pass 0 and starts to increase in the reverse direction, when the voltage in the reverse direction increases to be higher than the reverse parallel freewheeling diode of the switching device, the freewheeling diode starts to conduct, and reverse voltage with the size of conduction voltage drop of the freewheeling diode exists at the two ends of the switching device. To t ═ t3At that time, the on pulse comes, the switching device is turned on, and the voltage across it becomes zero.
Referring to the attached figure 4, the invention realizes the soft switching control of the high-power high-frequency inverter with double E-type structure according to the following steps:
a, step a: when the system is just started, because no sampling output exists, the system firstly runs according to an initial frequency which is an ideal frequency set during system design, but the frequency is slightly deviated due to slight change of an actual environment, and the voltage is adjusted to a low-voltage state during starting so as to ensure the safety of devices.
The inverter adopts a double E-type structure as a topology, a loop is in a resonance state during working, three resonance states are provided according to actual conditions, the inverter is in an optimal state when a switching period is equal to an actual period, and at the moment, a device is conducted when an output voltage reaches a position near a zero crossing point, so that soft switching can be realized; when the switching period is less than the actual period, the device is in a high-voltage state and is hard to be conducted, and the device is easy to damage due to current and voltage impact caused by the hard conduction; when the switching period is slightly longer than the actual period, the device works in a relatively safe state, but the inversion power of the system is slightly lower than the ideal state, so that the system is generally controlled to work in such a state in practical application. When the inverter operates in a high-frequency high-power state, the requirement for the resonance parameters of the system loop becomes extremely high, and even a slight change in the ambient temperature in the high-frequency state has a large influence on the system. Therefore, the first step of the invention is that the control system is started under a lower safe voltage and runs according to the set initial value. The purpose of this step is not for soft start, but for obtaining the initial output waveform of the system, and then obtaining the actual period of the system, and adjusting the control period in the following step, so as to avoid the system working in the state that the actual period is greater than the control period.
b, step (b): after the sampling control link starts to intervene, the system outputs the set frequency of the system in the first period, the voltage at two ends of the device starts to rise at the moment, the voltage at two ends of the sampling resistor connected in series continuously rises, the comparator or the logic gate circuit outputs a signal after detecting the voltage change, and as the voltage works in a resonance state, when the voltage rises to a certain degree, the voltage stabilizing diode is conducted, and the input voltage at two ends of the sampling device is maintained in a reasonable range. When the voltage resonates to the maximum value, the voltage begins to drop, and ideally, after the voltage drops to a zero point, the output level of the comparator or the logic gate circuit jumps. In either case, the comparator or logic gate detects a voltage above zero, although early or late conduction may occur in practice.
When the low-voltage waveform output by the inverter is sampled by the sampling circuit, the sampling difficulty is high for directly sampling the waveform at megahertz level, firstly, an ADC sampling conversion device cannot meet the high frequency, and secondly, the price of a high-speed processor is very high. Therefore, the invention adopts a logic gate circuit or a voltage comparator to realize sampling, and the logic gate circuit or the comparator has two input ends, wherein one end of the logic gate circuit or the comparator is connected to a sampling resistor of voltage, and the other end of the logic gate circuit or the comparator is connected to set voltage. Generally, the acquired voltage is a zero-crossing point of resonance, the set voltage is near zero potential, when the voltage resonates to be higher than the zero potential, the output of a logic gate circuit or a comparator jumps, and for the logic gate circuit, the zero potential is regarded as low level and is equivalent to a digital signal 0. On the contrary, when the voltage of the other input end is higher than the zero potential, the input end is changed into high level, and the gate circuit starts to output a high level signal; for the comparator, when the voltage signal is higher than zero potential, the voltage at two ends of the comparator has difference value, and high level is output. In this step, the collected voltage value may be higher than zero potential or lower than zero potential, and the output signal may be high level or low level. The sampling link does not need to collect voltage waveforms, does not need to use AD conversion, and only needs the voltage to meet the logic relation with the set voltage, so the sampling frequency depends on the operating frequency of the comparator and the logic circuit, and the sampling device is suitable for various high-frequency signals.
c, step (c): and c, inputting the signal output in the step b into a timer, setting a trigger signal of the timer as the output of the logic gate circuit or the comparator, when the voltage resonates to a set value, receiving the trigger signal by the timer, starting timing, and when the voltage resonates to be lower than zero voltage, jumping the signal output by the logic gate circuit or the comparator, and stopping timing by the timer. The timer directly uses the clock frequency as a reference, and the time division can be as fine as a nanosecond or a picosecond level.
d, step: the corresponding time is recorded by the timer, a certain safety dead zone is added to the recorded time, and after the operation is carried out for a plurality of cycles, the operation frequency is updated and calibrated in real time.
In order to ensure the stability of the circuit operation, a certain delay is added to the actual resonance period of the system obtained by the timer, and the control period is usually slightly longer than the actual period. Therefore, a certain safety value is added to the actual period obtained by the timer, so that the period is slightly larger than the actual period obtained by the timer, the period with the added safety value is transmitted to the controller, and the last control period is updated.
e, step (e): according to the relevant specifications of electromagnetic wave use, the high-frequency inverter needs to meet the requirements of the electromagnetic wave frequency band and control the frequency within an error range. When the frequency of the loop shifts due to the change of the resonance parameters, whether the loop meets the requirements of relevant regulations or not needs real-time monitoring. Detecting the period of the last step of updating, judging whether the period meets the standard, and directly controlling the shutdown if the period does not meet the standard; if the specification is met, raising the voltage to a rated value; when the voltage rises, the inverter enters a normal working state, and the detection function monitors each working period in real time. The processor compares the updated time period with the set frequency range, and if the updated time period is within the allowable error range of the frequency, the updated time period is used as the value of the next period of the control signal and the output voltage value is increased. If the frequency range is exceeded, the output is stopped.
And the controller or the timer judges whether the current resonance state of the system is in one of three states according to the counting period obtained in the comparison link, and if the system works in the early conduction state, a certain delay is added to the counting result to prolong the period, and then the counting result is used as the period of the next control pulse. If the system works in the ideal state, a certain delay is continuously added, so that the system operates in a relatively safe optimal state, and if the system works in a state with too much delay, the system adopts the same adjustment mode as the ideal state. The adjusted actual period is compared with the set frequency range, whether the frequency variation range is met or not is judged, if the frequency variation range is not met, the output is stopped, and if the frequency variation range is not met, the adjusted actual period is used as the period of the next control pulse. Therefore, the time of each period is the output value calibrated according to the actual period, not only the frequency tracking is realized, but also the soft switching of the device is realized. Before the switching device is conducted, the voltages at two ends just resonate to the vicinity of a zero crossing point, and when the voltage comes, the device is conducted at zero voltage. Due to the inductor L1, at the moment of conduction, the current flowing through the device will also ramp from a zero state, and thus zero current will be turned on. When the switch device is switched off, the device is in a short-circuit state before the switch device is switched off, so that the voltage at two ends of the switch device is originally in a zero state, meanwhile, the capacitor with two parallel points of the switch device is also in a zero voltage state, when the switch device is switched on, current mainly flows through the switch device, the voltage at two ends of the capacitor is zero and cannot suddenly change at the moment of switching off, the capacitor can instantaneously form a short-circuit state, the current can instantaneously transfer to the capacitor, the zero voltage switching off process is zero voltage switching off for the switch device, and the current of the capacitor can suddenly change, although the capacitor is not in zero current switching off, the current can instantaneously transfer, so that the loss. As long as the frequency can be ensured to track the actual frequency without the condition of premature conduction, the device is always in a soft switching state, the loss is extremely low when the device runs at high frequency, and theoretically, the efficiency can reach 100 percent.
The sampling resistor is a large-resistance sampling resistor connected to a voltage end, a voltage stabilizing diode with a protection function is set at a sampling point, the voltage changes along with actual linearity in a low-voltage state, and the diode limits the voltage in a reasonable range in a high-voltage state, so that the safety of a device is protected.
The high-speed logic circuit or the voltage comparison circuit is adopted to detect the voltage resonance state, one input end of the high-speed logic circuit or the voltage comparison circuit is connected with the sampling resistor, and the compared object at the other input end is set voltage. If the zero crossing point moment of the voltage is to be collected, the set voltage is the zero voltage. When the input end of the comparator or the logic NAND gate circuit meets the condition, the output end outputs a high level signal which is a digital signal, the output end is connected to the timer or the digital processor for feeding back that the voltage has changed to a set value, and the signal continues until the voltage changes to a state that the input end does not meet the condition and outputs a low level. The comparator or logic gate circuit has very high running frequency, and has great advantages of complexity, cost, safety, reliability, performance and the like compared with the traditional mode of sampling first and then digitizing.
The timer can be a simple timer or a clock counter inside the CPU, and the supported frequency can be very high because the clock frequency can be designed to be high. The timing is started after receiving the input signal of the comparator or the logic gate circuit, the timing is stopped when the signal becomes low level, and the obtained timing result is one half of the actual period of the voltage. Due to the special structure of the dual E class, the other half cycle of the output voltage is controlled by the other switching device, so the PWM of the other path is controlled in the same way.
The timer increases a certain safety value to the actual period, a certain safety dead zone is reserved for the change of the resonance parameter, the ideal state of the system is difficult to stabilize, the system is stabilized in a delayed conduction state for preventing a premature conduction state, the delay time is set dead zone delay, the longer the dead zone time is, the smaller the power of the inverter system is, and the settable dead zone time is 1-10% of the initial period.
The CPU only needs to complete simple addition operation and comparison functions, the simple single chip microcomputer can realize the addition operation and the comparison, and in order to increase additional functions of the system, a more complex chip can be adopted, but the cost needs to be considered.
The PCB lines of the double-E-type structure topology are all designed in an equal length mode, the two E-type inverters are designed in a symmetrical mode, and the parts connected through the conducting wires are connected in a twisted-pair mode through litz wires. After the system is high-frequency, the distributed parameters have large influence on the system, so that the system can be optimized by adopting an isometric and symmetrical design mode.
The present invention will be described in further detail below by taking the adjustment control of three operating states of the class E inverter as an example.
Example 1
Adjustment process of premature turn-on: the condition that the voltage at the two ends is turned on when the switching tube is switched on too early is not resonated to zero, the voltage exists at the two ends of the parallel capacitor at the moment, and the voltage is equivalently short-circuited at the moment of switching on, so that a very large current impact can occur, the loss on a device is very large, the heating is serious, the efficiency is low, and the switching device is very easily damaged under the condition of high frequency.
Referring to FIG. 5, at t1Time t and2at this moment, it can be seen that the voltage across the switch does not reach zero before the control pulse is sent out, but the arrival of the switch signal will cause the voltage to be forced to zero, and the current will have a large impact. The control process applying the invention is as follows:
t0-t1: after the inverter system is started, a control signal of a switching device VS1 is output according to a fixed frequency, VS1 is conducted, at the moment, the voltage at two ends of VS2 is larger than zero, a VS2 comparator has signal output, and a CPU records that the pulse duration output by the comparator is t0-t1The length of the period of time.
t1Time: the switching device VS1 is turned off and VS2 is turned on; at this time, the capacitance C1The voltage at the two ends is not zero, so that great current impact can occur, and great loss is caused.
t1-t2: the switching device VS2 controls the signal output, VS2 turns on, the process and t0-t1Similarly, with a voltage across VS1, the CPU records the time the VS1 comparator output is long.
t2Time: VS2 OFF, VS1 ON, the process and t1The moments are similar.
t2-t3-t4：t2-t3The time length of (d) is t of the comparator output1-t2The length of time during which the voltage is not resonant to the zero crossing indicates that the actual period is longer than the given period. Therefore, the frequency needs to be lowered so that the period becomes long, and the zero-crossing point is likely to occur. Meanwhile, in order to avoid the condition of premature conduction, a delay dead zone needs to be added to ensure the stability of the switching device, and the process of adding the dead zone delay only needs to be calculated. The result obtained is t2-t4And taking this time as the next PWM cycle.
t4Time: VS2 is conducted, after adjustment, the voltage before VS2 is conducted still does not reach the zero crossing point, and the situation of premature conduction still exists, but the impact is obviously much smaller than that of the previous period.
t4-t5-t6: the course of the circuit for this period is t2-t4Similarly, only the switching device is changed and will not be described in detail.
t6Time: VS1 on, process t4The time is similar and is not described in detail.
t6-t7-t8-t9：t6-t7The time is t4-t6In the period, the time of the VS1 comparator output is long; t is t7-t9For increased dead zone delay, the overall period is therefore t6-t9A period of time of (d); and t is8The moment is the moment when the resonance zero crossing point of the system occurs. Due to the existence of the anti-parallel diode, the voltage does not rise in the reverse direction after resonating to the zero value. In the process, because the voltage reaches zero, the output of the VS2 comparator stops, so that the time of the output of the VS2 comparator is t6-t8A time period. t is t8-t9During the time the reverse diode is conducting and the current also resonates to near zero, which time period voltage dead band occurs.
t8Time: VS2 is on, since the voltage across the switching device is zero, the current is also zero; therefore, there is theoretically no loss at the moment of conduction.
t9-t10-t11-t12: the process and t6-t9The time periods are similar and are not described in detail.
t12Time: VS1 turns on, process and t8The time is similar and is not described in detail.
t12-t13-t14：t12-t13Is t of the last cycle9-t11Comparator output duration of time period, t13-t14Is an increased dead zone delay. Wherein, t12-t13Is the ideal state period obtained by the comparator. For more stable system operation, t is increased13-t14The time period is the dead time, after which the system will continue to operate steadily during ongoing adjustments.
Example 2
Adjusting process of hysteresis conduction: when the lag time is too long, the output voltage is only available in a part of time per period, the inversion efficiency and power are reduced, the system runs in an unreasonable state, and the clock period needs to be properly shortened to improve the running efficiency of the system.
Referring to fig. 6, the control process applying the present invention is as follows:
t0-t1-t2-t3：t1the moment is the actual frequency resonance to the zero crossing point, and the output of the comparator is t0-t1The length of the time period is long,t2the time is the actual period plus the set dead time delay, t0-t2I.e. the period of the control signal pulse that the system should output.
t3Time: VS1 turned on, although there was no apparent shock. But t is3Turn-on VS1 occurs too late, ideally at t1The time is on, and the optimal on time of the system design is t2The time of day.
t3-t4-t5-t6: process analysis and t0-t1-t2-t3Similarly, no further description is given.
t6Time: VS1 turns on, process and t3Similarly, no further description is given.
t6-t7-t8：t6-t7For the actual resonance period of the last period comparator output, t7-t8The dead time delay added to the CPU.
t8-t9-t10: this phase and t6-t7-t8Similarly, no further description is given.
In the adjustment of the late conduction, only one cycle of time is required to correct the frequency to the optimum point. In the subsequent operation of the system, the CPU will continuously add the set dead zone delay according to the time length output by the comparator to be used as the period of the next frequency. In practical control, because the two paths are symmetrical, the comparator output of VS2 can be used for timing to correct the switching frequency of VS1, so that more calculation time is given to the CPU. The frequency can be corrected to an actual value generally within several cycles, and the response speed and frequency range can be adjusted by setting the time of the dead zone delay and the cycle time range, thereby maintaining stable operation of the system.
The invention has been described in further detail in order to avoid limiting the scope of the invention, and it is intended that all such equivalent embodiments be included within the scope of the following claims.
Claims (6)
1. A high-power high-frequency inverter control method based on double E-type structures is characterized in that a controller or a timer is adopted to compare output voltage signals of an inverter, when resonance parameters change, the working frequency is corrected in real time, soft switching control of the inverter is achieved, and frequency tracking and control of a system specifically comprise the following steps:
a, step a: adjusting the voltage to a low-voltage state, and starting the system according to a set initial frequency to obtain an initial output waveform of the system;
b, step (b): detecting the initial output waveform by adopting a comparator or a logic gate circuit to obtain a zero crossing characteristic signal of the actual output voltage waveform of the system;
c, step (c): inputting the output characteristic signal into a timer, triggering the timer to start timing, and recording corresponding time to obtain the actual resonance period of the system;
d, step: increasing a safety value for the time recorded by the timer to enable the period after the safety value is increased to be slightly larger than the actual period obtained by the timer, and transmitting the period to the controller to update the previous control period to be used as the period of the next control pulse;
e, step (e): comparing the updated time period with the set frequency range, and if the updated time period is within the error range allowed by the frequency, taking the updated time period as the next period value of the control signal and increasing the output voltage value; if the frequency range is exceeded, the output is stopped, and the frequency tracking and soft switching of the system are realized.
2. The method for controlling the high-power high-frequency inverter based on the dual class-E structure according to claim 1, wherein one input end of the comparator or the logic gate circuit is connected with a voltage sampling resistor, and the other input end of the comparator or the logic gate circuit is connected with a set voltage, so as to realize the collection of the voltage characteristic signal, if the collected voltage characteristic signal is a zero-crossing point of resonance, the set voltage is near a zero potential, when the voltage resonance is higher than the zero potential, the output of the logic gate circuit or the comparator jumps, and for the logic gate circuit, the zero potential is regarded as a low level and is equivalent to a digital signal 0; on the contrary, when the voltage of the other input end is higher than the zero potential, the input end is changed into high level, and the gate circuit starts to output a high level signal; for the comparator, when the voltage signal is higher than zero potential, the voltage at two ends of the comparator has difference value, and high level is output.
3. The method for controlling the high-power high-frequency inverter based on the double E-type structure according to claim 1, wherein the timer records the actual voltage period by using a timer or a clock counter in the CPU, a trigger signal of the timer is set as the output of the logic gate circuit or the comparator, when the voltage resonates to a set value, the timer receives the trigger signal and starts to count time, and when the voltage resonates to be lower than zero voltage, the signal output by the logic gate circuit or the comparator jumps, and the timer stops counting time.
4. The method for controlling the high-power high-frequency inverter based on the double E-type structure as claimed in claim 1, wherein the inverter needs to monitor each updated control period, and once the error range is exceeded, the system can stop running.
5. The method for controlling the high-power high-frequency inverter based on the double-E structure according to claim 1, wherein the PCB layout of the two single-E structure of the double-E inverter is designed to be equal in length and symmetrical, and the wire connection of the double-E structure is formed by carrying out close-wound twisted-pair connection by using litz wires.
6. The method for controlling the high-power high-frequency inverter based on the double E-type structure according to claim 2, wherein a sampling point of the sampling resistor is connected with a voltage stabilizing diode, when the output resonant voltage exceeds the working voltage of the voltage stabilizing diode, the voltage of the sampling point stops rising, and a signal output by the sampling point is isolated and then input into a comparator or a logic circuit, so that the safe operation of the device is ensured.
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