CN112636934B - Switch resetting method and device, computer equipment and storage medium - Google Patents
Switch resetting method and device, computer equipment and storage medium Download PDFInfo
- Publication number
- CN112636934B CN112636934B CN202011598981.6A CN202011598981A CN112636934B CN 112636934 B CN112636934 B CN 112636934B CN 202011598981 A CN202011598981 A CN 202011598981A CN 112636934 B CN112636934 B CN 112636934B
- Authority
- CN
- China
- Prior art keywords
- reset
- read
- soft
- write
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/02—Details
- H04L12/12—Arrangements for remote connection or disconnection of substations or of equipment thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0803—Configuration setting
- H04L41/0813—Configuration setting characterised by the conditions triggering a change of settings
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/65—Re-configuration of fast packet switches
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Retry When Errors Occur (AREA)
Abstract
The invention discloses a reset method and device of a switch, computer equipment and a storage medium. The method comprises the following steps: responding to the starting of the trigger switch, and resetting the chip according to the reset identifier; acquiring read-write interface call of an initialization process; if the read-write interface is called soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process; if the read-write interface calls the soft reset write operation, the soft reset write operation is cancelled; and if the initialization process is finished, restoring the configuration of the chip according to the reset identifier. When the trigger switch is started, whether the starting belongs to soft reset or not can be determined according to the reset identification, and therefore meaningless reset operation is avoided. And the mapping table generated in the hard reset process is used for responding to the read operation of the soft reset, and simultaneously the write operation of the soft reset is cancelled, so that the packet loss caused by the parameter change caused by initialization in the soft reset process is effectively avoided, and the working efficiency of the switch in the reset process is improved.
Description
Technical Field
The present invention relates to switch reset technologies, and in particular, to a method and an apparatus for resetting a switch, a computer device, and a storage medium.
Background
In the field of switches, the requirements for services are higher and higher, and the switches need to be restarted when equipment is abnormal. The restart switch is divided into a hot start and a cold start, the hot start is also called a soft reset, and the cold start is also called a hard reset.
In the process of soft reset, an internal chip of the switch needs to be reset and reset, and packet loss occurs in the reset process of the switch, so that service cutoff is caused. How to reset under the condition of continuous flow becomes a problem to be solved urgently.
Disclosure of Invention
The invention provides a reset method and device of a switch, computer equipment and a storage medium, which are used for avoiding packet loss in the soft reset process of the switch and improving the working efficiency of the switch in the soft reset process.
In a first aspect, an embodiment of the present invention provides a reset method for a switch, including:
responding to the starting of the trigger switch, and resetting the chip according to the reset identifier;
acquiring read-write interface call of an initialization process;
if the read-write interface is called soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process;
if the read-write interface call is the soft reset write operation, canceling the soft reset write operation;
and if the initialization process is finished, restoring the configuration of the chip according to the reset identifier.
In a second aspect, an embodiment of the present invention further provides a reset device for a switch, including:
the reset module is used for responding to the starting of the trigger switch and resetting the chip according to the reset identifier;
the read-write call monitoring module is used for acquiring read-write interface call in the initialization process;
the soft reset read operation response module is used for responding the soft reset read operation according to a mapping table if the read-write interface is called the soft reset read operation, and the mapping table is generated in the hard reset process;
the soft reset write operation response module is used for cancelling the soft reset write operation if the read-write interface is called the soft reset write operation;
and the configuration recovery module is used for recovering the configuration of the chip according to the reset identifier if the initialization process is finished.
In a third aspect, an embodiment of the present invention further provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor executes the computer program to implement the method for resetting the switch according to the embodiment of the present application.
In a fourth aspect, the present invention further provides a storage medium containing computer-executable instructions, which when executed by a computer processor, are used to perform a reset method of a switch as shown in the embodiments of the present application.
The switch resetting method provided by the embodiment of the invention can respond to the trigger switch starting and reset the chip according to the resetting identifier; acquiring read-write interface call of an initialization process; if the read-write interface is called soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process; if the read-write interface calls the soft reset write operation, the soft reset write operation is cancelled; and if the initialization process is finished, restoring the configuration of the chip according to the reset identifier. Compared with the current soft reset process, the parameters in the chip of the switch are reset along with the reset, so that packet loss is caused. The switch reset method provided by the embodiment of the invention can determine whether the current start belongs to soft reset according to the reset identifier when the switch is triggered to start, thereby avoiding unnecessary reset operation. In addition, in the initialization process, the mapping table generated in the hard reset process is used for responding to the read operation of the soft reset, and the write operation of the soft reset is cancelled, so that the initialization of the parameters of the chip in the switch in the soft reset process is avoided, the packet loss caused by the parameter change caused by the initialization in the soft reset process is further effectively avoided, and the working efficiency of the switch in the reset process is improved.
The embodiment of the invention realizes the soft reset of the switch without packet loss by combining the memory mapping and the global flag. The memory mapping mechanism is to protect the register in the SDK initialization process of the switching chip by using the memory area to prevent the register value from being rewritten in the soft reset process. In addition, the reset mark is used as a global mark, so that the configuration protection of the exchange chip can be realized in the configuration data recovery process, the write operation of the exchange chip cannot exist in the soft reset process, and the read state condition of the SDK of the exchange chip is also met. By the reset method provided by the embodiment of the invention, the hardware can not actively reset the exchange chip and the PHY chip, and the reset control of the exchange chip and the PHY chip is controlled by software.
Drawings
FIG. 1 is a schematic diagram of a reset system according to a first embodiment of the present invention;
fig. 2 is a flowchart of a reset method of a switch in a first embodiment of the present invention;
fig. 3 is a schematic structural diagram of a reset device of a switch in the second embodiment of the present invention;
fig. 4 is a schematic structural diagram of a computer device in the third embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a schematic diagram of a reset system architecture of a switch 102 according to an embodiment of the present invention, which includes a computer device 101 and the switch 102, where the switch 102 includes a plurality of chips, such as a switch chip, an ethernet (PHY) chip, and the like. The switch 102 is connected to the computer device 101, and after the computer device 101 establishes a connection with the switch 102, the switch 102 can be controlled to perform a hard reset and a soft reset. The computer device 101 may store auxiliary files used by the switch 102, mapping tables generated during a hard reset as shown in the following embodiments, and information such as a reset flag/identification information for discriminating between a hard reset and a soft reset. The computer device 101 controls the switch to perform the reset by executing the reset method of the switch provided by the embodiment of the invention, wherein the reset comprises a hard reset and a soft reset.
Fig. 2 is a flowchart of a method for resetting an exchange according to an embodiment of the present invention, where the method is applicable to a situation where the exchange is controlled to be reset by a Computer device, and the method may be executed by the Computer device, where the Computer device may be a Personal Computer (PC), a notebook Computer, or the like. The method specifically comprises the following steps:
and step 110, responding to the trigger switch to start, and resetting the chip according to the reset identifier.
Both hard and soft resets trigger switch startup. When the trigger switch is started, the reset identification is searched. The reset flag is used to indicate whether the current boot is triggered by a hard reset or a soft reset.
Illustratively, the chip reset is performed according to the reset identifier, and the method can be implemented by the following steps:
and step 1.1, acquiring a reset identifier.
The reset flag may be stored in a volatile storage medium in the computer device. The switch needs to go through a hard reset procedure from power down to enable. After the switch is enabled, if the soft reset is triggered, the computer device may configure the identification information in the volatile storage medium, and configure the identification information as preset non-null information. When the device is started without power down (soft reset), the identification information is not destroyed, while a hard reset will restore all data in the volatile storage medium to default.
Illustratively, the reset flag may be obtained according to the following manner: reading the stored identification information; if the identification information is null, the reset identification represents hard reset; and if the identification information is preset non-empty information, the reset mark represents soft reset.
If the switch performs a hard reset, it must be powered down and re-enabled, at which point the data in the volatile storage medium will be cleared. And if the switch is in soft reset, the switch cannot be powered off, the data in the volatile storage medium cannot be cleared at the moment, and the preset non-null information can still be recorded. Therefore, if the identification information is null, the current state is a hard reset, and the reset identification is set to 0; if the identification information is preset non-empty information, the current soft reset is represented, and the reset identification is set to be 1.
And 1.2, if the reset mark indicates soft reset, canceling the chip reset.
If the reset mark represents soft reset, namely the reset mark is set to be 1, the chip does not need to be reset. Reset means resetting the chip hardware. The chip may be a switch chip or an ethernet (PHY) chip in a switch, etc.
And 1.3, if the reset mark indicates hard reset, resetting the chip.
If the reset mark represents hard reset, namely the reset mark is set to 0, resetting the chip according to the reset mode of the hard reset.
The current soft reset or hard reset can be accurately judged through the identification information, the chip hardware reset of the hard reset is executed, and the chip hardware reset of the soft reset is cancelled.
And step 120, acquiring read-write interface call of the initialization process.
And entering an initialization process after the reset process is finished. The initialization process is used to perform Software Development Kit (SDK) initialization. In the SDK initialization process, an Application Programming Interface (API) layer provides an external call Interface. And the calling interface provided by the API layer can be called through the read-write interface. The calling interface is used for register configuration at a system interface layer.
Further, after obtaining the read-write interface call in the initialization process, the method further includes:
and if the read-write interface calls hard reset read operation, storing the accessed register information into the mapping table. And if the read-write interface is called as a hard reset write operation, carrying out chip configuration according to the hard reset write operation.
And the soft reset and the hard reset are called through the read-write interface to carry out SDK initialization. At present, a common mode is that soft reset and hard reset are not distinguished, and data in a register is read and read by an initialization function. However, this method may cause the register value to change during the soft reset, resulting in packet loss. In the embodiment of the invention, during the hard reset, the register address read in the SDK initialization process and the register value in the address of the register are stored in the mapping table, and the read-write of the register value by the soft reset is limited. Optionally, a two-dimensional array for storing register addresses and register values is formed, the two-dimensional array being used for soft-start register data retrieval.
Illustratively, as shown in table 1, the register address and the register value read by the read-write call during the hard reset process may be recorded by the two-dimensional array.
TABLE 1
| Index value | Register address | Register value |
| 1 | Address A | Value A |
| 2 | Address B | Value B |
| … | … | … |
| N | Address N | Number N |
And step 130, if the read-write interface calls soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process.
And if the read-write interface calls soft reset read operation, inquiring according to a mapping table generated in the hard reset process. And searching the mapping table for the register value corresponding to the inquired register address. And feeding back the register value to an initiator of the soft reset read operation.
Because each module task of the switch is not formally started in the SDK initialization process, the register data is sequentially accessed in the initialization process. Soft reset and hard reset the sequence of accesses to the registers is the same each time the SDK is initialized, so that the mapping table obtained by the hard reset process can be used to respond to a soft reset read operation during the soft reset.
And 140, if the read-write interface is called soft reset write operation, canceling the soft reset write operation.
And if the read-write interface call is the soft reset write operation, the soft reset write operation is not executed, and the return is directly carried out. And continuing to execute the next step of the SDK initialization read-write operation.
In the soft reset process of the embodiment of the invention, the register of the chip can not be read and written, so that the problem of packet loss in the SDK initialization process can not be caused. In addition, because the read-write interface belongs to the bottom interface call, only the bottom read-write function of the SDK is changed, and the cutting or the upgrading of the upper-layer SDK and the like cannot influence the realization of the mode. Therefore, the method can be widely applied to different SDKs and has strong universality.
Further, after triggering the switch to start, the method further comprises: the identification information or mapping table is stored to the processor cache.
The processor Cache may be a CPU Cache (CPU Cache). The identification information and mapping table may be stored in a processing cache. The processor cache has high reading speed, so that the reading and writing of the register can be responded more quickly, and the initialization speed of the SDK is improved. Optionally, a Double Data Rate (DDR) memory device may be used to store the identification information or the mapping table, such as DDR3, DDR4, and the like.
And 150, if the initialization process is finished, restoring the configuration of the chip according to the reset identifier.
And entering a configuration recovery process after the SDK initialization process is finished.
The reset flag indicates whether a soft reset procedure is currently in progress. And the configuration recovery phase is used for carrying out the initialization of the data structure and the creation process of each module task. In this process, a plurality of tasks are created, such as a virtual network configuration task, a network packet forwarding task, and the like. The execution sequence of the tasks cannot be configured in advance, so that each task needs to be restricted according to the reset identifier.
Illustratively, the configuration recovery of the chip according to the reset identifier can be implemented by the following steps:
the data structure is initialized. Register access interface calls are obtained. And if the reset identification indicates soft reset, canceling the call of the access interface of the response register. And if the reset mark represents hard reset, responding to the register access interface call according to the initialized data structure, and recovering the chip configuration.
Further, if the configuration recovery is completed, the reset mark is eliminated.
After initializing the data structure, register access interface calls are obtained. And if the reset identification indicates soft reset, the soft reset is not finished, the configuration of the data structure is not allowed at the moment, and the response register access interface call is cancelled. If the reset mark represents hard reset, the soft reset is completed, and the initialized data structure can be assigned according to the call of the register access interface to recover the chip configuration.
Illustratively, a function at the module register access level, such as a function in the driver (driver) of L1, when the reset flag indicates a soft reset, the soft reset flag is not cleared, and the access to the register is cancelled in response to the function in L1 driver. When the reset flag indicates cold start, the access of the function in the L1driver to the register is responded. Illustratively, the function in the L1driver (driver) may be for creating a Virtual Local Area Network (VLAN).
When the configuration recovery is complete, the reset flag is removed. At this time, the constraint on the task is canceled. Each task can read and write data in the register.
The switch resetting method provided by the embodiment of the invention can respond to the trigger of the switch to be started and reset the chip according to the resetting identifier; acquiring read-write interface call of an initialization process; if the read-write interface is called soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process; if the read-write interface calls the soft reset write operation, the soft reset write operation is cancelled; and if the initialization process is finished, restoring the configuration of the chip according to the reset identifier. Compared with the current soft reset process, the parameters in the chip of the switch are reset along with the reset, so that packet loss is caused. The switch reset method provided by the embodiment of the invention can determine whether the current start belongs to soft reset according to the reset identifier when the switch is triggered to start, thereby avoiding unnecessary reset operation. In addition, in the initialization process, the mapping table generated in the hard reset process is used for responding to the reading operation of the soft reset, and the writing operation of the soft reset is cancelled, so that the initialization of the parameters of the chip in the switch in the soft reset process is avoided, the packet loss caused by the parameter change caused by the initialization in the soft reset process is further effectively avoided, and the working efficiency of the switch in the reset process is improved. The embodiment of the invention realizes the soft reset of the switch without packet loss by combining the memory mapping and the global mark. The memory mapping mechanism is to protect the register in the SDK initialization process of the switching chip by using the memory area to prevent the register value from being rewritten in the soft reset process. In addition, the reset mark is used as a global mark, so that the configuration protection of the exchange chip can be realized in the configuration data recovery process, the write operation of the exchange chip cannot exist in the soft reset process, and the read state condition of the SDK of the exchange chip is also met.
Example two
Fig. 3 is a schematic structural diagram of a reset apparatus of an exchange according to a second embodiment of the present invention, where the present embodiment is applicable to a situation where the exchange is controlled by a Computer device to perform reset, the apparatus may be located in a Computer device, and the Computer device may be a Personal Computer (PC), a notebook Computer, or the like. The device specifically includes: a reset module 310, a read-write call monitoring module 320, a soft reset read operation response module 330, a soft reset write operation response module 340, and a configuration restoration module 350.
The reset module 310 is used for responding to the starting of the trigger switch and resetting the chip according to the reset identifier;
a read-write call monitoring module 320, configured to obtain a read-write interface call in an initialization process;
a soft reset read operation response module 330, configured to respond to a soft reset read operation according to a mapping table if the read-write interface is called as the soft reset read operation, where the mapping table is generated in a hard reset process;
a soft reset write operation response module 340, configured to cancel the soft reset write operation if the read/write interface call is the soft reset write operation;
and a configuration recovery module 350, configured to, if the initialization process is finished, perform configuration recovery of the chip according to the reset identifier.
On the basis of the above embodiment, the reset module 310 is configured to:
acquiring a reset identifier;
if the reset mark represents soft reset, canceling chip reset;
and if the reset mark indicates hard reset, resetting the chip.
On the basis of the above embodiment, the reset module 310 is configured to:
reading the stored identification information;
if the identification information is null, the reset identification represents hard reset;
and if the identification information is preset non-empty information, the reset mark represents soft reset.
In addition to the above embodiment, the present invention further includes: the device comprises a hard reset read operation response module and a hard reset write operation response module.
The hard reset read operation response module is used for storing the accessed register information to the mapping table if the read-write interface is called as the hard reset read operation;
and the hard reset write operation response module is used for carrying out chip configuration according to the hard reset write operation if the read-write interface call is the hard reset write operation.
On the basis of the above embodiment, the mobile terminal further comprises a storage module.
And the storage module is used for storing the identification information or the mapping table to the processor cache.
On the basis of the above embodiment, the configuration recovery module 350 is configured to:
initializing a data structure;
acquiring register access interface call;
if the reset mark represents soft reset, canceling the call of the access interface of the response register;
and if the reset mark represents hard reset, responding to the register access interface call according to the initialized data structure, and recovering the chip configuration.
On the basis of the above embodiment, the mobile terminal further comprises a reset identifier elimination module.
The reset mark eliminating module is used for eliminating the reset mark if the configuration recovery is completed.
In the reset device of the switch provided by the embodiment of the present invention, the reset module 310 is configured to respond to the trigger of the switch to start, and reset the chip according to the reset identifier; the read-write call monitoring module 320 is configured to obtain a read-write interface call in the initialization process; the soft reset read operation response module 330 is configured to respond to the soft reset read operation according to a mapping table generated in the hard reset process if the read-write interface is called as the soft reset read operation; the soft reset write operation response module 340 is configured to cancel the soft reset write operation if the read/write interface call is the soft reset write operation; the configuration recovery module 350 is configured to recover the configuration of the chip according to the reset identifier if the initialization process is finished. Compared with the current soft reset process, the parameters in the chip of the switch are reset along with the reset, so that packet loss is caused. The switch reset method provided by the embodiment of the invention can determine whether the current start belongs to soft reset according to the reset identifier when the switch is triggered to start, thereby avoiding unnecessary reset operation. In addition, in the initialization process, the mapping table generated in the hard reset process is used for responding to the read operation of the soft reset, and the write operation of the soft reset is cancelled, so that the initialization of the parameters of the chip in the switch in the soft reset process is avoided, the packet loss caused by the parameter change caused by the initialization in the soft reset process is further effectively avoided, and the working efficiency of the switch in the reset process is improved.
The switch resetting device provided by the embodiment of the invention can execute the switch resetting method provided by any embodiment of the invention, and has corresponding functional modules and beneficial effects of the execution method.
EXAMPLE III
Fig. 4 is a schematic structural diagram of a computer apparatus according to a third embodiment of the present invention, as shown in fig. 4, the computer apparatus includes a processor 40, a memory 41, an input device 42, and an output device 43; the number of processors 40 in the computer device may be one or more, and one processor 40 is taken as an example in fig. 4; the processor 40, the memory 41, the input device 42 and the output device 43 in the computer apparatus may be connected by a bus or other means, and the connection by the bus is exemplified in fig. 4.
The memory 41 is a computer-readable storage medium, and can be used for storing software programs, computer-executable programs, and modules, such as program instructions/modules corresponding to the reset method of the switch in the embodiment of the present invention (for example, the reset module 310, the read-write call monitoring module 320, the soft-reset read operation response module 330, the soft-reset write operation response module 340, and the configuration recovery module 350 in the reset device of the switch). The processor 40 executes various functional applications of the computer device and data processing by running software programs, instructions, and modules stored in the memory 41, that is, implements the reset method of the switch described above.
The memory 41 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 41 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, memory 41 may further include memory located remotely from processor 40, which may be connected to a computer device over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 42 is operable to receive input numeric or character information and to generate key signal inputs relating to user settings and function controls of the computer apparatus. The output device 43 may include a display device such as a display screen.
Example four
An embodiment of the present invention further provides a storage medium containing computer-executable instructions, where the computer-executable instructions are executed by a computer processor to perform a method for resetting a switch, and the method includes:
responding to the starting of the trigger switch, and resetting the chip according to the reset identifier;
acquiring read-write interface call of an initialization process;
if the read-write interface is called soft reset read operation, responding the soft reset read operation according to a mapping table, wherein the mapping table is generated in the hard reset process;
if the read-write interface calls the soft reset write operation, the soft reset write operation is cancelled;
and if the initialization process is finished, restoring the configuration of the chip according to the reset identifier.
On the basis of the above embodiment, resetting the chip according to the reset identifier includes:
acquiring a reset identifier;
if the reset mark represents soft reset, canceling chip reset;
and if the reset mark indicates hard reset, resetting the chip.
On the basis of the above embodiment, acquiring the reset flag includes:
reading the stored identification information;
if the identification information is null, the reset identification represents hard reset;
and if the identification information is preset non-empty information, the reset mark represents soft reset.
On the basis of the above embodiment, after obtaining the read-write interface call of the initialization process, the method further includes:
if the read-write interface calls hard reset read operation, storing the accessed register information into a mapping table;
and if the read-write interface is called as a hard reset write operation, carrying out chip configuration according to the hard reset write operation.
On the basis of the above embodiment, after triggering the switch to start, the method further includes:
the identification information or mapping table is stored to the processor cache.
On the basis of the above embodiment, the recovering of the configuration of the chip according to the reset identifier includes:
initializing a data structure;
acquiring register access interface call;
if the reset mark represents soft reset, canceling the call of the access interface of the response register;
and if the reset mark represents hard reset, responding to the register access interface call according to the initialized data structure, and recovering the chip configuration.
On the basis of the above embodiment, after acquiring the register access interface call, the method further includes:
and if the configuration recovery is completed, eliminating the reset mark.
Of course, the storage medium containing the computer-executable instructions provided by the embodiments of the present invention is not limited to the method operations described above, and may also perform related operations in the reset method of the switch provided by any embodiments of the present invention.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention.
It should be noted that, in the embodiment of the reset apparatus of the switch, each included unit and module are only divided according to functional logic, but are not limited to the above division, as long as the corresponding function can be implemented; in addition, the specific names of the functional units are only for the convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (9)
1. A method for resetting a switch, comprising:
responding to the starting of the trigger switch, and resetting the chip according to the reset identifier;
acquiring read-write interface call of an initialization process;
if the read-write interface call is a soft reset read operation, responding to the soft reset read operation according to a mapping table, wherein the mapping table is generated in a hard reset process;
if the read-write interface call is a soft reset write operation, canceling the soft reset write operation;
if the initialization process is finished, the configuration of the chip is restored according to the reset identification;
the chip resetting according to the resetting identifier comprises the following steps:
acquiring a reset identifier;
if the reset mark represents soft reset, canceling chip reset;
and if the reset mark represents hard reset, resetting the chip.
2. The method of claim 1, wherein obtaining the reset indicator comprises:
reading the stored identification information;
if the identification information is null, the reset identification represents hard reset;
and if the identification information is preset non-empty information, the reset mark represents soft reset.
3. The method of claim 1, after obtaining the read-write interface call of the initialization process, further comprising:
if the read-write interface calls hard reset read operation, storing the accessed register information to a mapping table;
and if the read-write interface call is a hard reset write operation, carrying out chip configuration according to the hard reset write operation.
4. The method of claim 3, further comprising, after triggering switch startup:
and storing the reset identifier or the mapping table to a processor cache.
5. The method of claim 3, wherein the performing the configuration recovery of the chip according to the reset flag comprises:
initializing a data structure;
acquiring register access interface call;
if the reset mark represents soft reset, canceling the response to the register access interface call;
and if the reset mark represents hard reset, responding to the register access interface call according to the initialization data structure, and recovering the chip configuration.
6. The method of claim 5, after obtaining the register access interface call, further comprising:
and if the configuration recovery is completed, eliminating the reset identification.
7. A reset apparatus for a switch, comprising:
the reset module is used for responding to the starting of the trigger switch and resetting the chip according to the reset identifier;
the read-write call monitoring module is used for acquiring read-write interface call in the initialization process;
the soft reset read operation response module is used for responding to the soft reset read operation according to a mapping table if the read-write interface is called as the soft reset read operation, and the mapping table is generated in the hard reset process;
the soft reset write operation response module is used for cancelling the soft reset write operation if the read-write interface is called to be the soft reset write operation;
the configuration recovery module is used for recovering the configuration of the chip according to the reset identifier if the initialization process is finished;
the read-write calling monitoring module is used for: acquiring a reset identifier;
if the reset mark represents soft reset, canceling chip reset;
and if the reset mark indicates hard reset, resetting the chip.
8. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the method of resetting the switch according to any of claims 1-6 when executing the program.
9. A storage medium containing computer executable instructions for performing a method of resetting a switch as claimed in any one of claims 1 to 6 when executed by a computer processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011598981.6A CN112636934B (en) | 2020-12-29 | 2020-12-29 | Switch resetting method and device, computer equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011598981.6A CN112636934B (en) | 2020-12-29 | 2020-12-29 | Switch resetting method and device, computer equipment and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112636934A CN112636934A (en) | 2021-04-09 |
| CN112636934B true CN112636934B (en) | 2022-06-24 |
Family
ID=75286722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011598981.6A Active CN112636934B (en) | 2020-12-29 | 2020-12-29 | Switch resetting method and device, computer equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112636934B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5872967A (en) * | 1989-12-29 | 1999-02-16 | Packard Bell Nec | Method for warm boot from reset |
| CN1540503A (en) * | 2003-04-23 | 2004-10-27 | 华为技术有限公司 | System of capable of identifying cold boot and warm boot, and method for quickenning speed of starting up system |
| CN1949773A (en) * | 2006-10-25 | 2007-04-18 | 华为技术有限公司 | Method for starting network communication apparatus and device thereof |
| CN101813966A (en) * | 2010-04-02 | 2010-08-25 | 华为技术有限公司 | Chip resetting method, chip and double rate memory system |
| CN104657173A (en) * | 2015-02-03 | 2015-05-27 | 烽火通信科技股份有限公司 | Processing method for not interrupting service during upgrading of card software |
| CN109922014A (en) * | 2019-02-01 | 2019-06-21 | 南京国电南自软件工程有限公司 | A kind of cold and hot starting judgment method of interchanger and system |
| CN111459711A (en) * | 2020-03-31 | 2020-07-28 | 烽火通信科技股份有限公司 | Memory recovery method and system |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI243335B (en) * | 2003-09-04 | 2005-11-11 | Htc Corp | Booting method for performing warm boot or cold boot when CPU is down, and its computer system |
-
2020
- 2020-12-29 CN CN202011598981.6A patent/CN112636934B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5872967A (en) * | 1989-12-29 | 1999-02-16 | Packard Bell Nec | Method for warm boot from reset |
| CN1540503A (en) * | 2003-04-23 | 2004-10-27 | 华为技术有限公司 | System of capable of identifying cold boot and warm boot, and method for quickenning speed of starting up system |
| CN1949773A (en) * | 2006-10-25 | 2007-04-18 | 华为技术有限公司 | Method for starting network communication apparatus and device thereof |
| CN101813966A (en) * | 2010-04-02 | 2010-08-25 | 华为技术有限公司 | Chip resetting method, chip and double rate memory system |
| CN104657173A (en) * | 2015-02-03 | 2015-05-27 | 烽火通信科技股份有限公司 | Processing method for not interrupting service during upgrading of card software |
| CN109922014A (en) * | 2019-02-01 | 2019-06-21 | 南京国电南自软件工程有限公司 | A kind of cold and hot starting judgment method of interchanger and system |
| CN111459711A (en) * | 2020-03-31 | 2020-07-28 | 烽火通信科技股份有限公司 | Memory recovery method and system |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112636934A (en) | 2021-04-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20210208925A1 (en) | Method and apparatus for executing non-maskable interrupt | |
| CN109542682B (en) | Data backup method, device, equipment and storage medium | |
| WO2017107900A1 (en) | Virtual machine recovery method and virtual machine management device | |
| JPH03240127A (en) | Program control system | |
| CN101201770A (en) | Method and system for storing important information before system collapse | |
| CN110955598B (en) | Breakpoint processing method and device for kernel mode program | |
| JP2005301639A (en) | Method and program for handling os failure | |
| WO2014120205A1 (en) | Replacement of a corrupt driver variable record | |
| WO2017118289A1 (en) | Data reading method, data processing method, and related storage device | |
| US7010725B2 (en) | Method and apparatus for getting dump of a computer system | |
| WO2000016199A1 (en) | Method for making memory management table and memory device | |
| CN112636934B (en) | Switch resetting method and device, computer equipment and storage medium | |
| JP5166211B2 (en) | Device using non-volatile memory as main memory | |
| CN111880969B (en) | Storage node recovery method, device, equipment and storage medium | |
| CN108304144B (en) | Data writing-in and reading method and system, and data reading-writing system | |
| EP4057580A1 (en) | Instruction writing method and apparatus, and network device | |
| CN110941516B (en) | Operating system restoration method, device, equipment and storage medium | |
| CN110764705B (en) | Data reading and writing method, device, equipment and storage medium | |
| CN100447758C (en) | Snapshot management method for logic disk | |
| CN110515553B (en) | Volume deleting method and device | |
| CN111045787B (en) | Rapid continuous experiment method and system | |
| JP2022184735A (en) | Program starting method and device, and storage medium | |
| CN108804033B (en) | Full-disk scanning method and device based on power-off continuation, computer equipment and medium | |
| CN107704399B (en) | Method and device for storing data | |
| CN112968867A (en) | Access control method, system, physical host and communication equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |