CN112636342B - Fault ride-through performance improvement method based on grid-connected impedance model of converter - Google Patents
Fault ride-through performance improvement method based on grid-connected impedance model of converter Download PDFInfo
- Publication number
- CN112636342B CN112636342B CN202011531775.3A CN202011531775A CN112636342B CN 112636342 B CN112636342 B CN 112636342B CN 202011531775 A CN202011531775 A CN 202011531775A CN 112636342 B CN112636342 B CN 112636342B
- Authority
- CN
- China
- Prior art keywords
- current
- disturbance
- formula
- component
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/001—Methods to deal with contingencies, e.g. abnormalities, faults or failures
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J3/00—Circuit arrangements for ac mains or ac distribution networks
- H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
- H02J2203/20—Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Inverter Devices (AREA)
Abstract
According to the fault ride-through performance improvement method based on the grid-connected impedance model of the converter, which is provided by the invention, the inner loop is used for DQ current control and the outer loop is used for DC voltage control, the three-phase voltage source converter of the phase-locked loop DE-PLL for eliminating fault voltage disturbance is adopted, meanwhile, the multiple coupling influence and the diversity of control structures are considered, the grid-connected operation of the converter under the condition of grid faults is analyzed by modeling the grid-connected impedance model of the converter, the fault ride-through performance of the converter is evaluated, and the fault ride-through performance improvement method is provided based on the grid-connected impedance model and analysis thereof.
Description
[ field of technology ]
The invention relates to a converter technology in electrical engineering, in particular to a fault ride-through performance improvement method based on a converter grid-connected impedance model.
[ background Art ]
The power quality of grid-connected converters can deteriorate drastically in case of grid faults. Such as in document [1] "M.Castilla, J.Miret, J.L.Sosa, J.Matas, and L.G.de Vicu-na," Grid-fault control scheme for three-phase photovoltaic converters with adjustable power quality characteristics, "IEEE Trans.Power Electron, vol.25, no.12, pp.2930-2940, dec.2010" and document [2] "H.Chen, H..Lee, P.Cheng, R.Teodorescu, and F.Blaaberg," A low-voltage ride-through technique for Grid-connected converters with reduced power transistors stress, "IEEE Trans.Power Electron, vol.31, no.12, pp.8562-8571, dec.2016", increase in current harmonic distortion in converter AC and DC side circuits is one of the typical adverse effects.
In order to reduce harmonic components, a dual current control structure based on component separation is generally adopted at present to respectively adjust positive sequence fundamental wave components and negative sequence components. Various control schemes based on the control structure have been proposed so far to improve the fault ride-through performance of the converter.
For example, document [2] proposes a fundamental wave and negative sequence current injection method that supports alternating voltage and reduces direct voltage ripple.
Document [3] "S.Mortazavian, M.M.Shabestary, and Y.A. -R.I. Mohamed," Analysis and dynamic performance improvement of grid-connected voltage-source converters under unbalanced network conditions, "in IEEE Trans.Power Electron., v0l.PP, no.99, pp.1-1, doi: in 10.1109/tpel.2016.2633994. "fault dynamics modeling and analysis of grid-connected variable structure control systems is described.
Reconstruction schemes and control strategies to achieve parallel and series compensation are discussed in document [4] "A.Moawwad, M.S.E1 Mourisi, W.xiao, and J.L. Kirtley," Novel configuration and transient management control strategy for VSC-HVDC, "IEEE Trans.Power System, vol.29, no.5, pp.2478-2488, sep.2014," and document [5] "A.Moawwad, M.S.E1Moursi, andW.Xiao," Advanced fault ride-through management scheme for VSC-HVDC connecting offshore wind farms, "IEEE Trans.Power System, vol.31, no.6, pp.4923-4934, nov.2016.
Document [6] "A.Moawwad, M.S.E1 Mourisi, and W.xiao," A novel transient control strategy for VSC-HVDC connecting offshore wind power plant, "IEEE Trans. Sustein. Energy, vo1.5, no.4, pp.1056-1069, oct.2014," proposes a fault ride-through control method to mitigate DC link voltage ripple and maximum possible active power.
The control schemes of the distributed generation inverter and the grid voltage support static synchronous compensator are given in the literature [7] "J.Miret, A.Camacho, M.Castilla, L.G.deVicu-na, and J.Matas," Control scheme with voltage support capability for distributed generation inverters under voltage sags, "IEEE Trans.Power Electron, vol.28, no.11, pp.5252-5262, nov.2013," and the literature [8] "M.Castilla, J.Miret, A.Camacho, J.Matas, and L.G. de Vicu-na," Voltage support control strategies for static synchronous compensators under unbalanced voltage sags, "IEEE Trans.Ind.Electron, vol.61, no.2, pp.808-820, feb.2014," respectively.
However, the solutions in these documents are generally obtained only from an analysis of the ac side of the converter, in particular based on a function of the converter control and the ac circuit, whereas the coupling between the ac and dc circuits of the inverter and the effect of the circuit on the fault ride-through operation are generally neglected.
In summary, under the grid fault condition of unbalanced voltage, the power quality of the grid-connected inverter is rapidly deteriorated, and various inverter control strategies based on symmetrical components have been proposed so far to improve the fault ride through performance; however, the coupling effect between ac and dc circuits is usually ignored, which affects the fault ride through performance improvement, especially if the ac-dc coupling effect of the converter is significant, which is a significant compromise. In addition, the fault ride-through operation and its performance have not been fully analyzed and how to solve the problems it has.
[ invention ]
The invention provides a fault ride-through performance improving method based on a grid-connected impedance model of a current converter, which is used for simultaneously considering multiple coupling influence and diversity of a control structure, constructing a reliable circuit model to analyze AC-DC circuit interconnection of the current converter under the condition of grid faults, understanding the AC-DC interconnection, and carrying out fault ride-through operation analysis under the condition of AC-DC side circuit influence, evaluating the fault ride-through performance of the current converter and improving the electric characteristics of the AC-DC side.
In order to achieve the above purpose, the invention adopts the following technical scheme:
The fault ride-through performance improvement method based on the grid-connected impedance model of the converter comprises the following steps:
step one, construction of complex function space vector
1) Construction of complex function space vector expression of basic variable
The converter adopts a three-phase voltage source converter with inner-loop DQ current control and outer-loop DC voltage control, under the condition of grid fault, the common connection point PCC positive-sequence fundamental voltage, negative sequence disturbance and zero sequence disturbance components are considered, and the common connection point PCC voltage of the phase A is represented as shown in a formula (1):
wherein V is 1 Representing the positive sequence component of the fundamental wave of the voltage, V n Representing the negative sequence component of the fundamental wave of the voltage, V 0 Representing the fundamental zero sequence component of the voltage;
and->
V respectively 1 、V n 、V 0 The phases of the components, the following voltage current amplitudes and phases are expressed in the same manner, the direct current side voltage is composed of a direct current component and a disturbance component, and the complex function space vector is shown in the formula (2):
wherein omega m ＝2ω 1 ；
2) Complex function space vector expression construction for phase-locked loop
The internal current control in the three-phase voltage source converter comprises a current compensator Hi(s), a decoupling gain part kd and a voltage feedforward gain part kv, in order to improve fault ride-through performance, the three-phase voltage source converter phase-locked loop eliminates disturbance caused by negative sequence voltage (herein abbreviated as DE-PLL, namely Deviation Elimination-Phase Locking Loop, phase-locked loop eliminating fault voltage disturbance), through the phase-locked loop structure, the phase-locked loop angle deviation caused by asymmetric power grid fault under ideal conditions is eliminated, taking the delay signal elimination method of a DSC operation unit as an example, the function of eliminating the negative sequence voltage disturbance is shown as a formula (3):
Where T1 is the fundamental period, T in the Park and Park inverse transform functions for a phase locked loop that eliminates tracking angle bias with a special design K And T R The respective expressions are as shown in the formula (4):
step two, performance analysis
Firstly, obtaining a grid-connected sequence impedance model;
1) For a conventional control structure with a single current control unit, the basic disturbance component calculation thereof comprises the following steps:
according to the signal flow of the control link, the fundamental component of the alternating current can be obtained as shown in a formula (5):
thereby further obtaining an ac-side disturbance current substantially symmetrical component as shown in formula (6):
wherein omega p ＝ω m +ω 1 ，ω n ＝ω m -ω 1 ，Y dp (jω p )、Y dn (jω n ) As shown in the formula (7), the admittance matrix in the formula (6) represents the admittance of the inverter sequence converted to the ac side,
the dc side disturbance current is shown in formula (8):
wherein Y is dd (jω m ) The calculation of (2) is shown in formula (9):
the admittance matrix in equation (8) represents the admittance of the inverter converted to the dc side, and the calculation of the ac side current disturbance component is shown in equation (10) taking the influence of the dc circuit into account:
wherein Y is dc (jω m ±jω 1 ) The calculation of (2) is shown in formula (11):
Y dc (s±jω 1 ) The grid-connected sequence admittance matrix of the converter is converted to the alternating current side, and similarly, the disturbance current on the direct current side is deduced as shown in a formula (12):
Wherein Y is ac (jω m ) To neglect ac-dc coupling and voltage drop across the converter inductance for the lumped transfer admittance of the disturbance propagating from ac side to dc side, equation (13) is obtained:
2) For a control structure with a dual current control unit based on positive and negative sequence symmetry components, the basic disturbance component calculation comprises the following steps:
the control structure of the double-current control unit adopts a typical structure for respectively adjusting the fundamental component FC and the negative sequence component NC, and each control unit adopts the same structure as the three-phase voltage source converter in the first step;
in addition to obtaining the fundamental component by using the formula (3) in the step one through the delayed signal cancellation method of the DSC operation unit, the DSC operation unit is additionally added to extract the negative sequence component of the PCC voltage, so as to obtain the formula (14):
according to the flow of alternating current and direct current voltage signals in the control loop, the flow of the alternating current voltage signals is the same as the flow of the alternating current signals, but positive sequence voltage disturbance can be ignored; and the flow of the direct voltage and q-axis current reference amounts is the same as V dc The fundamental component is obtained from the signal flow in accordance with step one, and the disturbance component is obtained as shown in equation (15):
in the formula (15), ω n The frequency representing the space vector of the negative sequence complex function is omega n ；
Wherein, the frequency of the negative sequence component in the negative sequence component control unit is zero, and the disturbance component of the alternating current of the converter is deduced by the same method as shown in the formula (16):
wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown in formula (17):
admittance matrix Y dc (s±jω 1 ) The calculation is shown in formula (18):
further deriving the current perturbation of the available inverter dc current is shown in equation (19):
neglecting the ac-dc coupling and the voltage drop across the converter inductance, the result is as shown in equation (20):
3) Improvement of fault ride-through performance
As can be seen from the formula (7), the dc current disturbance is zero only when the following conditions are satisfied, thereby improving the dc side fault ride through performance, as shown in the formula (21):
neglecting the effects of ac-dc coupling and inverter inductor voltage, equation (22) is derived from equation (21):
as can be seen from the formulas (21) and (22), the ac-dc power balance is balanced by adjusting the negative sequence current, and the basic disturbance component in the ac current of the converter can be eliminated only when the following conditions are satisfied, so that the fault ride-through performance of the ac side is improved, as shown in the formula (23):
as can be seen from the formula (7), the disturbance component of the alternating current side is eliminated, the fault ride-through performance of the alternating current side is improved, and the disturbance components of the positive sequence and the negative sequence are required to be controlled simultaneously; the control structure based on the dual current control unit only uses the NC control unit to control the negative sequence component; thus, positive sequence disturbances in the inverter ac current still exist; as shown in equation (21), equation (22) and equation (23), reducing these two fundamental disturbance components also reduces the disturbance harmonics caused by nonlinear behavior; if high-quality current is required to be obtained, under the condition that the AC-DC coupling relation is relatively close, the basic positive sequence disturbance component is regulated necessarily;
4) Based on the above analysis, for a control structure having a triple current control unit, the basic disturbance component calculation thereof includes the steps of:
in the triple current control unit structure, the control structure of the fundamental component control unit and the control structure of the negative sequence component control unit are the same as those of the double current control unit structure, and meanwhile, a positive sequence disturbance component control unit is added, and the positive sequence component positive sequence disturbance component control unit is the same as the three-phase voltage source converter in the first step; since the frequency of positive sequence disturbance is three times of fundamental frequency, park conversion and inverse transformation synchronous angle of phase-locked loop are also three times of control structure of fundamental component control unit and control structure of negative sequence component control unit, decoupling gain part is 3k d Rather than k d The method comprises the steps of carrying out a first treatment on the surface of the Since the DSC operation unit in the formula (14) cannot block the positive-sequence disturbance component, a module for extracting the negative-sequence disturbance component and the positive-sequence disturbance component is as shown in the formula (24) and the formula (25):
likewise, the flow of the alternating current signal in the loop is controlled according to the structure of the triple current control unit, wherein the flow of the alternating current voltage signal is similar to the flow; the flow of the dc voltage signal is like the flow of the dc voltage outer loop control signal in the dual-current control unit structure, so that the calculation formula of the disturbance symmetry component in the modulation factor of the triple-current control unit structure can be generalized, as shown in formula (26):
The modulation factor and the basic component of the ac current of the inverter are the same as the basic component of the single current control unit structure in the first step, and the disturbance component in the ac current of the inverter can be deduced and obtained as shown in the formula (27):
the reference amount of positive sequence current disturbance should be set to zero to obtain equation (28) and equation (29)
Y dp (s+jω)＝Y dn (s-jω 1 )＝Y p (s+jω 1 )＝Y n (s-jω 1 )＝0 (28)
Wherein Y is ac The calculation of(s) is shown in formula (30):
from the AC side, the grid-connected admittance is zero as shown by the formula (28); thus, when the corresponding current reference value is set to zero, the basic disturbance component in the inverter ac current is eliminated.
Further, on the basis of obtaining a grid-connected sequence impedance model, the magnitude of a current disturbance component under a fault can be calculated, so that fault ride-through performance is further obtained according to a calculation result;
as can be seen from the analysis in the second step,
1) For a voltage source converter adopting a single current unit control structure, the disturbance current of the alternating current side caused by the alternating current fault can be calculated as follows by the formula (10):
y in the formula dc (jω m ±jω 1 ) Is the impedance of the grid-connected sequence at the alternating current side, and is represented by the formula (11) The calculation is as follows:
wherein Y is dp (jω p )、Y dn (jω n ) And Y dd (jω m ) Respectively calculating according to a formula (7) and a formula (9);
2) For a current control structure employing two units, the basic disturbance current calculation on the ac side is as shown in formula (31):
Wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown as a formula (17);
3) For the single-current unit control structure, the calculation of the direct-current side basic disturbance current is shown in a formula (12):
4) For a control structure adopting a double-current unit, the direct-current side surface disturbance current can be calculated as
According to the formulas (11), (12), (31) and (19), the fault ride-through performance of the grid connection of the converter can be evaluated, the smaller the fault disturbance current of the alternating current side and the direct current side is, the better the fault ride-through performance is, and the worse the fault ride-through performance is, and accordingly, the improvement of the fault ride-through performance is proposed.
Further, the influence degree of the alternating current-direct current disturbance current is comprehensively considered, and when the requirement on the electric energy quality of the direct current side is higher, the weight of the direct current disturbance current is properly increased.
Further, in the time domain simulation, two typical fault ride-through control strategies of the medium double-current control unit structure and the triple-current control unit structure are used for verification, and the following common connection point A phase of the fault ride-through simulation is directly grounded between 0.2s and 1.2s, and specifically comprises the following steps:
step 1), positive sequence fundamental component balance control
When the double-current control unit structure and the triple-current control unit structure adopt a positive sequence fundamental component balance control strategy, the alternating current of the converter responds to faults, and the alternating current fundamental current rises from 1.0pu to 1.5pu in the dynamic process after the faults;
According to waveforms of PCC voltages of 1.0s to 1.08s of the A-phase direct ground fault and waveforms of 1.0s to 1.08s of alternating current of the converter corresponding to the single current control unit structure, the double current control unit structure and the triple current control unit structure respectively; the converter alternating current of the single-current control unit structure is obviously distorted, and the electric energy quality of the double-current control unit structure is still severely distorted due to the influence of three positive sequence disturbances, and the triple-current control unit structure is adopted to inhibit the positive sequence disturbance component, so that the electric energy quality is much better than that of the single-current control unit structure and the double-current control unit structure;
according to Fourier transform analysis of steady-state alternating current and PCC voltage after faults, the lumped sequence admittance amplitude values of the double-current control unit structure and the triple-current control unit structure are respectively calculated, and Y of the double-current control unit structure is obtained p (j3ω 1 ) And Y n (jω 1 ) The amplitude is 2.6S and 0S respectively;
because of adopting the triple current control unit structure, Y in the triple current control unit structure p (j3ω 1 ) The amplitude of the (a) is reduced to 0, and admittances Y of other higher disturbance harmonics are also displayed in the lumped sequence admittance amplitudes of the double-current control unit structure and the triple-current control unit structure n (j3ω 1 ) And Y n (j6ω 1 ) Is suppressed by regulating the DC voltage disturbance;
step 2), DC side disturbance rejection
Simulation verification is carried out on the basis of the triple current control unit structure, and in order to improve interconnection performance, the impedance Z of the direct current circuit is calculated d (s) is changed to 0.0001s+0.05;
according to the response of the direct current voltage and the alternating current, the direct current voltage v of different direct current side disturbance suppression strategies dc Waveform, and inverter ac current according to different dc side disturbance rejection strategies;
through simulation, the reference value I is obtained by calculation of a formula (22) dnr And I dnr And calculate from equation (21) to obtain reference value I respectively dnr And I dnr ；
DC voltage v dc The waveform and the converter AC current waveform show steady-state voltage and current after failure from 1.0s to 1.08s, respectively, and DC voltages v of different DC side disturbance rejection strategies due to non-negligible AC-DC coupling effects dc A severe disturbance component occurs; on the other hand, because of taking the AC-DC coupling effect into consideration, the DC voltages v of different DC side disturbance suppression strategies dc The direct current voltage disturbance component of the voltage regulator is effectively restrained.
The above reasoning mainly uses the inner loop as DQ current control and the outer loop as DC voltage control, and uses the phase-locked loop of DE-PLL to eliminate fault voltage disturbance as an example for explanation.
The beneficial effects of the invention are as follows:
the invention simultaneously considers the multiple coupling influence and the diversity of control structures, builds a reliable circuit model to analyze the AC-DC circuit interconnection of the converter under the power grid fault condition, and is used for understanding the AC-DC interconnection and carrying out fault ride-through operation analysis under the condition of the AC-DC side circuit influence;
the fault ride-through performance improvement method based on impedance analysis provides a quantitative calculation method for AC-DC side fundamental harmonic components of the converter taking AC-DC coupling into consideration, and the fault ride-through performance of the converter is estimated based on the quantitative calculation method; meanwhile, the fault ride-through performance improvement method based on impedance analysis considers the action and effect of AC-DC coupling of the converter, so that disturbance components caused by network side faults are effectively restrained under stronger AC-DC coupling conditions, and the AC-DC side electrical characteristics are further improved.
[ description of the drawings ]
Fig. 1 is a grid-connected structure diagram of a voltage source converter in a first embodiment of the present invention;
FIG. 2 is a block diagram of a single current controller according to a first embodiment of the present invention;
FIG. 3 is a general block diagram of a dual current control unit in a second embodiment of the present invention;
FIG. 4 is a flow chart of the AC current signal of the control link in the dual-current control unit in the second embodiment of the invention;
FIG. 5 is a flow chart of the DC voltage outer loop control signal in the dual current control unit according to the second embodiment of the present invention;
fig. 6 is a general structural diagram of a triple current control unit in a third embodiment of the present invention;
FIG. 7 is a flowchart of the alternating current signals of the triple current control unit in the FC control, NC control and PC control links in the third embodiment of the present invention;
FIG. 8 is a plot of PCC voltage for a phase A direct ground fault of the present invention;
fig. 9 is an ac current diagram of three embodiments of the present inverter;
FIG. 10 is Y in example II of the present invention p (j 2 pi f) and Y n (j 2 pi f) amplitude plot;
FIG. 11 is Y in example III of the invention p (j 2 pi f) and Y n (j 2 pi f) amplitude plot;
FIG. 12 is a DC voltage vdc employing different DC side disturbance rejection strategies in accordance with the present invention;
fig. 13 is an inverter ac current of the present invention employing different dc side disturbance rejection strategies.
[ detailed description ] of the invention
In order that the above objects, features and advantages of the invention will be readily understood, a more particular description of the invention will be rendered by reference to the appended drawings.
The present invention may be embodied in many other forms than those herein described, and those skilled in the art will readily appreciate that the present invention may be similarly embodied without departing from the spirit or essential characteristics thereof, and therefore the present invention is not limited to the specific embodiments disclosed below. Next, the present invention will be described in detail with reference to the drawings, which are only examples for convenience of illustration, and should not be construed as limiting the scope of the invention. In the drawings and description, like or similar parts are designated with the same reference numerals. While the present invention provides some particular range of merits, it should be appreciated that the parameters need not be exactly equal to the corresponding values, but rather approximate the corresponding values within an acceptable margin of error.
Example 1
The fault ride-through performance improvement method based on the grid-connected impedance model of the converter comprises the following steps:
step one, construction of complex function space vector
1) Construction of complex function space vector expression of basic variable
The converter adopts a three-phase voltage source converter with inner-loop DQ current control and outer-loop direct current voltage control, as shown in figure 1, under the condition of grid faults, the common connection point PCC positive sequence fundamental voltage, negative sequence disturbance and zero sequence disturbance components are considered, and the common connection point PCC voltage of the phase A is shown in a formula (1):
wherein V is 1 Representing the positive sequence component of the fundamental wave of the voltage, V n Representing the negative sequence component of the fundamental wave of the voltage, V 0 Representing the fundamental zero sequence component of the voltage;
and->
V respectively 1 、V n 、V 0 The phases of the components are as followsThe piezoelectric current amplitude and phase are represented in the same manner.
Such as document [14] "H.Guo," Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid fault conditions ", has been accepted by Trans.Ind.Electron. [ Online ]. Available: https: as shown in the// ieeeexplore. Ore/document/t/8967230 ", the dc side voltage is composed of a dc component and a disturbance component, and its complex functional space vector is shown in formula (2):
Wherein omega m ＝2ω 1 ；
2) Complex function space vector expression construction for phase-locked loop
As shown in fig. 2, which is an internal current control diagram of the present embodiment, the Three-phase voltage source converter includes a current compensator Hi(s), a decoupling gain section kd and a voltage feedforward gain section kv, and the Three-phase voltage source converter employs a DE-PLL phase-locked loop (PLL) structure having a significant influence on the converter admittance, such as document [15] "B.Liu, F.Zhuo, Y.Zhu, et al," a Three-Phase PLL Algorithm Based on Signal Reforming Under Distorted Grid Conditions, "IEEE trans.power electron, vol.30, no.9, pp.5272-5283, sep.2015 ], document [16]" L.Zhang, L.Harnefors, and h.p.nee, "Power-synchronization control of grid-connected voltage-source converters," IEEE trans.power electron, "vol.25, no.2, pp.809-820, main.2010, document [17]" S.Golestan, M.Ramezani, J.M.Guerrero and m.Monfared, "q-frame cascaded delayed signalcancellation-base-analysis, PLL, and comparison with moving average filter-based PLL," IEEE Trans.Power Electron, vol.30, no.3, pp.1618-1632, march.2015, ", document [18]" S.Golestan, F.D.Freijedo, A.Vidal, et al, "An efficient implementation of generalized delayed signal cancellation PLL," IEEE Trans.Power Electron, vol.31, no.2, pp.1085-1094, feb.2016, "and document [19]" M.Merai, M.W.Naouar and I.S. Belkhodja, "improved dc-link voltage control strategy for grid connected converters," IEEE Trans.Power Electron, vol.33, no.4, pp.3575-3582, apr.2018, "various types of optimization structures have been proposed so far to improve the angle tracking effect and the fault ride-through performance of phase-locked loops under fault conditions, to improve the fault ride-through performance, to eliminate disturbances due to the sequence voltage of a Three-phase voltage source phase-locked loop, herein DE-phase locked loops for short, i.e., to eliminate disturbance of the fault voltage of the phase-locked loop, by means of the phase-locked loop structure, the phase-locked loop angle deviation caused by the asymmetric power grid fault under ideal conditions is eliminated, and the function of eliminating negative sequence voltage disturbance by taking a delayed signal elimination method of a DSC operation unit as an example is shown in a formula (3):
Where T1 is the fundamental period, T in the Park and Park inverse transform functions for a phase locked loop that eliminates tracking angle bias with a special design K And T R The respective expressions are as shown in the formula (4):
step two, performance analysis
Firstly, obtaining a grid-connected sequence impedance model;
1) For a conventional control structure with a single current control unit, the basic disturbance component calculation thereof comprises the following steps:
such as document [14] "H.Guo," Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid fault conditions ", has been accepted by Trans.Ind.Electron. [ Online ]. Available: https: as shown in the// ieeeexplore. Ieee. Org/document/8967230', according to the signal flow of the control link, an alternating current fundamental wave can be obtained as shown in formula (5):
thereby further obtaining the alternating-side disturbance current symmetrical component as shown in formula (6):
wherein omega p ＝ω m +ω 1 ，ω n ＝ω m -ω 1 ，Y dp (jω p )、Y dn (jω n ) As shown in the formula (7), the admittance matrix in the formula (6) represents the admittance of the inverter sequence converted to the ac side,
the dc side disturbance current is shown in formula (8):
wherein Y is dd (jω m ) The calculation of (2) is shown in formula (9):
the admittance matrix in equation (8) represents the admittance of the inverter converted to the dc side, and the calculation of the ac side current disturbance component is shown in equation (10) taking the influence of the dc circuit into account:
Wherein Y is dc (jω m ±jω 1 ) The calculation of (2) is shown in formula (11):
Y dc (s±jω 1 ) The grid-connected sequence admittance matrix of the converter is converted to the alternating current side, and similarly, the disturbance current on the direct current side is deduced as shown in a formula (12):
wherein Y is ac (jω m ) To neglect ac-dc coupling and voltage drop across the converter inductance for the lumped transfer admittance of the disturbance propagating from ac side to dc side, equation (13) is obtained:
example two
For a control structure with a dual current control unit based on positive and negative sequence symmetric components, the basic disturbance component calculation comprises the following steps:
the dual current control structure is generally used for improving the fault ride-through performance of the converter, as shown in fig. 3, the control structure of the dual current control unit adopts a typical structure for respectively adjusting the fundamental component FC and the negative sequence component NC, and each control unit adopts the same structure as the three-phase voltage source converter in the first embodiment, that is, adopts the same structure as that shown in fig. 2;
in addition to obtaining the fundamental component by using the formula (3) in the step one through the delayed signal cancellation method of the DSC operation unit, the DSC operation unit is additionally added to extract the negative sequence component of the PCC voltage, so as to obtain the formula (14):
as shown in fig. 4 and 5, according to the sum of the alternating currents in the control loop The flow of the direct current voltage signal is similar to that of the alternating current signal, but the positive sequence voltage disturbance can be ignored; and the flow of the direct voltage and q-axis current references is similar to V dc The fundamental component is obtained from the signal flow in accordance with step one, and the disturbance component is obtained as shown in equation (15):
in the formula (15), ω n The frequency representing the space vector of the negative sequence complex function is omega n ；
Wherein, the frequency of the negative sequence component in the negative sequence component control unit is zero, and the disturbance component of the alternating current of the converter is deduced by the same method as shown in the formula (16):
wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown in formula (17):
admittance matrix Y dc (s±jω 1 ) The calculation is shown in formula (18):
further deriving the current perturbation of the available inverter dc current is shown in equation (19):
neglecting the ac-dc coupling and the voltage drop across the converter inductance, the result is as shown in equation (20):
3) Improvement of fault ride-through performance
As can be seen from the formula (7), the dc current disturbance is zero only when the following conditions are satisfied, thereby improving the dc side fault ride through performance, as shown in the formula (21):
neglecting the effects of ac-dc coupling and inverter inductor voltage, equation (22) is derived from equation (21):
As can be seen from the formulas (21) and (22), the ac/dc power balance is balanced by adjusting the negative sequence current, and the formula (22) is consistent with the dc voltage disturbance suppression conclusion obtained in the literature [6] "A.Moawwad, M.S.El Moursi, and w.xiao," A novel transient control strategy for VSC-HVDC connecting offshore wind power plant, "IEEE trans. Sustain. Energy, vol.5, no.4, pp.1056-1069, oct.2014.", and also, the basic disturbance component in the ac current of the inverter can be eliminated only when the following conditions are satisfied, thereby improving the ac side fault ride through performance, as shown in the formula (23):
as can be seen from the formula (7), the disturbance component of the alternating current side is eliminated, the fault ride-through performance of the alternating current side is improved, and the disturbance components of the positive sequence and the negative sequence are required to be controlled simultaneously; the control structure based on the dual current control unit only uses the NC control unit to control the negative sequence component; thus, positive sequence disturbances in the inverter ac current still exist; such as document [14] "H.Guo," Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid fault conditions ", has been accepted by Trans.Ind.Electron. [ Online ]. Available: https: as shown in the formula (21), the formula (22) and the formula (23), reducing the two basic disturbance components also reduces disturbance harmonics caused by nonlinear behavior; if high-quality current is required to be obtained, under the condition that the AC-DC coupling relation is close, the regulation of the basic positive sequence disturbance component is necessary. In this way, the fundamental disturbance component in the ac current of the converter is eliminated.
Example III
On the basis of the first embodiment, the second embodiment and the double-current control unit structure, for the control structure with the triple-current control unit, the basic disturbance component calculation includes the following steps:
in order to eliminate the basic positive sequence disturbance component in the alternating current of the converter, the fault ride-through performance is improved based on a three-control unit structure. The proposed architecture with three current control units is shown in fig. 6, in the triple current control unit structure, the control structure of the fundamental component control unit and the control structure of the negative sequence component control unit are the same as the double current control unit structure, and meanwhile, a positive sequence disturbance component control unit is added, and the positive sequence component positive sequence disturbance component control unit adopts the same structure as the three-phase voltage source converter in the first embodiment and the first step, namely, adopts the same structure as that shown in fig. 2; since the frequency of positive sequence disturbance is three times of fundamental frequency, park conversion and inverse transformation synchronous angle of phase-locked loop are also three times of control structure of fundamental component control unit and control structure of negative sequence component control unit, decoupling gain part is 3k d Rather than k d The method comprises the steps of carrying out a first treatment on the surface of the Since the DSC operation unit in the formula (14) cannot block the positive-sequence disturbance component, a module for extracting the negative-sequence disturbance component and the positive-sequence disturbance component is as shown in the formula (24) and the formula (25):
Also, as shown in fig. 7, the flow of the ac signal in the loop is controlled according to the triple current control unit structure, wherein the flow of the ac voltage signal is similar to that of the loop; the flow chart of the dc voltage signal is shown in fig. 5, that is, the flow chart of the dc voltage outer loop control signal in the dual-current control unit structure, so that the disturbance symmetrical component in the modulation factor of the triple-current control unit structure can be generalized as shown in the formula (26):
the modulation factor and the basic component of the ac current of the inverter are the same as those of the single current control unit structure in the first step of the first embodiment, and the disturbance component in the ac current of the inverter can be deduced as shown in the formula (27):
the reference amount of positive sequence current disturbance should be set to zero to obtain equation (28) and equation (29)
Y dp (s+jω)＝T dn (s-jω)＝Y p (s+jω)＝Y n (s-jω)＝0 (28)
Wherein Y is ac The calculation of(s) is shown in formula (30):
from the AC side, the grid-connected admittance is zero as shown by the formula (28); thus, when the corresponding current reference value is set to zero, the basic disturbance component in the inverter ac current is eliminated.
The fault ride-through performance improvement method based on the grid-connected impedance model of the converter (shown in fig. 8) is to verify the performance improvement method provided by the invention in a time domain simulation by using two typical fault ride-through control strategies of the double-current control unit structure and the triple-current control unit structure in the second embodiment.
On the basis of obtaining a grid-connected sequence impedance model, the magnitude of a current disturbance component under a fault can be calculated, so that the fault ride-through performance is further obtained according to a calculation result;
as can be seen from the analysis in step two of the first embodiment,
1) For a voltage source converter adopting a single current unit control structure, the disturbance current of the alternating current side caused by the alternating current fault can be calculated as follows by the formula (10):
y in the formula dc (jω m ±jω 1 ) The impedance of the grid-connected sequence at the alternating current side is calculated as follows by the formula (11):
wherein Y is dp (jω p )、Y dn (jω n ) And Y dd (jω m ) Respectively calculating according to a formula (7) and a formula (9);
2) For a current control structure employing two units, the basic disturbance current calculation on the ac side is as shown in formula (31):
wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown as a formula (17);
3) For the single-current unit control structure, the calculation of the direct-current side basic disturbance current is shown in a formula (12):
4) For a control structure adopting a double-current unit, the direct-current side surface disturbance current can be calculated as
According to the formulas (11), (12), (31) and (19), the fault ride-through performance of the grid-connected converter can be evaluated, the smaller the fault disturbance current of the alternating current side and the direct current side is, the better the fault ride-through performance is, and the worse the fault disturbance current is, accordingly, the improvement of the fault ride-through performance is proposed, the influence degree of the alternating current and direct current disturbance current can be comprehensively considered, and if the requirement on the electric energy quality of the direct current side is higher, the weight of the direct current disturbance current can be properly increased.
In the time domain simulation, two typical fault ride-through control strategies of the double-current control unit structure and the triple-current control unit structure in the second embodiment are adopted for verification, and the following common connection point A phase of the fault ride-through simulation is directly grounded between 0.2s and 1.2s, and specifically comprises the following steps:
step 1), positive sequence fundamental component balance control (BPSC)
As shown in fig. 9, in the second and third examples, the response of the ac current of the inverter to the fault when the double-current control unit structure and the triple-current control unit structure adopt the positive-Sequence fundamental component balance control strategy, such as document [14] "h.guo," Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid fault conditions ", has been accepted by trans.ind.electron. [ Online ]. Available: https: as analyzed in the// ieeeexplore. Ieee. Org/document/8967230', the ac fundamental current in the post-fault dynamic process rises from 1.0pu to 1.5pu;
waveforms of 1.0s to 1.08s as shown on the right side of fig. 8 and 9, that is, waveforms of 1.0s to 1.08s of PCC voltage according to a phase a direct ground fault, and waveforms of 1.0s to 1.08s of inverter ac current corresponding to a single current control unit structure, a double current control unit structure and a triple current control unit structure, respectively;
The waveform diagrams show that the alternating current of the converter with the single-current control unit structure in the first embodiment is obviously distorted, and the electric energy quality of the double-current control unit structure in the second embodiment is still severely distorted due to the influence of three positive sequence disturbances, and the triple-current control unit structure is adopted to inhibit the positive sequence disturbance component in the third embodiment, so that the electric energy quality is much better than that of the single-current control unit structure in the first embodiment and the double-current control unit structure in the second embodiment;
as shown in fig. 10 and 11, the lumped sequence admittance values of the second and third examples are respectively shown, and the lumped sequence admittance values of the dual current control unit structure and the triple current control unit structure are respectively calculated according to fourier transform analysis of steady-state ac current and PCC voltage after failure, in fig. 10, Y of the dual current control unit structure p (j3ω 1 ) And Y n (jω 1 ) The amplitude is 2.6S and 0S respectively;
since the triple current control unit structure is adopted, as shown in FIG. 11, Y in the triple current control unit structure p (j3ω 1 ) As shown in fig. 10 and 11, the total sequential admittance magnitude of the dual and triple current control cell structures also shows admittance Y of other higher disturbance harmonics n (j3ω 1 ) And Y n (j6ω 1 ) Is due to the non-linear behaviour under fault disturbances, e.g. document [14 ]]“H.Guo，“Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid fault conditions”，has been accepted by Trans.Ind.Electron.[Online]Available: https: as explained in// ieeeexplore. Ieee. Org/document/8967230", it is possible to suppress by regulating the dc voltage disturbance;
step 2), DC side disturbance rejection (BPSC)
The DC side disturbance suppression strategy is verified in simulation on the basis of a triple current control unit structure. Simulation verification is carried out on the basis of the triple current control unit structure, and in order to improve interconnection performance, the impedance Z of the direct current circuit is calculated d (s) is changed to 0.0001s+0.05;
according to the responses of the DC voltage and the AC current shown in FIG. 12 and FIG. 13, respectively, the DC voltage V shown in FIG. 12 employing different DC side disturbance rejection strategies dc Waveforms, and inverter ac current using different dc side disturbance rejection strategies as shown in fig. 13;
through simulation, FIG. 12 a) and FIG. 13a are document [6 ]]The simulation results of the method described in "A.Moawwad, M.S.El Mourisi, and W.xiao," A novel transient control strategy for VSC-HVDC connecting offshore wind power plant, "IEEE Trans. Sustain. Energy, vol.5, no.4, pp.1056-1069, oct.2014," were calculated by the formula (22) to obtain the reference values I, respectively dnr And I dnr FIGS. 12 b) and 13b show simulation results using the method of the present invention, and the reference value I is calculated by equation (21) respectively dnr And I dnr ；
In the right waveform of FIG. 12, the DC voltage v dc Waveform and inverter ac current waveform show steady state voltage and current after failure from 1.0s to 1.08s, respectively, due to non-negligible ac-dc coupling effects, in fig. 12 a) the dc voltages v of different dc side disturbance rejection strategies dc A severe disturbance component occurs; on the other hand, however, due to consideration of AC/DC coupling effect, as in FIG. 12 b), DC voltages V of different DC-side disturbance rejection strategies dc The direct current voltage disturbance component of the voltage regulator is effectively restrained.
The reasoning above mainly takes the inner loop as DQ current control and the outer loop as DC voltage control, and the three-phase voltage source converter adopting the DE-PLL phase-locked loop is taken as an example for explanation, and the basic principle and the method of the invention can be applied to other forms of grid-connected converters.
Meanwhile, the following list is the name of the prior art document referred to in the present invention, and the detailed list is as follows:
[1]M.Castilla，J.Miret，J.L.Sosa，J.Matas，and L.G.de Vicu～na，“Grid-fault control scheme forthree-phase photovoltaic converters with adjustable power quality characteristics，”IEEE Trans.Power Electron.，vol.25，no.12，pp.2930-2940，Dec.2010.
[2]H.Chen，H..Lee，P.Cheng，R.Teodorescu，and F.Blaabjerg，“A low-voltage ride-through technique for grid-connected converters with reduced power transistors stress，”IEEE Tans.Power Electron.，vol.31，no.12，pp.8562-8571，Dec.2016.
[3]S.Mortazavian，M.M.Shabestary，and Y.A.-R.I.Mohamed，“Analysis and dynamic performance improvement of grid-connected voltage-source converters under unbalaniced network conditions，”in IEEE Trans.Power Electron.，vol.PP，no.99，pp.1-l，doi：10.1109/TPEL.2016.2633994.
[4]A.Moawwad，M.S.El Moursi，W.Xiao，and J.L..Kirtley，“Novel configuration and transient maniagement control strategy for VSC-HVDC，”IEEE Trans.Power Syst.，vol.29，no.5，pp.2478-2488，Sep.2014.
[5]A.Moawwad，M.S.El Moursi，andW.Xiao，“Advanced fault ride-through management schemefor VSC-HVDC connecting offshore wind farms，”IEEE Trans.Power Syst.，vol.31，no.6，pp.4923-4934，Nov.2016.
[6]A.Moawwad，M.S.El Moursi，and W.Xiao，“A novel transient control strategy for VSC-HVDCconnecting offshore wind power plant，”IEEE Trans.Sustain.Energy，vol.5，no.4，pp.1056-1069，Oct.2014.
[7]J.Miret，A.Camacho，M.Castilla，L.G.de Vicu～na，and J.Matas，“Controlscheme with voltagesupport capability for distributed generation iniverters under voltage sags，”IEEE Trans.Power Electron.，vol.28，no.11，pp.5252-5262，Nov.2013.
[8]M.Castilla，J.Miret，A.Camacho，J.Matas，and L.G.de Vicu～na，“Voltage support control strategies for static synchronous compensators under unbalanced voltage sags，”IEEE Trans.Ind.Electron.，v0l.61，no.2，pp.808-820，Feb.2014.
[9]J.Keller，and B.Kroposki，“Understanding fault characteristics of inverter-based distributed energy resources，”National Renewable Energy Laboratory(NREL)，Denver，CO，USA，Rep.NREL/TP-550-46698，2010.
[10]J.D.Flicker，and J.Johnson，“Photovoltaic ground fault and blind electrical simnlations，”Sandia National Laboratories，Albuquerque，New Mexico，USA，Rep.SAND2013-3459，2013.
[11]A.Hoke，A.Nelson，S.Chakraborty，et al，“Inverter Ground Fault Overvoltage Testing，”National Renewable Energy Laboratory(NREL)，Denver，CO，USA，Rep.NREL/TP-5D00-64173，2015.
[12]A.Hoke，A.Nelson，S.Chakraborty，et al，“Inverter load rejection Overvoltage Testing，”National Renewable Energy Laboratory(NREL)，Denver，CO，USA，Rep.NREL/TP-5D00-63510，2015.
[13]M.Ropp，S.Chakraborty，D.Schutz，et al，“Ground fault overvoltage with inverter-interfaced distributed energy resources，”IEEE Trans.Power Del.，vol.32，no.2，pp.890-899，April 2017.
[14]H.Guo，“Sequence-impedance modeling of voltage source converter interconnection under asymmetrical grid faultconditions”，has been accepted by Trans.Ind.Electron.[Online].Available：https：//ieeexplore.ieee.org/document/8967230
[15]B.Liu，F.Zhuo，Y.Zhu，et al.，“A Three-Phase PLL Algorithm Based on Sigual Reforming Under Distorted Grid Conditions，”IEEE Trans.Power Electron.，vol.30，no.9，pp.5272-5283，Sep.2015.
[16]L.Zhang，L.Harnefors，and H.P.Nee，“Power-synchronization control of grid-connected voltage-source converters，”IEEE Trans.Power Electron.，vol.25，no.2，pp.809-820，May.2010.
[17]S.Golestan，M.Ramezani，J.M.Guerrero and M.Monfared，“dq-frame cascaded delayed signal cancellation-based PLL-analysis，design，and comparison with moving average filter-based PLL，”IEEE Trans.Power Electron.，vol.30，no.3，pp.1618-1632，March.2015.
[18]S.Golestan，F.D.Freijedo，A.Vidal，et al.，“An efficient implementation of generalized delayed signal cancellation PLL，”IEEE Trans.Power Electron.，vol.31，no.2，pp.1085-1094，Feb.2016.
[19]M.Merai，M.W.Naouar and I.S.Belkhodja，“An improved dc-link voltage control strategy for grid connected converters，”IEEE Trans.Power Electron.，vol.33，no.4，pp.3575-3582，Apr.2018.
the above-described embodiments are merely preferred embodiments of the present invention, and are not intended to limit the scope of the present invention except as exemplified in the specific embodiments; all equivalent changes in the structure, basic principle and method of the present invention should be covered by the protection scope of the present invention.
Claims (3)
1. The fault ride-through performance improvement method based on the grid-connected impedance model of the converter is characterized by comprising the following steps of:
step one, construction of complex function space vector
1) Construction of complex function space vector expression of basic variable
The converter adopts a three-phase voltage source converter with inner-loop DQ current control and outer-loop DC voltage control, under the condition of grid fault, the common connection point PCC positive-sequence fundamental voltage, negative sequence disturbance and zero sequence disturbance components are considered, and the common connection point PCC voltage of the phase A is represented as shown in a formula (1):
wherein V is 1 Representing the positive sequence component of the fundamental wave of the voltage, V n Representing voltageNegative sequence component of fundamental wave, V 0 Representing the fundamental zero sequence component of the voltage;
and->
V respectively 1 、V n 、V 0 The phases of the components, the following voltage current amplitudes and phases are expressed in the same manner, the direct current side voltage is composed of a direct current component and a disturbance component, and the complex function space vector is shown in the formula (2):
wherein omega m ＝2ω 1 ；
2) Complex function space vector expression construction for phase-locked loop
The internal current control in the three-phase voltage source converter comprises a current compensator Hi(s), a decoupling gain part kd and a voltage feedforward gain part kv, and in order to improve fault ride-through performance, a three-phase voltage source converter phase-locked loop eliminates disturbance caused by negative sequence voltage, through the phase-locked loop, the angle deviation of the phase-locked loop caused by asymmetrical grid fault under ideal conditions is eliminated, taking a delay signal elimination method of a DSC operation unit as an example, and the function for eliminating the disturbance of the negative sequence voltage is shown as a formula (3):
Where T1 is the fundamental period, T in the Park and Park inverse transform functions for a phase locked loop that eliminates tracking angle bias with a special design K And T R The respective expressions are as shown in the formula (4):
step two, performance analysis
Firstly, obtaining a grid-connected sequence impedance model;
1) For a conventional control structure with a single current control unit, the basic disturbance component calculation thereof comprises the following steps:
according to the signal flow of the control link, the fundamental component of the alternating current can be obtained as shown in a formula (5):
thereby further obtaining an ac-side disturbance current substantially symmetrical component as shown in formula (6):
wherein omega p ＝ω m +ω 1 ，ω n ＝ω m -ω 1 ，Y dp (jω p )、Y dn (jω n ) As shown in the formula (7), the admittance matrix in the formula (6) represents the admittance of the inverter sequence converted to the ac side,
the dc side disturbance current is shown in formula (8):
wherein Y is dd (jω m ) The calculation of (2) is shown in formula (9):
the admittance matrix in equation (8) represents the admittance of the inverter converted to the dc side, and the calculation of the ac side current disturbance component is shown in equation (10) taking the influence of the dc circuit into account:
wherein Y is dc (jω m ±jω 1 ) The calculation of (2) is shown in formula (11):
Y dc (s±jω 1 ) The grid-connected sequence admittance matrix of the converter is converted to the alternating current side, and similarly, the disturbance current on the direct current side is deduced as shown in a formula (12):
Wherein Y is ac (jω m ) To neglect ac-dc coupling and voltage drop across the converter inductance for the lumped transfer admittance of the disturbance propagating from ac side to dc side, equation (13) is obtained:
2) For a control structure with a dual current control unit based on positive and negative sequence symmetry components, the basic disturbance component calculation comprises the following steps:
the control structure of the double-current control unit adopts a typical structure for respectively adjusting the fundamental component FC and the negative sequence component NC, and each control unit adopts the same structure as the three-phase voltage source converter in the first step;
in addition to obtaining the fundamental component by using the formula (3) in the step one through the delayed signal cancellation method of the DSC operation unit, the DSC operation unit is additionally added to extract the negative sequence component of the PCC voltage, so as to obtain the formula (14):
according to the flow of alternating current and direct current voltage signals in the control loop, the flow of the alternating current voltage signals is the same as the flow of the alternating current signals, but positive sequence voltage disturbance can be ignored; and the flow of the direct voltage and q-axis current reference amounts is the same as that of Vdc, and the fundamental component obtained from the signal flow is consistent with the first step, and the disturbance component is shown in formula (15):
in the formula (15) of the present invention,
is a complex functional spatial component of positive sequence disturbance in the modulation factor of the alternating current signal,/for >
Complex functional spatial component, -omega, which is a negative sequence disturbance in the modulation factor of an alternating current signal n The complex functional spatial component representing the negative sequence disturbance has a frequency ω n ；
Wherein, the frequency of the negative sequence component in the negative sequence component control unit is zero, and the disturbance component of the alternating current of the converter is deduced by the same method as shown in the formula (16):
wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown in formula (17):
admittance matrix Y dc (s±jω 1 ) The calculation is shown in formula (18)：
Further deriving the current perturbation of the available inverter dc current is shown in equation (19):
neglecting the ac-dc coupling and the voltage drop across the converter inductance, the result is as shown in equation (20):
3) Improvement of fault ride-through performance
As can be seen from the formula (7), the dc current disturbance is zero only when the following conditions are satisfied, thereby improving the dc side fault ride through performance, as shown in the formula (21):
neglecting the effects of ac-dc coupling and inverter inductor voltage, equation (22) is derived from equation (21):
as can be seen from the formulas (21) and (22), the ac-dc power balance is balanced by adjusting the negative sequence current, and the basic disturbance component in the ac current of the converter can be eliminated only when the following conditions are satisfied, so that the fault ride-through performance of the ac side is improved, as shown in the formula (23):
As can be seen from the formula (7), the disturbance component of the alternating current side is eliminated, the fault ride-through performance of the alternating current side is improved, and the disturbance components of the positive sequence and the negative sequence are required to be controlled simultaneously; the control structure based on the dual current control units only uses the negative sequence current control unit to control the negative sequence component; thus, positive sequence disturbances in the inverter ac current still exist; as shown in equation (21), equation (22) and equation (23), reducing these two fundamental disturbance components also reduces the disturbance harmonics caused by nonlinear behavior; when high-quality current is required to be obtained, under the condition that the AC-DC coupling relation is relatively close, the basic positive sequence disturbance component is regulated necessarily;
4) Based on the above analysis, for a control structure having a triple current control unit, the basic disturbance component calculation thereof includes the steps of:
in the triple current control unit structure, the control structure of the fundamental component control unit and the control structure of the negative sequence component control unit are the same as those of the double current control unit structure, and meanwhile, a positive sequence disturbance component control unit is added, wherein the positive sequence disturbance component control unit adopts the same structure as the three-phase voltage source converter in the first step; since the frequency of positive sequence disturbance is three times of fundamental frequency, park conversion and inverse transformation synchronous angle of phase-locked loop are also three times of control structure of fundamental component control unit and control structure of negative sequence component control unit, decoupling gain part is 3k d Rather than k d The method comprises the steps of carrying out a first treatment on the surface of the Since the DSC operation unit in the formula (14) cannot block the positive-sequence disturbance component, a module for extracting the negative-sequence disturbance component and the positive-sequence disturbance component is as shown in the formula (24) and the formula (25):
likewise, the flow of the alternating current signal in the loop is controlled according to the structure of the triple current control unit, wherein the flow of the alternating current voltage signal is similar to the flow; the flow of the dc voltage signal is like the flow of the dc voltage outer loop control signal in the dual-current control unit structure, so that the calculation formula of the disturbance symmetry component in the modulation factor of the triple-current control unit structure can be generalized, as shown in formula (26):
the modulation factor and the basic component of the ac current of the inverter are the same as the basic component of the single current control unit structure in the first step, and the disturbance component in the ac current of the inverter can be deduced and obtained as shown in the formula (27):
the reference amount of positive sequence current disturbance should be set to zero to obtain equation (28) and equation (29)
Y dp (s+jω 1 )＝Y dn (s-jω 1 )＝Y p (s+jω 1 )＝Y n (s-jω 1 )＝0 (28)
Wherein Y is ac The calculation of(s) is shown in formula (30):
from the AC side, the grid-connected admittance is zero as shown by the formula (28); thus, when the corresponding current reference value is set to zero, the basic disturbance component in the inverter ac current is eliminated.
2. The method for improving the fault ride-through performance based on the grid-connected impedance model of the converter according to claim 1, wherein the magnitude of a current disturbance component under a fault can be calculated on the basis of obtaining the grid-connected impedance model, so that the fault ride-through performance is further obtained according to a calculation result;
as can be seen from the analysis in the second step,
1) For a voltage source converter adopting a single current unit control structure, the disturbance current of the alternating current side caused by the alternating current fault can be calculated as follows by the formula (10):
y in the formula dc (jω m ±jω 1 ) The impedance of the grid-connected sequence at the alternating current side is calculated as follows by the formula (11):
wherein Y is dp (jω p )、Y dn (jω n ) And Y dd (jω m ) Respectively calculating according to a formula (7) and a formula (9);
2) For a current control structure employing two units, the basic disturbance current calculation on the ac side is as shown in formula (31):
wherein Y is dp (jω p )、Y dn (jω n ) The calculation of (2) is shown as a formula (17);
3) For the single-current unit control structure, the calculation of the direct-current side basic disturbance current is shown in a formula (12):
4) For a control structure adopting a double-current unit, the direct-current side surface disturbance current can be calculated as
According to the formulas (11), (12), (31) and (19), the fault ride-through performance of the grid connection of the converter can be evaluated, the smaller the fault disturbance current of the alternating current side and the direct current side is, the better the fault ride-through performance is, and the worse the fault ride-through performance is, and accordingly, the improvement of the fault ride-through performance is proposed.
3. The fault ride-through performance improvement method based on the grid-connected impedance model of the converter according to claim 2, wherein the influence degree of the alternating current-direct current disturbance current is comprehensively considered, and when the power quality requirement on the direct current side is higher, the weight of the direct current disturbance current is properly increased.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011531775.3A CN112636342B (en) | 2020-12-21 | 2020-12-21 | Fault ride-through performance improvement method based on grid-connected impedance model of converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011531775.3A CN112636342B (en) | 2020-12-21 | 2020-12-21 | Fault ride-through performance improvement method based on grid-connected impedance model of converter |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112636342A CN112636342A (en) | 2021-04-09 |
| CN112636342B true CN112636342B (en) | 2023-04-21 |
Family
ID=75321898
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011531775.3A Active CN112636342B (en) | 2020-12-21 | 2020-12-21 | Fault ride-through performance improvement method based on grid-connected impedance model of converter |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112636342B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115173409B (en) * | 2022-07-27 | 2024-03-26 | 重庆大学 | Asymmetric low-voltage ride-through control strategy of doubly-fed wind generator set based on improved phase-locked loop |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943471A (en) * | 2019-11-07 | 2020-03-31 | 长沙理工大学 | MMC fault control strategy based on system energy optimal distribution |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9379546B2 (en) * | 2013-06-07 | 2016-06-28 | The Board Of Trustees Of The University Of Alabama | Vector control of grid-connected power electronic converter using artificial neural networks |
| CN104218613B (en) * | 2014-10-08 | 2016-04-27 | 重庆大学 | The symmetrical high voltage fail traversing control method of double-fed wind power system |
| CN107221960B (en) * | 2017-07-21 | 2020-02-21 | 江苏大学 | Grid-connected inverter low-voltage ride-through control method based on control mode switching |
| CN109830944B (en) * | 2019-01-07 | 2020-02-18 | 华北电力大学 | Fault coordination control protection method for outgoing line of direct-current boosting collection type photovoltaic power station |
| CN111555339B (en) * | 2020-02-25 | 2022-01-18 | 暨南大学 | Converter grid-connected general sequence impedance model for stability analysis and modeling method |
-
2020
- 2020-12-21 CN CN202011531775.3A patent/CN112636342B/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943471A (en) * | 2019-11-07 | 2020-03-31 | 长沙理工大学 | MMC fault control strategy based on system energy optimal distribution |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112636342A (en) | 2021-04-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Wu et al. | Grid harmonics suppression scheme for LCL-type grid-connected inverters based on output admittance revision | |
| Gali et al. | Mitigation of power quality problems using shunt active power filters: A comprehensive review | |
| Chen et al. | Passivity-based control of cascaded multilevel converter based D-STATCOM integrated with distribution transformer | |
| Li et al. | DC impedance modeling and design-oriented harmonic stability analysis of MMC-PCCF-based HVDC system | |
| CN107437818B (en) | Inhibit the control method of the small signal disturbance of three-phase LCL type grid-connection converter phaselocked loop under weak grid | |
| Li et al. | Active disturbance rejection control for static power converters in flexible AC traction power supply systems | |
| CN112636342B (en) | Fault ride-through performance improvement method based on grid-connected impedance model of converter | |
| Raziq et al. | Power quality improvement of a distribution system integrating a large scale solar farm using hybrid modular multilevel converter with ZSV control | |
| Ren et al. | An improved passivity-based direct power control strategy for AC/DC converter under unbalanced and distorted grid conditions | |
| Munir et al. | Direct harmonic voltage control strategy of shunt active power filters suitable for microgrid applications | |
| CN112636343B (en) | Fault ride-through performance analysis method based on converter grid-connected impedance model | |
| Meral et al. | Proportional complex integral based control of distributed energy converters connected to unbalanced grid system | |
| Swetha et al. | Reactive power control and harmonic mitigation by using DSTATCOM with different controllers | |
| Li et al. | Nonlinear modeling and improved suppression of zero-sequence circulating current for parallel three-level inverters | |
| Khan et al. | Grid-interfaced photovoltaic system with enhanced resilient control schemes for low-voltage ride-through | |
| Ahmad et al. | Real and reactive power compensation of a power system by using DSTATCOM | |
| Huang et al. | A harmonic control strategy for three-phase grid-connected inverter with LCL filter under distorted grid conditions | |
| Rastegar et al. | An improved D-SSSC voltage and current load balancing control strategy under unbalanced load | |
| Jain et al. | A HTF based higher order adaptive control of single stage three phase grid integrated SPV system | |
| Challa et al. | A Critical Review on Hybrid-Topologies, Modulation Techniques, and Controlling Approaches of Modular Multilevel Converter for Grid Integration | |
| Shen et al. | Research on control of three-phase grid-connection inverter under conditions of voltage distortion | |
| Hsan et al. | A nonlinear control applied to a shunt hybrid power filter with two arms and a midpoint capacitor | |
| Mansouri et al. | Modelling and control of a new hybrid compensator for grid power fluctuations | |
| Sekiguchi et al. | A Combined-Compensation Control on Harmonic Resonance for Grid-Connected Converters | |
| Akdogan et al. | MDSOGI Based Selective Virtual Impedance Method for Grid-Connected Inverters in an Unbalanced and Distorted Weak Grid |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |