CN112600434B - Multiplexing full-soft switch AC/DC input solid-state transformer circuit and modulation method thereof - Google Patents
Multiplexing full-soft switch AC/DC input solid-state transformer circuit and modulation method thereof Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
- H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J1/00—Circuit arrangements for dc mains or dc distribution networks
- H02J1/10—Parallel operation of dc sources
- H02J1/102—Parallel operation of dc sources being switching converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention discloses a multiplexing full soft switch AC/DC input solid-state transformer circuit and a modulation method thereof. The circuit comprises an input filter inductor and n front-stage full-bridge circuits, an auxiliary branch circuit and n rear-stage isolated DC-DC converters, wherein each front-stage full-bridge circuit, the auxiliary branch circuit and the rear-stage isolated DC-DC converter are sequentially connected in series to form a sub-module circuit; the front-stage full-bridge circuit carries out SPWM (sinusoidal pulse width modulation) or PWM (pulse width modulation) according to the alternating current-direct current characteristic of input power grid voltage, the rear-stage isolation type DC-DC converter adopts PWM, phase shifts are arranged among carriers of the n sub-module circuits, the falling edges of the original driving signals of the front-stage full-bridge circuit and the original driving signals of the rear-stage isolation type DC-DC converter are aligned according to the input current polarity, the aligned driving signals are subjected to soft switching modulation, and driving signals of the sub-module circuits are generated.
Description
Technical Field
The invention belongs to the technical field of power electronic technology, relates to solid-state transformer and soft switching technology, and particularly relates to a multiplexing full soft switching alternating current-direct current input solid-state transformer circuit and a modulation method thereof.
Background
With the development of power electronic technology, the solid-state transformer receives wide attention, and the solid-state transformer not only has the functions of isolating, increasing and reducing voltage of the traditional transformer, but also integrates the functions of reactive power regulation, power control, harmonic suppression, fault protection and the like of a power grid; in addition, the solid-state transformer can greatly reduce the volume and the weight of the transformer and improve the power density; moreover, the voltage-resistant grade and the power capacity of the solid-state transformer can be greatly improved by adopting a modular structure, and the circuit design flow is simplified.
At present, however, research on a universal solid-state transformer for inputting an alternating-current power grid and a direct-current power grid is less; compared with the traditional transformer, the efficiency of the solid-state transformer is still lower, mainly because in the two-stage solid-state transformer, a front-stage circuit often works under the condition of hard switching, and a rear-stage isolation type DC-DC converter has the problem that soft switching is difficult to realize under light load, so that the switching loss of the solid-state transformer is increased, and the conversion efficiency of the solid-state transformer is limited; therefore, there is a need for a solid-state transformer that is universal for ac/dc input and can simultaneously realize soft switching of front and rear stage circuits.
Disclosure of Invention
The invention aims to provide a multiplexing full-soft switching alternating current-direct current input solid-state transformer circuit and a modulation method thereof aiming at the defects of the prior art, the multiplexing full-soft switching alternating current-direct current input solid-state transformer circuit can be universally used for alternating current and direct current input conditions, and by introducing an auxiliary branch, soft switching of a front-stage full bridge circuit and a rear-stage isolation type DC-DC converter can be simultaneously realized by utilizing the auxiliary branch.
The invention is realized by adopting the following technical scheme:
in one aspect of the invention, a multiplexing full-soft switching alternating current-direct current input solid-state transformer circuit is provided, which comprises an input filter inductor, n identical pre-stage full-bridge circuits, n identical auxiliary branches and n identical post-stage isolated DC-DC converters. The alternating current and direct current input ends of the n front-stage full-bridge circuits are connected in series to form an input port, and the input port is connected with an input filter inductor in series and then is connected with a medium-voltage alternating current or direct current power grid; the direct current output ends of the n rear-stage isolation type DC-DC converters are connected in parallel to form an output port, and the output port is connected with a low-voltage direct current power grid or a load; each front-stage full-bridge circuit, each auxiliary branch circuit and each rear-stage isolation type DC-DC converter are sequentially connected in series to form a sub-module circuit, and n sub-module circuits are formed by the sub-module circuits.
In the above technical solution, further, the pre-stage full-bridge circuit includes two sets of bridge arms, each set of bridge arm is composed of two series-connected fully-controlled switching tubes including anti-parallel diodes and resonant capacitors, two upper switching tube drains of the two sets of bridge arms are connected, and two lower switching tube sources are connected; the middle points of the two bridge arms form an AC/DC input end; the drain electrode of the upper switch tube of the bridge arm and the source electrode of the lower switch tube form an output end; the auxiliary branch circuit comprises a fully-controlled auxiliary switch tube comprising an anti-parallel diode and a resonant capacitor, a clamping capacitor, an auxiliary inductor and a bus capacitor; the auxiliary switch tube is connected with the clamping capacitor in series and then connected with the auxiliary inductor in parallel to form a sub-circuit, and the sub-circuit is connected with the bus capacitor in series to form an auxiliary branch circuit; the rear-stage isolation type DC-DC converter comprises an inverter circuit, an LC resonance circuit, a transformer, a rectifying circuit and an output capacitor; the inverter circuit is a full-bridge structure formed by connecting four fully-controlled switch tubes including anti-parallel diodes and resonant capacitors; the LC resonance circuit is formed by connecting a resonance inductor and a resonance capacitor in series; the middle point of a bridge arm of the inverter circuit is connected with the primary side of the transformer after being connected with the LC resonance circuit in series; the rectifying circuit is connected into a full-bridge structure by four fully-controlled switching tubes containing anti-parallel diodes; the drain electrode of an upper switching tube of the rectifying circuit is connected with the positive electrode of the output capacitor, and the source electrode of a lower switching tube of the rectifying circuit is connected with the negative electrode of the output capacitor; the middle point of a bridge arm of the rectifying circuit is connected with the secondary side of the transformer.
In another aspect of the invention, a modulation method of the multiplexing full-soft switching ac/DC input solid-state transformer is provided, wherein a preceding-stage full-bridge circuit rectifies an input ac voltage by SPWM modulation or performs amplitude conversion on an input DC voltage by PWM modulation according to the ac/DC characteristics of the input voltage, a subsequent-stage isolated DC-DC converter performs PWM modulation, and carriers of n sub-module circuits have a certain phase shift; and aligning the original driving signal of the front-stage full-bridge circuit with the falling edge of the original driving signal of the rear-stage isolation type DC-DC converter according to the polarity of the input current, and performing soft switching modulation on the aligned driving signal to generate the driving signal of the sub-module circuit.
Furthermore, the modulation method is realized based on the following modules, namely a modulation wave generation module, n identical drive generation modules, a preceding stage carrier generation module, a preceding stage carrier phase shift module, a subsequent stage carrier generation module and a subsequent stage carrier phase shift module, wherein each drive generation module comprises a preceding stage PWM generation module, a subsequent stage PWM generation module, a PWM alignment module and a soft switch modulation module; the modulation wave generation module generates a modulation wave according to the input voltage vinThe alternating current and direct current characteristics of the signal output unit, and corresponding pre-stage modulation signals m1And a post-modulation signal m2(ii) a The preceding carrier generation module generates a switching period of TsSawtooth wave C of1And the n preceding carrier waves C with phase shift alpha (alpha is more than or equal to 0 degree and less than or equal to 360 degrees) are generated after the phase shift processing is carried out by the preceding carrier phase shift module11,C12,C13...C1n(ii) a The switching period generated by the post-stage carrier generation module is 2TsSawtooth wave C of2And the n phase-shifting carriers are subjected to phase-shifting processing by a post-stage carrier phase-shifting module to generate n phase shiftsCarrier C of the subsequent stage21,C22,C23...C2n(ii) a Modulating signal m at preceding stage1The latter modulated signal m2The kth (k is more than or equal to 1 and less than or equal to n) preceding carrier C1kAnd the kth subsequent carrier C2kInputting the k-th drive generation module together; in the kth drive generation block, the preceding-stage modulation signal m1With the kth preceding carrier C1kGenerating a group of complementary prime circuit original driving signals V with dead zones through a prime PWM (pulse width modulation) generation module1k,V2kThe latter modulated signal m2And the kth post-carrier C2kGenerating a group of complementary rear-stage circuit original driving signals V with dead zones by a rear-stage PWM generation module3k,V4kWill V1k,V2k,V3k,V4kAnd input current i of solid-state transformerinInput to a PWM alignment module when iinWhen greater than zero, shift V1kAnd V2kAnd make V1kAnd falling edge of V3k,V4kIs aligned when iinLess than zero, shift V1kAnd V2kAnd make V2kAnd falling edge of V3k,V4kIs aligned with the falling edge of V1kAnd V2kAfter being processed by a PWM alignment module, the signal becomes V1kaAnd V2kaWill V1ka,V2ka,V3k,V4kAnd iinAnd after being processed by the input soft switch modulation module, the input soft switch modulation module generates a group of sub-module circuit driving signals. The n drive generation modules generate n groups of sub-module circuit drive signals respectively for driving the n sub-module circuits.
Further onThe modulation wave generation module comprises an input voltage judgment module, a preceding-stage alternating current modulation wave generation module, a preceding-stage direct current modulation wave generation module, a following-stage modulation wave generation module and a first selection switch; the pre-stage alternating current modulation wave generation module and the pre-stage direct current modulation wave generation module respectively generate a pre-stage alternating current modulation wave and a pre-stage direct current modulation wave and input the pre-stage alternating current modulation wave and the pre-stage direct current modulation wave into the first selection switch; the input voltage judging module judges the AC/DC characteristic of the input voltage and controls the first selection switch to select a proper preceding-stage modulation signal m1Outputting, namely selecting a preceding-stage alternating current modulation wave when the input voltage is alternating current, and selecting a preceding-stage direct current modulation wave when the input voltage is direct current; the post-stage modulation wave generation module generates a post-stage modulation signal m2. The soft switch modulation module comprises a first comparator, a first phase inverter, an input current polarity judgment module, a first delay module, a first AND gate, a second delay module, a second AND gate, a first OR gate, a second selection switch, a second OR gate, a third delay module, a fourth OR gate, a fifth OR gate, a third selection switch, a fifth delay module, a sixth delay module, a third AND gate, a fourth AND gate, a sixth OR gate and a seventh OR gate; input current iinInputting the positive end of the first comparator, comparing with zero, and outputting the result as the driving signal Vgsi3Driving signal Vgsi3Is inverted by the first inverter to be used as a driving signal Vgsi4;V1kaThe result and V after the time delay of the first time delay module2kaCommon input first AND gate generation a1;V2kaThe result and V after the time delay of the second time delay module1kaCommon input second AND gate generation a2;a1And a2Inputting a first OR gate to generate a direct-current signal a3(ii) a The second selection switch selects a to be the first selection switch under the control of the input current polarity judgment module3Input into a second or third OR gate, i.e. when iinIs a is positive3Input a second OR gate, input a zero into a third OR gate, and when i isinWhen negative, will a3Inputting a third OR gate, and inputting zero into a second OR gate; and V is1kaInput a second OR gate, V2kaInput into a third OR gate, a second OR gate and a third OR gateAre respectively the driving signals Vgsi1And Vgsi2;Vgsi1、Vgsi2、Vgsi3、Vgsi4Soft switch driving signals of a kth preceding-stage full-bridge circuit are respectively provided; v2kaThe result and V after the time delay of the third time delay module1kaCommon input fourth OR gate generation a4,V1kaThe result and V after the time delay of the fourth time delay module2kaCommon input fifth OR gate generation a5(ii) a The third selection switch selects a according to the control of the input current polarity judgment module4Or a5As drive signal V for the kth auxiliary branchgsaI.e. when iinSelecting a for the positive timing4,iinSelect a when negative5;V3kThe result and V after the delay of the fifth delay module4kCommon input third AND gate generation a6;V4kThe result delayed by the sixth delay module and V3kCommon input fourth AND gate generation a7;V3kAnd a6Inputting a sixth OR gate to generate a driving signal Vgso1,V4kAnd a7Inputting a seventh OR gate to generate a driving signal Vgso2,Vgso1And Vgso2Namely a soft switch driving signal of the kth post-isolation type DC-DC converter; the delay time of the first delay module, the second delay module, the third delay module, the fourth delay module, the fifth delay module and the sixth delay module is respectively: t isd1、Td2、Td3、Td4、Td5And Td6Satisfy Td1=Td2=Td5=Td6,Td3=Td4,Td1<Td3。
The invention has the following beneficial effects:
by adopting the multiplexing full soft switch AC/DC input solid-state transformer circuit and the modulation method thereof, the same solid-state transformer can be universally used in the occasions of AC power grid input or DC power grid input; in each sub-module circuit, soft switching of a front-stage full-bridge circuit and a rear-stage isolated DC-DC converter in a full-load range can be realized simultaneously by only using one auxiliary branch circuit, so that the switching loss of the solid-state transformer is reduced, and the efficiency is improved; the voltage-resistant grade and the power capacity of the solid-state transformer can be improved by utilizing a modularized design idea, and the design flow is simplified.
Drawings
Fig. 1 is a schematic diagram of an overall circuit of a multiplexing full-soft switching ac/dc input solid-state transformer.
Fig. 2 is a circuit diagram of a pre-stage full bridge circuit in a multiplexing full soft switching ac/dc input solid-state transformer.
Fig. 3 is a circuit diagram of an auxiliary branch circuit in a multiplexing full soft switching ac/dc input solid-state transformer.
Fig. 4 is a schematic diagram of a rear-stage isolation type DC-DC converter in a multiplexing full soft switching alternating current-direct current input solid-state transformer.
Fig. 5 is a block diagram of a modulation method for multiplexing a full soft switching ac/dc input solid-state transformer.
Fig. 6 is a specific implementation block diagram of the ac/dc modulation wave selection module in the implementation block diagram of the modulation method of the multiplexing full soft switching ac/dc input solid-state transformer.
Fig. 7 is a specific implementation block diagram of a soft-switch modulation module in an implementation block diagram of a modulation method for multiplexing a full soft-switch ac/dc input solid-state transformer.
Fig. 8 is a circuit diagram of the multiplexing full soft switching ac/dc input solid-state transformer when the number n of sub-modules is equal to 3.
FIG. 9 shows that when the number n of sub-modules is equal to 3 and the input current i is equal toinFor timing in two switching cycles (2T)s) The driving signal of each switch tube is shown schematically.
FIG. 10 shows the input current i when the number n of sub-modules is equal to 3inNegative in two switching cycles (2T)s) The driving signal of each switch tube is shown schematically.
FIG. 11 shows the current i when the input current isinIn one switching cycle (T) for positive timings) Key waveform schematic diagram of inner submodule circuit 1.
FIGS. 12 to 22 show the current i when inputinIn one switching cycle (T) for positive timings) Equivalent circuit diagram of each stage of the inner submodule circuit 1.
Detailed Description
The present invention will be described in detail with reference to the accompanying drawings.
Referring to fig. 1, a multiplexing full soft switching ac/DC input solid-state transformer circuit includes an input filter inductor 100, n identical pre-stage full-bridge circuits 200, n identical auxiliary branches 300, and n identical post-stage isolated DC-DC converters 400; the alternating current-direct current input ends of the n front-stage full-bridge circuits 200 are connected in series to form an input port, and the input port is connected with the input filter inductor 100 in series and then connected to a medium-voltage alternating current or direct current power grid; the direct current output ends of the n rear-stage isolated DC-DC converters 400 are connected in parallel to form an output port, and the output port is connected with a low-voltage direct current power grid or a load; each front-stage full-bridge circuit 200, the auxiliary branch circuit 300 and the rear-stage isolated DC-DC converter 400 are sequentially connected in series to form a sub-module circuit, which together form n sub-module circuits.
Referring to fig. 2, the pre-stage full-bridge circuit 200 includes two sets of bridge arms, each set of bridge arms is composed of two series-connected fully-controlled switching tubes including anti-parallel diodes and resonant capacitors, drains of two upper switching tubes of the two sets of bridge arms are connected, and sources of two lower switching tubes are connected; the middle points of the two bridge arms form an AC/DC input end; the drain electrode of the switch tube on the bridge arm and the source electrode of the lower switch tube form an output end.
Referring to fig. 3, the auxiliary branch 300 includes a fully-controlled auxiliary switch tube 301 including an anti-parallel diode and a resonant capacitor, a clamping capacitor 302, an auxiliary inductor 303, and a bus capacitor 304; the auxiliary switch tube 301 is connected in series with the clamping capacitor 302 and then connected in parallel with the auxiliary inductor 303 to form a sub-circuit, and the sub-circuit is connected in series with the bus capacitor 304 to form the auxiliary branch 300.
Referring to fig. 4, the rear-stage isolated DC-DC converter 400 includes an inverter circuit 401, an LC resonant circuit 402, a transformer 403, a rectifier circuit 404, and an output capacitor 405; the inverter circuit 401 is a full-bridge structure formed by connecting four fully-controlled switching tubes including anti-parallel diodes and resonant capacitors; the LC resonant circuit 402 is formed by connecting a resonant inductor 410 and a resonant capacitor 411 in series; the middle point of a bridge arm of the inverter circuit 401 is connected with the LC resonance circuit 402 in series and then is connected with the primary side of the transformer 403; the rectifying circuit 404 is formed by connecting four fully-controlled switching tubes including anti-parallel diodes into a full-bridge structure; the drain electrode of an upper switching tube of the rectifying circuit 404 is connected with the positive electrode of the output capacitor 405, and the source electrode of a lower switching tube of the rectifying circuit 404 is connected with the negative electrode of the output capacitor 405; the middle point of the leg of the rectifying circuit 404 is connected to the secondary side of the transformer 403.
Referring to fig. 5, a modulation method for multiplexing a full soft switching ac/dc input solid-state transformer circuit includes a modulation wave generation module 500, n identical drive generation modules 600, a previous stage carrier generation module 700, a previous stage carrier phase shift module 800, a next stage carrier generation module 900, and a next stage carrier phase shift module 1000, where each drive generation module 600 includes a previous stage PWM generation module 1100, a next stage PWM generation module 1200, a PWM alignment module 1300, and a soft switching modulation module 1400. The modulation wave generation module 500 generates a modulation wave based on the input voltage vinThe alternating current and direct current characteristics of the signal output unit, and corresponding pre-stage modulation signals m1And a post-modulation signal m2(ii) a The pre-carrier generation module 700 generates a switching period of TsSawtooth wave C of1And is subjected to phase shift processing by a preceding carrier phase shift module 800 to generate n preceding carriers C with phase shift alpha (alpha is more than or equal to 0 degrees and less than or equal to 360 degrees)11,C12,C13...C1n(ii) a The carrier generation module 900 at the later stage generates a switching period of 2TsSawtooth wave C of2And is phase-shifted by the post-stage carrier phase-shifting module 1000 to generate n phase shiftsCarrier C of the subsequent stage21,C22,C23...C2n(ii) a Modulating signal m at preceding stage1The latter modulated signal m2The kth preceding carrier C with k not less than 1 and not more than n1kAnd the kth subsequent carrier C2kThe kth drive generation module 600 is input in common; in the kth drive generation module 600, the preceding-stage modulation signal m1With the kth preceding carrier C1kGenerating a set of complementary pre-stage circuit original driving signals V with dead zone through the pre-stage PWM generating module 11001k,V2kThe latter modulated signal m2And the kth post-carrier C2kGenerating a model by a post-stage PWMBlock 1200 generates a set of complementary post-stage circuit raw drive signals V with dead zones3k,V4kWill V1k,V2k,V3k,V4kAnd input current i of solid-state transformerinInput to PWM alignment Module 1300 when iinWhen greater than zero, shift V1kAnd V2kAnd make V1kAnd falling edge of V3k,V4kIs aligned when iinLess than zero, shift V1kAnd V2kAnd make V2kAnd falling edge of V3k,V4kIs aligned with the falling edge of V1kAnd V2kProcessed by the PWM alignment module 1300 into V1kaAnd V2kaWill V1ka,V2ka,V3k,V4kAnd iinThe input soft switch modulation module 1400 generates a set of sub-module circuit driving signals after processing; the n drive generation modules 600 generate n sets of sub-module circuit drive signals for driving the n sub-module circuits, respectively.
Referring to fig. 6, the modulated wave generating module 500 includes an input voltage determining module 501, a former-stage ac modulated wave generating module 502, a former-stage dc modulated wave generating module 503, a latter-stage modulated wave generating module 504, and a first selection switch 505; a preceding ac modulation wave generation module 502 and a preceding dc modulation wave generation module 503 respectively generate a preceding ac modulation wave and a preceding dc modulation wave, and input them to a first selection switch 505; the input voltage determining module 501 determines the ac/dc characteristics of the input voltage and controls the first selection switch 505 to select the appropriate pre-modulation signal m1And outputting, namely selecting a previous-stage alternating current modulation wave when the input voltage is alternating current, and selecting a previous-stage direct current modulation wave when the input voltage is direct current. The post-modulation wave generation module 504 generates a post-modulation signal m2。
Referring to fig. 7, the soft-switching modulation module 1400 includes a first comparator 1401, a first inverter 1402, an input current polarity determination module 1403, a first delay module 1404, a first and gate 1405, a second delay module 1406, a second and gate 1407, a first or gate 1408, a second selection switch 1409, a second or gate 1410, a third or gate 1411, a third delay module 1412, a first and gate 1403, a first and gate 1405, a second delay module 1406, a second and gate 1407, a first or gate 1408, a second selection switch 1409, a second or gate 1410, a third or gate 1411, a third delay module 1412, a second and gate 1412,A fourth delay module 1413, a fourth or gate 1414, a fifth or gate 1415, a third selection switch 1416, a fifth delay module 1417, a sixth delay module 1418, a third and gate 1419, a fourth and gate 1420, a sixth or gate 1421, and a seventh or gate 1422; input current iinInput to the positive terminal of a first comparator 1401, compare it with zero, and output the result as a drive signal Vgsi3Driving signal Vgsi3Inverted by the first inverter 1402 to be used as the driving signal Vgsi4;V1kaThe result delayed by the first delay module 1404 and V2kaCommon input first AND gate 1405 generate a1;V2kaThe result delayed by the second delay module 1406 and V1kaCommon input second AND gate 1407 generates a2;a1And a2The input first OR gate 1408 generates a pass signal a3(ii) a The second selection switch 1409 selects a to be switched under the control of the input current polarity determination block 14033Input to the second OR gate 1410 or the third OR gate 1411, i.e. when i isinIs a is positive3Input second OR gate 1410, input zero into third OR gate 1411, and when i isinWhen negative, will a3Input third or gate 1411, input zero into second or gate 1410; and V is1kaInput a second OR gate 1410, V2kaThe output signals of the third or gate 1411, the second or gate 1410 and the third or gate 1411 are driving signals Vgsi1And Vgsi2;Vgsi1、Vgsi2、Vgsi3、Vgsi4Soft switching driving signals of the switching tubes 201, 202, 203 and 204 of the kth preceding-stage full-bridge circuit 200 respectively; v2kaThe result delayed by the third delay module 1412 and V1kaCommon input fourth OR gate 1414 generates a4,V1kaThe result delayed by the fourth delay module 1413 and V2kaCommon input fifth OR gate 1415 generates a5(ii) a The third selection switch 1416 selects a according to the control of the input current polarity determination module 14034Or a5As the drive signal V of the kth auxiliary branch 300gsaI.e. when iinSelecting a for the positive timing4,iinSelect a when negative5;V3kJunction delayed by a fifth delay module 1417Fruits and V4kCommon input third AND gate 1419 generates a6;V4kThe result delayed by the sixth delay module 1418 and V3kThe common input fourth AND gate 1420 generates a7;V3kAnd a6Input sixth OR gate 1421 generates drive signal Vgso1,V4kAnd a7Input to seventh OR gate 1422 generates drive signal Vgso2,Vgso1And Vgso2Namely, the soft switch driving signal of the kth post-isolation type DC-DC converter 400; the first delay module 1404, the second delay module 1406, the third delay module 1412, the fourth delay module 1413, the fifth delay module 1417 and the sixth delay module 1418 respectively delay time: t isd1、Td2、Td3、Td4、Td5And Td6Satisfy Td1=Td2=Td5=Td6,Td3=Td4,Td1<Td3。
Referring to fig. 8, when the number n of the sub-modules is equal to 3, a circuit diagram of the multiplexing full-soft switching ac/dc input solid-state transformer is shown in fig. 8, each sub-module has the same circuit structure, and the sub-module circuits are combined in a mode of input series connection and output parallel connection.
When the number n of the sub-modules is equal to 3, the input current i is shown in FIG. 9 and FIG. 10 respectivelyinIs a positive and input current iinNegative in two switching cycles (2T)s) As for fig. 9, at this time, the input grid voltage is direct current or in the positive half cycle of alternating current, and the turn-off time of the front-stage full bridge circuit switch tube No. 1 is aligned with the turn-off time of the rear-stage isolated DC-DC converter switch tube; as for fig. 10, at this time, the input grid voltage is in the negative half cycle of alternating current, and the turn-off time of the front-stage full bridge circuit No. 2 switching tube is aligned with the turn-off time of the rear-stage isolation type DC-DC converter switching tube; there is a phase shift in the drive between the different sub-module circuits.
The working processes of different sub-module circuits are basically the same, taking sub-module circuit 1 as an example, when the input current i isinTo be positive, it is in one switching cycle (T)s) There are 11 working states, differentFig. 11 shows the main waveform diagrams of the operating states, and fig. 12 to 22 respectively correspond to equivalent circuits in different operating states. The other sub-modules work similarly when the input current iinThe working process of the circuit can be obtained by the same analysis when the circuit is negative.
Suppose in one switching cycle (T)s) Internal and external capacitors Cdc_1And Cc_1Voltage V ofdc_1And VCc_1Remaining unchanged, then the specific phase analysis within a switching cycle is as follows:
stage 1: t is t0~t1
As shown in FIG. 12, the front-stage full-bridge circuit Si1_1And Si3_1On, input current iinBy Si1_1、Si3_1Afterflow; auxiliary branch Sa_1Is conducted at VCc_1Under the action of (1), auxiliary inductor current iLa_1The linear decrease; rear-stage isolation type DC-DC converter So1_1、So3_1Voltage V between conducting and bridge arm middle pointsp_1Greater than zero, resonant current ip_1Is positive, the secondary side passes through Do5_1、Do7_1Rectification is performed. This stage is up to t1Time Si1_1、Sa_1、So1_1、So3_1And ending the shutdown.
And (2) stage: t is t1~t2
As shown in fig. 13, t1Time Si1_1、Sa_1、So1_1、So3_1Turn-off, auxiliary inductance La_1And a capacitor Ci2_1、Ci4_1、Ca_1、Co2_1、Co4_1Resonance occurs at current iLa_1By the action of a capacitor Ci2_1、Ci4_1、Co2_1、Co4_1Discharge, capacitance Ca_1Charging, bus voltage Vbus_1Fall, capacitance Ca_1Voltage V acrossCa_1Rising; voltage v between middle points of primary side bridge arms of rear-stage isolation type DC-DC converterp_1And (4) descending. This stage is up to t2Time bus voltage Vbus_1The drop to zero ends.
And (3) stage: t is t2~t3
As shown in fig. 14, t2Time bus voltage Vbus_1Drop to zero, auxiliary tube capacitance Ca_1Charging to Vdc_1+VCc_1,Di1_1、Di2_1、Di4_1、Do1_1、Do2_1、Do3_1、Do4_1The free-wheeling current is on, which is Si1_1、Si2_1、Si4_1、So1_1、So2_1、So3_1、So4_1The zero voltage of (i) creates a conditionLa_1At Vdc_1Under the action of the voltage v between the middle points of the primary side bridge arms of the rear-stage isolation type DC-DC converterp_1Drops to zero. This stage is up to t3Time Si1_1、Si2_1、Si4_1、So1_1、So2_1、So3_1、So4_1And ending the opening.
And (4) stage: t is t3~t4
As shown in FIG. 15, t3Time Si1_1、Si2_1、Si4_1、So1_1、So2_1、So3_1、So4_1Zero voltage turn-on, input current iinWarp (S)i2_1And Si3_1Follow current iLa_1In thatLinearly rises under the action of (3). This stage is up to t4Time ip_1The drop to zero ends.
And (5) stage: t is t4~t5
As shown in FIG. 16, t4Time ip_1Falls to zero at ip_1Under the action of the secondary side of the rear-stage isolation type DC-DC converter, the secondary side of the rear-stage isolation type DC-DC converter is controlled by Do5_1、Do7_1Current is converted to Do6_1、Do8_1,iLa_1At Vdc_1Linearly rises under the action of (3). This stage is up to t5Time Si1_1、Si4_1、So1_1、So3_1And ending the shutdown.
And 6: t is t5~t6
As shown in FIG. 17, t5Time Si1_1、Si4_1、So1_1、So3_1Turn-off, auxiliary inductance La_1And a capacitor Ci1_1、Ci4_1、Ca_1、Co1_1、Co3_1Resonance occurs at current iLa_1By the action of a capacitor Ci1_1、Ci4_1、Co1_1、Co3_1Charging, capacitance Ca_1Discharge, bus voltage Vbus_1Rise, capacitance Ca_1Voltage V acrossCa_1Descending; voltage v between middle points of primary side bridge arms of rear-stage isolation type DC-DC converterp_1And (4) descending. This stage is up to t6Time voltage VCa_1The drop to zero ends.
And (7) stage: t is t6~t7
As shown in FIG. 18, t6Time voltage VCa_1Drop to zero, auxiliary diode Da_1The follow current is conducted, which is the auxiliary tube Sa_1The zero voltage of (i) creates a conditionLa_1At VCc_1Is linearly decreased under the action of (2), and the bus voltage Vbus_1Up to Vdc_1+VCc_1Input current iinWarp (S)i2_1And Si3_1Follow current ip_1Warp (S)o2_1And So4_1And conducting. This stage is up to t7Time Sa_1And ending the opening.
And (8): t is t7~t8
As shown in FIG. 19, t7Time Sa_1Zero voltage on, iLa_1At VCc_1The linearity is reduced by (1). This stage is up to t8Time Si2_1And ending the shutdown.
And (9) stage: t is t8~t9
As shown in FIG. 20, t8Time Si2_1Off at input current iinBy the action of a capacitor Ci1_1Discharge, Ci2_1Charging iLa_1At VCc_1The linearity is reduced by (1). This stage is up to t9Time Ci1_1The discharge ends to zero.
Stage 10: t is t9~t10
As shown in FIG. 21, t9Time Ci1_1Discharge to zero, Ci2_1Charging to Vdc_1+VCc_1Input current iinBy Di1_1、Si3_1Follow current, which is Si1_1The zero voltage of (i) creates a conditionLa_1At VCc_1The linearity is reduced by (1). This stage is up to t10Time Si1_1And ending the opening.
Stage 11: t is t10~t11
As shown in FIG. 22, t10Time Si1_1Zero voltage turn-on, input current iinBy Di1_1、Si3_1Follow current, which is Si1_1The zero voltage of (i) creates a conditionLa_1At VCc_1The linearity is reduced by (1). This stage is up to t11Time Si1_1、Sa_1、So2_1、So4_1And ending the shutdown.
The above-described embodiments of the present application do not limit the scope of the present application.
Claims (2)
1. A modulation method for multiplexing a full soft switch AC/DC input solid-state transformer is characterized in that:
the circuit structure of the solid-state transformer comprises an input filter inductor (100), n identical pre-stage full-bridge circuits (200), n identical auxiliary branches (300) and n identical post-stage isolated DC-DC converters (400); the alternating current and direct current input ends of the n front-stage full-bridge circuits (200) are connected in series to form an input port, and the input port is connected with the input filter inductor (100) in series and then is connected with a medium-voltage alternating current or direct current power grid; the direct current output ends of the n rear-stage isolation type DC-DC converters (400) are connected in parallel to form an output port, and the output port is connected with a low-voltage direct current power grid or a load; each front-stage full-bridge circuit (200), each auxiliary branch circuit (300) and each rear-stage isolation type DC-DC converter (400) are sequentially connected in series to form a sub-module circuit, and n sub-module circuits are formed; the pre-stage full-bridge circuit (200) comprises two groups of bridge arms, each group of bridge arms is composed of two fully-controlled switch tubes which are connected in series and comprise anti-parallel diodes and resonant capacitors, drain electrodes of two upper switch tubes of the two groups of bridge arms are connected, and source electrodes of two lower switch tubes are connected; the middle points of the two bridge arms form an AC/DC input end; the drain electrode of the upper switch tube of the bridge arm and the source electrode of the lower switch tube form an output end; the auxiliary branch circuit (300) comprises a fully-controlled auxiliary switching tube (301) comprising an anti-parallel diode and a resonant capacitor, a clamping capacitor (302), an auxiliary inductor (303) and a bus capacitor (304); the auxiliary switching tube (301) is connected in series with the clamping capacitor (302) and then connected in parallel with the auxiliary inductor (303) to form a sub-circuit, and the sub-circuit is connected in series with the bus capacitor (304) to form the auxiliary branch (300); the rear-stage isolation type DC-DC converter (400) comprises an inverter circuit (401), an LC resonance circuit (402), a transformer (403), a rectifying circuit (404) and an output capacitor (405); the inverter circuit (401) is in a full-bridge structure formed by connecting four fully-controlled switching tubes including anti-parallel diodes and resonant capacitors; the LC resonance circuit (402) is formed by connecting a resonance inductor (410) and a resonance capacitor (411) in series; the middle point of a bridge arm of the inverter circuit (401) is connected with the LC resonance circuit (402) in series and then is connected with the primary side of the transformer (403); the rectifying circuit (404) is formed by connecting four fully-controlled switching tubes containing anti-parallel diodes into a full-bridge structure; the drain electrode of an upper switching tube of the rectifying circuit (404) is connected with the positive electrode of the output capacitor (405), and the source electrode of a lower switching tube of the rectifying circuit (404) is connected with the negative electrode of the output capacitor (405); the middle point of a bridge arm of the rectifying circuit (404) is connected with a secondary side of the transformer (403);
the front-stage full-bridge circuit (200) rectifies input alternating-current voltage by adopting SPWM (sinusoidal pulse width modulation) or converts amplitude of input direct-current voltage by adopting PWM (pulse width modulation) according to the alternating-current and direct-current characteristics of the input voltage, the rear-stage isolated DC-DC converter (400) adopts PWM, and carriers of the n sub-module circuits have certain phase shift; aligning the original driving signal of the front-stage full-bridge circuit with the falling edge of the original driving signal of the rear-stage isolation type DC-DC converter according to the polarity of the input current, and performing soft switching modulation on the aligned driving signal to generate a driving signal of the sub-module circuit;
the modulation method is realized on the basis of a modulation wave generation module (500), n identical drive generation modules (600), a front-stage carrier generation module (700), a front-stage carrier phase-shifting module (800), a rear-stage carrier generation module (900) and a rear-stage carrier phase-shifting module (1000), wherein each drive generation module (600) comprises a front-stage PWM generation module (1100), a rear-stage PWM generation module (1200), a PWM alignment module (1300) and a soft switch modulation module (1400);
the modulation wave generation module (500) generates a modulation wave according to an input voltage vinThe AC/DC characteristic outputs a corresponding preceding-stage modulation signal m1And a post-modulation signal m2(ii) a The preceding carrier generation module (700) generates a switching period of TsSawtooth wave C of1And the preceding carrier phase shift module (800) performs phase shift processing to generate n preceding carriers C with phase shift alpha (alpha is more than or equal to 0 degrees and less than or equal to 360 degrees)11,C12,C13...C1n(ii) a The switching period generated by the post-stage carrier generation module (900) is 2TsSawtooth wave C of2And the n carrier phase shift modules (1000) perform phase shift processing to generate n phase shiftsCarrier C of the subsequent stage21,C22,C23...C2n(ii) a Modulating signal m at preceding stage1The latter modulated signal m2The kth (k is more than or equal to 1 and less than or equal to n) preceding carrier C1kAnd the kth subsequent carrier C2k-inputting in common a kth of said drive generation modules (600); in the kth drive generation module (600), the preceding-stage modulation signal m1With the kth preceding carrier C1kGenerating a set of complementary pre-stage circuit raw drive signals V with dead zones by the pre-stage PWM generation module (1100)1k,V2kThe latter modulated signal m2And the kth post-carrier C2kGenerating a set of complementary post-stage circuit raw drive signals V with dead zones by the post-stage PWM generation module (1200)3k,V4kWill V1k,V2k,V3k,V4kAnd input current i of solid-state transformerinInput to the PWM alignment module (1300) when iinWhen greater than zero, shift V1kAnd V2kAnd make V1kAnd falling edge of V3k,V4kIs aligned when iinLess than zero, shift V1kAnd V2kAnd make V2kAnd falling edge of V3k,V4kIs aligned with the falling edge of V1kAnd V2kBecomes V after being processed by the PWM alignment module (1300)1kaAnd V2kaWill V1ka,V2ka,V3k,V4kAnd iinThe signals are input into the soft switch modulation module (1400) for processing and then a group of sub-module circuit driving signals are generated; the n drive generation modules (600) generate n groups of sub-module circuit drive signals in total for driving the n sub-module circuits respectively;
the soft switch modulation module (1400) comprises a first comparator (1401), a first inverter (1402), an input current polarity judgment module (1403), a first delay module (1404), a first and gate (1405), a second delay module (1406), a second and gate (1407), a first or gate (1408), a second selection switch (1409), a second or gate (1410), a third or gate (1411), a third delay module (1412), a fourth delay module (1413), a fourth or gate (1414), a fifth or gate (1415), a third selection switch (1416), a fifth delay module (1417), a sixth delay module (8), a third and gate (1419), a fourth and gate (1420), a sixth or gate (1421) and a seventh or gate (1422);
input current iinInputting the positive terminal of the first comparator (1401), comparing with zero, and outputting the result as a driving signal Vgsi3Driving signal Vgsi3Is inverted by the first inverter (1402) to be used as a driving signal Vgsi4;V1kaThe result delayed by the first delay module (1404) and V2kaInputting the first AND gate (1405) in common to generate a1;V2kaThe result delayed by the second delay module (1406) and V1kaThe second AND gate (1407) is commonly input to generate a2;a1And a2Inputting the first OR gate (1408) to generate a pass signala3(ii) a The second selection switch (1409) selects a to be the other one under the control of the input current polarity determination module (1403)3Input into the second OR gate (1410) or the third OR gate (1411), i.e. when iinIs a is positive3Input the second OR gate (1410), input zero into the third OR gate (1411), and when i isinWhen negative, will a3-inputting the third or-gate (1411), inputting zeros into the second or-gate (1410); and V is1kaInputting the second OR gate (1410), V2kaThe output signals of the second or gate (1410) and the third or gate (1411) are respectively a driving signal Vgsi1And Vgsi2;Vgsi1、Vgsi2、Vgsi3、Vgsi4Soft switching drive signals of the switching tubes 201, 202, 203 and 204 of the kth preceding full-bridge circuit (200), respectively; v2kaThe result delayed by the third delay module (1412) and V1kaInputting the fourth OR gate (1414) in common to generate a4,V1kaThe result delayed by the fourth delay module (1413) and V2kaInputting in common said fifth OR gate (1415) generating a5(ii) a The third selection switch (1416) selects a according to the control of the input current polarity determination module (1403)4Or a5As a drive signal V for the kth auxiliary branch (300)gsaI.e. when iinSelecting a for the positive timing4,iinSelect a when negative5;V3kThe result delayed by the fifth delay module (1417) and V4kInputting the third AND gate (1419) together to generate a6;V4kThe result delayed by the sixth delay module (1418) and V3kInputting the fourth AND gate (1420) together to generate a7;V3kAnd a6Inputting the sixth OR gate (1421) to generate a drive signal Vgso1,V4kAnd a7Inputting the seventh OR gate (1422) to generate a drive signal Vgso2,Vgso1And Vgso2The soft switch driving signal is the soft switch driving signal of the kth rear-stage isolation type DC-DC converter (400);
the first delay module (1404),The delay times of the second delay module (1406), the third delay module (1412), the fourth delay module (1413), the fifth delay module (1417) and the sixth delay module (1418) are respectively: t isd1、Td2、Td3、Td4、Td5And Td6Satisfy Td1=Td2=Td5=Td6,Td3=Td4,Td1<Td3。
2. The modulation method for the multiplexing full soft switching alternating current-direct current input solid-state transformer according to claim 1, characterized in that:
the modulation wave generation module (500) comprises an input voltage judgment module (501), a front-stage alternating current modulation wave generation module (502), a front-stage direct current modulation wave generation module (503), a rear-stage modulation wave generation module (504) and a first selection switch (505); the preceding-stage AC modulation wave generation module (502) and the preceding-stage DC modulation wave generation module (503) respectively generate a preceding-stage AC modulation wave and a preceding-stage DC modulation wave and input the preceding-stage AC modulation wave and the preceding-stage DC modulation wave into the first selection switch (505); the input voltage judging module (501) judges the AC/DC characteristic of the input voltage and controls the first selection switch (505) to select a proper preceding-stage modulation signal m1Outputting, namely selecting a preceding-stage alternating current modulation wave when the input voltage is alternating current, and selecting a preceding-stage direct current modulation wave when the input voltage is direct current; the post-modulation wave generation module (504) generates a post-modulation signal m2。
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