CN112584457B - Method for pRRU to realize hybrid networking between eCPRI protocol and CPRI protocol in 5G system - Google Patents

Abstract

The invention discloses a method for hybrid networking of a pRRU between an eCPRI protocol and a CPRI protocol in a 5G system, wherein the pRRU simultaneously has two clock systems required by the eCPRI and CPRI protocols in a hardware system, an SFP photoelectric conversion module on the pRRU comprises 2 groups, namely an SFP0 and an SPF1, a general high-speed serial bus interface Serdes of an FPGA (field programmable gate array) is behind the SFP, and two mutually independent protocol processing unit logics are arranged in the FPGA and are respectively responsible for processing the eCPRI protocol and the CPRI protocol. The invention can flexibly change the interface type of the RRU, and is convenient to be connected with a 5G base station, a pRRU and a CPRI HUB (equipment for expanding and connecting CPRI interface protocol, and equipment for expanding a CPRI interface into a plurality of CPRI interfaces). The density of 5G sectors is reduced, the frequent switching of UE equipment is reduced, the network optimization difficulty is reduced, and the comprehensive construction cost of the network is reduced.

Description

Method for pRRU to realize hybrid networking between eCPRI protocol and CPRI protocol in 5G system

Technical Field

The invention relates to the technical field of 5G communication, in particular to a method for hybrid networking of pRRUs between an eCPRI protocol and a CPRI protocol in a 5G system.

Background

The current pRRU (micro radio remote unit) has been widely used in the coverage of 5G communication system as a product structure in the 5G communication system. However, since the frequency band of the 5G signal is high, the attenuation of the wireless signal in the space is large, and therefore the construction density of the 5G base station is large. The method is characterized in that the terrain in a city is complex, the sector switching of 5G is more frequent and complex, and the wireless network is optimized (called network optimization for short, which means that after a communication network is built, various optimization (including hardware, software, configuration and the like) is carried out on the wireless network.

The 5G is a fifth generation cellular mobile communication system, in which the 5G base station has two Interface protocol forms, one is the eccri (the eccri standard defines a specification for connecting the edrec and the eRE through a Fronthaul Network (frontaul Transport Network) which is used for LTE-Advanced and LTE-Advanced Pro of the 5G system), and the other is the CPRI (the CPRI is an abbreviated form of Common Public Radio Interface) which is a Common standard functioning in a range of transmitting baseband I/Q signals to a Radio unit in a conventional BS (base station), and the CPRI has an efficient and flexible I/Q data Interface for various standards). The pRRU can be automatically switched to the corresponding interface shape according to the interface shape of the 5G base station. For example, if the 5G base station interface is CPRI, the pRRU may automatically use the CPRI interface protocol when connecting to the pRRU. And in the same way, the 5G base station adopts the eCPRI interface protocol.

An eCPRI protocol is adopted between a BBU (Building base band Unit) and an RRU (Radio Remote Unit) according to a standard, transmitted content is IQ data (digital quantized sampling data of signals in a digital communication system) of each subcarrier, and the RRU needs further processing.

Each RRU is responsible for one sector, and a UE (user equipment) moving between sectors needs a sector handover. In some areas with complex terrain, signal overlapping areas are easily generated among sectors, and mutual interference occurs. Meanwhile, a signal blank occurs in a partial area, that is, an area that cannot be covered by any nearby RRU. The blank areas are not large, and it is not suitable to add one RRU for coverage, because it is easy to bring a serious inter-sector interference problem, and the sector density is too high, which also easily causes a problem of frequently switched sectors, affects the communication efficiency, and finally the construction cost for doing so is too high.

Disclosure of Invention

The invention aims to solve the defects in the prior art, and provides a method for hybrid networking of pRRUs between an eCPRI protocol and a CPRI protocol in a 5G system.

In order to achieve the purpose, the invention adopts the following technical scheme:

in a hardware system, the pRRU simultaneously has two clock systems required by two data communication interface protocols of eCPRI and CPRI, 2 groups of SFP photoelectric conversion modules on the pRRU are respectively SFP0 and SPF1, a general high-speed serial bus interface Serdes of an FPGA is arranged behind the SFP, two mutually independent protocol processing unit logics are arranged in the FPGA and are respectively responsible for processing the eCPRI protocol and the CPRI protocol, and the networking method specifically comprises the following steps:

s1, a system is started from an eCPRI by default and is connected with a previous-level device through an SFP0 channel, an eCPRI protocol processing unit tries to establish connection with the previous-level device first, and the CPRI protocol processing unit is switched to continue trying after trying for a plurality of times in failure;

s2, if the eCPRI protocol processing unit is successfully connected with the upper-level equipment, starting to receive an instruction of the upper-level equipment and controlling which protocol, eCPRI or CPRI, is adopted for the lower SFP interface;

s3, under an eCPRI protocol, the pRRU processes IQ data of each subcarrier, the IQ data is converted into time domain IQ data after being processed by a digital signal and is sent or received by a local ADC/DAC, and the time domain IQ data stream is directly forwarded or received by a CPRI interface when the next-stage equipment interface is the CPRI protocol;

s4, under a CPRI protocol, the pRRU processes time domain IQ data converted by an upper-level device, the IQ data can be directly sent or received through a local ADC/DAC, and meanwhile, the IQ data flow is sent or received to a lower-level device;

s5, different sectors are realized by pRRUs under the eCPRI protocol, namely each eCPRIPRRU is a sector, and the pRRUs under the CPRI protocol realize signal coverage of the same sector;

and S6, the pRRU under the CPRI interface needs to be kept consistent on an air interface, including time synchronization and frequency synchronization.

Preferably, the working reference clock of the eCPRI is 156.25MHz, the working reference clock of the CPRI is 122.88MHz, and the two clock systems can be switched as required.

Preferably, the SFP0 is connected to the upper-level device, an interface protocol of the SFP0 channel is determined by an interface protocol of the upper-level device, and if the upper-level device is an eccri, the interface protocol connected to the SFP0 channel is also an eccri, similarly to the CPRI interface protocol.

Preferably, the PLL in Serdes synchronizes clock information in the high-speed serial data stream and outputs a reference clock to the digital phase-locked loop DPLL inside the FPGA, the DPLL controls the external VCO to output an accurate reference frequency to the clock management chip as a reference according to the reference clock, and finally the clock management chip provides each set of clocks required by the system, when different interface protocols are connected according to different working reference clocks of the eccri and the CPRI, the reference clock output by the Serdes is different, the output of the eccri is 156.25MHz, and the output of the CPRI is 122.88MHz.

Preferably, in the step S6,

s61, time synchronization, namely obtaining the time delay from each CPRI pRRU to an eCPRI interface position through time delay calibration, and keeping the time of each CPRI pRRU consistent through a compensation algorithm;

and S62, synchronizing the frequency, and keeping the frequency of the local clock system consistent with the eCPRI interface pRRU or CPRI HUB.

The method has the advantages that the interface type of the RRU can be flexibly changed, and the RRU can be conveniently connected with a 5G base station, a pRRU and a CPRI HUB (equipment for expanding and connecting CPRI interface protocols, and equipment for expanding a CPRI interface into a plurality of CPRI interfaces). The density of 5G sectors is reduced, the frequent switching of UE equipment is reduced, the network optimization difficulty is reduced, and the comprehensive construction cost of the network is reduced.

Drawings

FIG. 1 is a block diagram of a hardware system improvement to which the present invention is applied;

FIG. 2 is a flowchart of step S1;

FIG. 3 is a block diagram of application example 1 of the present invention;

FIG. 4 is a block diagram of application example 2 of the present invention;

FIG. 5 is a block diagram of application example 3 of the present invention;

fig. 6 is a block diagram of application example 4 of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.

In a hardware system, as shown in fig. 1, the pRRU has two clock systems required by two data communication interface protocols, namely, an eCPRI and a CPRI, a working reference clock of the eCPRI is 156.25mhz, a working reference clock of the CPRI is 122.88MHz, and the two clock systems can be switched as needed.

The SFP photoelectric conversion modules on the pRRU include 2 sets, which are SFP0 and SPF1, preferably, SFP0 is connected to the upper-level device, the interface protocol of the SFP0 channel is determined by the interface protocol of the upper-level device, and if the upper-level device is the eccri, the interface protocol connected to the SFP0 channel is also the eccri, similarly to the CPRI interface protocol.

The SFP is followed by a general high-speed serial bus interface Serdes of the FPGA, a PLL in the Serdes can synchronize clock information in a high-speed serial data stream and output a reference clock to a digital phase-locked loop DPLL in the FPGA, the DPLL controls an external VCO to output an accurate reference frequency to a clock management chip as a reference according to the reference clock, finally, the clock management chip provides various groups of clocks required by a system, and when different interface protocols are connected according to different working reference clocks of eCPRI and CPRI, the reference clock output by SERDES is different, the output of eCPRI is 156.25MHz, and the output of CPRI is 122.88MHz.

Two mutually independent protocol processing unit logics are arranged in the FPGA and are respectively responsible for processing an eCPRI protocol and a CPRI protocol, and the specific networking steps are as follows:

s1, a system is started from an eCPRI by default and is connected with a previous-level device through an SFP0 channel, an eCPRI protocol processing unit tries to establish connection with the previous-level device first, and is switched to a CPRI protocol processing unit to continue trying after trying for a plurality of times of failure, as shown in figure 2;

s2, if the eCPRI protocol processing unit is successfully connected with the upper-level equipment, starting to receive an instruction of the upper-level equipment and controlling which protocol, eCPRI or CPRI, is adopted for the lower SFP interface;

s3, under an eCPRI protocol, the pRRU processes IQ data of each subcarrier, the IQ data is converted into time domain IQ data after being processed by a digital signal and is sent or received by a local ADC/DAC, and the time domain IQ data stream is directly forwarded or received by a CPRI interface when the next-stage equipment interface is the CPRI protocol;

s4, under a CPRI protocol, the pRRU processes time domain IQ data converted by an upper-level device, the IQ data can be directly sent or received through a local ADC/DAC, and meanwhile, the IQ data flow is sent or received to a lower-level device;

s5, different sectors are realized by pRRUs under the eCPRI protocol, namely each eCPRIpRRU is a sector, and the pRRUs under the CPRI protocol realize signal coverage of the same sector, wireless coverage areas formed by the pRRUs under the CPRI protocol belong to the same sector, and UE equipment moves among the sectors without sector switching and equivalently moves in one sector;

s6, the pRRU under the CPRI interface needs to be consistent on an air interface, including time synchronization and frequency synchronization, wherein,

s61, time synchronization, namely obtaining the time delay from each CPRI pRRU to an eCPRI interface position through time delay calibration, and keeping the time of each CPRI pRRU consistent through a compensation algorithm;

and S62, synchronizing the frequency, and keeping the frequency of the local clock system consistent with the eCPRI interface pRRU or CPRI HUB.

In a specific application, as shown in fig. 3, the BBU and the pRRU1 are connected through an eccri, and the pRRU1 pRRU2 pRRU3 are connected through a CPRI interface. Because the BBU adopts an eCPRI interface protocol, in the pRRU1, the SFP0 is connected with the BBU, the eCPRI interface protocol is adopted, and frequency domain subcarrier IQ data are interacted between the two parties. And the pRRU1 and the pRRU2 adopt a CPRI interface, and time domain IQ data are interacted.

As shown in fig. 4, based on fig. 3, an extended CPRI HUB device is introduced, so that a more complex link form can be realized, and both star and chain topologies are provided. The CPRI HUB and pRRU lack AD/DA and RF circuitry. But more SFP channels are added to reach more than 2+ 8. Wherein "2" is SFP0 and SPF1, whose function definition is consistent with pRRU, one is connected to the upper device, and the other is connected to the lower device. And 8 is another 8 SFP channels, and the function of the SFP channels is consistent with that of the SFP 1. And the purpose of adding the CPRI HUB device is to facilitate connection networking.

As shown in fig. 5, based on fig. 4, a cascading extension may also be performed between CPRI HUB devices to increase flexibility and adaptability of deployment.

As shown in fig. 6, the CPRI HUB is very flexible in pRRU devices so far, and can be inserted between any two prrus for CPRI interface expansion.

In order to ensure the consistency of the receiving and transmitting time of the air interfaces between the pRRUs 1 and 2 pRRUs 3, the time delay between the pRRUs is calculated through a time delay calibration function, and the time delay of the pRRU signal with the minimum delay is carried out so as to achieve the consistency of the air interface time between the pRRUs.

In the description of the present invention, it should be further noted that, unless otherwise specifically stated or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may be, for example, fixedly connected, detachably connected, integrally connected, mechanically connected, electrically connected, directly connected, connected through an intermediate medium, or connected through the insides of two elements. The specific meanings of the above terms in the present invention can be understood according to specific situations by those of ordinary skill in the art.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims (4)

1. A5G system pRRU in eCPRI protocol and CPRI protocol mixed networking method, characterized by that, in the hardware system, pRRU possesses two clock systems required by eCPRI and CPRI two kinds of data communication interface protocols at the same time, SFP photoelectric conversion module on pRRU has 2 groups, SFP0 and SPF1 separately, SFP is followed by general high speed serial bus interface Serdes of FPGA, PLL in said Serdes will synchronize the clock information in the high speed serial data stream and output a reference clock to FPGA internal digital phase-locked loop DPLL, DPLL controls external VCO to output an accurate reference frequency to clock management chip as reference according to this reference clock, finally, clock management chip provides the system required group clock, according to eCPRI and CPRI working reference clock different, when connecting different interface protocols, SERDES output this reference clock will also be responsible for 156.25MHz, while CPRI output is 122.MHz independently, FPGA has two kinds of mutually independent processing protocol logic processing units, CPRI and CPRI processing unit are as follows:

s1, a system is started from an eCPRI by default and is connected with a previous-level device through an SFP0 channel, an eCPRI protocol processing unit tries to establish connection with the previous-level device first, and the CPRI protocol processing unit is switched to continue trying after trying for a plurality of times in failure;

s2, if the eCPRI protocol processing unit is successfully connected with the upper-level equipment, starting to receive an instruction of the upper-level equipment and controlling which protocol, eCPRI or CPRI, is adopted for the lower SFP interface;

s3, under an eCPRI protocol, the pRRU processes IQ data of each subcarrier, the IQ data is converted into time domain IQ data after being processed by a digital signal and is transmitted or received by a local ADC/DAC, and when a next-stage equipment interface is a CPRI protocol, the time domain IQ data flow is directly transmitted or received by the CPRI interface;

s4, under a CPRI protocol, the pRRU processes time domain IQ data converted by an upper-level device, the IQ data can be directly sent or received through a local ADC/DAC, and meanwhile, the IQ data flow is sent or received to a lower-level device;

s5, different sectors are realized by pRRUs under the eCPRI protocol, namely each eCPRIpRRU is a sector, and the pRRUs under the CPRI protocol realize signal coverage of the same sector, wireless coverage areas formed by the pRRUs under the CPRI protocol belong to the same sector, and UE equipment moves among the sectors without sector switching and equivalently moves in one sector;

and S6, the pRRU under the CPRI interface needs to be kept consistent on an air interface, including time synchronization and frequency synchronization.

2. The method of claim 1, wherein the working reference clock of the eCPRI is 156.25MHz, the working reference clock of the CPRI is 122.88MHz, and the two clock systems can be switched as required.

3. The method of claim 1, wherein the SFP0 is connected to a higher-level device, the interface protocol of the SFP0 channel is determined by the interface protocol of the higher-level device, and if the higher-level device is the eccri, the interface protocol of the SFP0 channel is also the eccri, which is similar to the CPRI interface protocol.

4. The method for hybrid pRRU networking between eCPRI protocol and CPRI protocol in 5G system according to claim 1, wherein in step S6,

s61, time synchronization, namely obtaining the time delay from each CPRI pRRU to an eCPRI interface position through time delay calibration, and keeping the time of each CPRI pRRU consistent through a compensation algorithm;

and S62, synchronizing the frequency, and keeping the frequency of the local clock system consistent with the eCPRI interface pRRU or CPRI HUB.

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