CN112564769B - Low-orbit satellite high-speed communication method, transmitting terminal and system with multi-rate hierarchical adjustment - Google Patents
Low-orbit satellite high-speed communication method, transmitting terminal and system with multi-rate hierarchical adjustment Download PDFInfo
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Abstract
The invention discloses a low-orbit satellite high-speed communication method with multi-rate graded adjustment, a transmitting terminal and a low-orbit satellite communication system. The method comprises the following steps: emission: a, setting a clock frequency of a transmitting terminal and the quantity of receiving and transmitting parallel ports of a transmitting processor according to a target transmission rate; b, performing serial-parallel conversion on data to be transmitted according to the quantity of the receiving and transmitting parallel ports to obtain first parallel data; and C, coding, interleaving and scrambling the first parallel data, then performing serial-parallel conversion to obtain first serial data, and sending the first serial data. The clock frequency and the number of the receiving and transmitting parallel ports are set according to the target transmission rate, so that the signal transmission rate can be adjusted, and the ten-gigabit-class bit rate communication can be realized.
Description
Technical Field
The invention relates to the technical field of baseband signal processing and high-speed transmission, in particular to a low-orbit satellite high-speed communication method with multi-rate hierarchical adjustment, a transmitting terminal and a low-orbit satellite communication system.
Background
Since the 21 st century, satellite communication systems have been rapidly developed with the increasing demand for satellite communication services around the world. The low-earth-orbit satellite communication system has the advantages of short communication link, short time delay, small path loss, low cost and the like, and is widely concerned by various countries. At present, the low-orbit satellite communication system mainly comprises an Iridium system, a Globalstar system, a Starlink constellation and the like. The Starlink transmits 12 times, 713 satellites are sent into the orbit and are networked, the communication function of 100Mbps and low delay is realized, and high-speed, high-capacity and low-delay communication service can be provided for various parts of the world in the future.
At present, C, Ku frequency band resources commonly used by low earth orbit satellite communication systems tend to be saturated, and with the increasing difficulty of frequency coordination and the sudden increase of communication capacity, satellite communication loads are gradually developed to Ka and Q/V frequency bands with higher frequencies on the basis of C, Ku frequency bands. Higher frequencies and communication data throughput clearly place higher demands on the satellite-borne communication technology. In recent years, research on satellite-borne high-speed communication methods is increasing at home and abroad, various high-speed communication algorithms are becoming mature, but most of the methods adopt fixed communication rates, so that a technical method for hierarchical adjustment or adaptive adjustment of the related high-speed communication rates is lacked at the present stage.
With the increasing demand of satellite services in China, the demand of satellite communication data rate by satellite services such as high-resolution stereo mapping, environmental and meteorological monitoring, optical detection, navigation and ranging has increased from hundreds of megabits to gigabytes, and the demand has also continuously increased to tens of millions of megabits in the future. Therefore, the construction requirement of China on the satellite networking and the research and development requirement of the multi-rate adjustable baseband information processing technology are more and more urgent in the future.
Disclosure of Invention
The invention aims to at least solve the technical problems in the prior art, and particularly creatively provides a multi-rate hierarchical adjustment low-orbit satellite high-speed communication method, a transmitting terminal and a low-orbit satellite communication system.
In order to achieve the above object of the present invention, according to a first aspect of the present invention, there is provided a method for high-speed communication of a multi-rate step-adjusted low-earth orbit satellite, comprising a transmitting step and/or a receiving step; the transmitting step includes: step A, acquiring a target transmission rate, and setting a clock frequency of a transmitting terminal and the number of receiving and transmitting parallel ports of a transmitting processor according to the target transmission rate; b, performing serial-parallel conversion on data to be transmitted according to the quantity of the transceiving parallel ports to obtain first parallel data; step C, carrying out coding processing, interweaving processing and scrambling processing on the first parallel data, then carrying out serial-parallel conversion on the first parallel data to obtain first serial data, and sending the first serial data; the receiving step includes: step S1, obtaining a target transmission rate, and setting the clock frequency of a receiving end and the quantity of receiving and sending parallel ports of a receiving processor according to the target transmission rate; step S2, according to the receiving and sending parallel port quantity, carrying out serial-parallel conversion on the received data to obtain second parallel data; and step S3, performing descrambling processing, deinterleaving processing, and decoding processing on the second parallel data, and performing serial-to-parallel conversion to obtain second serial data.
The technical scheme is as follows: the method adopts a parallel processing mode in the data processing of the transmitting end and the receiving end, improves the data processing speed of the baseband processor, adaptively sets the clock frequency and the quantity of the receiving and transmitting parallel ports according to the user requirement and the target transmission rate of the actual service data volume, realizes the adjustment of the signal transmission rate, and can realize the processing and the receiving and transmitting functions of the baseband information at the maximum bit rate of ten-tera; limited hardware resources can be reasonably configured while the service data transceiving task is executed; the transceiver has the functions of encoding/decoding, interleaving/de-interleaving, scrambling/descrambling for the baseband information at the transmitting end and the receiving end, can correct information random errors and long burst errors, reduces the error rate, smoothes the signal frequency spectrum, and ensures the high-speed communication to be reliable and stable.
In a preferred embodiment of the present invention, in step a/step S1, the transmitting end/receiving end clock frequency and the number of parallel transmitting/receiving ports of the transmitting processor/receiving processor are set according to the formula v ═ f · n, where v denotes a target transmission rate, f denotes the transmitting end/receiving end clock frequency, and n denotes the number of parallel transmitting/receiving ports of the transmitting processor/receiving processor.
The technical scheme is as follows: a method for accurately setting clock frequency and the number of transceiving parallel ports is provided.
In a preferred embodiment of the present invention, the transmission rate is set to a plurality of gears, each gear corresponds to at least one combination of the clock frequency and the number of parallel transmitting/receiving ports, and the clock frequency and the number of parallel transmitting/receiving ports are set according to the combination of the clock frequency and the number of parallel transmitting/receiving ports corresponding to the gear to which the target transmission rate belongs.
The technical scheme is as follows: a method for quickly setting clock frequency and the number of receiving and transmitting parallel ports is provided, and the method realizes a method for quickly switching transmission rate gears.
In a preferred embodiment of the present invention, in step C, before sending the first serial data, a synchronization frame process is further performed on the first serial data; in step S1, the received data needs to be desynchronized before being converted into serial and parallel data.
The technical scheme is as follows: the positioning of the transceiving data is facilitated through synchronous frame processing.
In a preferred embodiment of the present invention, in the step C, the process of performing the encoding process, the interleaving process, and the scrambling process on the first parallel data includes: and coding the first parallel data in parallel by adopting an RS coding algorithm, storing the coded data in columns and reading out the data in rows according to the row number sequence to form first serial data, and performing XOR operation on the data read out every time to generate scrambling codes in the process of reading out the data in rows.
The technical scheme is as follows: and high-speed baseband signal coding and randomization processing functions of a transmitting end are realized.
In order to achieve the above object, according to a second aspect of the present invention, there is provided a transmitting end, including a first baseband processor, a first clock module, a first storage module, and a first radio frequency module, where the first baseband processor is connected to the first clock module, the first storage module, and the first radio frequency module, respectively; the frequency of a clock signal output by the first clock module is adjustable; the first baseband processor acquires a target transmission rate, and sets the frequency of a clock signal output by the first clock module and the quantity of transceiving parallel ports according to the target transmission rate; performing serial-parallel conversion on data to be transmitted in the first storage module according to the quantity of the transceiving parallel ports to obtain first parallel data; the first baseband processor performs coding processing, interleaving processing and scrambling processing on the first parallel data, and the processed data is subjected to serial-parallel conversion in the first storage module to obtain first serial data; and the first baseband processor transmits the first serial data to a first radio frequency module for transmission.
The technical scheme is as follows: the transmitting terminal adopts a parallel processing mode in data processing, improves the data processing speed of the baseband processor, adaptively sets the clock frequency and the quantity of the receiving and transmitting parallel ports according to the user requirement and the target transmission rate of the actual service data volume, realizes the adjustment of the signal transmission rate, and can realize the processing and transmitting functions of baseband information at the maximum bit rate of ten-tera; limited hardware resources can be reasonably configured while the service data transmitting task is executed; the method has the functions of coding, interweaving and scrambling the baseband information, can correct information random errors and long burst errors, reduces the error rate, smoothes the signal frequency spectrum and ensures the high-speed communication to be reliable and stable.
In order to achieve the above object, according to a third aspect of the present invention, there is provided a receiving end, including a second baseband processor, a second clock module, a second storage module, and a second radio frequency module, where the second baseband processor is connected to the second clock module, the second storage module, and the second radio frequency module, respectively; the frequency of a clock signal output by the second clock module is adjustable; the second baseband processor acquires a target transmission rate, and sets the frequency of a clock signal output by the second clock module and the quantity of the transceiving parallel ports according to the target transmission rate; performing serial-parallel conversion on the received data in the second storage module according to the quantity of the receiving and sending parallel ports to obtain second parallel data; and the second baseband processor performs descrambling, deinterleaving and decoding on the second parallel data, and the processed data is subjected to serial-parallel conversion in a second storage module to obtain second serial data.
The technical scheme is as follows: the receiving end adopts a parallel processing mode in data processing, the data processing speed of the baseband processor is improved, the clock frequency and the receiving parallel port number are set according to the user requirement and the target transmission rate of the actual service data volume in a self-adaptive manner, the signal transmission rate is adjustable, and the processing and receiving functions of baseband information can be realized at the maximum under the ten-tera bit rate; limited hardware resources can be reasonably configured while the service data receiving task is executed; the receiving end has the functions of decoding, de-interleaving and descrambling the baseband information, can correct information random errors and long burst errors, reduces the error rate, smoothes the signal frequency spectrum and ensures the reliability and stability of high-speed communication.
In order to achieve the above object, according to a fourth aspect of the present invention, there is provided a low earth orbit satellite communication system comprising at least two satellites, when any two satellites establish communication links as a transmitting satellite and a receiving satellite, respectively: the method comprises the steps that a transmitting satellite obtains a target transmission rate, and the frequency and the number of receiving and transmitting parallel ports of a clock module of the transmitting satellite are set according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on data to be transmitted according to the number of the receiving and transmitting parallel ports to obtain first parallel data; the transmitting satellite carries out coding processing, interweaving processing and scrambling processing on the first parallel data and then carries out serial-parallel conversion to obtain first serial data; the transmitting satellite transmits the first serial data to the receiving satellite; a receiving satellite acquires a target transmission rate, and sets the frequency of a clock signal output by a receiving satellite clock module and the number of transceiving parallel ports according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on the received data according to the quantity of the receiving and sending parallel ports to obtain second parallel data; and the transmitting satellite performs descrambling, deinterleaving and decoding on the second parallel data and then performs serial-parallel conversion on the second parallel data into second serial data.
The technical scheme is as follows: the system adopts a parallel processing mode in the data processing of the transmitting satellite and the receiving satellite, improves the data processing speed of the baseband processor, adaptively sets the clock frequency and the quantity of the receiving and transmitting parallel ports according to the user requirement and the target transmission rate of the actual service data volume, realizes the adjustment of the signal transmission rate, and can realize the processing and receiving and transmitting functions of the baseband information at the maximum bit rate of ten-tera; limited hardware resources can be reasonably configured while the service data transceiving task is executed; the transceiver has the functions of encoding/decoding, interleaving/de-interleaving and scrambling/descrambling baseband information at the transceiving two ends, can correct information random errors and long burst errors, reduces the error rate, smoothens signal frequency spectrum and ensures reliable and stable high-speed communication.
Drawings
Fig. 1 is a flow chart illustrating a transmitting step in a high speed communication method according to an embodiment of the present invention;
FIG. 2 is a flow chart illustrating a receiving step in a high speed communication method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of target transmission rate range shift logic in accordance with one embodiment of the present invention;
fig. 4 is a diagram illustrating simulation results of communication speed gear shifting in an embodiment of the present invention, where fig. 4(a) is a diagram illustrating switching results when a target transmission speed is lowered from a 156.25MHz gear to a 39.0625MHz gear, and fig. 4(b) is a diagram illustrating switching results when the target transmission speed is switched from a 10Gbps gear to a 2.5Gbps gear;
FIG. 5 is a diagram illustrating interleaving expressions in accordance with an embodiment of the present invention;
FIG. 6 is a diagram illustrating a deinterleaving expression according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, it is to be understood that the terms "longitudinal", "lateral", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. indicate orientations or positional relationships based on those shown in the drawings, and are merely for convenience of description and simplicity of description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be construed as limiting the present invention.
In the description of the present invention, unless otherwise specified and limited, it is to be noted that the terms "mounted," "connected," and "connected" are to be interpreted broadly, and may be, for example, a mechanical connection or an electrical connection, a communication between two elements, a direct connection, or an indirect connection via an intermediate medium, and specific meanings of the terms may be understood by those skilled in the art according to specific situations.
The invention discloses a low-orbit satellite high-speed communication method with multi-rate graded adjustment, which comprises a transmitting step and/or a receiving step.
As shown in fig. 1, the transmitting step includes: step A, acquiring a target transmission rate, and setting the clock frequency of a transmitting terminal and the number of receiving and transmitting parallel ports of a transmitting processor according to the target transmission rate; b, performing serial-parallel conversion on data to be transmitted according to the quantity of the receiving and transmitting parallel ports to obtain first parallel data; and step C, performing coding processing, interleaving processing and scrambling processing on the first parallel data, performing serial-parallel conversion on the first parallel data to obtain first serial data, and sending the first serial data.
As shown in fig. 2, the receiving step includes: step S1, obtaining a target transmission rate, and setting the clock frequency of a receiving end and the quantity of transceiving parallel ports of a receiving processor according to the target transmission rate; step S2, according to the quantity of the receiving and sending parallel ports, the received data is converted in a serial-parallel mode to obtain second parallel data; step S3, performing descrambling, deinterleaving, and decoding on the second parallel data, and performing serial-to-parallel conversion to obtain second serial data.
In this embodiment, the target transmission rate may be determined according to the user requirement and the actual traffic data volume. Preferably, after the clock frequency and the number of the transceiving parallel ports are set in practical application, the clock frequency and the transceiving parallel ports of the transmitting processor/the receiving processor are initialized and configured. Preferably, the parallel port is a parallel port for transmitting and receiving I/O.
In the present embodiment, in the transmitting step, as shown in fig. 1, high-speed serial data is input, the high-speed serial data is converted into first parallel data in serial-parallel conversion in step B, and in the serial-parallel conversion process, the column data length of the first parallel data is set according to the number of parallel transmitting/receiving ports. In step C, the first parallel data is converted into first serial data, which is high-speed serial data and is sent out through the radio frequency module.
In the present embodiment, in the receiving step, as shown in fig. 2, the received high-speed serial data is converted into second parallel data in serial-parallel conversion in step S2, and in the serial-parallel conversion process, the column data length of the second parallel data is set in accordance with the number of parallel transmission/reception ports. In step S3, the second parallel data is converted into second serial data as high-speed serial data as final received data.
In the present embodiment, the application scenarios of the low-earth orbit satellite high-speed communication method with multi-rate hierarchical adjustment are preferably, but not limited to, an inter-satellite link, a terrestrial communication link, a terrestrial and a satellite communication link.
In a preferred embodiment, in step a/step S1, the transmitting/receiving end clock frequency and the number of parallel transmitting/receiving ports of the transmitting processor/receiving processor are set according to the formula v · n, where v denotes the target transmission rate, f denotes the transmitting end/receiving end clock frequency, and n denotes the number of parallel transmitting/receiving ports of the transmitting processor/receiving processor.
In a preferred embodiment, the transmission rate is set to a plurality of gears, each gear corresponds to at least one clock frequency and transceiving parallel port number combination, and the clock frequency and the transceiving parallel port number are set according to the clock frequency and transceiving parallel port number combination corresponding to the gear to which the target transmission rate belongs.
In an application scenario of the embodiment, the maximum working clock frequency can reach 156.25MHz, the maximum number of I/O parallel ports can be set to 64 bits, and the maximum data throughput of 10Gbps can be achieved. As shown in fig. 3, the target transmission rates are set to four levels of 1.25Gbps, 2.5Gbps, 5Gbps and 10Gbps, and as can be seen from fig. 3, the 10Gbps level corresponds to one combination, i.e., (156.25MHz, 64-bit parallel); 2.5Gbps corresponds to 4 combinations. When the transmission rate gear is switched, any one of the clock frequency and the number of the transceiving parallel ports can be changed to complete gear switching, so that the workload is reduced, and the switching speed is increased. In the case of switching the communication rate from 10Gbps to 2.5Gbps, as shown in fig. 3, the operating clock may be lowered from 156.25MHz to 39.0625MHz, or the number of I/O parallel ports may be lowered from 64 bits to 16 bits.
In the application scenario, as shown in fig. 4, which is a schematic diagram of the switching effect, fig. 4(a) is a scheme in which 156.25MHz is lowered to 39.0625MHz, it can be seen that after the rate switching enable is pulled high, the method completes the switching of the working clock frequency through one clock cycle, and the data transmission rate is switched from 10Gbps to 2.5 Gbps. Fig. 4(b) shows a scheme that the number of I/O parallel ports is reduced from 64 bits to 16 bits, and it can be seen that after the rate switch enable is pulled high, the method completes the conversion of the number of parallel ports from 64 bits to 16 bits in one clock cycle, and the data transmission rate is switched from 10Gbps to 2.5 Gbps.
In a preferred embodiment, in step C, before sending the first serial data, a synchronization frame is further performed on the first serial data; in step S1, the received data is subjected to desynchronization frame processing before being subjected to serial-to-parallel conversion.
In a preferred embodiment, in step C, the process of performing the encoding process, the interleaving process, and the scrambling process on the first parallel data includes: and coding the first parallel data in parallel by adopting an RS coding algorithm, storing the coded data in columns, reading out the data in rows according to the row number sequence to form first serial data, and performing exclusive OR operation on the data read out every time to generate scrambling codes in the process of reading out the data in rows.
In this embodiment, the RS encoding process is: the expression of the final information vector of the RS coding module at the sending end is as follows:
m(x)＝m 238 x 238 +m 237 x 237 +…+m 1 x+m 0 ；
the symbol vector of the system is: c (x) x 16 m (x) + r (x); wherein, r (x) is a residue expression of the polynomial generated by the information vector pair, and specifically includes: r (x) x 16 m(x)modg(x)。
The generator polynomial g (x) is:
g(x)＝x 16 +118x 15 +52x 14 +103x 13 +31x 12 +104x 11 +126x 10 +187x 9 +232x 8
+17x 7 +56x 6 +183x 5 +49x 4 +100x 3 +81x 2 +44x+79。
the corresponding RS decoding process is: the receiving end RS decoding module receives the codeword polynomial r (x) as the superposition of c (x) and noise e (x), that is: r (x) ═ c (x) + e (x). If t errors are generated by the channel, then:
wherein, Y i Is an error value, Y i ∈GF(q)，
Called the number of error positions, which indicates that the error occurred in the n-l in R (x) i A bit.
The syndrome of the receiving end RS decoding module is defined as: s ═ S1, S2.., S2 t )＝R·H T . Wherein R is a matrix of received symbols, H is a check (parity) matrix, and H.C T 0, where C is the coding matrix. At the receiving end, R ═ C + E, where E is the error matrix generated by the channel noise during transmission, then there are:
S T ＝H·R T ＝H·(C+E) T ＝H·E T ＝(s 1 ,s 2 ,...,s 2t ) T
by correlation calculation, it follows:
the error location polynomial σ (x) is expressed as follows:
let the error value polynomial be ω (x) ═ s (x) σ (x), and be s (x) · σ (x) ═ ω (x) (modx) 2t+1 ) The key equation for σ (x) is solved. σ (x) can be solved by using BM iterative algorithm, and BM iterative process is as follows:
S(x)σ (1) (x)≡ω (1) (x)(modx 2 )
S(x)σ (2) (x)≡ω (2) (x)(modx 3 )
S(x)σ (2t) (x)≡ω (2t) (x)(modx 2t+1 )。
the RS decoding module at the receiving end uses Chien search to find the error position, and sets R (x) r n-1 x n-1 +r n-2 x n-2 +...+r 1 x+r 0 To examine r n-l Whether (l ═ 1, 2.. times, n) has an error corresponds to whether the decoder needs to determine that σ - (n-l) is the root of δ (x), and the expression is as follows:
In this embodiment, the transmitting-end interleaving module performs interleaving by writing data in columns and reading data in rows, and an interleaving expression is shown in fig. 5.
In this embodiment, the receiving-end deinterleaving module writes data in rows and performs deinterleaving in a column-reading data manner, and an expression is shown in fig. 6.
In this embodiment, the scrambling/descrambling modules at the transmitting and receiving ends configure shift registers according to the number of parallel ports, and perform xor operation on the transmitting and receiving data to generate scrambling codes, where the scrambling code generator polynomial is as follows:
the descrambling process of the receiving end is similar to the scrambling process of the transmitting end, and the data information before scrambling can be correctly restored by decoding with the same polynomial.
The invention also discloses a sending end, which comprises a first baseband processor, a first clock module, a first storage module and a first radio frequency module, wherein the first baseband processor is respectively connected with the first clock module, the first storage module and the first radio frequency module; the frequency of a clock signal output by the first clock module is adjustable; the first baseband processor acquires a target transmission rate, and sets the frequency of a clock signal output by the first clock module and the quantity of transceiving parallel ports according to the target transmission rate; performing serial-parallel conversion on data to be transmitted in a first storage module according to the quantity of the receiving and transmitting parallel ports to obtain first parallel data; the first baseband processor performs coding processing, interleaving processing and scrambling processing on the first parallel data, and the processed data is subjected to serial-parallel conversion in the first storage module to obtain first serial data; the first baseband processor transmits the first serial data to the first radio frequency module to be sent.
In this embodiment, the first storage module is preferably, but not limited to, a RAM or an SRAM.
The invention also discloses a receiving end which comprises a second baseband processor, a second clock module, a second storage module and a second radio frequency module, wherein the second baseband processor is respectively connected with the second clock module, the second storage module and the second radio frequency module; the frequency of the clock signal output by the second clock module is adjustable; the second baseband processor acquires a target transmission rate, and sets the frequency of the clock signal output by the second clock module and the quantity of the transceiving parallel ports according to the target transmission rate; performing serial-parallel conversion on the received data in a second storage module according to the quantity of the receiving and sending parallel ports to obtain second parallel data; the second baseband processor carries out descrambling processing, de-interleaving processing and decoding processing on the second parallel data, and the processed data is subjected to serial-parallel conversion in the second storage module to obtain second serial data.
In this embodiment, the second storage module is preferably, but not limited to, a RAM or an SRAM.
The invention also discloses a low-orbit satellite communication system, which comprises at least two satellites, wherein when any two satellites are respectively used as a transmitting satellite and a receiving satellite to establish a communication link:
the method comprises the steps that a transmitting satellite obtains a target transmission rate, and the frequency and the number of receiving and transmitting parallel ports of a clock module of the transmitting satellite are set according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on data to be transmitted according to the number of the receiving and transmitting parallel ports to obtain first parallel data; the transmitting satellite carries out coding processing, interweaving processing and scrambling processing on the first parallel data and then carries out serial-parallel conversion to obtain first serial data; the transmitting satellite transmits first serial data to the receiving satellite; a receiving satellite acquires a target transmission rate, and sets the frequency of a clock signal output by a receiving satellite clock module and the number of receiving and transmitting parallel ports according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on the received data according to the quantity of the receiving and transmitting parallel ports to obtain second parallel data; and the transmitting satellite performs descrambling, deinterleaving and decoding on the second parallel data and then performs serial-to-parallel conversion on the second parallel data into second serial data.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims (6)
1. A low-orbit satellite high-speed communication method with multi-rate hierarchical regulation is characterized by comprising a transmitting step;
the transmitting step includes:
step A, acquiring a target transmission rate, and setting a clock frequency of a transmitting terminal and the number of receiving and transmitting parallel ports of a transmitting processor according to the target transmission rate;
step B, performing serial-parallel conversion on data to be transmitted according to the quantity of the transceiving parallel ports to obtain first parallel data;
step C, carrying out encoding processing, interweaving processing and scrambling processing on the first parallel data, then carrying out serial-parallel conversion to obtain first serial data, and sending the first serial data;
the process of coding, interleaving and scrambling the first parallel data comprises the following steps:
and coding the first parallel data in parallel by adopting an RS coding algorithm, storing the coded data in columns and reading out the data in rows according to the row number sequence to form first serial data, and performing XOR operation on the data read out every time to generate scrambling codes in the process of reading out the data in rows.
2. The method for high-speed communication of a multi-rate step-adjusted low-orbit satellite according to claim 1, wherein in the step a, the clock frequency of the transmitting terminal and the number of parallel transmitting/receiving ports of the transmitting processor are set according to the formula v-f-n, wherein v represents the target transmission rate, f represents the clock frequency of the transmitting terminal, and n represents the number of parallel transmitting/receiving ports of the transmitting processor.
3. The method for high-speed communication with low-earth orbit satellites with multi-rate step regulation according to claim 1, characterized in that the transmission rate is set to a plurality of gears, each gear corresponds to at least one combination of clock frequency and the number of parallel transmitting/receiving ports, and the clock frequency and the number of parallel transmitting/receiving ports are set according to the combination of the clock frequency and the number of parallel transmitting/receiving ports corresponding to the gear to which the target transmission rate belongs.
4. The method for multi-rate scalable low-earth-orbit satellite high-speed communication according to claim 1, wherein in step C, the first serial data is further subjected to a synchronization frame process before being transmitted.
5. A transmitting end, characterized in that the transmitting end performs data transmission by using the method of claim 1, and the transmitting end includes a first baseband processor, a first clock module, a first storage module and a first radio frequency module, and the first baseband processor is connected to the first clock module, the first storage module and the first radio frequency module respectively; the frequency of a clock signal output by the first clock module is adjustable;
the first baseband processor acquires a target transmission rate, and sets the frequency of a clock signal output by the first clock module and the quantity of transceiving parallel ports according to the target transmission rate; performing serial-parallel conversion on data to be transmitted in the first storage module according to the number of the receiving and transmitting parallel ports to obtain first parallel data; the first baseband processor performs coding processing, interleaving processing and scrambling processing on the first parallel data, and the processed data is subjected to serial-parallel conversion in the first storage module to obtain first serial data; and the first baseband processor transmits the first serial data to a first radio frequency module for transmission.
6. A low earth orbit satellite communications system comprising at least two satellites, wherein when any two satellites establish a communications link as a transmitting satellite and a receiving satellite:
the method of claim 1 is utilized by a transmitting satellite for data transmission, the transmitting satellite acquires a target transmission rate, and sets the frequency of a clock signal output by a clock module of the transmitting satellite and the number of transceiving parallel ports according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on data to be transmitted according to the number of the receiving and transmitting parallel ports to obtain first parallel data; the transmitting satellite carries out coding processing, interweaving processing and scrambling processing on the first parallel data and then carries out serial-parallel conversion to obtain first serial data; the transmitting satellite transmits the first serial data to the receiving satellite;
a receiving satellite acquires a target transmission rate, and sets the frequency of a clock signal output by a receiving satellite clock module and the number of transceiving parallel ports according to the target transmission rate; the transmitting satellite carries out serial-parallel conversion on the received data according to the quantity of the receiving and sending parallel ports to obtain second parallel data; and the transmitting satellite performs descrambling, deinterleaving and decoding on the second parallel data and then performs serial-parallel conversion on the second parallel data into second serial data.
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