CN112505426A - Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof - Google Patents
Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof Download PDFInfo
- Publication number
- CN112505426A CN112505426A CN202011190836.4A CN202011190836A CN112505426A CN 112505426 A CN112505426 A CN 112505426A CN 202011190836 A CN202011190836 A CN 202011190836A CN 112505426 A CN112505426 A CN 112505426A
- Authority
- CN
- China
- Prior art keywords
- resistor
- capacitor
- voltage
- pin
- dielectric loss
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 109
- 238000000034 method Methods 0.000 title claims abstract description 15
- 230000032683 aging Effects 0.000 claims abstract description 22
- 238000001914 filtration Methods 0.000 claims abstract description 21
- 238000005070 sampling Methods 0.000 claims abstract description 17
- 238000011156 evaluation Methods 0.000 claims abstract description 16
- 238000005259 measurement Methods 0.000 claims abstract description 15
- 239000003990 capacitor Substances 0.000 claims description 395
- 238000004146 energy storage Methods 0.000 claims description 52
- 238000000691 measurement method Methods 0.000 claims description 6
- 238000012545 processing Methods 0.000 claims description 6
- 238000006243 chemical reaction Methods 0.000 claims description 4
- 238000012546 transfer Methods 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 2
- 230000003993 interaction Effects 0.000 claims description 2
- 240000005572 Syzygium cordatum Species 0.000 abstract description 7
- 235000006650 Syzygium cordatum Nutrition 0.000 abstract description 7
- 230000008859 change Effects 0.000 abstract description 5
- 230000008569 process Effects 0.000 abstract description 3
- 230000007797 corrosion Effects 0.000 abstract description 2
- 238000005260 corrosion Methods 0.000 abstract description 2
- 230000003449 preventive effect Effects 0.000 abstract description 2
- 230000001052 transient effect Effects 0.000 abstract description 2
- 238000009413 insulation Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000011160 research Methods 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 241000196324 Embryophyta Species 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 229920003020 cross-linked polyethylene Polymers 0.000 description 1
- 239000004703 cross-linked polyethylene Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000036541 health Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2688—Measuring quality factor or dielectric loss, e.g. loss angle, or power factor
- G01R27/2694—Measuring dielectric loss, e.g. loss angle, loss factor or power factor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a cable dielectric loss measuring device working at an ultralow frequency band test voltage and a measuring method thereof, belonging to the field of an ultralow frequency dielectric loss cable aging performance evaluation system; a cable dielectric loss measuring device working at an ultra-low frequency band test voltage comprises: the device comprises an industrial personal computer, a device digital circuit module, an inversion module and a low-pass filtering and high-voltage sampling module; in the invention, the cable is influenced by the temperature, humidity, oil corrosion, manpower damage and the like of the natural environment in the operation process, so that the cable performance is subjected to preventive tests at present in order to avoid accidents, and the domestic current evaluation method is relatively laggard; but the evaluation is carried out by carrying out ultralow frequency dielectric loss test more and more internationally; because the method has the characteristics of sensitive indexes, low requirement on test power supply capacity, portable equipment and the like, the problems of cable moisture, water tree aging and the like can be sensitively reflected through the indexes such as dielectric loss absolute measurement value, dielectric loss change rate, dielectric loss transient stability and the like.
Description
Technical Field
The invention discloses a cable dielectric loss measuring device working at an ultralow frequency band test voltage and a measuring method thereof, belonging to the field of an ultralow frequency dielectric loss cable aging performance evaluation system.
Background
The cable can be aged under the common influence of factors such as an electric field, temperature, moisture and the like in the operation process, such as water tree aging, electric tree aging, thermoelectric aging and the like. Particularly in southern coastal areas, weather is rainy and humid, so that the air humidity of a cable trench or a tunnel is high, even water enters the cable to soak the cable in severe conditions, the insulation of the cable is affected with damp and aged to form water branches, and the water trees can induce the formation of the power trees after the water trees grow continuously after the water trees run for a long time, so that accidents can be caused by the aging of breakdown cables of the cable insulation, and potential hazards are brought to the safe running of a power grid.
In order to eliminate the potential safety hazard, a set of maintenance strategy capable of effectively evaluating the health condition of the cable must be established so as to reduce the cable faults.
The performance of the cable is evaluated by ultralow frequency dielectric loss as a new technical means. In recent years, the wide application of the ultra-low frequency dielectric loss measurement technology in foreign countries proves the superiority of the ultra-low frequency dielectric loss measurement technology in the aspect of cable insulation water tree detection. For this reason, IEEE 400.2-2013 proposes three major criteria of ultralow frequency dielectric loss (dielectric loss Stability over time (VLF-TD Stability), dielectric loss change rate (DTD), dielectric loss mean (TD)). On this basis, the more influential commercial vendors that developed and promoted such equipment were seeba germany and austria keelson.
The domestic ultralow frequency dielectric loss test equipment only stays at the stage of theoretical research and application evaluation by means of foreign equipment, and no practical product is available.
Foreign manufacturers include Olympic Baker, SebaKMT, SaibaKMT, Germany, and Olympic B2HV, and the number of applied plants in China reaches 143, 18 and 30 respectively as of 2019. The main focus is on national grid systems.
The ultra-low frequency dielectric loss technology is the most effective cable aging performance evaluation best means, and the successful project research can certainly promote the cable aging performance evaluation work, reduce the occurrence of the faults and improve the power operation safety.
The reason that the cable aging performance evaluation work can not be popularized at present still lacks direct, reliable and convenient means, and the application of the research result of the project has the necessity.
The aging performance evaluation system of the ultralow-frequency dielectric loss cable is widely applied to a power system, test voltage basically works in a power frequency band, some anti-interference dielectric loss testers adopt a frequency conversion technology, but the frequency variation range is still close to the power frequency, generally 40-70 HZ., when the working voltage is low-voltage 400V, the tested capacitor can reach the uF level, and the test requirement can be met for equipment working at the low-voltage level. But when the capacitor is operated in 10KV medium voltage, the capacitance of the capacitor to be measured can only reach the level of tens nF. When testing a device with capacity of the uF class, the required output power will exceed the limits of the test device. For a common crosslinked polyethylene 10KV cable, the capacity of a 10km capacitor is generally in the uF level, and a power frequency dielectric loss tester cannot be sufficient.
Disclosure of Invention
The purpose of the invention is as follows: the utility model provides a cable dielectric loss measuring device and a measuring method thereof working at ultra-low frequency test voltage, which solves the problems.
The technical scheme is as follows: a cable dielectric loss measuring device working at an ultra-low frequency band test voltage comprises:
an industrial personal computer; the main part of man-machine interaction, the setting of test parameters and information, the setting of test modes, the result of test analysis and the storage of data are all finished by an industrial personal computer;
the device digital circuit module is used for signal generation, output quantity measurement and logic control work;
the inversion module is used for converting direct-current voltage into alternating-current voltage;
the low-pass filtering and high-voltage sampling module is used for allowing signals below a cut-off frequency to pass through, and preventing signals above the cut-off frequency from passing through; and is used for collecting high-voltage signals;
wherein, device digital circuit module includes: CPU, AD converter, DA converter.
Preferably, the inverter module comprises an SPWM high-voltage inverter; the SPWM high-voltage inverter includes: power amplifier U1, interface J1, interface J2, interface J3, resistor R9, resistor R7, resistor R8, capacitor C7, MOS transistor Q1, LED diode D1, resistor R3, capacitor C1, resistor R1, capacitor C2, capacitor C3, resistor R2, capacitor C4, resistor R6, diode D2, capacitor C5, capacitor C6, resistor R5, resistor R4, resistor R10, resistor R11, resistor R12, resistor R13, diode D4, capacitor C13, capacitor C14, capacitor C10, resistor R20, diode D3, resistor R14, resistor R18, resistor R17, resistor R15, resistor R16, capacitor C18, capacitor C9, resistor R21, LED diode D21, fet Q21, resistor R21, differential resistor R21, capacitor C21, resistor R21, inductor R21, resistor R21, differential resistor R21, inductor R72, differential resistor R72, resistor R21, differential resistor R21, resistor R72, differential resistor R72, and resistor R21, A resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a capacitor C18, a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C31, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C35, a capacitor C36 and a capacitor C37;
pin No. 1 of the power amplifier U1 is connected to one end of the capacitor C1 and the drain of the MOS transistor Q1 at the same time, and +5V is input to one end of the capacitor C1, pin No. 2 of the power amplifier U1 is connected to the other end of the capacitor C1, one end of the capacitor C2, and one end of the resistor R1 at the same time, and is grounded, pin No. 4 of the power amplifier U1 is connected to the other end of the capacitor C2 and one end of the capacitor C3 at the same time, the other end of the resistor R1 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the other end of the capacitor C3 and one end of the capacitor C4 at the same time, pin No. 3 of the power amplifier U1 is connected to the other end of the capacitor C4, one end of the resistor R7, and one end of the resistor R9 at the same time, pin No. 5 of the power amplifier U2 is connected to one end of the capacitor C5, one end of the resistor R6353, and one end of, the other end of the resistor R6 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the SD terminal, the source of the MOS transistor Q1 is connected to the anode of the LED diode D1, the cathode of the LED diode D1 is connected to one end of the resistor R3, the other end of the resistor R3 is grounded, the pin No. 6 of the power amplifier U1 is simultaneously connected to the other end of the capacitor C5, one end of the capacitor C6 and one end of the resistor R5, and a ground voltage is input thereto, the pin No. 7 of the power amplifier U1 is connected to one end of the resistor R4, the other end of the capacitor C6 is grounded, the pin No. 8 of the power amplifier U1 is simultaneously connected to the other end of the resistor R5 and the other end of the resistor R4, the pin No. 2 of the interface J1 is connected to the other end of the resistor R9, the pin No. 3 of the interface J1 is grounded, one end of the capacitor C7 is simultaneously connected to one end of the resistor R8 and one end of the resistor R9, the other end of the capacitor C7 is grounded, the pin No. 9 of the power amplifier U1 is connected to one end of the resistor R16 and one end of the resistor R15 at the same time, the other end of the resistor R16 is connected to the pin No. 1 of the interface J2, the pin No. 10 of the power amplifier U1 is connected to the negative electrode of the LED diode D5, the drain of the fet Q3, one end of the capacitor C11, one end of the capacitor C12, the other end of the capacitor C16 and one end of the capacitor C17 at the same time, the other end of the capacitor C11 is grounded, the other end of the capacitor C12 is grounded, the positive electrode of the LED diode D5 is connected to one end of the resistor R21, the pin No. 11 of the power amplifier U1 is connected to one end of the resistor R14, the pin No. 12 of the power amplifier U1 is connected to one end of the resistor R15, one end of the capacitor C8 and one end of the resistor R17 at the same time and is connected to a, the other end of the resistor R17 is connected to one end of the resistor R18 and one end of the capacitor C9, the other end of the capacitor C9 is connected to pin 1 of an interface J2, the other end of the capacitor C8 is connected to pin 1 of an interface J2 in a reverse manner, the other end of the resistor R18 is connected to the anode of the diode D3, the other end of the resistor R14 is connected to the other end of the resistor R21 and the gate of the fet Q3, pin 13 of the power amplifier U1 is connected to one end of the capacitor C10, one end of the resistor R13, the source of the fet Q3, the drain of the fet Q2, one end of the resistor R19, one end of the resistor R22, the other end of the resistor R8 and pin 2 of the transformer TR1, pin 1 of the transformer TR1 is connected to one end of the resistor R23, and the other end of the resistor R23 is grounded, pin No. 14 of the power amplifier U1 is connected to one end of the resistor R20, the other end of the resistor R20 is connected to the gate of the fet Q2, pin No. 15 of the power amplifier U1 is connected to one end of the resistor R10, one end of the resistor R11, the cathode of the diode D3, and the other end of the capacitor C10, pin No. 16 of the power amplifier U1 is connected to one end of the resistor R12 and the other end of the resistor R13, the other end of the resistor R12 is connected to the other end of the resistor R11 and the anode of the diode D4, the cathode of the diode D4 is connected to the other end of the resistor R10 and one end of the capacitor C13 and to pin No. 3 of the interface J2, and one end of the capacitor C14 is connected to one end of the capacitor C13 and the source of the fet Q2 and to pin No. 3 of the interface J2, the other end of the capacitor C13 is grounded, the other end of the capacitor C14 is grounded, one end of the capacitor C15 is connected to the source of the fet Q2 and one end of the capacitor C16, the other end of the capacitor C15 is connected to the other end of the resistor R19, the other end of the resistor R22 is connected to the other end of the capacitor C17, the pin 3 of the transformer TR1 is connected to the common terminal, the pin 4 of the transformer TR1 is connected to one end of the differential mode filter inductor L1, the other end of the differential mode filter inductor L1 is connected to one end of the capacitor C18, one end of the resistor R24 and one end of the differential mode filter inductor L2, the other end of the differential mode filter inductor L2 is connected to one end of the capacitor C28 and one end of the resistor R34 and to the pin 1 of the interface J3, the pin 2 of the interface J2 is grounded, and the pin 2 of the interface J3 is connected to the common terminal, the other end of the capacitor C18 is simultaneously connected to one end of the capacitor C19, one end of the resistor R25 and the other end of the resistor R24, the other end of the capacitor C19 is simultaneously connected to one end of the capacitor C20, one end of the resistor R26 and the other end of the resistor R25, the other end of the capacitor C20 is simultaneously connected to one end of the capacitor C21, one end of the resistor R27 and the other end of the resistor R26, the other end of the capacitor C21 is simultaneously connected to one end of the capacitor C22, one end of the resistor R28 and the other end of the resistor R27, the other end of the capacitor C22 is simultaneously connected to one end of the capacitor C23, one end of the resistor R29 and the other end of the resistor R28, the other end of the capacitor C23 is simultaneously connected to one end of the capacitor C24, one end of the resistor R24 and the other end of the resistor R24, and the other end of the capacitor C24 is simultaneously connected to one end of the capacitor C24, One end of the resistor R31 is connected with the other end of the resistor R30, the other end of the capacitor C25 is simultaneously connected with one end of the capacitor C26, one end of the resistor R32 and the other end of the resistor R31, the other end of the capacitor C26 is simultaneously connected with one end of the capacitor C25, one end of the resistor R33 and the other end of the resistor R32, the other end of the capacitor C27 is connected with a common end, and the other end of the resistor R33 is connected with a common end; the other end of the capacitor C28 is simultaneously connected to one end of the capacitor C29, one end of the resistor R35 and the other end of the resistor R34, the other end of the capacitor C29 is simultaneously connected to one end of the capacitor C30, one end of the resistor R36 and the other end of the resistor R35, the other end of the capacitor C30 is simultaneously connected to one end of the capacitor C31, one end of the resistor R37 and the other end of the resistor R36, the other end of the capacitor C31 is simultaneously connected to one end of the capacitor C32, one end of the resistor R38 and the other end of the resistor R37, the other end of the capacitor C32 is simultaneously connected to one end of the capacitor C33, one end of the resistor R39 and the other end of the resistor R38, the other end of the capacitor C33 is simultaneously connected to one end of the capacitor C34, one end of the resistor R34 and the other end of the resistor R34, and the other end of the capacitor C34 is simultaneously connected to one end of the capacitor C34, One end of the resistor R41 is connected with the other end of the resistor R40, the other end of the capacitor C35 is connected with one end of the capacitor C36, one end of the resistor R42 and the other end of the resistor R41, the other end of the capacitor C36 is connected with one end of the capacitor C35, one end of the resistor R43 and the other end of the resistor R42, the other end of the capacitor C37 is connected with a common end, and the other end of the resistor R43 is connected with a common end.
Preferably, the power amplifier U1 is of the type IRS 2092.
Preferably, the present invention further comprises: a half-bridge inverter and a controllable high-voltage rectifier;
wherein the half-bridge inverter includes: the power supply comprises an energy storage capacitor C100, an energy storage capacitor C101, an energy storage capacitor C102, an energy storage capacitor C103, an MOS transistor Q10, an MOS transistor Q11, an MOS transistor Q12, an MOS transistor Q13, a positive half-cycle transformer and a negative half-cycle transformer;
the grid of the MOS transistor Q10, the grid of the MOS transistor Q11, the grid of the MOS transistor Q12 and the grid of the MOS transistor Q13 are connected with the output end of the SPWM high-voltage inverter, the input end of the positive half-cycle transformer is simultaneously connected with the drain of the MOS transistor Q10, the source of the MOS transistor Q11, the negative electrode of the energy storage capacitor C100 and the positive electrode of the energy storage capacitor C101, the input end of the negative half-cycle transformer is simultaneously connected with the drain of the MOS transistor Q12, the source of the MOS transistor Q13, the negative electrode of the energy storage capacitor C102 and the positive electrode of the energy storage capacitor C103, one output end of the positive half-cycle transformer is connected with the input end of the controllable high-voltage rectifier, one output end of the negative half-cycle transformer is connected with the input end of the controllable high-voltage rectifier, and the other output end of the positive half-cycle transformer and the other; the positive pole of energy storage capacitor C100 inserts operating voltage, energy storage capacitor C101's negative pole ground connection, energy storage capacitor C102's positive pole inserts operating voltage, energy storage capacitor C103's negative pole ground connection, MOS pipe Q10's source electrode inserts operating voltage, MOS pipe Q11's drain electrode ground connection, MOS pipe Q12's source electrode inserts operating voltage, MOS pipe Q13's drain electrode ground connection.
Preferably, the low-pass filtering and high-voltage sampling module is composed of a low-pass filtering circuit and a high-voltage sampling circuit, and includes: a capacitor C104, a resistor R100 and a resistor R101; the one end of electric capacity C104 with electric capacity C105's one end is connected and is connected with AD converter and SPWM high voltage inverter, resistance R100's one end with resistance R101's one end is connected and is connected with AD converter and SPWM high voltage inverter, electric capacity C104's the other end simultaneously with controllable high voltage rectifier's output with resistance R100's the other end is connected, another termination common port of resistance R101, electric capacity C105's another termination common port.
Preferably, the industrial personal computer is internally provided with a plurality of test modules, a user selects test contents from the industrial personal computer and sends the test contents to a CPU (DSP of TI company), the CPU selects data with different time sequences according to different test modules and sends the data to a DA, and a function generator is formed by combining a logic circuit; the function generator generates a modulation signal and a carrier signal required by the SPWM, and outputs a driving signal of the MOSFET after passing through the SPWM and the level shift circuit.
Preferably, the energy storage capacitor C100, the energy storage capacitor C101, the energy storage capacitor C102, the energy storage capacitor C103, the MOS transistor Q10, the MOS transistor Q11, the MOS transistor Q12, the MOS transistor Q13, the positive half-cycle transformer and the negative half-cycle transformer form a half-bridge inverter, the high-frequency step-up transformer can reduce the size, and output the required amplitude with high efficiency; the output signal is filtered by a controllable high-voltage rectifier and a low pass filter to obtain the required test voltage.
A measurement method of a cable dielectric loss measurement device working at an ultra-low frequency band test voltage aims at achieving the purpose of evaluating the aging level of a cable by using dielectric loss parameters, and the required test voltage is measured according to the field test instruction of a shielded power cable system using ultra-low frequency (VLF) of ANSI/IEEE 400.2-2004, and the measurement method comprises the following specific steps:
step 2, the CPU selects data with different time sequences according to different test modules and sends the data to the DA, and a function generator is formed by combining a logic circuit;
step 3, generating a modulation signal and a carrier signal required by the SPWM high-voltage inverter by a function generator, and outputting a driving signal of the MOSFET after passing through the SPWM high-voltage inverter and a level transfer circuit;
step 4, the two MOSFETs, the energy storage capacitor and the high-frequency transformer form a half-bridge inverter, the high-frequency boosting transformer can reduce the size, and the required amplitude is output efficiently;
step 5, the output signal is subjected to low-pass filtering through a controllable high-voltage rectifier to obtain the required test voltage;
step 6, the controllable high-voltage rectifier is controlled by the DSP, the positive half cycle and the negative half cycle are conducted in turn, and the working time of the half bridge is correspondingly controlled;
7, filtering the carrier signal by low-pass filtering, and restoring a modulation signal which is the required test voltage;
step 8, acquiring a high-voltage sampling signal from the low-pass filter circuit, and distributing the high-voltage sampling signal to the front section of the modulation circuit to form a feedback signal so as to improve the load capacity;
step 9, the other path is sent to AD, and the voltage part of the output signal is measured;
step 10, current is obtained by a through mutual inductor sleeved on an output loop, and the DSP carries out fast Fourier transform on voltage and current signals to obtain assignment and phase of fundamental waves, so that a loss angle is calculated, and a tangent value (dielectric loss) is further calculated;
step 11, performing line test evaluation;
step 12, if the power frequency voltage is used for testing, the required current is as follows:
wherein I is current and U is voltage.
Preferably, according to test evaluation of a 10KV medium-voltage line, the amplitude of the required test voltage is 0.5-1.2 Un, and the required effective voltage value is 12 KV;
when the equivalent capacitance of the test cable is 5uF, if the power frequency voltage is used for testing, the required current is as follows:
if the frequency of the invention is set to be 0.1HZ by using an ultra-low frequency test power supply, the required test current is as follows:
the power to be supplied:
thus, it follows: the volume and the weight of 226KW test equipment bring great troubles to the test, and 452W equipment can be portable; it is thus possible to carry out ageing level tests for 10km cables.
Preferably, a direct measurement method is adopted, and the dielectric loss is calculated by measuring a dielectric loss angle; for an ultralow frequency dielectric loss tester based on the direct measurement principle, a standard capacitor is connected with a tested object in parallel, the current flowing through a branch of the standard capacitor and the tested object is directly measured, the phase relation (namely the dielectric loss angle delta) between the test currents is obtained through Fourier conversion and processing of a computer processing central analysis system, and the capacitance and the dielectric loss value of the tested object are calculated.
Preferably, the industrial personal computer stores each test result in a database, and obtains the change trend of the dielectric loss parameters of the cable, the Stability of dielectric loss along time (VLF-TD Stability), the dielectric loss change rate (DTD) and the dielectric loss average value (TD)) according to historical data; and accordingly gives the degree of cable aging.
Has the advantages that: the invention adopts a way of boosting a high-frequency transformer driven by a switch power amplifier to realize the ultralow-frequency sine wave medium-voltage test voltage; insulation damage can be caused by the influence of temperature, humidity, oil corrosion, manpower damage and the like of the natural environment on the cable in the operation process, and accidents can be caused when the cable is damaged to a certain degree; in order to avoid accidents, the performance of the cable is subjected to preventive tests at present, and the evaluation is still carried out in ways of insulation resistance, insulation withstand voltage, resistance ratio and the like at home; but the evaluation is carried out by carrying out ultralow frequency dielectric loss test more and more internationally; because the method has the characteristics of sensitive indexes, low requirement on the capacity of a test power supply, portable equipment and the like, the problems of cable moisture, water tree aging and the like can be sensitively reflected through the indexes such as dielectric loss absolute measurement value, dielectric loss change rate, dielectric loss transient stability and the like; at present, the system for evaluating the aging performance of the ultralow-frequency dielectric loss cable used in China is basically from Germany and Austrian, and similar products do not exist in China; in order to fill this gap, we have made this invention; at present, the price of the product on the national network is 100 ten thousand, and although the product is tried out, the product is not completely spread; however, the application of the product brings great benefits to the society for power enterprises, and the future popularization is imperative; the success of the invention also brings great benefits to the enterprises in China.
Drawings
Fig. 1 is a schematic block diagram of the present invention.
Fig. 2 is an SPWM high voltage inverter of the present invention.
Fig. 3 is a diagram of a background art of the present invention.
Fig. 4 is a schematic block diagram of the direct measurement tester of the present invention.
Fig. 5 is a schematic diagram of the practical use of the present invention.
Detailed Description
In this embodiment, as shown in fig. 1, a device and a method for measuring dielectric loss of a cable operating at an ultra-low frequency band test voltage includes: the device comprises an industrial personal computer, a digital circuit module, an inversion module, a low-pass filtering and high-voltage sampling module, a half-bridge inverter and a controllable high-voltage rectifier.
In a further embodiment, the inverter module comprises an SPWM high voltage inverter; the SPWM high-voltage inverter includes: power amplifier U1, interface J1, interface J2, interface J3, resistor R9, resistor R7, resistor R8, capacitor C7, MOS transistor Q1, LED diode D1, resistor R3, capacitor C1, resistor R1, capacitor C2, capacitor C3, resistor R2, capacitor C4, resistor R6, diode D2, capacitor C5, capacitor C6, resistor R5, resistor R4, resistor R10, resistor R11, resistor R12, resistor R13, diode D4, capacitor C13, capacitor C14, capacitor C10, resistor R20, diode D3, resistor R14, resistor R18, resistor R17, resistor R15, resistor R16, capacitor C18, capacitor C9, resistor R21, LED diode D21, fet Q21, resistor R21, differential resistor R21, capacitor C21, resistor R21, inductor R21, resistor R21, differential resistor R21, inductor R72, differential resistor R72, resistor R21, differential resistor R21, resistor R72, differential resistor R72, and resistor R21, The circuit comprises a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a capacitor C18, a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C31, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C35, a capacitor C36 and a capacitor C37.
In a further embodiment, pin No. 1 of the power amplifier U1 is connected to one end of the capacitor C1 and the drain of the MOS transistor Q1 at the same time, and a +5V voltage is input to one end of the capacitor C1, pin No. 2 of the power amplifier U1 is connected to the other end of the capacitor C1, one end of the capacitor C2, and one end of the resistor R1 at the same time and grounded, pin No. 4 of the power amplifier U1 is connected to the other end of the capacitor C2 and one end of the capacitor C3 at the same time, the other end of the resistor R1 is connected to one end of the resistor R3527, the other end of the resistor R2 is connected to the other end of the capacitor C3 and one end of the capacitor C4 at the same time, pin No. 3 of the power amplifier U1 is connected to the other end of the capacitor C4, one end of the resistor R7, and one end of the resistor R9 at the same time, and pin No. 5 of the power amplifier U1 is connected to one end, One end of the resistor R6 is connected to the gate of the MOS transistor Q1, the other end of the resistor R6 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the SD terminal, the source of the MOS transistor Q1 is connected to the anode of the LED diode D1, the cathode of the LED diode D1 is connected to one end of the resistor R3, the other end of the resistor R3 is grounded, the pin No. 6 of the power amplifier U1 is connected to the other end of the capacitor C5, one end of the capacitor C6 and one end of the resistor R5 at the same time and a ground voltage is input, the pin No. 7 of the power amplifier U1 is connected to one end of the resistor R4, the other end of the capacitor C6 is grounded, the pin No. 8 of the power amplifier U1 is connected to the other end of the resistor R5 and the other end of the resistor R4, the pin No. 2 of the interface J1 is connected to the other end of the resistor R9, and the pin No. 3 of the interface J1 is grounded, one end of the capacitor C7 is connected to the other end of the resistor R9 and one end of the resistor R8, the other end of the capacitor C7 is grounded, the pin 9 of the amplifier U1 is connected to one end of the resistor R16 and one end of the resistor R15, the other end of the resistor R16 is connected to the pin 1 of the interface J2, the pin 10 of the amplifier U1 is connected to the negative electrode of the LED diode D5, the drain of the fet Q3, one end of the capacitor C11, one end of the capacitor C12, the other end of the capacitor C16 and one end of the capacitor C17, the other end of the capacitor C11 is grounded, the other end of the capacitor C12 is grounded, the positive electrode of the LED diode D5 is connected to one end of the resistor R21, the pin 11 of the amplifier U1 is connected to one end of the resistor R14, the pin 48312 of the amplifier U1 is connected to one end of the resistor R15, One end of the capacitor C8 and one end of the resistor R17 are connected and connected to a power supply voltage, the other end of the resistor R17 is connected to one end of the resistor R18 and one end of the capacitor C9 at the same time, the other end of the capacitor C9 is connected to pin No. 1 of an interface J2, the other end of the capacitor C8 is connected to pin No. 1 of an interface J2 in reverse, the other end of the resistor R18 is connected to the anode of the diode D3, the other end of the resistor R14 is connected to the other end of the resistor R21 and the gate of the fet Q3 at the same time, pin No. 13 of the power amplifier U1 is connected to one end of the capacitor C10, one end of the resistor R9, the source of the fet Q3, the drain of the fet Q2, one end of the resistor R19, one end of the resistor R22, the other end of the resistor R8 and pin No. 2 of the transformer TR1, the other end of the resistor R23 is grounded, the pin No. 14 of the amplifier U1 is connected with one end of the resistor R20, the other end of the resistor R20 is connected with the gate of the FET Q2, the pin No. 15 of the amplifier U1 is connected with one end of the resistor R10, one end of the resistor R11, the cathode of the diode D3 and the other end of the capacitor C10, the pin No. 16 of the amplifier U1 is connected with one end of the resistor R12 and the other end of the resistor R13, the other end of the resistor R12 is connected with the other end of the resistor R11 and the anode of the diode D4, the cathode of the diode D4 is connected with the other end of the resistor R10 and one end of the capacitor C13 and with the pin No. 3 of the interface J2, one end of the capacitor C14 is connected with one end of the capacitor C13 and the source of the FET Q2 and with the pin No. 3 of the interface J2, the other end of the capacitor C13 is grounded, the other end of the capacitor C14 is grounded, one end of the capacitor C15 is connected to the source of the fet Q2 and one end of the capacitor C16, the other end of the capacitor C15 is connected to the other end of the resistor R19, the other end of the resistor R22 is connected to the other end of the capacitor C17, the pin 3 of the transformer TR1 is connected to the common terminal, the pin 4 of the transformer TR1 is connected to one end of the differential mode filter inductor L1, the other end of the differential mode filter inductor L1 is connected to one end of the capacitor C18, one end of the resistor R24 and one end of the differential mode filter inductor L2, the other end of the differential mode filter inductor L2 is connected to one end of the capacitor C28 and one end of the resistor R34 and to the pin 1 of the interface J3, the pin 2 of the interface J2 is grounded, and the pin 2 of the interface J3 is connected to the common terminal, the other end of the capacitor C18 is simultaneously connected to one end of the capacitor C19, one end of the resistor R25 and the other end of the resistor R24, the other end of the capacitor C19 is simultaneously connected to one end of the capacitor C20, one end of the resistor R26 and the other end of the resistor R25, the other end of the capacitor C20 is simultaneously connected to one end of the capacitor C21, one end of the resistor R27 and the other end of the resistor R26, the other end of the capacitor C21 is simultaneously connected to one end of the capacitor C22, one end of the resistor R28 and the other end of the resistor R27, the other end of the capacitor C22 is simultaneously connected to one end of the capacitor C23, one end of the resistor R29 and the other end of the resistor R28, the other end of the capacitor C23 is simultaneously connected to one end of the capacitor C24, one end of the resistor R24 and the other end of the resistor R24, and the other end of the capacitor C24 is simultaneously connected to one end of the capacitor C24, One end of the resistor R31 is connected with the other end of the resistor R30, the other end of the capacitor C25 is simultaneously connected with one end of the capacitor C26, one end of the resistor R32 and the other end of the resistor R31, the other end of the capacitor C26 is simultaneously connected with one end of the capacitor C25, one end of the resistor R33 and the other end of the resistor R32, the other end of the capacitor C27 is connected with a common end, and the other end of the resistor R33 is connected with a common end; the other end of the capacitor C28 is simultaneously connected to one end of the capacitor C29, one end of the resistor R35 and the other end of the resistor R34, the other end of the capacitor C29 is simultaneously connected to one end of the capacitor C30, one end of the resistor R36 and the other end of the resistor R35, the other end of the capacitor C30 is simultaneously connected to one end of the capacitor C31, one end of the resistor R37 and the other end of the resistor R36, the other end of the capacitor C31 is simultaneously connected to one end of the capacitor C32, one end of the resistor R38 and the other end of the resistor R37, the other end of the capacitor C32 is simultaneously connected to one end of the capacitor C33, one end of the resistor R39 and the other end of the resistor R38, the other end of the capacitor C33 is simultaneously connected to one end of the capacitor C34, one end of the resistor R34 and the other end of the resistor R34, and the other end of the capacitor C34 is simultaneously connected to one end of the capacitor C34, One end of the resistor R41 is connected with the other end of the resistor R40, the other end of the capacitor C35 is simultaneously connected with one end of the capacitor C36, one end of the resistor R42 and the other end of the resistor R41, the other end of the capacitor C36 is simultaneously connected with one end of the capacitor C35, one end of the resistor R43 and the other end of the resistor R42, the other end of the capacitor C37 is connected with a common end, and the other end of the resistor R43 is connected with a common end; the power amplifier U1 is model IRS 2092.
In a further embodiment, a half-bridge inverter comprises: the power supply comprises an energy storage capacitor C100, an energy storage capacitor C101, an energy storage capacitor C102, an energy storage capacitor C103, a MOS transistor Q10, a MOS transistor Q11, a MOS transistor Q12, a MOS transistor Q13, a positive half-cycle transformer and a negative half-cycle transformer.
In a further embodiment, the gate of the MOS transistor Q10, the gate of the MOS transistor Q11, the gate of the MOS transistor Q12, and the gate of the MOS transistor Q13 are connected to the output end of the SPWM high-voltage inverter, the input end of the positive half-cycle transformer is connected to the drain of the MOS transistor Q10, the source of the MOS transistor Q11, the cathode of the energy-storage capacitor C100, and the anode of the energy-storage capacitor C101, the input end of the negative half-cycle transformer is connected to the drain of the MOS transistor Q12, the source of the MOS transistor Q13, the cathode of the energy-storage capacitor C102, and the anode of the energy-storage capacitor C103, one output end of the positive half-cycle transformer is connected to the input end of the controllable high-voltage rectifier, one output end of the negative half-cycle transformer is connected to the input end of the controllable high-voltage rectifier, and the other output end of the positive half-cycle transformer and the output; the positive pole of energy storage capacitor C100 inserts operating voltage, energy storage capacitor C101's negative pole ground connection, energy storage capacitor C102's positive pole inserts operating voltage, energy storage capacitor C103's negative pole ground connection, MOS pipe Q10's source electrode inserts operating voltage, MOS pipe Q11's drain electrode ground connection, MOS pipe Q12's source electrode inserts operating voltage, MOS pipe Q13's drain electrode ground connection.
In a further embodiment, the low-pass filtering and high-voltage sampling module is composed of a low-pass filtering circuit and a high-voltage sampling circuit, and comprises: capacitor C104, resistor R100, resistor R101.
In a further embodiment, one end of the capacitor C104 is connected to one end of the capacitor C105 and connected to the AD converter and the SPWM high voltage inverter, one end of the resistor R100 is connected to one end of the resistor R101 and connected to the AD converter and the SPWM high voltage inverter, the other end of the capacitor C104 is connected to both the output end of the controllable high voltage rectifier and the other end of the resistor R100, the other end of the resistor R101 is connected to the common terminal, and the other end of the capacitor C105 is connected to the common terminal.
In a further embodiment, a plurality of test modules are arranged in the industrial personal computer, a user selects test contents from the industrial personal computer and sends the test contents to a CPU (DSP of TI company), the CPU selects data with different time sequences according to different test modules and sends the data to a DA, and a function generator is formed by combining a logic circuit; the function generator generates a modulation signal and a carrier signal required by the SPWM, and outputs a driving signal of the MOSFET after passing through the SPWM and the level shift circuit.
In a further embodiment, the energy storage capacitor C100, the energy storage capacitor C101, the energy storage capacitor C102, the energy storage capacitor C103, the MOS transistor Q10, the MOS transistor Q11, the MOS transistor Q12, the MOS transistor Q13, the positive half-cycle transformer and the negative half-cycle transformer form a half-bridge inverter, and the high-frequency step-up transformer can reduce the volume and output the required amplitude with high efficiency; the output signal is filtered by a controllable high-voltage rectifier and a low pass filter to obtain the required test voltage.
A measurement method of a cable dielectric loss measurement device working at an ultra-low frequency band test voltage aims at achieving the purpose of evaluating the aging level of a cable by using dielectric loss parameters, and the required test voltage is measured according to the field test instruction of a shielded power cable system using ultra-low frequency (VLF) of ANSI/IEEE 400.2-2004, and the measurement method comprises the following specific steps:
step 2, the CPU selects data with different time sequences according to different test modules and sends the data to the DA, and a function generator is formed by combining a logic circuit;
step 3, generating a modulation signal and a carrier signal required by the SPWM high-voltage inverter by a function generator, and outputting a driving signal of the MOSFET after passing through the SPWM high-voltage inverter and a level transfer circuit;
step 4, the two MOSFETs, the energy storage capacitor and the high-frequency transformer form a half-bridge inverter, the high-frequency boosting transformer can reduce the size, and the required amplitude is output efficiently;
step 5, the output signal is subjected to low-pass filtering through a controllable high-voltage rectifier to obtain the required test voltage;
step 6, the controllable high-voltage rectifier is controlled by the DSP, the positive half cycle and the negative half cycle are conducted in turn, and the working time of the half bridge is correspondingly controlled;
7, filtering the carrier signal by low-pass filtering, and restoring a modulation signal which is the required test voltage;
step 8, acquiring a high-voltage sampling signal from the low-pass filter circuit, and distributing the high-voltage sampling signal to the front section of the modulation circuit to form a feedback signal so as to improve the load capacity;
step 9, the other path is sent to AD, and the voltage part of the output signal is measured;
step 10, current is obtained by a through mutual inductor sleeved on an output loop, and the DSP carries out fast Fourier transform on voltage and current signals to obtain assignment and phase of fundamental waves, so that a loss angle is calculated, and a tangent value (dielectric loss) is further calculated;
step 11, performing line test evaluation;
step 12, if the power frequency voltage is used for testing, the required current is as follows:
wherein I is current and U is voltage.
In a further embodiment, according to test evaluation of a 10KV medium-voltage line, the amplitude of the required test voltage is 0.5-1.2 Un, and the required effective voltage value is 12 KV;
when the equivalent capacitance of the test cable is 5uF, if the power frequency voltage is used for testing, the required current is as follows:
if the frequency of the invention is set to be 0.1HZ by using an ultra-low frequency test power supply, the required test current is as follows:
the power to be supplied:
thus, it follows: the volume and the weight of 226KW test equipment bring great troubles to the test, and 452W equipment can be portable; it is thus possible to carry out ageing level tests for 10km cables.
In a further embodiment, a direct measurement is used, the dielectric loss being calculated by measuring the dielectric loss angle; for an ultralow frequency dielectric loss tester based on the direct measurement principle, a standard capacitor is connected with a tested object in parallel, the current flowing through a branch of the standard capacitor and the tested object is directly measured, the phase relation (namely the dielectric loss angle delta) between the test currents is obtained through Fourier conversion and processing of a computer processing central analysis system, and the capacitance and the dielectric loss value of the tested object are calculated.
In a further embodiment, the industrial personal computer stores the test result of each time into a database, and obtains the variation trend of the dielectric loss parameters of the cable according to historical data, and the Stability of dielectric loss along time (VLF-TD Stability), the variation rate of dielectric loss (DTD) and the average value of dielectric loss (TD)); and accordingly gives the degree of cable aging.
The working principle is as follows: the industrial personal computer is internally provided with a plurality of test modules, a user selects test contents from the industrial personal computer and sends the test contents to a CPU (DSP of TI company), the CPU selects data with different time sequences according to different test modules and sends the data to a DA, and a logic circuit is combined to form a function generator; the function generator generates a modulation signal and a carrier signal required by the SPWM, and outputs a driving signal of the MOSFET after passing through the SPWM and the level shift circuit; the two MOSFETs, the energy storage capacitor and the high-frequency transformer form a half-bridge inverter, and the high-frequency boosting transformer can reduce the volume and output the required amplitude with high efficiency. The output signal is filtered by a controllable high-voltage rectifier and a low pass filter to obtain the required test voltage; the controllable high-voltage rectifier is controlled by the DSP, the positive half cycle and the negative half cycle are conducted in turn, and the half-bridge working time is correspondingly controlled; filtering the carrier signal by low-pass filtering, and restoring a modulation signal which is the required test voltage; the high-voltage sampling signal is obtained from the low-pass filter circuit and is sent to the front section of the modulation circuit to form a feedback signal so as to improve the load capacity; the other path is sent to AD, and the voltage part of the output signal is measured. The current is obtained by a straight-through transformer sleeved on an output loop, and the DSP carries out fast Fourier transform on the voltage and current signals to obtain the assignment and the phase of the fundamental wave, so that the loss angle is calculated, and the tangent value (dielectric loss) is further calculated;
the industrial personal computer stores the test result of each time in a database, and obtains the variation trend of the dielectric loss parameters of the cable, the Stability of dielectric loss with time (VLF-TD Stability), the dielectric loss variation rate (DTD) and the dielectric loss average value (TD) according to historical data. And accordingly gives the degree of cable aging.
It should be noted that the various features described in the above embodiments may be combined in any suitable manner without departing from the scope of the invention. The invention is not described in detail in order to avoid unnecessary repetition.
Claims (10)
1. A cable dielectric loss measuring device working at ultra-low frequency test voltage is characterized by comprising:
an industrial personal computer; the main part of man-machine interaction, the setting of test parameters and information, the setting of test modes, the result of test analysis and the storage of data are all finished by an industrial personal computer;
the device digital circuit module is used for signal generation, output quantity measurement and logic control work;
the inversion module is used for converting direct-current voltage into alternating-current voltage;
the low-pass filtering and high-voltage sampling module is used for allowing signals below a cut-off frequency to pass through, and preventing signals above the cut-off frequency from passing through; and is used for collecting high-voltage signals;
wherein, device digital circuit module includes: CPU, AD converter, DA converter.
2. The apparatus of claim 1, wherein the inverter module comprises an SPWM high voltage inverter; the SPWM high-voltage inverter includes: power amplifier U1, interface J1, interface J2, interface J3, resistor R9, resistor R7, resistor R8, capacitor C7, MOS transistor Q1, LED diode D1, resistor R3, capacitor C1, resistor R1, capacitor C2, capacitor C3, resistor R2, capacitor C4, resistor R6, diode D2, capacitor C5, capacitor C6, resistor R5, resistor R4, resistor R10, resistor R11, resistor R12, resistor R13, diode D4, capacitor C13, capacitor C14, capacitor C10, resistor R20, diode D3, resistor R14, resistor R18, resistor R17, resistor R15, resistor R16, capacitor C18, capacitor C9, resistor R21, LED diode D21, fet Q21, resistor R21, differential resistor R21, capacitor C21, resistor R21, inductor R21, resistor R21, differential resistor R21, inductor R72, differential resistor R72, resistor R21, differential resistor R21, resistor R72, differential resistor R72, and resistor R21, A resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, a resistor R33, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a capacitor C18, a capacitor C19, a capacitor C20, a capacitor C21, a capacitor C22, a capacitor C23, a capacitor C24, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C28, a capacitor C29, a capacitor C30, a capacitor C31, a capacitor C32, a capacitor C33, a capacitor C34, a capacitor C35, a capacitor C36 and a capacitor C37;
pin No. 1 of the power amplifier U1 is connected to one end of the capacitor C1 and the drain of the MOS transistor Q1 at the same time, and +5V is input to one end of the capacitor C1, pin No. 2 of the power amplifier U1 is connected to the other end of the capacitor C1, one end of the capacitor C2, and one end of the resistor R1 at the same time, and is grounded, pin No. 4 of the power amplifier U1 is connected to the other end of the capacitor C2 and one end of the capacitor C3 at the same time, the other end of the resistor R1 is connected to one end of the resistor R2, the other end of the resistor R2 is connected to the other end of the capacitor C3 and one end of the capacitor C4 at the same time, pin No. 3 of the power amplifier U1 is connected to the other end of the capacitor C4, one end of the resistor R7, and one end of the resistor R9 at the same time, pin No. 5 of the power amplifier U2 is connected to one end of the capacitor C5, one end of the resistor R6353, and one end of, the other end of the resistor R6 is connected to the anode of the diode D2, the cathode of the diode D2 is connected to the SD terminal, the source of the MOS transistor Q1 is connected to the anode of the LED diode D1, the cathode of the LED diode D1 is connected to one end of the resistor R3, the other end of the resistor R3 is grounded, the pin No. 6 of the power amplifier U1 is simultaneously connected to the other end of the capacitor C5, one end of the capacitor C6 and one end of the resistor R5, and a ground voltage is input thereto, the pin No. 7 of the power amplifier U1 is connected to one end of the resistor R4, the other end of the capacitor C6 is grounded, the pin No. 8 of the power amplifier U1 is simultaneously connected to the other end of the resistor R5 and the other end of the resistor R4, the pin No. 2 of the interface J1 is connected to the other end of the resistor R9, the pin No. 3 of the interface J1 is grounded, one end of the capacitor C7 is simultaneously connected to one end of the resistor R8 and one end of the resistor R9, the other end of the capacitor C7 is grounded, the pin No. 9 of the power amplifier U1 is connected to one end of the resistor R16 and one end of the resistor R15 at the same time, the other end of the resistor R16 is connected to the pin No. 1 of the interface J2, the pin No. 10 of the power amplifier U1 is connected to the negative electrode of the LED diode D5, the drain of the fet Q3, one end of the capacitor C11, one end of the capacitor C12, the other end of the capacitor C16 and one end of the capacitor C17 at the same time, the other end of the capacitor C11 is grounded, the other end of the capacitor C12 is grounded, the positive electrode of the LED diode D5 is connected to one end of the resistor R21, the pin No. 11 of the power amplifier U1 is connected to one end of the resistor R14, the pin No. 12 of the power amplifier U1 is connected to one end of the resistor R15, one end of the capacitor C8 and one end of the resistor R17 at the same time and is connected to a, the other end of the resistor R17 is connected to one end of the resistor R18 and one end of the capacitor C9, the other end of the capacitor C9 is connected to pin 1 of an interface J2, the other end of the capacitor C8 is connected to pin 1 of an interface J2 in a reverse manner, the other end of the resistor R18 is connected to the anode of the diode D3, the other end of the resistor R14 is connected to the other end of the resistor R21 and the gate of the fet Q3, pin 13 of the power amplifier U1 is connected to one end of the capacitor C10, one end of the resistor R13, the source of the fet Q3, the drain of the fet Q2, one end of the resistor R19, one end of the resistor R22, the other end of the resistor R8 and pin 2 of the transformer TR1, pin 1 of the transformer TR1 is connected to one end of the resistor R23, and the other end of the resistor R23 is grounded, pin No. 14 of the power amplifier U1 is connected to one end of the resistor R20, the other end of the resistor R20 is connected to the gate of the fet Q2, pin No. 15 of the power amplifier U1 is connected to one end of the resistor R10, one end of the resistor R11, the cathode of the diode D3, and the other end of the capacitor C10, pin No. 16 of the power amplifier U1 is connected to one end of the resistor R12 and the other end of the resistor R13, the other end of the resistor R12 is connected to the other end of the resistor R11 and the anode of the diode D4, the cathode of the diode D4 is connected to the other end of the resistor R10 and one end of the capacitor C13 and to pin No. 3 of the interface J2, and one end of the capacitor C14 is connected to one end of the capacitor C13 and the source of the fet Q2 and to pin No. 3 of the interface J2, the other end of the capacitor C13 is grounded, the other end of the capacitor C14 is grounded, one end of the capacitor C15 is connected to the source of the fet Q2 and one end of the capacitor C16, the other end of the capacitor C15 is connected to the other end of the resistor R19, the other end of the resistor R22 is connected to the other end of the capacitor C17, the pin 3 of the transformer TR1 is connected to the common terminal, the pin 4 of the transformer TR1 is connected to one end of the differential mode filter inductor L1, the other end of the differential mode filter inductor L1 is connected to one end of the capacitor C18, one end of the resistor R24 and one end of the differential mode filter inductor L2, the other end of the differential mode filter inductor L2 is connected to one end of the capacitor C28 and one end of the resistor R34 and to the pin 1 of the interface J3, the pin 2 of the interface J2 is grounded, and the pin 2 of the interface J3 is connected to the common terminal, the other end of the capacitor C18 is simultaneously connected to one end of the capacitor C19, one end of the resistor R25 and the other end of the resistor R24, the other end of the capacitor C19 is simultaneously connected to one end of the capacitor C20, one end of the resistor R26 and the other end of the resistor R25, the other end of the capacitor C20 is simultaneously connected to one end of the capacitor C21, one end of the resistor R27 and the other end of the resistor R26, the other end of the capacitor C21 is simultaneously connected to one end of the capacitor C22, one end of the resistor R28 and the other end of the resistor R27, the other end of the capacitor C22 is simultaneously connected to one end of the capacitor C23, one end of the resistor R29 and the other end of the resistor R28, the other end of the capacitor C23 is simultaneously connected to one end of the capacitor C24, one end of the resistor R24 and the other end of the resistor R24, and the other end of the capacitor C24 is simultaneously connected to one end of the capacitor C24, One end of the resistor R31 is connected with the other end of the resistor R30, the other end of the capacitor C25 is simultaneously connected with one end of the capacitor C26, one end of the resistor R32 and the other end of the resistor R31, the other end of the capacitor C26 is simultaneously connected with one end of the capacitor C25, one end of the resistor R33 and the other end of the resistor R32, the other end of the capacitor C27 is connected with a common end, and the other end of the resistor R33 is connected with a common end; the other end of the capacitor C28 is simultaneously connected to one end of the capacitor C29, one end of the resistor R35 and the other end of the resistor R34, the other end of the capacitor C29 is simultaneously connected to one end of the capacitor C30, one end of the resistor R36 and the other end of the resistor R35, the other end of the capacitor C30 is simultaneously connected to one end of the capacitor C31, one end of the resistor R37 and the other end of the resistor R36, the other end of the capacitor C31 is simultaneously connected to one end of the capacitor C32, one end of the resistor R38 and the other end of the resistor R37, the other end of the capacitor C32 is simultaneously connected to one end of the capacitor C33, one end of the resistor R39 and the other end of the resistor R38, the other end of the capacitor C33 is simultaneously connected to one end of the capacitor C34, one end of the resistor R34 and the other end of the resistor R34, and the other end of the capacitor C34 is simultaneously connected to one end of the capacitor C34, One end of the resistor R41 is connected with the other end of the resistor R40, the other end of the capacitor C35 is connected with one end of the capacitor C36, one end of the resistor R42 and the other end of the resistor R41, the other end of the capacitor C36 is connected with one end of the capacitor C35, one end of the resistor R43 and the other end of the resistor R42, the other end of the capacitor C37 is connected with a common end, and the other end of the resistor R43 is connected with a common end.
3. The apparatus as claimed in claim 2, wherein the power amplifier U1 is of type IRS 2092.
4. The apparatus of claim 1, further comprising: a half-bridge inverter and a controllable high-voltage rectifier;
wherein the half-bridge inverter includes: the power supply comprises an energy storage capacitor C100, an energy storage capacitor C101, an energy storage capacitor C102, an energy storage capacitor C103, an MOS transistor Q10, an MOS transistor Q11, an MOS transistor Q12, an MOS transistor Q13, a positive half-cycle transformer and a negative half-cycle transformer;
the grid of the MOS transistor Q10, the grid of the MOS transistor Q11, the grid of the MOS transistor Q12 and the grid of the MOS transistor Q13 are connected with the output end of the SPWM high-voltage inverter, the input end of the positive half-cycle transformer is simultaneously connected with the drain of the MOS transistor Q10, the source of the MOS transistor Q11, the negative electrode of the energy storage capacitor C100 and the positive electrode of the energy storage capacitor C101, the input end of the negative half-cycle transformer is simultaneously connected with the drain of the MOS transistor Q12, the source of the MOS transistor Q13, the negative electrode of the energy storage capacitor C102 and the positive electrode of the energy storage capacitor C103, one output end of the positive half-cycle transformer is connected with the input end of the controllable high-voltage rectifier, one output end of the negative half-cycle transformer is connected with the input end of the controllable high-voltage rectifier, and the other output end of the positive half-cycle transformer and the other; the positive pole of energy storage capacitor C100 inserts operating voltage, energy storage capacitor C101's negative pole ground connection, energy storage capacitor C102's positive pole inserts operating voltage, energy storage capacitor C103's negative pole ground connection, MOS pipe Q10's source electrode inserts operating voltage, MOS pipe Q11's drain electrode ground connection, MOS pipe Q12's source electrode inserts operating voltage, MOS pipe Q13's drain electrode ground connection.
5. The apparatus as claimed in claim 1, wherein the low pass filtering and high voltage sampling module comprises a low pass filtering circuit and a high voltage sampling circuit, and comprises: a capacitor C104, a resistor R100 and a resistor R101; the one end of electric capacity C104 with electric capacity C105's one end is connected and is connected with AD converter and SPWM high voltage inverter, resistance R100's one end with resistance R101's one end is connected and is connected with AD converter and SPWM high voltage inverter, electric capacity C104's the other end simultaneously with controllable high voltage rectifier's output with resistance R100's the other end is connected, another termination common port of resistance R101, electric capacity C105's another termination common port.
6. The cable dielectric loss measuring device working at the ultralow frequency band test voltage according to claim 4, wherein a plurality of test modules are arranged in the industrial personal computer, a user selects test contents from the industrial personal computer and sends the test contents to a CPU (DSP of TI company), the CPU selects data with different time sequences according to different test modules and sends the data to a DA, and a function generator is formed by combining a logic circuit; the function generator generates a modulation signal and a carrier signal required by the SPWM, and outputs a driving signal of the MOSFET after passing through the SPWM and the level shift circuit.
7. The cable dielectric loss measuring device of claim 5, wherein the energy storage capacitor C100, the energy storage capacitor C101, the energy storage capacitor C102, the energy storage capacitor C103, the MOS transistor Q10, the MOS transistor Q11, the MOS transistor Q12, the MOS transistor Q13, the positive half-cycle transformer and the negative half-cycle transformer form a half-bridge inverter, the high-frequency step-up transformer can reduce the volume and output the required amplitude at high efficiency; the output signal is filtered by a controllable high-voltage rectifier and a low pass filter to obtain the required test voltage.
8. A method for measuring the dielectric loss of the cable working at the ultra-low frequency band test voltage according to any one of claims 2 to 7, wherein; in order to achieve the purpose of evaluating the aging level of the cable by using the dielectric loss parameter, the required test voltage is measured according to the field test instruction of a shielded power cable system using ultra low frequency (VLF) of ANSI/IEEE 400.2-2004, and the measuring method comprises the following specific steps:
step 1, because the industrial personal computer is internally provided with a plurality of test modules, a user selects test contents from the industrial personal computer and sends the test contents to the CPU;
step 2, the CPU selects data with different time sequences according to different test modules and sends the data to the DA, and a function generator is formed by combining a logic circuit;
step 3, generating a modulation signal and a carrier signal required by the SPWM high-voltage inverter by a function generator, and outputting a driving signal of the MOSFET after passing through the SPWM high-voltage inverter and a level transfer circuit;
step 4, the two MOSFETs, the energy storage capacitor and the high-frequency transformer form a half-bridge inverter, the high-frequency boosting transformer can reduce the size, and the required amplitude is output efficiently;
step 5, the output signal is subjected to low-pass filtering through a controllable high-voltage rectifier to obtain the required test voltage;
step 6, the controllable high-voltage rectifier is controlled by the DSP, the positive half cycle and the negative half cycle are conducted in turn, and the working time of the half bridge is correspondingly controlled;
7, filtering the carrier signal by low-pass filtering, and restoring a modulation signal which is the required test voltage;
step 8, acquiring a high-voltage sampling signal from the low-pass filter circuit, and distributing the high-voltage sampling signal to the front section of the modulation circuit to form a feedback signal so as to improve the load capacity;
step 9, the other path is sent to AD, and the voltage part of the output signal is measured;
step 10, current is obtained by a feedthrough transformer sleeved on an output loop, and the DSP performs fast Fourier transform on voltage and current signals to obtain assignment and phase of fundamental waves, so that a loss angle is calculated, and a tangent value is calculated;
step 11, performing line test evaluation;
step 12, if the power frequency voltage is used for testing, the required current is as follows:
wherein I is current and U is voltage.
9. The method for measuring the dielectric loss measurement device of the cable working at the ultralow frequency band test voltage according to claim 8, wherein a direct measurement method is adopted, and the dielectric loss is calculated by measuring a dielectric loss angle; for the ultralow frequency dielectric loss tester based on the direct measurement principle, a standard capacitor is connected with a tested object in parallel, the phase relation between test currents is obtained by directly measuring the current flowing through a branch circuit of the standard capacitor and the tested object, and processing the current through a Fourier conversion and computer processing central analysis system, and the capacitance and dielectric loss value of the tested object are calculated.
10. The method for measuring the dielectric loss measurement device of the cable working at the ultralow frequency range test voltage according to claim 8, wherein the industrial personal computer stores the test result of each time in a database, and obtains the variation trend of the dielectric loss parameters of the cable, the stability of dielectric loss along with time, the dielectric loss variation rate and the dielectric loss average value according to historical data; and accordingly gives the degree of cable aging.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011190836.4A CN112505426A (en) | 2020-10-30 | 2020-10-30 | Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011190836.4A CN112505426A (en) | 2020-10-30 | 2020-10-30 | Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112505426A true CN112505426A (en) | 2021-03-16 |
Family
ID=74954705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011190836.4A Pending CN112505426A (en) | 2020-10-30 | 2020-10-30 | Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112505426A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113075508A (en) * | 2021-03-29 | 2021-07-06 | 云南电网有限责任公司曲靖麒麟供电局 | Ultralow frequency high voltage test equipment |
| CN114184905A (en) * | 2021-11-08 | 2022-03-15 | 西南交通大学 | XLPE cable insulation water tree aging state evaluation method based on current migration coefficient |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101706535A (en) * | 2009-12-09 | 2010-05-12 | 山西省电力公司电力科学研究院 | Device and method for testing dielectric loss of high voltage transformer |
| JP2014168998A (en) * | 2013-03-01 | 2014-09-18 | Sumitomo Electric Ind Ltd | Electric power conversion system |
| CN107449970A (en) * | 2017-09-28 | 2017-12-08 | 国网安徽省电力公司检修公司 | Insulaion resistance and the test integrated device of dielectric loss |
| CN108646142A (en) * | 2018-06-26 | 2018-10-12 | 哈尔滨理工大学 | Based on traveling wave method to cable fault positioning device and localization method |
| WO2020051557A1 (en) * | 2018-09-06 | 2020-03-12 | Cornell University | High power density power converter and uninterruptible power supply circuit and methods |
| CN210243747U (en) * | 2019-02-27 | 2020-04-03 | 武汉武高电测电气有限公司 | Different-frequency full-automatic dielectric loss tester |
| CN111624452A (en) * | 2020-05-14 | 2020-09-04 | 广东电网有限责任公司 | High-voltage generator for insulation test of distribution cable |
-
2020
- 2020-10-30 CN CN202011190836.4A patent/CN112505426A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101706535A (en) * | 2009-12-09 | 2010-05-12 | 山西省电力公司电力科学研究院 | Device and method for testing dielectric loss of high voltage transformer |
| JP2014168998A (en) * | 2013-03-01 | 2014-09-18 | Sumitomo Electric Ind Ltd | Electric power conversion system |
| CN107449970A (en) * | 2017-09-28 | 2017-12-08 | 国网安徽省电力公司检修公司 | Insulaion resistance and the test integrated device of dielectric loss |
| CN108646142A (en) * | 2018-06-26 | 2018-10-12 | 哈尔滨理工大学 | Based on traveling wave method to cable fault positioning device and localization method |
| WO2020051557A1 (en) * | 2018-09-06 | 2020-03-12 | Cornell University | High power density power converter and uninterruptible power supply circuit and methods |
| CN210243747U (en) * | 2019-02-27 | 2020-04-03 | 武汉武高电测电气有限公司 | Different-frequency full-automatic dielectric loss tester |
| CN111624452A (en) * | 2020-05-14 | 2020-09-04 | 广东电网有限责任公司 | High-voltage generator for insulation test of distribution cable |
Non-Patent Citations (2)
| Title |
|---|
| POISONAPPLE: "tl949逆变器工作原理", 《电子发烧友》 * |
| 李正丽等: "基于IRS2092S的逆变电源设计", 《兵工自动化》 * |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113075508A (en) * | 2021-03-29 | 2021-07-06 | 云南电网有限责任公司曲靖麒麟供电局 | Ultralow frequency high voltage test equipment |
| CN114184905A (en) * | 2021-11-08 | 2022-03-15 | 西南交通大学 | XLPE cable insulation water tree aging state evaluation method based on current migration coefficient |
| CN114184905B (en) * | 2021-11-08 | 2022-07-08 | 西南交通大学 | XLPE cable insulation water tree aging state evaluation method based on current migration coefficient |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN207819564U (en) | Failure monitoring system with current detection function | |
| CN103394412B (en) | A kind of electric precipitation high-frequency impulse power power-supply | |
| CN112505426A (en) | Cable dielectric loss measuring device working at ultralow frequency band test voltage and measuring method thereof | |
| CN103257314A (en) | Power grid adaptability testing system of mobile wind turbine generator | |
| CN110231552A (en) | Coal mine cable insulating monitoring selection method, injection circuit and related device | |
| CN203299270U (en) | Device for accurately measuring CVT grid-side voltage harmonic wave | |
| CN105004971B (en) | A kind of cable insulation medium spectrum and state of insulation resistance test method and device | |
| CN109782122A (en) | A kind of detection method of S Injection Signal | |
| CN109557372A (en) | Impact power-frequency earthing impedance synthesis test device | |
| Mallick et al. | Fault analysis of voltage-source converter based multi-terminal HVDC transmission links | |
| CN204886186U (en) | Hybrid control system based on harmonic restraines and reactive compensation | |
| CN201378176Y (en) | High-precision anti-interference excitation power supply for ground screen flaw comprehensively-diagnosing system in transformer substation | |
| CN204347170U (en) | Distribution network line fault monitoring device and real-time monitoring system | |
| CN206281902U (en) | A kind of automatic checkout equipment of earth resistance | |
| CN202735412U (en) | On-line measurement device for capacitive current of power grid with neutral point grounded through arc suppression coil | |
| Moloi et al. | Power Quality Assessment of A Wind Power-Integrated System into the Power Grid | |
| CN209167420U (en) | Impact power-frequency earthing impedance synthesis test device | |
| CN2722265Y (en) | DC grounding on-line tester | |
| CN114720765A (en) | Situation awareness-based harmonic algorithm of active power distribution network and control system thereof | |
| CN203572898U (en) | Novel on-line monitoring device for current transformer | |
| CN208224331U (en) | A kind of wideband resonance potential generator | |
| CN106199094A (en) | A kind of direct current for 35KV overhead transmission line tries to send instrument | |
| Datta et al. | Harmonic distortion, inter-harmonic group magnitude and discrete wavelet transformation based statistical parameter estimation for line to ground fault analysis in microgrid system | |
| CN108152569A (en) | Cable overvoltage signal detection method and device | |
| CN114152727B (en) | Grounding grid soil risk assessment method considering water content |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20210316 |