CN112491288B - Control circuit of three-phase Vienna rectifier under unbalanced midpoint potential and discontinuous pulse width modulation method - Google Patents

Control circuit of three-phase Vienna rectifier under unbalanced midpoint potential and discontinuous pulse width modulation method Download PDF

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CN112491288B
CN112491288B CN202011373980.1A CN202011373980A CN112491288B CN 112491288 B CN112491288 B CN 112491288B CN 202011373980 A CN202011373980 A CN 202011373980A CN 112491288 B CN112491288 B CN 112491288B
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CN112491288A (en
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张犁
邹宇航
郑仲舒
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Hohai University HHU
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02TCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO TRANSPORTATION
    • Y02T10/00Road transport of goods or passengers
    • Y02T10/60Other road transportation technologies with climate change mitigation effect
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Abstract

The invention discloses a control circuit of a three-phase Vienna rectifier under unbalanced midpoint potential and a discontinuous pulse width modulation method. The control circuit comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator. The discontinuous pulse width modulation method is based on a real-time correction space vector diagram of the midpoint potential and a small sector dividing mode. The invention can make the Vienna rectifier run with high efficiency and low THD when the neutral point potential is unbalanced.

Description

Control circuit of three-phase Vienna rectifier under unbalanced midpoint potential and discontinuous pulse width modulation method
Technical Field
The invention belongs to the technical field of power electronic converters, and particularly relates to a control circuit and a control method of a three-phase Vienna rectifier at an unbalanced midpoint.
Background
The three-phase Vienna rectifier is widely applied to the fields of aviation power supplies, electric automobile charging and the like by virtue of the advantages of high reliability, high efficiency, low current harmonic distortion and the like. As a three-level converter, neutral point potential imbalance is an inherent problem. The unbalance of the midpoint potential can cause the distortion of the input current and affect the quality of the electric energy. The prior art documents "w.ding, c.zhang, f.gao, b.dual, and h.qiu, a Zero-Sequence Component Injection Modulation Method With Compensation for Current Harmonic imbalance of a fundamental Rectifier, IEEE Transactions on Power Electronics, vol.34, No.1, pp.801-814, jan.2019" and "w.ding, h.qiu, b.dual, x.xing, n.cui, and c.zhang, a non-sequential Component Injection Scheme to Minimize the excitation of DC-Link Voltage inverter and Unbalanced field for Current phase Modulation, pwm, and pwm, c.zhang, a non-sequential Component Injection Scheme to Minimize, DC-Link Voltage inverter and Unbalanced Current phase Modulation, pwm. The prior art documents "m.m. hashempourer, m.yang, and t.lee, An Adaptive Control of DPWM for Clamped-Three-Level photonic Inverters With inbalanced Neutral-Point Voltage, IEEE Transactions on industrial Applications, vol.54, No.6, pp.6133-6148, and No. -dec.2018" propose a Discontinuous Pulse Width Modulation (DPWM) suitable for a T-type Three-Level bidirectional AC/DC converter under Neutral-Point potential imbalance. The method reduces the switching times of 1/3 while eliminating the distortion of the alternating-current side current, thereby having higher efficiency. However, since the modulation wave in this modulation scheme has a section with a polarity opposite to that of the alternating current, it is not suitable for the vienna rectifier. Therefore, it is necessary to research a DPWM modulation method and a DPWM modulation circuit suitable for vienna rectifiers under the condition of neutral point potential imbalance.
Disclosure of Invention
In order to solve the technical problems mentioned in the background art, the invention provides a control circuit of a three-phase vienna rectifier under the condition of unbalanced midpoint potential and a discontinuous pulse width modulation method thereof.
In order to achieve the technical purpose, the technical scheme of the invention is as follows:
a control circuit of a three-phase Vienna rectifier comprises a three-phase alternating current power supply, a three-phase input filter inductor, first to sixth power diodes, first to sixth power switch tubes, a first direct current bus filter capacitor and a second direct current bus filter capacitor, wherein the first to sixth power diodes are connected in pairs to form a three-phase bridge arm, the first to sixth power switch tubes are connected in pairs to form a three-phase bridge arm, and the first direct current bus filter capacitor and the second direct current bus filter capacitor are respectively connected to two ends of a midpoint of a direct current side;
the control circuit of the three-phase Vienna rectifier comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator; three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter inductor and the three-phase alternating current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the inductive currentThe output end of the sampling circuit is connected with the first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is differed from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is different from a reference value 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the output end of the active current PI regulator and the output end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, and the ratio u of the voltages of the two bus filter capacitors is calculateddc1/udc2As the midpoint imbalance kNPThe output end of the DPWM controller is connected with the input end of the switching tube driving circuit, and the output end of the switching tube driving circuit outputs driving signals corresponding to the first to sixth power switching tubes;
further, the three-phase AC power supply is connected in a star connection.
Furthermore, the first to sixth power switch tubes adopt MOSFETs.
Discontinuous pulse width modulation method of control circuit based on Vienna rectifier and three-phase power grid voltage u sampled by power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd sending the voltage to a phase locker, and obtaining phase information theta of the power grid voltage by the phase locker; three-phase inductive current i obtained by sampling of inductive current sampling circuita、ib、icAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a Bus voltage sampling circuit samplingVoltage u of two DC bus filter capacitorsdc1And udc2,udc1And udc2The result of the addition is compared with a bus voltage reference value udc_refAnd the difference value is sent to a bus voltage PI regulator, and the bus voltage PI regulator generates a reference value i of active current according to an input signald_ref,id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking difference, sending the difference value into a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqD q/α β converter will udAnd uqTransformed into a control component u in an alpha beta coordinate systemαAnd uβSending the data to a DPWM controller; calculating the ratio u of the voltages of the two bus filter capacitorsdc1/udc2As the midpoint imbalance kNPInputting the data to a DPWM controller; the DPWM controller establishes a three-level vector space according to 25 small vectors of the three-phase Vienna rectifier, wherein the 25 small vectors are OOO, OON, POO, PPO, PON, PPN, OPN, NPP, NPO, OPO, NON, OPP, NPP, NOO, OPP, NOP, NNO, NNP, ONP, PNP, ONO, PNO, POP, ONN and PNN, P represents a positive level, N represents a negative level, and O represents a zero level; then according to the higher or lower midpoint potential, selecting different sector division modes and vector action sequences, and then according to a vector synthesis rule, calculating action time of each vector for synthesizing the vector to be synthesized.
Further, when the midpoint potential is low, the 1 st small sector is OOO, ONN, a portion located below a connection line between OOO and PON in an area surrounded by OON, the 2 nd small sector is OOO, ONN, a portion located above the connection line between OOO and PON in the area surrounded by OON, the 3 rd small sector is OON, ONN, a region surrounded by POO, the 4 th small sector is OON, POO, a region surrounded by PON, the 5 th small sector is PON, POO, a region surrounded by PNN, the 6 th small sector is PPN, OON, a portion in the region surrounded by PON with an amplitude angle greater than 30 °, and the 7 th small sector is PPN, OON, a portion in the region surrounded by PON with an amplitude angle less than 30 °; when the midpoint potential is higher, the 1 st small sector is a part located below a connecting line between the OOO and the PON in the area surrounded by the POO, the 2 nd small sector is a part located above the connecting line between the OOO and the PON, the 2 nd small sector is an area surrounded by the OOO, the PPO and the POO, the 3 rd small sector is an area surrounded by the OON, the PPO and the POO, the 4 th small sector is an area surrounded by the OON, the POO and the PON, the 5 th small sector is a part where the amplitude angle is smaller than 30 degrees in the area surrounded by the PON, the POO and the PNN, the 6 th small sector is a part where the amplitude angle is larger than 30 degrees in the area surrounded by the PPN, the OON and the area surrounded by the PON, and the 7 th small sector is a part where the amplitude angle is larger than 30 degrees in the area surrounded by the PON, the POO and the PNN.
Further, the clamp patterns and the corresponding vector action sequences in the 1 st, 2 nd, 3 rd, 4 th, 5 th, 6 th small sectors of each large sector are shown in the following table:
Figure GDA0003570368090000051
Figure GDA0003570368090000061
Figure GDA0003570368090000071
Figure GDA0003570368090000081
Figure GDA0003570368090000091
Figure GDA0003570368090000101
adopt the beneficial effect that above-mentioned technical scheme brought:
the invention can effectively eliminate the input current distortion caused by the unbalanced midpoint potential, and has small switching loss and high converter efficiency. Therefore, the modulation method and the circuit designed by the invention are suitable for the occasions of high-power-density and high-efficiency power factor correction, and especially have wide application prospect in a three-level conversion circuit.
Drawings
FIG. 1 is a diagram of a three-phase Vienna rectifier and its control circuit according to the present invention;
FIG. 2 is a space vector diagram of a Vienna rectifier under different midpoint potentials;
FIG. 3 is a schematic diagram of sector division under different midpoint potentials in the 1 st large sector;
FIG. 4 is a waveform diagram of steady state operation experiment using the modulation method and circuit embodiment of the present invention;
Detailed Description
The technical scheme of the invention is explained in detail in the following with the accompanying drawings.
Fig. 1 shows a conventional three-phase vienna rectifier 10 and a control circuit 20 designed according to the present invention.
As shown in fig. 1, the three-phase vienna rectifier 10 includes a three-phase ac power source 101 (u)sa、usb、usc) (ii) a Three-phase input filter inductor 102 (L)a、Lb、Lc) (ii) a First to sixth power diodes 103 (D)1~D6) (ii) a First to sixth power switching tubes 104 (S)1~S6) (ii) a A first DC bus filter capacitor and a second DC bus filter capacitor 105 (C)dc1、Cdc2). The first to sixth power diodes 103 are connected in pairs to form a three-phase bridge arm, the first to sixth power switching tubes 104 are connected in pairs to form a three-phase bridge arm, and the first direct-current bus filter capacitor and the second direct-current bus filter capacitor are respectively connected to two ends of a midpoint of a direct-current side. R in the figureLRepresenting the load. In this embodiment, the three-phase ac power sources are connected in a star connection. The first to sixth power switch tubes adopt MOSFET.
As shown in fig. 1, the control circuit 20 includes a grid voltage sampling circuit 201, an inductor current sampling circuit 202, a bus voltage sampling circuit 203, a switching tube driving circuit 204, and a DSP control unit 205. The DSP control unit 205The system comprises a first abc/dq converter 206, a second abc/dq converter 207, a phase lock 208, a dq/alpha beta converter 209, a DPWM controller 210, a bus voltage PI regulator 211, an active current PI regulator 213 and a reactive current PI regulator 212. Three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter inductor and the three-phase alternating current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the output end of the inductive current sampling circuit is connected with a first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is differed from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is different from 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the output end of the active current PI regulator and the output end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, and the ratio u of the voltages of the two bus filter capacitors is calculateddc1/udc2As the midpoint imbalance kNPInputting the data to a DPWM controller; the output end of the DPWM controller is connected with the input end of the switching tube driving circuit, and the output end of the switching tube driving circuit outputs driving signals corresponding to the first to sixth power switching tubes.
The invention also designs a discontinuous pulse width modulation method, and three-phase power grid voltage u obtained by sampling by the power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd fed into a phase-lock, the phase-lock obtaining the network voltage therefromPhase information θ; three-phase inductive current i obtained by sampling of inductive current sampling circuita、ib、icAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a The bus voltage sampling circuit samples to obtain the voltage u of two DC bus filter capacitorsdc1And udc2,udc1And udc2The result of the addition is compared with a bus voltage reference value udc_refMaking difference, sending the difference value to a bus voltage PI regulator, and generating a reference value i of active current by the bus voltage PI regulator according to an input signald_ref,id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking a difference, sending the difference value to a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqD q/α β converter will udAnd uqTransformed into a control component u in an alpha beta coordinate systemαAnd uβAnd sending the data to a DPWM controller. The DPWM controller first establishes a three-level vector space from the 25 feasible vectors of the vienna rectifier, which has three forms depending on the midpoint potential, as shown in fig. 2. The entire vector space can be divided into 6 large sectors. In order to ensure that the input current is free from distortion, the small sector division mode in each large sector is adjusted in real time according to the difference of the midpoint potential. One large sector is divided into 7 small sectors in each case, as shown in fig. 3. When the midpoint potential is low, the 1 st small sector is OOO, ONN and a part which is positioned below a connecting line of OOO and PON in an area surrounded by OON, the 2 nd small sector is OOO, ONN and a part which is positioned above the connecting line of OOO and PON in the area surrounded by OON, the 3 rd small sector is OON, ONN and POO, the 4 th small sector is OON, POO and PON, the 5 th small sector is PON, POO and PNN, the 6 th small sector is PPN, OON and a part of which the amplitude angle is larger than 30 degrees in the area surrounded by PON, and the 7 th small sector is PPN, OON and a part of which the amplitude angle is smaller than 30 degrees in the area surrounded by PON; when the potential of the middle point is higher, the 1 st small sector is OOO,the part of the area surrounded by the PPO and the POO, which is positioned below a connecting line of the OOO and the PON, is the 2 nd small sector, which is the part of the area surrounded by the OOO and the PPO, is the part of the area surrounded by the POO, which is positioned above the connecting line of the OOO and the PON, the 3 rd small sector, which is the area surrounded by the OON, the PPO and the POO, the 4 th small sector, which is the area surrounded by the OON, the POO and the PON, the 5 th small sector, which is the part of the PON and the POO, and the area surrounded by the PNN, which has the breadth angle smaller than 30 degrees, the 6 th small sector, which is the PPN, the OON and the area surrounded by the PON, and the 7 th small sector, which is the part of the PON, the POO and the PNN, which has the breadth angle larger than 30 degrees. The switching sequence in each small sector for different midpoint potentials is shown in Table 1
TABLE 1
Figure GDA0003570368090000131
Figure GDA0003570368090000141
Figure GDA0003570368090000151
Figure GDA0003570368090000161
Figure GDA0003570368090000171
Figure GDA0003570368090000181
Table 1 shows that different clamping modes are adopted in the 1 st and 2 nd small sectors according to different midpoint potentials; since the 3 rd and 4 th small sectors always contain the zero crossing point of the input current, a clamping mode that X (X is A, B and C) phase is clamped at O level is always used, and the zero crossing distortion of the input current is avoided; the 5 th and 6 th small sectors always do not contain input current zero-crossing points, so the current maximum phase is always clamped to reduce the switching loss. The 7 th cell sector is an unusable area caused by the imbalance of the midpoint potential, when the reference vector crosses the 7 th cell sector, there is not enough vector to synthesize the reference vector, so that the converter cannot stably operate in this area, and an appropriate modulation ratio should be selected when designing the converter to avoid the reference vector crossing the 7 th cell sector.
Experiment, the input voltage of vienna rectifier is the aviation electric wire netting standard: 115V/400Hz, 400V output voltage and 10kW power. FIG. 4 is the steady state experimental waveform for full load, Udc1And Udc2Respectively, the voltage of the upper and lower filter capacitors of the DC bus, UAOIs the A-phase bridge arm voltage, iaThe current is input for phase A. Under the condition of three different midpoint potentials, the output voltage is stable, the A-phase bridge arm voltage is clamped in a specific area, the sine degree of the input current waveform is higher, and the input current is undistorted.
The embodiments are only for illustrating the technical idea of the present invention, and the technical idea of the present invention is not limited thereto, and any modifications made on the basis of the technical scheme according to the technical idea of the present invention fall within the scope of the present invention.

Claims (4)

1. The discontinuous pulse width modulation method based on the control circuit of the three-phase Vienna rectifier comprises a three-phase alternating current power supply, a three-phase input filter inductor, first to sixth power diodes, first to sixth power switch tubes, a first direct current bus filter capacitor and a second direct current bus filter capacitor, wherein the first to sixth power diodes are connected in pairs to form a three-phase bridge arm, the first to sixth power switch tubes are connected in pairs to form a three-phase bridge arm, and the first direct current bus filter capacitor and the second direct current bus filter capacitor are respectively connected to two ends of a midpoint of a direct current side;
the control circuit of the three-phase Vienna rectifier comprises a power grid voltage sampling circuit, an inductive current sampling circuit, a bus voltage sampling circuit, a switching tube driving circuit and a DSP control unit; the DSP control unit packetThe converter comprises a first abc/dq converter, a second abc/dq converter, a phase locker, a dq/alpha beta converter, a DPWM (digital pulse width modulation) controller, a bus voltage PI regulator, an active current PI regulator and a reactive current PI regulator; three input ends of the power grid voltage sampling circuit are correspondingly connected to the connection position of the three-phase input filter inductor and the three-phase alternating-current power supply, and the output of the power grid voltage sampling circuit is connected with the first input end of the first abc/dq converter; three input ends of the inductive current sampling circuit are correspondingly connected to three output ends of the three-phase input filter inductor, and the output end of the inductive current sampling circuit is connected with a first input end of the second abc/dq converter; the output end of the first abc/dq converter is connected with the input end of the phase locker, and the output end of the phase locker is connected with the second input end of the first abc/dq converter and the second input end of the second abc/dq converter; two input ends of the bus voltage sampling circuit respectively collect and output voltages of a first direct current bus filter capacitor and a second direct current bus filter capacitor, the two paths of output signals are added and then are differenced with a bus voltage reference value, and the difference value is input into a bus voltage PI regulator; the output signal of the bus voltage PI regulator is different from the d-axis signal output by the second abc/dq converter, and the difference value is input into the active current PI regulator; a q-axis signal output by the second abc/dq converter is different from a reference value 0, and the difference value is input into a reactive current PI regulator; two input ends of the dq/alpha beta converter are respectively connected with the output end of the active current PI regulator and the output end of the reactive current PI regulator; the output end of the dq/alpha beta converter is connected with the input end of the DPWM controller, and the ratio u of the voltages of the two bus filter capacitors is calculateddc1/udc2As the midpoint imbalance kNPThe output end of the DPWM controller is connected with the input end of the switching tube driving circuit, and the output end of the switching tube driving circuit outputs driving signals corresponding to the first to sixth power switching tubes;
the method is characterized in that: three-phase power grid voltage u obtained by sampling of power grid voltage sampling circuitsa、usb、uscAfter being transformed by a first abc/dq converter, a component u under a dq coordinate system is obtainedsdAnd usqAnd sending the voltage to a phase locker, and obtaining phase information theta of the power grid voltage by the phase locker; three obtained by inductive current sampling circuitPhase inductive current ia、ib、icAfter the conversion of the second abc/dq converter, the active component i of the three-phase inductive current is obtaineddAnd a reactive component iq(ii) a The bus voltage sampling circuit samples to obtain the voltage u of two DC bus filter capacitorsdc1And udc2,udc1And udc2The result of the addition is compared with a bus voltage reference value udc_refMaking difference, sending the difference value to a bus voltage PI regulator, and generating a reference value i of active current by the bus voltage PI regulator according to an input signald_ref,id_refAnd idMaking difference, sending the difference value to an active current PI regulator, and generating a d-axis control component u by the active current PI regulator according to an input signald(ii) a Reference value 0 of reactive current and reactive current iqMaking difference, sending the difference value into a reactive current PI regulator, and generating a q-axis control component u by the reactive current PI regulator according to an input signalqD q/α β converter will udAnd uqTransformed into a control component u in an alpha beta coordinate systemαAnd uβSending the data to a DPWM controller; calculating the ratio u of the voltages of the two bus filter capacitorsdc1/udc2As the midpoint imbalance kNPInputting the data to a DPWM controller; the DPWM controller establishes a three-level vector space according to 25 small vectors of the three-phase Vienna rectifier, wherein the 25 small vectors are OOO, OON, POO, PPO, PON, PPN, OPN, NPP, NPO, OPO, NON, OPP, NPN, NOO, OOP, NOP, NNO, NNP, ONP, PNP, ONO, PNO, POP, ONN and PNN respectively, P represents a positive level, N represents a negative level, and O represents a zero level; dividing a vector space into 6 large sectors, and further dividing each large sector into 7 small sectors; according to uαAnd uβCalculating a vector V to be synthesizedrefThe large sector and the small sector; according to the selected vector, calculating the vector V to be synthesized according to the vector synthesis rulerefThe action time of the three small vectors.
2. The discontinuous pulse width modulation method according to claim 1, wherein: dividing small sectors by the DPWM controller according to the midpoint potential; when the midpoint potential is low, the 1 st small sector is OOO, ONN and a part which is positioned below a connecting line of OOO and PON in an area surrounded by OON, the 2 nd small sector is OOO, ONN and a part which is positioned above the connecting line of OOO and PON in the area surrounded by OON, the 3 rd small sector is OON, ONN and POO, the 4 th small sector is OON, POO and PON, the 5 th small sector is PON, POO and PNN, the 6 th small sector is PPN, OON and a part of which the amplitude angle is larger than 30 degrees in the area surrounded by PON, and the 7 th small sector is PPN, OON and a part of which the amplitude angle is smaller than 30 degrees in the area surrounded by PON; when the midpoint potential is higher, the 1 st small sector is an OOO, PPO or POO area located below the connection line between the OOO and the PON, the 2 nd small sector is an OOO, PPO or POO area located above the connection line between the OOO and the PON, the 3 rd small sector is an OON, PPO or POO area, the 4 th small sector is an OON, POO or PON area, the 5 th small sector is a PON, POO or PNN area having an amplitude angle smaller than 30 °, the 6 th small sector is a PPN, OON or PON area, and the 7 th small sector is a PON, POO or PNN area having an amplitude angle larger than 30 °.
3. The discontinuous pulse width modulation method according to claim 1, wherein:
Figure FDA0003570368080000031
Figure FDA0003570368080000041
Figure FDA0003570368080000051
Figure FDA0003570368080000061
Figure FDA0003570368080000071
Figure FDA0003570368080000081
the clamp pattern and corresponding vector action sequence for each small sector in each large sector are shown in the table above, where the 7 th small sector in each large sector is the unusable area due to unbalanced midpoint potential.
4. The discontinuous pulse width modulation method of claim 1, wherein: the three-phase alternating current power supply is connected according to a star connection method.
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