CN112486239B - Low dropout regulator circuit - Google Patents
Low dropout regulator circuit Download PDFInfo
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- CN112486239B CN112486239B CN202011561988.0A CN202011561988A CN112486239B CN 112486239 B CN112486239 B CN 112486239B CN 202011561988 A CN202011561988 A CN 202011561988A CN 112486239 B CN112486239 B CN 112486239B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
A low dropout regulator circuit comprises an amplifier, a transistor, a feedback unit, a plurality of compensation resistors and a plurality of pins, wherein the inverting input end of the amplifier is connected with a reference voltage, and the output end of the amplifier is connected with the grid electrode of the transistor; the source electrode of the transistor is connected with an external power supply voltage, and the drain electrode of the transistor is connected with the positive input end of the amplifier through the feedback unit; one end of the compensation resistors is connected to the drain electrode of the transistor; and the other ends of the compensation resistors are respectively connected with the pins. According to the low dropout regulator circuit, the plurality of second resistors are respectively connected in series to the output end of the transistor in the plurality of pins, and when the wiring resistance changes, different compensation resistors are selected to be combined for compensation, so that the design difficulty can be greatly reduced, the stability of the low dropout regulator is improved, and the generation of power supply burrs can be prevented.
Description
Technical Field
The invention relates to the technical field of linear voltage regulators, in particular to a low dropout linear voltage regulator circuit.
Background
A Low Dropout Regulator (LDO) is a common module in an Integrated Circuit (IC), and is capable of outputting a stable voltage value when a power supply voltage and a load are changed. In a low dropout regulator, an external capacitor with a large capacitance value (1 uF) is usually placed outside to stabilize the output voltage. As shown in fig. 1, a typical low dropout linear regulator is configured such that the output voltage at the point Y is set to a stable potential under the negative feedback action of the amplifier. In order to obtain a stable output voltage, the low dropout linear regulator needs to ensure its loop stability, and in the configuration shown in fig. 1, the pole-zero that has a large influence on the loop stability is distributed as follows: the Y point corresponds to a main pole P1, the X point corresponds to a secondary pole P2, and Ric/Rout/CL forms a left half-plane zero point Z1, wherein Z1 is-1/[ (Ric + Rout) × CL ], where Ric is a compensation resistor, Rout is a routing resistor formed by a metal lead, and CL is an external capacitor.
In general, low dropout regulators adopt different packaging types to adapt to different application scenarios, such as FPC (Flexible Printed Circuit) or PCB (Printed Circuit Board). In low dropout linear regulators with different packaging types, the wiring resistance between a Pin (PAD) and an external capacitor can be changed within a certain range (such as 0.1-1 omega). In addition, the external capacitor has ESR (Equivalent Series Resistance) Resistance, which varies with the type.
In the design of the low dropout linear regulator circuit, the ideal compensation is that the adjustment zero z1 is coincident with the secondary pole p2, and the zero is used for compensating the pole, so that the loop stability is greatly improved, as shown in fig. 2. However, when Ric + Rout is small, zero z1 is much larger than the secondary pole p2, and insufficient phase margin occurs, as shown in FIG. 3. When Ric + Rout is large, the compensation requirement can be usually satisfied. However, when the current is instantaneously pumped in the op-amp chip, a large glitch occurs, as shown in fig. 4. The glitch amplitude is proportional to (Ric + Rout) × iLoad, where iLoad is the instantaneous pull-out current. When the low dropout regulator is applied to different scenes, Rout changes along with the low dropout regulator, so that the stability of a loop and the power supply glitch cannot be guaranteed to be considered simultaneously.
Disclosure of Invention
In order to solve the defects in the prior art, the invention aims to provide a low dropout regulator, wherein a plurality of compensation resistors are connected in parallel at the output end of the low dropout regulator, the connection mode of the compensation resistors is changed to adapt to the wiring resistors formed by different external metal connecting lines, the variation range of the total resistance is reduced, and the stability of the low dropout regulator is improved.
To achieve the above object, the present invention provides a low dropout regulator circuit comprising an amplifier, a transistor, a feedback unit, a plurality of compensation resistors, and a plurality of pins, wherein,
the inverting input end of the amplifier is connected with a reference voltage, and the output end of the amplifier is connected with the grid electrode of the transistor;
the source electrode of the transistor is connected with an external power supply voltage, and the drain electrode of the transistor is connected with the positive input end of the amplifier through the feedback unit;
one end of the compensation resistors is connected to the drain electrode of the transistor; and the other ends of the compensation resistors are respectively connected with the pins.
Further, the feedback unit includes a first resistor and a first variable resistor, a drain of the transistor is grounded via the first resistor and the first variable resistor, and a common end of the first resistor and the first variable resistor is connected to the positive input end of the amplifier.
Further, the feedback unit is a current source.
Furthermore, at least one of the plurality of pins is connected with the external capacitor through a routing resistor.
Further, the wire resistor is a resistor formed by a metal wire.
Further, the transistor is a P-channel transistor.
Further, the compensation resistor is a resistor device or a winding resistor.
Furthermore, the number of the compensation resistors is 4, the resistance values are respectively 0.2 Ω, 0.4 Ω, 0.6 Ω, and 0.8 Ω, and the resistance value of the routing resistor is in the range of 0.1 Ω to 0.9 Ω.
Still further, at least two of the plurality of pins are shorted.
In order to achieve the above object, the present invention further provides a voltage stabilization chip, which includes a low dropout regulator circuit and a control unit, wherein,
the low dropout linear regulator circuit is the low dropout linear regulator circuit;
and the control unit controls the work of the low dropout linear regulator circuit.
In order to achieve the above object, the present invention further provides an information processing apparatus, comprising a voltage stabilization chip and a central processing unit, wherein,
the voltage stabilizing chip adopts the voltage stabilizing chip; and the central processing unit and the voltage stabilizing chip carry out information interaction.
According to the low dropout regulator circuit provided by the invention, the plurality of second resistors are respectively connected in series to the output end of the transistor in the plurality of pins, and when the wiring resistance changes, different compensation resistors are selected to be combined for compensation, so that the design difficulty can be greatly reduced, the stability of the low dropout regulator is improved, and the generation of power supply burrs can be prevented.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic circuit diagram of a low dropout regulator in the prior art.
FIG. 2 is a graph illustrating ideal pole-zero compensation;
FIG. 3 is a diagram illustrating a pole-zero insufficient compensation curve;
FIG. 4 is a schematic diagram of a glitch generated during an instantaneous current draw;
FIG. 5 is a circuit diagram of a low dropout linear regulator according to an embodiment of the present invention;
FIG. 6 is a circuit diagram of a low dropout linear regulator according to another embodiment of the present invention;
FIG. 7 is a schematic diagram of a voltage regulator chip according to the present invention;
fig. 8 is a schematic structural diagram of an information processing apparatus according to the present invention.
Detailed Description
The preferred embodiments of the present invention will be described in conjunction with the accompanying drawings, and it will be understood that they are described herein for the purpose of illustration and explanation and not limitation.
Example 1
Fig. 5 is a circuit diagram of a low dropout linear regulator according to an embodiment of the present invention. As shown in fig. 5, the low dropout regulator circuit of the present invention includes an amplifier a, a transistor Mp, a first resistor R1, a variable resistor R2, a plurality of compensation resistors Ric1 to RicN, and a plurality of pins, wherein,
the inverting input terminal of the amplifier a is connected to the reference voltage VREF, and the output terminal of the amplifier a is connected to the gate (i.e., point X) of the transistor Mp.
The source of the transistor Mp is connected to the power supply voltage, and the drain (i.e., point Y) of the transistor Mp is connected to one end of the first resistor R1; the non-inverting input end of the amplifier A, the other end of the first resistor R1 and one end of the variable resistor R2 are connected; the other end of the variable resistor R2 is grounded.
One ends of the compensation resistors Ric1 to RicN are connected in parallel to the drain of the transistor Mp, and the other ends of the compensation resistors Ric1 to RicN are connected to the pins P1 to PN, respectively.
In the embodiment of the invention, at least one of the pins P1-PN is connected with the external capacitor CL through a metal lead; the trace resistance Rout is a resistance formed by the metal trace.
In the embodiment of the invention, the drain electrode of the transistor is connected with different compensation resistors to different pins, and the pin connected to the external capacitor CL is selected according to the difference of the routing resistor Rout formed by the metal routing in the application scene, so that the purpose of compensating the routing resistor Rout is achieved.
In the embodiment of the invention, the compensation resistors Ric 1-RicN can be resistor devices or winding resistors.
In the embodiment of the invention, the compensation resistor has 4 compensation resistors Ric 1-4. More preferably, the compensation resistors Ric 1-4 are respectively selected from 0.2 Ω, 0.4 Ω, 0.6 Ω, and 0.8 Ω, and when the routing resistor Rout is in a range greater than 0.1 Ω and less than 0.9 Ω (change by 0.8 Ω), the total resistance can be accurately controlled to a range greater than 0.9 Ω and less than 1.1 Ω (change by 0.2 Ω).
In the embodiment of the present invention, the first resistor R1 and the first variable resistor R2 form a feedback unit of the amplifier a, and in practical applications, a current source or the like may also be used as the feedback unit.
The low dropout regulator circuit provided by the embodiment of the invention can greatly reduce the design difficulty, improve the stability of the low dropout regulator and prevent the generation of power supply burrs.
Example 2
Fig. 6 is a schematic diagram of a low dropout regulator circuit according to another embodiment of the present invention, and as shown in fig. 6, the low dropout regulator circuit of the present invention is different from the low dropout regulator circuit of embodiment 1 in that at least two of the pins P1-PN are shorted and connected to the external capacitor CL through a metal wire.
The low dropout regulator circuit provided by the embodiment of the invention can further improve the precision of the total resistance, further greatly reduce the design difficulty, improve the stability of the low dropout regulator and prevent the generation of power supply burrs.
Example 3
Fig. 7 is a schematic structural diagram of a regulator chip according to an embodiment of the present invention, and as shown in fig. 7, the regulator chip 70 of the present invention includes a low dropout regulator circuit 71 and a control unit 72, wherein,
the LDO circuit 71 is the LDO circuit in the above embodiment.
And the control unit 72 is used for controlling the operation of the low dropout regulator circuit 71 and improving the stability of the output voltage of the low dropout regulator circuit.
One pin of the voltage stabilizing chip 70 is used as a pin of the low dropout regulator circuit 71 and is connected with the external capacitor through a metal wire.
Example 4
Fig. 8 is a schematic structural diagram of an information processing apparatus according to the present invention, and as shown in fig. 8, an information processing apparatus 80 of the present invention includes a voltage stabilizing chip 81 and a central processing unit 82, wherein,
and a voltage stabilization chip 81 that employs the voltage stabilization chip 70 in the above-described embodiment.
The central processor 82 and the voltage stabilizing chip 81 perform information interaction.
Those of ordinary skill in the art will understand that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that changes may be made in the embodiments and/or equivalents thereof without departing from the spirit and scope of the invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A low dropout regulator circuit comprises an amplifier, a transistor, a feedback unit, a plurality of compensation resistors, and a plurality of pins, wherein,
the inverting input end of the amplifier is connected with a reference voltage, and the output end of the amplifier is connected with the grid electrode of the transistor;
the source electrode of the transistor is connected with an external power supply voltage, and the drain electrode of the transistor is connected with the positive input end of the amplifier through the feedback unit;
one end of the compensation resistors is connected to the drain electrode of the transistor; the other ends of the compensation resistors are respectively connected with the pins;
at least one of the pins is connected with the external capacitor through a routing resistor.
2. The LDO circuit of claim 1, wherein the feedback unit comprises a first resistor and a first variable resistor, the drain of the transistor is connected to ground via the first resistor and the first variable resistor, and a common terminal of the first resistor and the first variable resistor is connected to the positive input terminal of the amplifier.
3. The low dropout linear regulator circuit of claim 1, wherein the feedback unit is a current source.
4. The low dropout regulator circuit according to claim 1, wherein the trace resistance is a resistance formed by a metal trace.
5. The low dropout linear regulator circuit of claim 1 wherein the transistor is a P-channel type transistor.
6. The low dropout linear regulator circuit of claim 1,
the compensation resistor is a resistor device or a winding resistor.
7. The low dropout linear regulator circuit of claim 1,
the number of the compensation resistors is 4, the resistance values are respectively 0.2 omega, 0.4 omega, 0.6 omega and 0.8 omega, and the resistance value of the routing resistor is in the range of more than 0.1 omega and less than 0.9 omega.
8. The low dropout linear regulator circuit according to any one of claims 1 to 7,
at least two of the plurality of pins are shorted.
9. A voltage stabilization chip is characterized by comprising a low dropout regulator circuit and a control unit, wherein,
the low dropout regulator circuit is the low dropout regulator circuit according to any one of claims 1 to 8;
and the control unit controls the work of the low dropout linear regulator circuit.
10. An information processing device is characterized by comprising a voltage stabilizing chip and a central processing unit, wherein,
the voltage stabilization chip, which adopts the voltage stabilization chip of claim 9;
and the central processing unit and the voltage stabilizing chip carry out information interaction.
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CN202011561988.0A CN112486239B (en) | 2020-12-25 | 2020-12-25 | Low dropout regulator circuit |
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CN202011561988.0A CN112486239B (en) | 2020-12-25 | 2020-12-25 | Low dropout regulator circuit |
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CN112486239B true CN112486239B (en) | 2022-04-08 |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1111493A1 (en) * | 1999-12-23 | 2001-06-27 | Texas Instruments Incorporated | Low drop voltage regulators with low quiescent current |
CN102033561A (en) * | 2010-11-11 | 2011-04-27 | 华为技术有限公司 | Power supply circuit |
CN102200791A (en) * | 2011-03-15 | 2011-09-28 | 上海宏力半导体制造有限公司 | Low dropout linear regulator structure |
CN105786079A (en) * | 2014-12-26 | 2016-07-20 | 上海贝岭股份有限公司 | Low dropout regulator with compensating circuit |
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2020
- 2020-12-25 CN CN202011561988.0A patent/CN112486239B/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1111493A1 (en) * | 1999-12-23 | 2001-06-27 | Texas Instruments Incorporated | Low drop voltage regulators with low quiescent current |
CN102033561A (en) * | 2010-11-11 | 2011-04-27 | 华为技术有限公司 | Power supply circuit |
CN102200791A (en) * | 2011-03-15 | 2011-09-28 | 上海宏力半导体制造有限公司 | Low dropout linear regulator structure |
CN105786079A (en) * | 2014-12-26 | 2016-07-20 | 上海贝岭股份有限公司 | Low dropout regulator with compensating circuit |
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