CN112466241B - Grid driving device based on dual-output channel driving IC - Google Patents
Grid driving device based on dual-output channel driving IC Download PDFInfo
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- CN112466241B CN112466241B CN201910843529.2A CN201910843529A CN112466241B CN 112466241 B CN112466241 B CN 112466241B CN 201910843529 A CN201910843529 A CN 201910843529A CN 112466241 B CN112466241 B CN 112466241B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0267—Details of drivers for scan electrodes, other than drivers for liquid crystal, plasma or OLED displays
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Abstract
The invention provides a grid driving device based on a dual-output channel driving IC, which comprises: the circuit comprises a double-output channel drive IC, a voltage stabilizing circuit, a stabilizing circuit and a drive circuit; the high-level output port of the dual-output channel drive IC is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the low-level output port of the dual-output channel drive IC is connected with the first port of the voltage stabilizing circuit, the second port of the voltage stabilizing circuit is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the second port of the stabilizing circuit and the second port of the drive circuit are both connected with the grid electrode of the P-type gallium nitride device, and the grounding port of the dual-output channel drive IC and the source electrode of the P-type gallium nitride device are both grounded. The invention can improve the reliability of the P-GaN grid.
Description
Technical Field
The invention relates to the technical field of semiconductor devices, in particular to a grid driving device based on a dual-output channel driving IC.
Background
Compared with Si materials, the GaN wide bandgap semiconductor material has superior performances such as high breakdown electric field (up to 3MV/cm), high saturated electron drift velocity, good thermal conductivity and the like, and is suitable for manufacturing power devices applied to high frequency and high power.
The GaN material has stronger polarization effect, and two-dimensional electron gas (2DEG) with high concentration and high electron mobility about 1013cm & lt-2 & gt is formed at the interface of the AlGaN/GaN heterojunction growing in the polarization direction due to the polarization effect, so that the AlGaN/GaN Heterojunction Field Effect Transistors (HFETs) have extremely low on-resistance and are very suitable for manufacturing power switching devices. Therefore, the fabrication of high-performance normally-off power switching devices using GaN heterostructures with 2DEG is an important issue for achieving the practical application of GaN power switching devices.
The enhanced GaN power switch device is generally realized by two process approaches of P-GaN and concave grid. The threshold voltage of the P-GaN enhanced GaN power switch device can only reach about 1.5v, the gate voltage swing is small, and the reliability is poor.
Disclosure of Invention
The invention provides a grid driving device based on a dual-output channel driving IC (integrated circuit), and aims to solve the problems that an enhanced P-GaN power switch device is low in threshold voltage, a grid is not resistant to negative voltage impact and poor in reliability.
In order to achieve the above object, an embodiment of the present invention provides a gate driving device based on a dual output channel driving IC, including: the circuit comprises a double-output channel drive IC, a voltage stabilizing circuit, a stabilizing circuit and a drive circuit;
the high-level output port of the dual-output channel drive IC is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the low-level output port of the dual-output channel drive IC is connected with the first port of the voltage stabilizing circuit, the second port of the voltage stabilizing circuit is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the second port of the stabilizing circuit and the second port of the drive circuit are both connected with the grid electrode of the P-type gallium nitride device, and the grounding port of the dual-output channel drive IC and the source electrode of the P-type gallium nitride device are both grounded.
The gate driving device further comprises a conduction circuit, a first port of the conduction circuit is connected with a high-level output port of the dual-output channel driving IC and a first port of the stabilizing circuit respectively, and a second port of the conduction circuit is connected with a second port of the voltage stabilizing circuit and a first port of the driving circuit respectively.
Wherein the turn-on circuit includes an on-resistance.
The voltage stabilizing circuit comprises a first voltage stabilizing tube, and the cathode of the first voltage stabilizing tube points to the grid electrode of the P-type gallium nitride device.
Wherein the stabilization circuit includes a first stabilization resistor.
The stabilizing circuit further comprises a second voltage-regulator tube and a second stabilizing resistor which are connected with the first stabilizing resistor in parallel, the second voltage-regulator tube is connected with the second stabilizing resistor in series, and the anode of the second voltage-regulator tube points to the grid electrode of the P-type gallium nitride device.
The gate driving device further comprises a first diode, a cathode of the first diode is connected with the first port of the stabilizing circuit and the first port of the driving circuit respectively, and an anode of the first diode is connected with a high-level output port of the dual-output channel driving IC.
The gate driving device further comprises a consumption circuit, wherein a first port of the consumption circuit is respectively connected with a second port of the stabilizing circuit, a second port of the driving circuit and a gate of the P-type gallium nitride device, and a second port of the consumption circuit is connected with a source of the P-type gallium nitride device.
The consumption circuit comprises a second diode and a third voltage-regulator tube which are connected in series, wherein the cathode of the second diode points to the grid electrode of the P-type gallium nitride device, and the cathode of the third voltage-regulator tube points to the source electrode of the P-type gallium nitride device.
Wherein the driving circuit comprises a driving capacitor.
The scheme of the invention has at least the following beneficial effects:
in the embodiment of the invention, when the high-level output port of the dual-output channel drive IC outputs high level, instantaneous large current is generated by the drive circuit, the grid electrode of the P-type gallium nitride device is charged to be started, and small current flows into the grid electrode of the P-type gallium nitride device through the stabilization circuit to maintain the P-type gallium nitride device in a conducting state; when the low-level output port of the dual-output channel drive IC outputs low level, the potential at the first port of the drive circuit is pulled to a certain value through the voltage stabilizing circuit, a certain negative potential is generated at the second port of the drive circuit, the conducted P-type gallium nitride device is closed, the electric charge of the drive circuit is slowly released by the stabilizing circuit, the negative voltage at the second port of the drive circuit is slowly increased, a large continuous and stable negative voltage is generated in a short time and is kept in a state of being less than 0 for a long time, the negative voltage can inhibit the P-GaN gate from being turned on by mistake after being turned off due to the fact that the P-GaN threshold voltage is low, in addition, the reverse breakdown of the P-GaN gate is not easily caused by the large negative voltage, and the reliability of the gate is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a gate driving device based on a dual-output channel driving IC according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a first specific implementation structure of a gate driving device based on a dual-output channel driving IC according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a second specific implementation structure of a gate driving device based on a dual-output channel driving IC according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a third specific implementation structure of a gate driving device based on a dual-output channel driving IC according to an embodiment of the present invention.
[ description of reference ]
1. A dual output channel driver IC; 2. a voltage stabilizing circuit; 3. a stabilization circuit; 4. a drive circuit; 5. a P-type gallium nitride device.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
As shown in fig. 1, an embodiment of the present invention provides a gate driving device based on a dual-output channel driving IC, the gate driving device including: the dual output channel driver IC1, voltage regulator circuit 2, stabilization circuit 3, and driver circuit 4.
The high-level output port of the dual-output channel driver IC1 is connected to the first port of the stabilizing circuit 3 and the first port of the driver circuit 4, the low-level output port of the dual-output channel driver IC1 is connected to the first port of the voltage regulator circuit 2, the second port of the voltage regulator circuit 2 is connected to the first port of the stabilizing circuit 3 and the first port of the driver circuit 4, the second port of the stabilizing circuit 3 and the second port of the driver circuit 4 are both connected to the gate of the P-type gallium nitride device 5, and the ground port of the dual-output channel driver IC1 and the source of the P-type gallium nitride device 5 are both grounded.
In the embodiment of the present invention, the high-level output port of the dual-output channel driving IC1 is used for outputting a high level VDD, and the low-level output port of the dual-output channel driving IC1 is used for outputting a low level 0. In addition, in the embodiment of the present invention, the source of the P-type gan device 5 may be grounded separately or may be grounded in common with the dual-output channel driver IC 1.
It should be mentioned that, in the embodiment of the present invention, when the high level output port of the dual-output channel driver IC1 outputs the high level, the driver circuit 4 generates an instantaneous large current to charge the gate of the P-type gallium nitride device 5 to turn on the gate, and the stabilizing circuit 3 stabilizes the gate of the P-type gallium nitride device 5 to flow a small current to maintain the P-type gallium nitride device 5 in the on state; when the low level output port of the dual-output channel drive IC1 outputs low level, the voltage stabilizing circuit 2 pulls the potential at the first port of the drive circuit 4 to a certain value, the second port of the drive circuit 4 generates a certain negative potential, and the turned-on P-type gallium nitride device 5 is turned off, at this time, the charge of the drive circuit 4 is slowly released by the stabilizing circuit 3, the negative voltage at the second port of the drive circuit 4 is slowly increased, a large and continuous and stable negative voltage is generated in a short time, and a state smaller than 0 is maintained for a long time, the negative voltage can inhibit mistaken turning-on after turning-off due to low P-GaN threshold voltage, and in addition, the P-GaN gate reverse breakdown is not easily caused by the large negative voltage, and the reliability of the gate is improved.
Next, each circuit included in the gate driving device will be described in detail with reference to fig. 2 to 4.
As shown in fig. 2 to 4, the regulator circuit includes a first voltage regulator (i.e., Z1 in fig. 2 to 4), and a cathode of the first voltage regulator is directed to a gate of the P-type gan device. Wherein, the regulated voltage value U of the first voltage-regulator tube Z1 Is not 0 nor VDD. It will be appreciated that in embodiments of the invention, Z1 may be formed from smaller voltage regulators connected in series, parallel, or series-parallel.
As shown in fig. 2 to 4, the driving circuit includes a driving capacitor (i.e., C1 in fig. 2 to 4), and in the embodiment of the present invention, the driving capacitor is preferably a high frequency patch capacitor for easy installation.
In the embodiment of the present invention, there are two specific implementation structures of the above stabilizing circuit. As shown in fig. 2, in a first specific implementation structure, the stabilizing circuit includes a first stabilizing resistor (i.e., R2 in fig. 2), which is generally a relatively large resistor, so that when the high-level output port of the dual-output channel driver IC outputs a high level, a relatively small current flows into the gate of the stable P-type gallium nitride device, and the P-type gallium nitride device is continuously turned on; and when the low level output port of the dual-output channel drive IC outputs a low level, the charges of the stable drive circuit are slowly released, and the grid is maintained for a certain negative voltage time. As shown in fig. 3 to 4, in a second specific implementation structure, the stabilizing circuit includes, in addition to the first stabilizing resistor (i.e., R2 in fig. 3 to 4): a second voltage regulator tube (namely Z2 in figures 3 to 4) and a second stabilizing resistor (namely R3 in figures 3 to 4) which are connected with the first stabilizing resistor in parallel, wherein the second voltage regulator tube and the second stabilizing resistor are connected in series, and the anode of the second voltage regulator tube points to the grid electrode of the P-type gallium nitride device. When the high-level output port of the dual-output channel drive IC outputs a high level, after the P-GaN gate is stably turned on, the Z2 and the R3 which are connected in series are connected with the R2 in parallel to flow a small current to the P-GaN gate, and the P-GaN is in a conducting state. It will of course be appreciated that the second mentioned voltage regulator tube may be formed from smaller voltage regulator tubes connected in series, in parallel or in series and parallel.
In an embodiment of the present invention, the gate driving apparatus further includes a conduction circuit, a first port of the conduction circuit is respectively connected to the high-level output port of the dual-output channel driving IC and the first port of the stabilization circuit, and a second port of the conduction circuit is respectively connected to the second port of the voltage stabilizing circuit and the first port of the driving circuit. Specifically, as shown in fig. 2 to 4, the on circuit includes an on resistor (i.e., R1 in fig. 2 to 4). When the high-level output port of the dual-output channel drive IC outputs high level, the dual-output channel drive IC is connected with the drive circuit in series and is connected with the stabilizing circuit in parallel, and at the moment, the transient resistance is small, the current is large, and the grid of the P-type gallium nitride device is charged, so that the grid is quickly started. It should be noted that R1 is selected according to the driving capability, and the minimum value may be 0 or a conducting wire.
In order to reduce the influence of the reverse recovery of the high-level side capacitor of the dual-output channel driver IC on the P-type gan device, as shown in fig. 4, the gate driver further includes a first diode (D1 in fig. 4), a cathode of the first diode is connected to the first port of the stabilizing circuit and the first port of the driver circuit, and an anode of the first diode is connected to the high-level output port of the dual-output channel driver IC.
In an embodiment of the present invention, to further improve the gate reliability of the P-type gallium nitride device, the gate driving apparatus further includes a consumption circuit, a first port of the consumption circuit is connected to the second port of the stabilizing circuit, the second port of the driving circuit, and the gate of the P-type gallium nitride device, respectively, and a second port of the consumption circuit is connected to the source of the P-type gallium nitride device.
Specifically, as shown in fig. 2 to 4, the consumption circuit includes a second diode (i.e., D1 in fig. 2 and 3, D2 in fig. 4) and a third voltage regulator (i.e., Z2 in fig. 2, Z3 in fig. 3 to 4) connected in series, a cathode of the second diode is directed to the gate of the P-type gallium nitride device, and a cathode of the third voltage regulator is directed to the source of the P-type gallium nitride device. It will be appreciated that in embodiments of the invention the third diode may be formed from smaller voltage regulators connected in series, parallel or series-parallel and the positions of the second diode and the third diode may be interchanged.
It is understood that, in the embodiment of the present invention, in practical applications, the gate driving apparatus can be directly integrated into a dual-output channel driving IC.
Next, the operation principle of three different implementation structures of the gate driving device will be described in detail.
For the implementation structure shown in fig. 2, when the high-level output port of the dual-output channel driving IC outputs high-level VDD, the potential at the cathode of Z1 is VDD, the dual-output channel driving IC generates instantaneous large current through R1 and C1 to charge the gate of the P-type gallium nitride device, and the instantaneous potential U of the gate of the P-type gallium nitride device is not more than VDD × C1/(C1+ C1) GS +C GD ) Final potential is stabilized at V gsf That is, when the gate of the P-type GaN device is charged to reach the saturated forward turn-on potential V of the parasitic diode gsf Then the gate is turned on rapidly, and the potential at the cathode of D1 is V gsf ，C GS Representing the parasitic capacitance of the gate to the source, C, of the P-type GaN device GD The parasitic capacitance of the gate to the drain of the P-type gallium nitride device is shown, wherein C1 represents the capacitance of the driving capacitor C1; after the grid is opened, C1 is disconnected, stable small current is output to the P-GaN parasitic diode through a large resistor R2, and the small current of the grid parasitic diode of the P-type gallium nitride device is kept to pass through, so that the grid parasitic diode is continuously in an opening state, the grid is prevented from being broken down, and meanwhile, the power consumption is reduced; when the low-level output port of the dual-output channel drive IC outputs low level 0, the P-type gallium nitride device can be turned off instantly, and the relative potential at the cathode of Z1 is U Z1 At this time, the gate transient voltage of the P-type gan device is- (VDD × C1/(C1+ C) GS +C GD )-V gsf -U Z1 ) After the voltage is stabilized, the voltage is slowly increased and can be kept less than 0 in a certain switching period, thereby preventing the influence of Electromagnetic Interference (EMI) in the circuit switching process and preventing the P-type gallium nitride device from being turned offFalse opening; meanwhile, after the P-type gallium nitride device is turned off, the parasitic inductance at the source electrode of the P-type gallium nitride device generates a certain positive potential, so that the parasitic voltage V of the grid to the source electrode of the P-type gallium nitride device GS Too small, the gate parasitic diode risks reverse breakdown, when the presence of Z2 and its series D1 and resistance (i.e., resistance in series with Z2 and D1) can couple V GS Is stabilized at U Z2 Nearby, U Z2 The voltage stabilizing value of Z2 is smaller than the reverse breakdown voltage of the grid, and the function of protecting the grid is achieved; the design can systematically protect the grid electrode of the P-type gallium nitride device from reverse breakdown, meanwhile, the false switching-on caused by the influence of EMI in the switching process due to the low threshold voltage of the P-type gallium nitride device can be prevented, and the reliability of the grid electrode of the P-type gallium nitride device is improved. In addition, the positions of Z2 and D1 can be interchanged, Z2 and D1 between the grid and the source of the P-type gallium nitride device can be connected with a proper amount of resistors in series, so that heat generated in the high-frequency switching process can be effectively dissipated, a certain positive voltage is generated by a source parasitic inductor at the moment of turning off the P-type gallium nitride device, a grid parasitic diode of the P-type gallium nitride device can bear a large reverse voltage, the risk of breakdown is caused, the voltage can be converted into heat to be dissipated by Z2, D1 and the series resistors of the P-type gallium nitride device, and the reliability of the grid of the P-type gallium nitride device is further improved. In fig. 2, Q1 denotes a P-type gallium nitride device, and GND denotes a ground line.
For the two implementation structures shown in fig. 3 and 4, when the high-level output port of the dual-output channel driver IC outputs high-level VDD, instantaneous large current is generated through R1 and C1 to charge the P-GaN gate, after the P-GaN gate is stably turned on, Z2 and R3 which are connected in series are connected in parallel with R2 to flow small current to the P-GaN gate, so that the P-GaN is maintained in a conducting state, and simultaneously C1 is charged; when the low-level output port of the dual-output channel drive IC outputs low level 0, the potential on the left side of the capacitor C1 is pulled to U through Z1 Z1 Nearby, a certain negative potential is generated on the right side of C1 to close the conducting P-GaN, and the potential on the right side of C1 is not less than- (VDD C1/(C1+ C) P-GaN )-V GSF -U Z1 )，V GSF Is the partial voltage value of the P-GaN parasitic diode, C P-GaN Representing the parasitic capacitance of the P-GaN gate, the voltage across C1 is less than or equal to VDD C1/(C1+ C) P-GaN )-V GSF In the formula, C1 represents a capacitor for driving the capacitor C1, the voltage at two ends of C1 is gradually smaller than the voltage-stabilizing value of a voltage-stabilizing tube Z2, the voltage-stabilizing tube Z2 is gradually broken, and the resistance at two ends of C1 is gradually increased, so that the discharge of the C1 is slowly reduced, the negative voltage at the right side of C1 is slowly increased, a large and continuous and stable negative voltage is generated in a short time, the voltage is smaller than 0 in a long time, the negative voltage can inhibit the mistaken turn-on after the turn-off due to the low P-GaN threshold voltage, and in addition, the reverse breakdown of a P-GaN grid is not easily caused by the large negative voltage, and the reliability of the grid is improved. In addition, the parasitic inductance is easy to generate a positive potential near the source at the moment of turning off the P-GaN, and compared with the negative potential at C1, the parasitic diode of the P-GaN is subjected to a larger reverse voltage, and there is a risk of breakdown, the gate and the source of the P-GaN are connected in series through the second diode (i.e., D1 in fig. 3 and D2 in fig. 4) and Z3, and the second diode and Z3 can be connected in series with a suitably large resistor at the same time, so that the reverse voltage can be converted into heat to be dissipated, and the reliability of the P-GaN device in the switching process is further improved. Meanwhile, in order to weaken the influence of the reverse recovery of the high-level side capacitor of the dual-output channel drive IC on the P-type gallium nitride device, D1 can be connected in series, as shown in FIG. 4. Where Q1 in fig. 3 to 4 denotes a P-type gallium nitride device, and GND denotes a ground line.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (8)
1. A gate driving apparatus based on a dual output channel driver IC, comprising: the circuit comprises a double-output channel drive IC, a voltage stabilizing circuit, a stabilizing circuit and a drive circuit;
the high-level output port of the dual-output channel drive IC is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the low-level output port of the dual-output channel drive IC is connected with the first port of the voltage stabilizing circuit, the second port of the voltage stabilizing circuit is respectively connected with the first port of the stabilizing circuit and the first port of the drive circuit, the second port of the stabilizing circuit and the second port of the drive circuit are both connected with the grid electrode of the P-type gallium nitride device, and the grounding port of the dual-output channel drive IC and the source electrode of the P-type gallium nitride device are both grounded;
the stabilizing circuit comprises a first stabilizing resistor, a second voltage-stabilizing tube and a second stabilizing resistor, wherein the second voltage-stabilizing tube and the second stabilizing resistor are connected in parallel, the second voltage-stabilizing tube and the second stabilizing resistor are connected in series, and the anode of the second voltage-stabilizing tube points to the grid electrode of the P-type gallium nitride device.
2. The gate driving device according to claim 1, further comprising a conducting circuit, wherein a first port of the conducting circuit is connected to the high-level output port of the dual-output channel driving IC and the first port of the stabilizing circuit, respectively, and a second port of the conducting circuit is connected to the second port of the voltage stabilizing circuit and the first port of the driving circuit, respectively.
3. A gate drive device as claimed in claim 2, wherein the turn-on circuit comprises an on-resistance.
4. The gate driving apparatus of claim 1, wherein the voltage regulator circuit comprises a first voltage regulator tube, and a cathode of the first voltage regulator tube is directed to a gate of the P-type gallium nitride device.
5. A gate driving device as claimed in claim 1, further comprising a first diode having a cathode connected to the first port of the stabilization circuit and the first port of the driving circuit, respectively, and an anode connected to a high-level output port of the dual-output channel driving IC.
6. The gate driving apparatus according to claim 1, further comprising a consumption circuit, wherein a first port of the consumption circuit is connected to the second port of the stabilization circuit, the second port of the driving circuit, and the gate of the P-type GaN device, respectively, and a second port of the consumption circuit is connected to the source of the P-type GaN device.
7. A gate drive arrangement as claimed in claim 6, wherein the depletion circuit comprises a second diode and a third diode connected in series, the cathode of the second diode being directed to the gate of the P-type GaN device and the cathode of the third diode being directed to the source of the P-type GaN device.
8. A gate drive device as claimed in claim 1, wherein the drive circuit comprises a drive capacitor.
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| CN201910843529.2A CN112466241B (en) | 2019-09-06 | 2019-09-06 | Grid driving device based on dual-output channel driving IC |
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| JP5197658B2 (en) * | 2010-03-10 | 2013-05-15 | 株式会社東芝 | Driving circuit |
| CN103944361A (en) * | 2014-04-04 | 2014-07-23 | 国家电网公司 | Field effect transistor high-speed drive circuit high in power and resistant to interference |
| US9762119B2 (en) * | 2015-03-27 | 2017-09-12 | Samsung Electronics Co., Ltd. | Switch driving circuit, and power factor correction circuit having the same |
| JPWO2017081856A1 (en) * | 2015-11-09 | 2018-08-30 | パナソニックＩｐマネジメント株式会社 | Switching circuit |
| US10348286B2 (en) * | 2016-07-06 | 2019-07-09 | Delta Electronics, Inc. | Waveform conversion circuit for gate driver |
| KR101806731B1 (en) * | 2016-08-17 | 2017-12-08 | 현대자동차주식회사 | Gate driving apparatus |
| TWI686040B (en) * | 2018-01-05 | 2020-02-21 | 台達電子工業股份有限公司 | Waveform conversion circuit and gate-driving circuit |
| CN108768367A (en) * | 2018-06-07 | 2018-11-06 | 重庆大学 | SiC MOSFET driving circuits based on gate boost |
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