CN112447875A

CN112447875A - Avalanche type photoelectric transistor element and its optical detection method

Info

Publication number: CN112447875A
Application number: CN201910814249.9A
Authority: CN
Inventors: 那允中
Original assignee: Guangcheng Research & Innovation American Business Co ltd
Current assignee: Guangcheng Research & Innovation American Business Co ltd
Priority date: 2019-08-30
Filing date: 2019-08-30
Publication date: 2021-03-05
Anticipated expiration: 2039-08-30
Also published as: CN112447875B

Abstract

An avalanche type photo transistor device and a photo detection method thereof. According to one feature, an avalanche mode phototransistor includes a detection region configured to absorb light incident on a first surface of the detection region and generate one or more charge carriers upon absorption of the incident light; the first end is electrically connected with the detection area and can apply a voltage to the detection area; a transition doped region; a second terminal electrically connected to the transition doped region and capable of applying a voltage to the transition doped region; a multiplication region configured to receive one or more charge carriers flowing from the transition doped region and to generate one or more additional charge carriers corresponding to the received one or more charge carriers; a third terminal is electrically connected to the multiplication region and is capable of applying a voltage to the multiplication region, wherein the transition doping region is located between the detection region and the multiplication region.

Description

Avalanche type photoelectric transistor element and its optical detection method

Technical Field

The present invention relates to a photo-detection device and a photo-detection method thereof, and more particularly, to a photo-detection device using germanium as a light-absorbing material and a photo-detection method thereof.

Background

Light may be transmitted in free space or through an optical medium. The light may be coupled to a sensor (transducer) to convert an optical signal into an electrical signal for subsequent processing. However, the sensor may suffer from light energy loss due to poor efficiency or light leakage.

Disclosure of Invention

The invention discloses an avalanche photo-transistor technology for sensing application. This technique uses a three-terminal solution with an interface doping region (e.g., doping concentration greater than 10) between a detection region (e.g., a germanium layer) and a multiplication region (e.g., a silicon layer)¹⁸cm^-3Heavily doped p + layer). The use of separate terminals allows the transition doped region to be biased separately from the detection region and the multiplication region, sweeping carriers generated in the detection region to the multiplication region, and amplifying the generated carriers in the multiplication region.

One innovative feature of the presently disclosed subject matter is the implementation of a device comprising a detection region configured to absorb light incident on a first surface of the detection region; generating one or more charge carriers upon absorption of the incident light; a first terminal electrically connected to the detection region and capable of applying a voltage to the detection region; a transitional doping region having a doping concentration of a first type of doping greater than a critical doping concentration, wherein the one or more charge carriers flow into the transitional doping region; a second terminal electrically connected to the transition doped region and capable of applying a voltage to the transition doped region; a multiplication region configured to: receiving the one or more charge carriers flowing from the transitional doped region; generating one or more additional charge carriers corresponding to the received one or more charge carriers; and a third terminal electrically connected to the multiplication region and capable of applying a voltage to the multiplication region, wherein the transition doped region is located between the detection region and the multiplication region.

Other embodiments of the inventive features may include corresponding systems, apparatus, and computer programs, which are designed to perform the operations of the methods and methods encoded on computer storage elements.

These and other embodiments can optionally include one or more of the following features. According to some implementationsAlternatively, the detection region may be a crystalline germanium layer (crystal silicon layer) and the multiplication region may be a crystalline silicon layer (crystal silicon layer). The detection region may be operated in a non-avalanche mode and the multiplication region may be operated in an avalanche mode. The first type doping of the transition doped region is a p-type doping, and the critical doping concentration of the p-type doping in the crystalline silicon layer is at least 10¹⁸cm^-3。

According to some embodiments, the sensing region is adjacent to the overdoping region and a second surface of the overdoping region is coplanar with the first surface of the sensing region. According to some embodiments, the detection region is surrounded by a transition doped region.

According to some embodiments, the voltage difference across the multiplication region may be less than 7 volts. The voltage difference across the detection zone may be less than 3 volts.

Another novel aspect of the disclosed subject matter is a method comprising applying a first voltage to a first terminal of an avalanche transistor device, wherein the first terminal is electrically connected to a detection region of the avalanche transistor device; applying a second voltage to a second terminal of the avalanche photo-transistor device, wherein the second terminal is electrically connected to a transition doped region of the avalanche photo-transistor device; applying a third voltage to a third terminal of the avalanche transistor device, wherein the third terminal is electrically connected to a multiplication region of the avalanche transistor device; generating one or more charge carriers within the detection region from incident light impinging on a surface of the detection region; supplying the one or more charge carriers from the detection region to the multiplication region via the transition doped region; generating one or more additional charge carriers from the one or more charge carriers within the multiplication region; and using the avalanche photo-transistor element and using the one or more additional charge carriers in part to provide a detection measurement.

These and other embodiments can optionally include one or more of the following features. According to some embodiments, the incident light comprises one or more light pulses traveling in a medium and reflected by an object, and the detecting comprises determining a direct time delay, an indirect phase delay, or an indirect frequency delay caused by the one or more light pulses traveling in the medium and reflected by the object.

According to some embodiments, the detection measure is a current value corresponding to the additional charge carriers generated in the multiplication region.

According to some embodiments, wherein applying the second voltage and applying the third voltage comprises applying a voltage difference of less than 7 volts between the respective second terminal and the third terminal; applying the first voltage and applying the second voltage comprise applying a voltage difference of less than 3 volts between the respective first and second terminals.

According to some embodiments, the flow of the charge carriers and the additional charge carriers is perpendicular to the direction of incident light impinging on the surface of the detection region. The flow of the charge carriers and the additional charge carriers may be parallel to the direction of incident light impinging on the surface of the detection region.

Particular embodiments of the subject matter disclosed in this specification can realize one or more of the following advantages. An advantage of the present technique is that the required voltage to achieve avalanche operation of the element can be less than 7 volts (e.g., 6 volts). Voltages less than 7 volts may improve power budget requirements when incorporating the device into larger systems (e.g., consumer applications), and allow off-the-shelf parts (e.g., commercially available CMOS-compatible power supplies) to provide voltages to the device. Using heavy doping (e.g. greater than 10)¹⁸cm^-3Doping concentration) as a transition doping region between the detection region and the multiplication region, the sensitivity of doping perturbation in a device region (which is derived from process control factors) can be reduced, and thus breakdown voltage perturbation, avalanche voltage perturbation, etc. can be reduced; these perturbations result from non-uniform doping of the device and can cause permanent breakdown, avalanche and/or excessive dark current in the device.

Furthermore, according to some embodiments, the germanium detection region may be doped to a high concentration, for example greater than 10¹⁶cm^-3Even more than 10¹⁸cm^-3Such that the doping concentration of the germanium detection region is greater than the doping concentration of the silicon multiplication region. Therefore, the area of the depletion region in the germanium detection region is smaller than that of the depletion region in the silicon multiplication region, so that the effect of reducing dark current is achieved.

The invention is described in detail below with reference to the drawings and specific examples, but the invention is not limited thereto.

Drawings

Fig. 1A is a block diagram of an example of an avalanche mode phototransistor 100.

FIGS. 1B-1C are schematic diagrams of exemplary doped region geometries.

FIG. 2 is a flow chart of a method for detecting light in an operating state of an avalanche photodiode element.

FIG. 3 is a schematic energy band diagram of an avalanche photo transistor device in an operating state.

FIG. 4 is a schematic circuit diagram of an equivalent device of the avalanche photo transistor device in an operating state.

Fig. 5A-5B are schematic diagrams of another avalanche mode phototransistor.

FIGS. 6A-6B are schematic diagrams of another avalanche mode phototransistor.

Wherein, the reference numbers:

avalanche type photo transistor 100,402,500,600

Incident light 101

Substrate 102,144,502,602

Multiplication region 104,304,516,616

Interface 105

Detection region 106,306,504,604

First surface 107

Transition doped region 108,308,408,520,620

Depth 109,111,113

First doped region 110,310,506,606

Second doped region 112,514,614

First end 114,410,530,630

Second end 116,412,532,632

Third end 118,414,534,634

Thickness 120,122,508,510,518,522,608,612,618,622

Schematic diagrams 140,160

Finger 142

Width 146,152,168,510,610

Length 148,166

Gaps 150,164

Doped region 162

Light detection method 200

Step 202,204,206,208,210,212,214

Energy band diagram 300

Light source 301,501

Electrons 318,324

Void 319,325

Barriers 320,322

Equivalent circuit 400

Silicon multiplication region 404

Germanium detection region 406

Dark current 416

Multiplication factor 418

Leakage current 420

Light source 422,601

Photocurrent 424

Electrons 426

Surface 507,607

Distance 524,624

Direction 528

Detailed Description

The invention will be described in detail with reference to the following drawings, which are provided for illustration purposes and the like:

the invention discloses an avalanche photo-transistor (APT) element, which can detect an optical signal, convert the optical signal into an electric signal and amplify the electric signal for processing. The avalanche photodiode element has three terminals that apply voltages to a detection region, a multiplication region, and a transition doped region between the detection region and the multiplication region, respectively.

According to an embodiment, the applied voltage may be of the order of several volts, for example less than 3 volts, and may be applied to the germanium detection region. The germanium detection region (e.g. crystal)Bulk germanium layer) may be less than the unintended background doping level<10¹⁶cm^-3. In addition, the germanium detection region may also be doped to a high concentration, e.g., greater than 10¹⁶cm^-3Even more than 10¹⁸cm^-3. The electron-hole pairs are separated and charge carriers are swept from the detection region to the multiplication region by a voltage difference between a first doped region and the transition doped region of the germanium detection region.

According to one embodiment, the transition doped region between a germanium detection region and a silicon multiplication region may be heavily doped with P-type dopants, e.g., 10 in the transition doped region¹⁸-10²⁰cm^-3And the transitional doped region is biased to reduce and stabilize the breakdown voltage of the reverse biased PIN structure formed in the silicon multiplication region, e.g., to lower the breakdown voltage to less than 7 volts. This biased and heavily doped transition region reduces the barrier height at the interface between the germanium detection region, where charge carriers generated can more readily flow to the silicon multiplication region, and the silicon multiplication region. The silicon multiplication region can sweep and amplify photogenerated carriers by a voltage difference between a second doped region and the transition doped region of the silicon multiplication region.

The avalanche photo-transistor device may include a first doped region (e.g., doping concentration)>10¹⁸cm^-3A heavily doped p + region) embedded in the germanium detection region and electrically and physically connected to a first terminal, and a second doped region (e.g., doped concentration)>10¹⁸cm^-3A heavily doped n + region) buried in the silicon multiplication region and electrically and physically connected to a second terminal. The doping profiles of the first doped region and the second doped region can be respectively partially selected to form an Ohmic contact (Ohmic contact) between the first doped region and the first terminal; and ohmic contact is formed between the second doping region and the second terminal.

The doping profile (e.g., the concentration profile along the depth direction in the transition doped region and the second doped region) may be partially selected to form a gap between the p + transition doped region and the n + second doped regionAnd (6) PIN structure. The PIN structure may form an intrinsic region (intrinsic region) between the p + region and the n + region, and formed by a silicon multiplication region between the transitional doping region and the second doping region, the intrinsic region having a low doping level, e.g. may be unintentionally doped and have a dopant concentration of less than 10¹⁶cm^-3. In addition, the doping concentration of the silicon multiplication region can be greater than 10 according to different applications¹⁶cm^-3。

According to some embodiments, the germanium detection region is doped to a high concentration, for example greater than 10¹⁶cm^-3Even more than 10¹⁸cm^-3Such that the doping concentration of the germanium detection region is greater than the doping concentration of the silicon multiplication region. Therefore, the area of the depletion region in the germanium detection region is smaller than that of the depletion region in the silicon multiplication region, so that the effect of reducing dark current is achieved.

According to some embodiments, the doping types of the germanium detection region and the silicon multiplication region may be the same, e.g., both P-type or both N-type. According to some embodiments, the doping types of the germanium detection region and the silicon multiplication region may be different, for example, the germanium detection region is P-type, and the silicon multiplication region is N-type; or the germanium detection region is N-type and the silicon multiplication region is P-type.

According to some embodiments, the avalanche photodiode device may be designed to be a vertically integrated device, such as a device in which light is initially absorbed at the top surface of the device and then charge flows through the device in a vertical direction. Fig. 1A is a block diagram of an example of an avalanche mode phototransistor 100. As shown in fig. 1A, the avalanche photodiode element 100 is a vertically integrated device and includes a substrate 102, a multiplication region 104 on the substrate 102, and a detection region 106 on the multiplication region 104, the avalanche photodiode element 100 further includes a transition doped region 108 between the multiplication region 104 and the detection region 106.

The detection region 106 is configured to absorb light incident on a first surface 107 of the detection region 106, and one or more charge carriers are generated in the detection region 106 in the incident light. The sensing region 106 may be crystalline germanium, germanium-silicon (GeSi), or other materials that facilitate light absorption and process integration. At least one surface (e.g., the top surface) of the detection region 106 is exposed to incident light. As shown in fig. 1A, the detection region 106 is the top layer of the vertically integrated avalanche photodiode element 100.

The detection region 106 has a thickness 120, the thickness 120 is perpendicular to the first surface 107 and is sufficient for the incident light 101 (e.g., infrared light) to be absorbed, thereby allowing the incident light 101 to be absorbed in the detection region 106; in the detection region 106, at least one charge carrier pair may be generated by the incident light 101. The thickness 120 of the detection region 106 can be, for example, 0.5-5 microns.

The multiplication region 104 may be configured to absorb one or more charge carriers from the transition doped region 108 and generate one or more additional charge carriers. The multiplication region 104 may be crystalline silicon or other material suitable for multiplication and vertical integration. The multiplication region 104 is adjacent to the detection region 106 along an interface 105. As shown in FIG. 1A, this multiplication region 104 is a layer of material supported by the substrate 102 and can support the detection region 106, with the transition doped region 108 located at an interface between the multiplication region 104 and the detection region 106.

The multiplication region 104 has a thickness 122, the thickness 122 being perpendicular to the first surface 107 and sufficient to regenerate one or more additional charge carriers from one or more carriers generated by the detection region 106. The thickness 122 of the multiplication region 104 may be, for example, 100-500 nanometers (nm). The thickness 122 of the multiplication region 104 may determine the breakdown voltage of the thickness 122 of the multiplication region 104. A thickness 122 of, for example, 100 nm corresponds to 5-7 volts needed to achieve avalanche breakdown in the multiplication region 104. According to another example, a thickness 122 of 300 nm corresponds to 15-21 volts required to achieve avalanche breakdown in the multiplication region 104.

A first doped region 110 is adjacent to a surface of the sensing region 106. The first doped region 110 has a depth 111 from the surface of the detection region 106. The first doped region 110 comprises a p-type dopant, such as boron, aluminum, gallium, or indium. The doping profile of the first doping region 110 may be at least a critical amount (e.g. 10) along the depth 111¹⁶cm^-3) So that the doping concentration is fixed in the entire first doping regionThe domain 110 maintains a constant voltage. According to an example, the first doped region 110 comprises a doping concentration of at least 10¹⁸cm^-3And has a depth 111 adjacent to the first surface 107 of the germanium detection region 106.

A second doped region 112 is adjacent to a surface of the substrate 102. The second doped region 112 has a depth 113 from the surface of the substrate 102. The second doped region 112 comprises an n-type dopant, such as phosphorous, arsenic, antimony, bismuth, or the like. The doping profile of the second doping region 112 may be at least a critical amount (e.g. 10) along the depth 113¹⁶cm^-3) Such that a constant voltage is maintained throughout the second doped region 112. According to an example, the second doped region 112 comprises a doping concentration of at least 10¹⁸cm^-3And has a depth 113 adjacent to the surface of the substrate 102.

A transitional doped region 108 is located between the multiplication region 104 and the detection region 106. As shown in fig. 1A, the overdoped region 108 is buried at a surface of the multiplication region 104, which is adjacent to a surface of the detection region 106. This transitional doped region 108 has a depth 109 from the surface of the multiplication region 104. The depth 109 of this transition doped region 10 can be selected to fine tune the breakdown voltage of the multiplication region 104. In addition, the depth 109 of the transitional doping region 108 may be selected to be sufficiently thin to avoid Auger recombination (Auger recombination) and mobility mitigation of charge carriers, as will be explained in conjunction with FIG. 3 below.

The transition doped region 108 may be defined by a range of critical doping concentrations of the dopant material (e.g., p-type dopant) in the crystalline silicon layer. The p-type dopant is boron, aluminum, gallium or indium. The transitional doped region 108 has a doping concentration that is greater than the critical doping concentration. The threshold doping concentration is a minimum amount of dopant (e.g., p-type doping), and when present in the transitional doping region 108, allows the entire transitional doping region 108 to have a constant voltage. According to some examples, the critical doping concentration of the transitional doping region 108 may be 10¹⁶cm^-3. Applying a voltage to the transition doped region 108 and applying a voltage to the second doped region 112 mayGenerating a voltage difference across the multiplication region 104; this may reduce and stabilize the breakdown voltage of the PIN diode formed in the multiplication region 104, e.g., the voltage difference may be set to less than 7 volts. According to one example, the transitional doped region 108 is a region within a crystalline silicon layer having a concentration of 10 in the silicon layer¹⁸-10²⁰cm^-3Boron (b) in the presence of boron.

The doping profile of the transitional doping region 108 may be a constant doping concentration along the depth 109 of at least a threshold amount. According to one example, the transitional doped region 108 includes a buried depth 109 (adjacent to an interface 105 between the multiplication region 104 and the detection region 106) and has a doping concentration greater than 10¹⁸cm^-3Boron (b) in the presence of boron.

Each of the multiplication region 104, the detection region 106, and the transition doped region 108 is electrically and physically connected to one or more terminals. The terminals may be metal or metal alloy contacts that are electrically and physically connected to the corresponding regions, respectively. For example, the terminal may be made of aluminum, copper, tungsten, tantalum, a metal nitride, or a metal silicide. A minimum contact area of the terminals may be selected to minimize optical signal interruption while still providing physical and electrical connection with a probe to minimize attenuation of the applied voltage from the probe. As shown in fig. 1A, the multiplication region 104, the detection region 106, and the transition doping region 108 are electrically and physically connected to at least two terminals, respectively. Although not shown in fig. 1A, at least two terminals of each region are finally electrically and physically connected to each other.

A first terminal 114 is in electrical contact with the first doped region 110 and can apply a voltage to the detection region 106. More specifically, the first terminal 114 is in electrical and physical contact with the first doped region 110. The doping concentration of the first doped region 110 may be selected to provide a small contact resistance between the first terminal 114 and the first doped region 110 to allow for effective biasing while reducing the RC time constant to increase device operating speed.

A second terminal 116 is electrically connected to the transitional doped region 108 and is capable of applying a voltage to the transitional doped region 108, such that a voltage difference and an electric field are generated between the first doped region and the transitional doped region. The second terminal 116 is in electrical and physical contact with the transitional doped region 108. The doping concentration of the transition doped region 108 may be selected such that there is a small contact resistance between the second end 116 and the transition doped region 108 to enable bias.

A third terminal 118 is electrically connected to the second doped region 112 and can apply a voltage to the multiplication region 104, so that a voltage difference and an electric field can be generated between the transition doped region 108 and the second doped region 112. The third terminal 118 is electrically and physically connected to the second doped region 112. The second terminal 116 is in electrical and physical contact with the transitional doped region 108. The doping concentration of the second doped region 112 can be selected to have a small contact resistance between the triple terminal 118 and the second doped region 112 so that the bias voltage is effective and at the same time the RC time constant is reduced to increase the device operation speed.

According to some examples, for avalanche photo transistor devices with an operating bandwidth greater than GHz (i.e., optical communication applications), the total series impedance of the contact impedance and the doping impedance of the respective terminals and the doped layer is less than a few ohms. According to other examples, for avalanche photo transistor devices with operating bandwidths between MHz and GHz (i.e., time-of-flight ranging applications), the total series impedance of the contact impedance and the doping impedance of the respective terminals and the doped layer is less than tens of ohms.

Referring to fig. 2,3, and 6, the voltages applied to the first terminal 114, the second terminal 116, and the third terminal 118 will be described in more detail.

The transitional doped region 108, the first doped region 110, and the second doped region 112 have respective in-plane geometries (in-plane geometries) parallel to the first surface 107 and less than a complete layer. FIGS. 1B-1C are graphical representations of doped region geometries.

Fig. 1B is a schematic plan view 140 of the doped regions, which are the first doped region 110, the second doped region 112, or the transition doped region 108. As shown in fig. 1B, the planar geometry is a finger-like structure (finger-like structure) and includes a plurality of fingers 142 and a base 144, wherein each finger 142 has a width 146 and a length 148. There is a gap 150 between adjacent fingers 142, and the gap 150 has a width 152.

Fig. 1C is a schematic plan view 160 of the doped region 162, wherein the doped region 162 is the first doped region 110, the second doped region 112 or the transition doped region 108. As shown in fig. 1C, the planar geometry is a mesh-like structure and includes gaps 164 in the doped regions, the gaps 164 having a width 168 and a length 166. Although fig. 1C shows square gaps 164 in the doped regions 162, the gaps may have other geometries, such as circular, rectangular, polygonal, etc.

Although the planar patterns shown in fig. 1B and 1C are less than a complete layer, one or more doped layers (e.g., the first doped region 110, the second doped region 112, or the transition doped region 108) of the avalanche photo transistor device 100 may also be a complete layer.

Referring back to fig. 1A, in the illuminated state, the avalanche photodiode element 100 is illuminated by a light source 101. The light source 101 may be a Near Infrared (NIR) light source and emit light at a wavelength of 750 nanometers (nm) to 1.65 millimeters (mm). The peak wavelength of the emission of the NIR light source may be, for example, 850nm, 1.31mm or 1.55 mm. According to one example, the NIR light source 101 may be direct or indirect light from an NIR laser, NIR light emitting diode, or other NIR light source for optical communication and/or optical sensing. The light source 101 may illuminate at least a first surface 107 of the detection region 106, such that the detection region 106 may absorb light from the light source 101 and generate one or more carriers from the light source 101. In a vertical integration device, as shown in FIG. 1A, the flow of charge carriers and other charge carriers is perpendicular to the direction of light incident on the surface of the detection region 106. The operation of the avalanche mode phototransistor 100 under illumination conditions will be described below in conjunction with figures 2,3, and 6.

Manufacturing of avalanche type photoelectric transistor

Various features of the avalanche photodiode element 100 shown in fig. 1A may be fabricated on the substrate 102, for example, using CMOS (complementary metal-oxide-semiconductor) micro-fabrication techniques, such as photolithography, etching, deposition, etc. According to some examples, the avalanche photo transistor device 100 may be fabricated by ion implantation, diffusion, rapid thermal processing, or the like, to form the second doped region 112 embedded in the substrate 102.

A silicon multiplication layer 104 may be grown on the silicon substrate 102 by various vacuum techniques, such as Chemical Vapor Deposition (CVD), Metal Organic Chemical Vapor Deposition (MOCVD), Molecular Beam Epitaxy (MBE), Atomic Layer Deposition (ALD), or the like. According to some embodiments, the second doped region 112 may be buried in a silicon substrate 102 by, for example, ion implantation, wherein an undoped silicon layer on the buried second doped region 112 may form a silicon multiplication layer 104.

In forming the silicon multiplication layer 104, a transition doped region 108 may be embedded in an interface 105 of the silicon multiplication layer 104, for example, in-situ doping (in-situ dopings) may be used to form the transition doped region 108. According to some embodiments, the transition doped region 108 may be formed by implantation or diffusion techniques.

A germanium detection region 106 may be formed atop the silicon multiplication layer 104 using CVD, MOCVD, MBE, ALD, or the like. In forming the germanium detection region 106, a first doped region 110 may be embedded at an interface 107 of the germanium detection region 106, for example, in-situ dopings (in-situ dopings) of a grown germanium material may be used to form the first doped region 110. According to some embodiments, the first doped region 110 may be formed by implantation or diffusion techniques.

The

terminals

114, 116, and 118 may be formed on the avalanche photo transistor device 100 using a process including a deposition step, a lift-off step, or an etching step to contact the first doped region 110, the transition doped region 108, and the second doped region 112, respectively.

Example of operation of avalanche mode phototransistor

Fig. 2 is a flow chart 200 of a method for detecting light in an avalanche mode phototransistor under operating conditions. The operating condition of the avalanche transistor element 100 may include applying one or more voltages to respective terminals (e.g., the first terminal 114, the second terminal 116, and the third terminal 118) of the avalanche transistor element 100. The operating condition may also include exposing at least one surface (e.g., the first surface 107) of the avalanche photodiode element 100 to illumination from a light source.

A first voltageIs applied to a first terminal electrically connected to a detection region (step 202). Referring to FIG. 1A, a first voltage V_UTo a first end 114 that is electrically connected to the detection region 106. According to an example, a first voltage V applied to the first terminal 114_UIs 0 volts.

Referring to fig. 2, a second voltage is applied to a second terminal electrically connected to the transition doped region (step 204). Referring to FIG. 2, a second voltage V_MTo a second end 116 electrically connected to the transition doped region 108. A second voltage V_MMay be selected in part to sweep charge carriers from the detection region 106 to the multiplication region 104. If the voltage is less than a threshold second voltage, the transition doped region 108 may serve as a gate between the detection region 106 and the multiplication region 104, and a voltage exceeding the threshold second voltage is required at the second terminal to facilitate the movement of charge carriers from the detection region 106 to the multiplication region 104, i.e., the voltage required by the gate. For example, a first voltage V applied to the first terminal 114_UA second voltage V applied to the second terminal 116 at 0V_MAnd may be less than or equal to 5 volts, such as 3 volts.

According to some embodiments, the first voltage V is applied_UAnd applying a second voltage V_MIncluding applying a voltage difference (less than 5 volts) and an electric field between the first terminal and the second terminal. The voltage difference between the respective first and

second terminals

114, 116 may be selected to be sufficient so that one or more charge carriers generated in the detection region 106 (e.g., the germanium layer) may be swept into the heavily doped region 108 at a desired mobility time. According to an example, for a detection region 106 including germanium, the voltage difference between the first terminal 114 and the second terminal 116 is 1-2 volts.

Referring again to FIG. 2, a third voltage is applied to a third terminal electrically connected to the multiplication region (step 206). Referring to FIG. 1A, a third voltage V_LTo a third endpoint 118 electrically connected to the multiplication region 104. For example, a first voltage V applied to the first terminal 114_UA second voltage V of 0V applied to the second terminal 116_MAt 3V, a third voltage V is applied to the third terminal 118_LMay be less than or equal to 12 volts, e.g.Is 10 volts.

According to some embodiments, the second voltage V is applied_MAnd applying a third voltage V_LIncluding applying a voltage difference (less than 9 volts) and an electric field between the second terminal 116 and the third terminal 118. The voltage difference between the respective second and

third terminals

116, 118 may be selected to be sufficient so that the charge carrier or carriers generated at the overdoped region 108 may be swept to a multiplication region (e.g., a silicon layer) at a desired mobility time and with a desired magnification. According to an example, the voltage difference between the second terminal 116 and the third terminal 118 is 5-6 volts for the detection region 106 comprising silicon.

Referring to fig. 3, an exemplary band diagram 300 of an avalanche mode phototransistor component (e.g., avalanche mode phototransistor component 100) in an operational state is shown. The avalanche photodiode element 100 of band diagram 300 includes a multiplication region 304, a detection region 306, and a transition doped region 308 (between the multiplication region 304 and the detection region 306). According to some embodiments, the detection region 306 comprises a first doped region 310, wherein the first doped region 310 is a heavily doped p + type region and has a charge concentration greater than 10¹⁸cm^-3. The multiplication region 3046 includes a second doped region 312, wherein the second doped region 312 is a heavily doped n + type region and has a charge concentration greater than 10¹⁸cm^-3. The transition doped region 308 is a heavily doped region with a charge concentration greater than 10¹⁸cm^-3。

As described in the aforementioned step 202-206 of FIG. 2, a set of voltages V is applied to the respective terminals of the avalanche photo transistor device_U、V_MAnd V_LA band diagram as shown in fig. 3 can be produced. For example, a voltage difference is applied between a first terminal (e.g., the first terminal 114 and electrically connected to the first doped region 310) and a second terminal (e.g., the second terminal 116 and electrically connected to the transitional doped region 308), and the voltage difference is less than 3 volts; in addition, a voltage difference is applied between the second terminal and a third terminal (e.g., the third terminal 118 and electrically connected to the second doped region 312), and the voltage difference is less than 7 volts. If the first doped region, the transitional doped region, and the second doped region are doped p +, and n +, respectively, in the multiplication region 104The PIN junction formed is characterized as a reverse biased PIN junction.

Referring again to fig. 2, after light is incident on a surface of the detection region, one or more charge carriers may be generated within the detection region (step 208). A charge carrier-related photocurrent generated within the detection region is correlated with an electric field between the first doped region and the transition doped region. Referring to fig. 3, light incident from a light source 301 (i.e., NIR light from an NIR light source 301) is irradiated on a surface of the detection region 306. Light from the light source 301 is absorbed in the detection region, i.e., in the crystalline germanium layer, and one or more charge carriers (i.e., electrons 318 and holes 319) are generated from the absorbed light.

Referring again to fig. 2, one or more charge carriers may be supplied from the detection region to the multiplication region by the overdoping region (step 210). If the first voltage V is sufficient_UAnd a second voltage V_MSupplied to the first doped region and the transition doped region, respectively, charge carriers will be swept from the detection region to the multiplication region. As shown in fig. 3, one or more charge carriers (e.g., electrons 318) cross a potential barrier 320 to be swept by the detection region 306 to the multiplication region 304, and a small or even zero electric field is applied. A barrier 322 to holes 319 promotes charge separation between electrons 318 and holes 319, such barrier 322 being created by the band alignment of the germanium layer and the silicon layer formed at the interface between the detection region 306 and the transition doped region 308. The voltage difference applied between the second end point and the third end point may generate a strong electric field and enable an avalanche process in the multiplication region 304 that facilitates the flow of electrons 318 to the multiplication region 304 and the amplification of the number of electrons at the multiplication region 304.

As shown in fig. 2, one or more additional charge carriers are generated using one or more charge carriers in the multiplication region (step 212). Once the one or more electrons 318 shown in fig. 3 are swept into the multiplication region 304, a charge multiplication process can be generated and additional electron 324 and hole 325 pairs are generated within the multiplication region 304. If a sufficient voltage difference, such as a voltage difference of at least 7 volts, is applied between the second terminal (e.g., the second terminal 116) and the third terminal (e.g., the third terminal 118), the multiplication region 304 may operate under an avalanche process, generating one or more additional carriers to provide amplification for the one or more carriers. The additionally generated one or more holes 325 move to the heavily doped p + -type first doping region 310 and are collected at the first end point; while one or more additional electrons 324 flow to the heavily doped n + -type second doped region 312 and are collected at a third end point.

Referring again to fig. 2, a detection measurement may be provided (step 214), based in part on the one or more additional carriers. According to some embodiments, the detection measurement is a current value corresponding to additional charge carriers generated in the multiplication region 304 and collected by the third endpoint in the n + -type second doped region 312. For further description of the collected current value, reference is made to the following description in conjunction with FIG. 4.

According to some embodiments, the incident light from the light source 301 comprises one or more light pulses that travel in a medium (e.g., air, liquid, stone, or brick) and are reflected by an object. The object may be an object (e.g., a hand, a face, a finger, etc.), a vehicle (e.g., a car, a plane, etc.), a building, or other object. The light pulses traveling in the medium may be from an NIR laser source where the light pulses are reflected by the article and incident on the avalanche mode phototransistor element. The detection measurement includes identifying a direct time delay, an indirect phase delay, or an indirect frequency delay caused by the time of flight of one or more light pulses (traveling in the medium and reflected by the object). According to some embodiments, the incident light from the light source 301 comprises one or more light pulses traveling in and passing through a confining medium (e.g., optical fiber, optical waveguide). The light pulses traveling in the medium may be from an NIR laser source, where the pulses are incident on the avalanche photodiode element. Detecting the measurement includes identifying a "0" state, a "1" state, or a particular state of the 2n states of the digital optical communication (using one or more light pulses traveling in the medium).

Fig. 4 is an equivalent circuit of the avalanche mode phototransistor element in the operating state. In conjunction with fig. 1A, the avalanche photo-transistor device 402 of fig. 4 includes a silicon multiplication region 404, a germanium detection region 406, and a transition doping region 408 (between the silicon multiplication region 404 and the germanium detection region 406). A first terminal 410 is electrically connected to a first doped region of the germanium detection region 406, and the first doped region is buried within the germanium detection region 406. A second terminal 412 is electrically connected to the heavily doped region 408. A third terminal 414 is electrically connected to the silicon multiplication region 404 at a second doped region adjacent to the silicon multiplication region 404.

In the operating state, a first voltage V_USuch as 0 volts, is applied to this first terminal 410. A second voltage V_ME.g., 3 volts, is applied to this second terminal 412. A third voltage V_LSuch as 10 volts, is applied to this third terminal 414. The voltage difference between the first terminal 410 and the second terminal 412 (i.e., at the first voltage V)_UAnd a second voltage V_M3 volts difference between) can apply a voltage to the germanium detection region 406 and generate a dark current that flows from the germanium detection region 406 to the first end point 410

416。

The voltage difference between the second terminal 412 and the third terminal 414 (i.e., at the second voltage V)_MAnd a third voltage V_LA voltage difference of 7 volts) can be biased to the silicon multiplication region 404 to cause the silicon multiplication region 404 to operate in an avalanche state. The biased silicon multiplication region 404 operating in the avalanche state, if injected with charge carriers, has a multiplication factor M418, and this multiplication factor M418 results in the gain of the avalanche photo transistor device 402. A second voltage V_MApplied to the second terminal 412, a leakage current flowing from the second terminal 412 to the first terminal 410 may be generated

420, and the leakage current

420 are measurable at the first endpoint 410.

In the dark condition (dark condition), i.e. the avalanche photo transistor device 402 is not illuminated by light, the multiplication factor M418 also increases the dark current

416. Current measurement I at first endpoint 410 under dark condition (dark condition)_u(D) Is composed of

In the illuminated state, i.e., with the avalanche photodiode element 402 illuminated by light, an avalanche photodiode element 402 is illuminated by incident light from the light source 422 (i.e., an NIR laser). Light energy impinges on the germanium detection region 406 and is converted to one or more charge carriers (i.e., electron-hole pairs) to produce a photocurrent

424, the electron-hole pairs are separated so that electrons 426 flow to the silicon multiplication region 404 and the third end 414, and holes 427 flow to the first end 410. The electrons 426 are amplified to generate one or more additional charge carriers in the silicon multiplication region 404. Current measurement I at first terminal 410 under illumination conditions_u(L) is

By means of current measurements I under irradiation_u(L) subtracting the current measurement I for the dark condition_u(D) An amplified photocurrent measurement is obtained, wherein the result is a current value corresponding to the generation of additional charge carriers in the silicon multiplication region 404.

According to some embodiments, detecting the measurement includes identifying a direct time delay, an indirect phase delay, or an indirect frequency delay caused by a time of flight of one or more light pulses (traveling in the medium and reflected by the object). By measuring the pulse time of the light source 422 and the current measurement I of the photocurrent of the avalanche photodiode element 402_u(D) The direct time delay, the indirect phase delay or the indirect frequency delay can be determined. E.g. time of use-A time-to-digital converter (time-to-digital converter) measures the direct time delay between the emission of a NIR laser pulse and the detection of the reflected NIR laser pulse. For example, a local oscillator (local oscillator) having the same waveform as the amplitude modulated continuous wave NIR laser (or frequency modulated continuous wave NIR laser) may be used to mix with the reflected NIR laser to create an indirect phase delay or an indirect frequency delay.

Other embodiments of avalanche mode photo transistors

According to some embodiments, the avalanche photodiode element may be configured as a horizontally integrated device, i.e., light is absorbed at the top surface of the device and then charges flow horizontally (laterally) across the width of the device. In other words, the flow direction of the charge carriers and the additional charge carriers is horizontal to the direction of the light impinging on the surface of the detection region. The horizontal integration element may have a heavily doped p + region horizontally (laterally) separated from the germanium detection region, i.e. the heavily doped p + region is adjacent to or surrounds the germanium detection region. Fig. 5A and 5B and fig. 6A and 6B show two embodiments of horizontally integrated device structures for avalanche mode phototransistor devices. FIGS. 5A and 5B are schematic views of another avalanche mode phototransistor with a transitional doped region horizontally separated from the sensing region. Fig. 5A is a cross-sectional view of a single-sided avalanche photodiode element 500 with the flow direction of the charge carriers and extra charge carriers horizontal to the top surface of the avalanche photodiode element 500. The single-side avalanche photodiode 500 includes a substrate 502 (e.g., a silicon substrate). The substrate 502 may additionally comprise a silicon layer epitaxially grown on top thereof. A sensing region 504, such as a germanium sensing region, is embedded in the epitaxially grown silicon layer and/or silicon substrate 502. The embedded germanium detection region may be formed by etching the epitaxially grown silicon layer and/or silicon substrate 502 to form a recess, and then selectively growing germanium in the recess. The germanium detection region 504 may have a thickness 508 of 0.5-5 microns (um) and a width 510 of 0.5-50 microns (um).

A first doped region 506 is embedded in the detection region 504 and is adjacent to a surface 507 of the detection region 504, wherein the surface 507 is a top surface of the avalanche photo transistor device on which the light from the light source 501 is incident. The doping profile of the first doped region 506 is more than oneCritical value (e.g. 10)¹⁶cm^-3) And a constant doping concentration and a thickness 512 into the sensing region 504. In this thickness 512, for example, at least 10 a along its depth¹⁸cm^-3P + doping concentration of (a). According to some examples, the doped layer thickness 512 of the first doped region 506 may be between 20 nanometers (nm) and 500 nanometers (nm). Doped layer thickness 512 may be other values, according to some examples.

A second doped region 514 is adjacent to the sensing region 504 and is partially or fully embedded in a multiplication region 516 (e.g., epitaxially grown silicon layer adjacent to the surface 507). The doping profile of the second doped region 514 is above a threshold (e.g., 10)¹⁶cm^-3) And into the multiplication region 516 by a thickness 518. In this thickness 518, for example, at least 10 a along its depth¹⁸cm^-3N + doping concentration of (c). According to some examples, the doped layer thickness 518 of the second doped region 514 may be between 20 nanometers (nm) and 1500 nanometers (nm). Doped layer thickness 518 may be other values, according to some examples.

A transitional doped region 520 is located between the first doped region 506 and the second doped region 514 and is embedded in the silicon material (e.g., in the silicon substrate 502 between the first doped region 506 and the second doped region 514). The doping profile of the transitional doping region 520 is above a threshold (e.g., 10)¹⁶cm^-3) And into the transitional doped region by a thickness 522. In this thickness 522, for example, at least 10 a along its depth¹⁸cm^-3P + doping concentration of (a). According to some examples, the doping layer thickness 522 of the first transitional doping region 520 may be between 20 nanometers (nm) and 500 nm. The doped layer thickness 522 may be other values, according to some examples.

Similar to the multiplication region 104 of the vertically integrated device shown in fig. 1A, the distance 524 between the transition doped region 520 and the second doped region 514 defines the multiplication region 516 of the avalanche photo transistor device 500. As shown in fig. 5A, one or more charge carriers generated in the detection region 504 flow horizontally along a direction 528 toward the multiplication region 516, where one or more additional charge carriers are generated by the avalanche process.

Each of the first doped region 506, the transitional doped region 520, and the second doped region 514 is electrically and physically connected to a corresponding terminal. The first doped region 506 is electrically connected to a first terminal 530, the first terminal 530 supplying a first voltage V_U. The transition doped region 520 is electrically connected to a second terminal 532, the second terminal 532 supplying a second voltage V_M. The second doped region 514 is electrically connected to a third terminal 534, and the third terminal 534 supplies a third voltage V_L。

Fig. 5B is a top view of the avalanche photo transistor device 500. As shown in fig. 5B, the sensing region 504 surrounds the first doped region 506, and the overdoped region 520 is located between the first doped region 506 and the second doped region 514.

The advantage of the horizontal integration device shown in FIG. 5A is a flat surface topography compared to the vertical integration device shown in FIG. 1A. This reduces in-plane stress to facilitate back-end-of-line metal processing and allows more control over chemical mechanical polishing.

According to other examples, the detection region is surrounded by a transition doped region of the avalanche photodiode element 500. Fig. 6A and 6B illustrate another avalanche photodiode device in which a transition doped region 620 of a double-sided avalanche photodiode surrounds the detection region. The double-sided avalanche mode phototransistor 600 shown in figures 6A and 6B has multiple directions of flow for the generated charge carriers relative to the single direction 528 of the single-sided avalanche mode phototransistor 500 shown in figures 5A and 5B. Fig. 6A is a cross-sectional view of a double-sided avalanche photodiode element 600. The double-sided avalanche photodiode device 600 includes a substrate 602 (e.g., a silicon substrate). The substrate 602 may further comprise a silicon layer epitaxially grown on top thereof. A sensing region 604 (e.g., a germanium sensing region) is embedded in the epitaxially grown silicon layer and/or the silicon substrate 602. Similar to the single-sided avalanche photodiode device 500, the embedded germanium detection region may be fabricated by etching the epitaxially grown silicon layer and/or silicon substrate 602 to form a recess, and then selectively growing germanium in the recess. Germanium detection region 604 can have a thickness 608 of 0.5-5 microns (um) and a width 610 of 0.5-50 microns (um).

A first doped region 606 is embedded in the detection region 604 and adjacent to the detection regionA surface 607 of the detection region 604 is formed, wherein the surface 607 is the top surface of the avalanche photodiode element on which the light from the light source 601 is incident. The doping profile of the first doped region 606 is above a threshold (e.g., 10)¹⁶cm^-3) And a constant doping concentration and a thickness 612 deep into the sensing region 604. In this thickness 612, for example, at least 10 a along its depth¹⁸cm^-3P + doping concentration of (a).

As shown in fig. 6B, a second doped region 614 surrounds the sensing region 604 and is partially or fully embedded in a multiplication region 616 (e.g., epitaxially grown silicon layer adjacent to the surface 607). The doping profile of the second doped region 614 exceeds a threshold (e.g., 10)¹⁶cm^-3) And into multiplication region 616 by a thickness 618. In this thickness 618, for example, at least 10 a along its depth¹⁸cm^-3N + doping concentration of (c).

As shown in fig. 6B, a transition doped region 620 is located between the first doped region 606 and the second doped region 614, and surrounds the detection region 604. The transitional doped region 620 is embedded in a silicon material (e.g., within the silicon substrate 602). The doping profile of the transitional doping region 620 is above a threshold (e.g., 10)¹⁶cm^-3) And into the transitional doped region by a thickness 622. In this thickness 622, for example, at least 10 a along its depth¹⁸cm^-3P + doping concentration of (a).

Similar to the multiplication region 104 of the vertically integrated device shown in fig. 1A, the distance 624 between the transition doped region 620 and the second doped region 614 defines the multiplication region 616 of the avalanche photo transistor device 600. As shown in fig. 6A, one or more charge carriers generated in the detection region 604 flow horizontally along a direction 528 towards the multiplication region 516 surrounding the detection region 604, wherein one or more additional charge carriers are generated by the avalanche process.

Each of the first doped region 606, the transitional doped region 620, and the second doped region 614 is electrically and physically connected to a corresponding terminal. The first doped region 606 is electrically connected to a first terminal 630, the first terminal 630 supplying a first voltage V_U. The transition doped region 620 is electrically connected to the second terminal 632,the second terminal 632 supplies a second voltage V_M. The second doped region 614 is electrically connected to a third terminal 634, the third terminal 634 supplying a third voltage V_L。

According to some embodiments, light incident on the first surface of the detection region of the avalanche photodiode element is coupled into the first surface of the avalanche photodiode element via free space. The incident light may, for example, be forward (normal) incident to the first surface of the detection region (incident light 101 is incident to surface 107 as shown in fig. 1A). According to some embodiments, light incident on the detection region of the avalanche photodiode element is coupled into the detection region of the avalanche photodiode element via evanescent coupling of a waveguide. The avalanche photodiode element may be integrated with a waveguide (e.g., a silicon ridge waveguide) in which light is transmitted through a passive waveguide and evanescent-wave coupled to the detection region (e.g., a germanium detection region) of the avalanche photodiode element. Evanescent coupling of light may be in-plane (in-plane), i.e., coupling in parallel to the first surface of the detection region.

In accordance with the foregoing description and corresponding figures, an avalanche mode phototransistor includes a detection region and a multiplication region for generating a photocurrent, wherein the detection region operates in a non-avalanche mode to detect and generate charge carriers and the multiplication region operates in an avalanche mode to amplify the charge carriers. Operating in avalanche mode operating in an operating condition with a multiplication gain greater than 1(M > 1); while the non-avalanche mode operation operates under operating conditions with a multiplication gain equal to 1 (M-1).

More specifically, the avalanche photo transistor device applies three constant voltages to a first doped region, a transition doped region and a second doped region, respectively. The voltage at the transition doped region can be appropriately designed to stabilize the operation at the detection region and the multiplication region. On the other hand, the detection region is made of a different material (e.g., germanium) than the multiplication region (e.g., silicon). The difference in material can enable the detection and multiplication efficiency to be respectively improved.

While this specification describes many implementation details, these should not be construed as limitations on the scope of the invention, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

Moreover, while certain embodiments are shown in the figures herein to be performed according to a particular order of operations, it should be understood that such order may not be necessary (i.e., the embodiments may perform the operations in a different order, combine certain operations, overlap certain operations, etc.), and in some cases it may be advantageous to multiplex and process certain operations in parallel. Moreover, in the foregoing embodiments, the separation of various system components should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems can be integrated in a single software product or packaged into multiple software products.

The present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof, and it should be understood that various changes and modifications can be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims

1. A kind of photoelectric crystal component, characterized by, comprising:

a detection region is configured to:

absorbing an incident light incident on a first surface of the detection region;

generating one or more charge carriers in response to the incident light;

a first terminal electrically connected to the detection region and capable of applying a voltage to the detection region;

a transitional doping region having a doping concentration of a first type of doping greater than a critical doping concentration, wherein the one or more charge carriers flow into the transitional doping region;

a second terminal electrically connected to the transition doped region and capable of applying a voltage to the transition doped region;

a multiplication region configured to:

receiving the one or more charge carriers flowing from the transitional doped region;

generating one or more additional charge carriers corresponding to the received one or more charge carriers; and

a third terminal electrically connected to the multiplication region and capable of applying a voltage to the multiplication region,

wherein the transition doped region is located between the detection region and the multiplication region.

2. The device of claim 1, wherein the sensing region comprises a crystalline germanium layer.

3. The phototransistor component of claim 1, wherein the multiplication region comprises a crystalline silicon layer.

4. The device of claim 1, wherein the first type dopant of the transitional doping region is a p-type dopant.

5. The device of claim 4, wherein the critical doping concentration of the p-type dopant in the crystalline silicon layer is at least 10¹⁶cm^-3。

6. The device of claim 1, wherein the transition doped region is adjacent to the sensing region and wherein a second surface of the transition doped region is coplanar with the first surface of the sensing region.

7. The device of claim 1, wherein a doping concentration of the detection region is greater than a doping concentration of the multiplication region.

8. The device of claim 1, wherein the voltage difference across the multiplication region is less than 7 volts.

9. The device of claim 8, wherein the voltage difference across the sensing region is less than 3 volts.

10. The phototransistor component of claim 1, wherein the detection region operates in a non-avalanche mode and the multiplication region operates in an avalanche mode.

11. A method of optical detection, comprising:

applying a first voltage to a first terminal of an avalanche transistor, wherein the first terminal is electrically connected to a detection region of the avalanche transistor;

applying a second voltage to a second terminal of the avalanche photo-transistor device, wherein the second terminal is electrically connected to a transition doped region of the avalanche photo-transistor device;

applying a third voltage to a third terminal of the avalanche transistor device, wherein the third terminal is electrically connected to a multiplication region of the avalanche transistor device;

generating one or more charge carriers within the detection region from incident light impinging on a surface of the detection region;

supplying the one or more charge carriers from the detection region to the multiplication region via the transition region;

generating one or more additional charge carriers from the one or more charge carriers within the multiplication region; and

the avalanche photo-transistor element is used, and the one or more additional charge carriers are used in part, to provide a detection measurement.

12. The method of claim 11, wherein the incident light comprises one or more light pulses traveling in a medium and reflected by an object, and the detecting comprises determining a direct time delay, an indirect phase delay, or an indirect frequency delay caused by the one or more light pulses traveling in a medium and reflected by an object.

13. A method as in claim 11, wherein a doping concentration of the detection region is greater than a doping concentration of the multiplication region.

14. The method of claim 11, wherein applying the second voltage and applying the third voltage comprise applying a voltage difference of less than 7 volts between the second terminal and the third terminal, respectively.

15. A light detection method as defined in claim 11, wherein:

applying the first voltage and applying the second voltage comprise applying a voltage difference of less than 3 volts between the corresponding first and second terminals.

16. A method as in claim 11, wherein a doping concentration of the transitional doping region is greater than a threshold doping concentration.

17. A light detecting element as in claim 16, wherein the critical doping concentration of the p-type doping in the transitional doping region is at least 10¹⁶cm^-3。

18. The method of claim 11, wherein the flow of the charge carriers and the additional charge carriers is perpendicular to a direction of incident light impinging on the surface of the detection region.

19. The method as claimed in claim 11, wherein the flow of the charge carriers and the additional charge carriers is horizontal to an incident light direction impinging on the surface of the detection region.

20. A method of light detection as in claim 11, wherein the detection region operates in a non-avalanche mode and the multiplication region operates in an avalanche mode.