CN112445262B - Low-dropout voltage stabilizing circuit supporting multi-path direct parallel output, operation method and power supply device thereof - Google Patents

Low-dropout voltage stabilizing circuit supporting multi-path direct parallel output, operation method and power supply device thereof Download PDF

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CN112445262B
CN112445262B CN201910830287.3A CN201910830287A CN112445262B CN 112445262 B CN112445262 B CN 112445262B CN 201910830287 A CN201910830287 A CN 201910830287A CN 112445262 B CN112445262 B CN 112445262B
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voltage
metal oxide
oxide semiconductor
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semiconductor transistor
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CN112445262A (en
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王磊
李展
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Chen Core Technology Co ltd
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    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/625Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc

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Abstract

A low dropout voltage regulator circuit supporting multiple direct parallel outputs, comprising: the circuit comprises N error amplifiers, N output stage circuits and N voltage dividers, wherein the error amplifiers are used for comparing a reference voltage with a feedback voltage of an output voltage and outputting an error signal based on a comparison result; the output stage circuit comprises a plurality of metal oxide semiconductor transistors and is provided with a grid connected with an error signal, a source connected with an input voltage and a drain connected with an output voltage; the voltage divider feeds back a predetermined portion of the output voltage as a feedback signal to the error amplifier; n is not less than 2, the output stage circuit comprises a first MOS transistor and a second MOS transistor, the first MOS transistor is provided with a source electrode connected with the input voltage, a drain electrode connected with the error amplifier, and a grid electrode is connected with the drain electrode; the second MOS transistor has a source connected to the input voltage, a drain connected to the output voltage, and a gate connected to the gate of the first MOS transistor.

Description

Low-dropout voltage stabilizing circuit supporting multi-path direct parallel output, operation method and power supply device thereof
Technical Field
The invention relates to the technical field of power supply, in particular to a multi-path direct parallel output low-dropout voltage stabilizing circuit applied to the fields of consumer electronics, communication, automotive electronics and the like with different power supply load types, an operation method and a power supply device with the low-dropout voltage stabilizing circuit.
Background
Consumer electronics have become an indispensable part of people's daily life, and the power management chip plays an important role in electronic equipment, and the quality of its performance has a direct influence on the energy consumption of the whole circuit. The types of power management chips are many, and among them, the linear voltage regulator, the switching voltage regulator (DC/DC), the driver chip and the power management unit occupy most of the mountains. In these several major categories, linear regulators have taken the largest market share. The low dropout linear regulator is a most widely used power management chip at present due to the characteristics of high conversion efficiency, small volume, low noise, few external elements and low price. The traditional low dropout voltage regulator circuit has the disadvantages of high output noise, complex structure, high power consumption and poor stability of the existing noise reduction circuit. The existing electronic products integrate more and more chips and peripherals, the working current is obviously improved, and for high-load current application, two or more low dropout voltage regulator (LDO) circuits are sometimes connected in parallel for use. A parallel LDO regulator may distribute power dissipation heat over multiple LDO regulator packages compared to a single LDO regulator. Generally, two-way or multi-way LDO regulators cannot directly connect output terminals together. Because characteristics such as multichannel LDO reference voltage, feedback resistance and PCB parasitic resistance can not be completely consistent, the output voltage of LDO regulators directly connected in parallel is not matched, and further the output current of each LDO regulator is seriously unbalanced. Worst case, it may cause one of the LDO regulators to carry most of the load current, triggering current limiting protection. In order to make the LDO regulators applied in parallel flow load current, taking two LDO regulators as an example, the prior art mainly adopts the following two parallel connection methods:
1. a parallel arrangement of diodes is used. The single LDO output is connected in series with the diode and then used in parallel as shown in fig. 1. Because the forward conduction voltage VF of the diode changes along with the change of the current flowing through the diode, the output voltage difference of the two LDO voltage regulators can be partially offset, and the current equalizing effect is achieved. The disadvantages of this technique are: the forward conduction voltage VF of the diode changes with the load current and the ambient temperature, which results in low output voltage precision and poor load regulation rate after the LDO regulators are connected in parallel.
2. A parallel arrangement of ballast resistors is used. The output end of the single LDO is connected in series with the ballast resistor and then is connected in parallel for use. The principle of the parallel connection mode of the diodes is similar, wherein the large-current branch circuit flows through the ballast resistor to cause larger output voltage drop, so that the other branch circuit outputs larger current to play a current equalizing effect. The disadvantages of this technique are: the current sharing effect is related to the resistance value of the ballast resistor, the larger the resistance value is, the better the current sharing effect is, but the larger the IR drop of the output voltage is, the larger the power loss of the system is. Furthermore, the multiple ballast resistors R1 and R2 connected in parallel cannot be matched completely easily, as shown in FIG. 2.
It can be seen from the above that no matter the LDO chips with the multi-path discrete structures are connected in parallel, or different LDO modules in the multi-path power management chip (PMU chip) are connected in parallel, the current equalizing effect of the output current is realized by the aid of external diodes or ballast resistors, and the current equalizing effect is limited. Meanwhile, by adopting the two technologies, the stability of the loop after the LDO voltage regulators are connected in parallel can be affected, and frequency compensation needs to be additionally considered.
In view of the above, the present invention provides a low dropout voltage regulator supporting multi-path direct parallel output and a power supply apparatus having the low dropout voltage regulator, through careful experiments and researches, so as to solve the above technical problems in the prior art.
Disclosure of Invention
The invention aims to: the low dropout voltage stabilizing circuit supporting multi-path direct parallel output can perform current sharing without an external diode or a ballast resistor, meets various load requirements, and solves the technical problems in the prior art.
In order to achieve the purpose of the invention, the invention provides a technical scheme as follows:
a low dropout voltage regulator circuit supporting multiple direct parallel outputs, comprising:
n error amplifiers, N output stage circuits and N voltage dividers, the error amplifiers are used for comparing the reference voltage with the feedback voltage of the output voltage and outputting error signals based on the comparison result, and the error amplifiers are biased by the input voltage; the output stage circuit comprises a plurality of metal oxide semiconductor transistors, wherein each metal oxide semiconductor transistor is provided with a grid connected with an error signal, a source connected with an input voltage and a drain connected with an output voltage; the voltage divider is used for feeding back a predetermined part of the output voltage to the error amplifier as a feedback signal; wherein N ≧ 2, each error amplifier, each output stage circuit and each voltage divider are connected in parallel, and each output stage circuit comprises a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor, the first metal oxide semiconductor transistor has a source connected with an input voltage, a drain connected with the error amplifier, and a gate and a drain connected with each other; the second metal oxide semiconductor transistor has a source connected to the input voltage, a drain connected to the output voltage, and a gate interconnected with the gate of the first metal oxide semiconductor transistor.
In one possible design, the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor form a pair of matched current mirrors for copying the reference current and converting the reference current into a fixed multiple current.
In one possible design, the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor are implemented using a common centroid layout to reduce output current mismatch.
In one possible design, each output stage circuit employs a P-channel metal oxide semiconductor transistor.
In one possible design, each error amplifier employs an operational trans-impedance amplifier (OTA).
In one possible design, each voltage divider has a first resistor and a second resistor connected in series between the output voltage and ground, with the feedback voltage being connected between the first resistor and the second resistor.
To achieve another objective of the present invention, another technical solution provided by the present invention is as follows:
an operation method of a low dropout voltage regulator circuit supporting multi-path direct parallel output comprises the following steps:
providing N error amplifiers, N output stage circuits and N voltage dividers, wherein each error amplifier, each output stage circuit and each voltage divider are connected in parallel, each output stage circuit comprises a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor, the first metal oxide semiconductor transistor is provided with a source electrode connected with an input voltage, a drain electrode connected with the error amplifier, and a grid electrode and the drain electrode are connected with each other; the second metal oxide semiconductor transistor has a source connected to the input voltage, a drain connected to the output voltage, and a gate connected to the gate of the first metal oxide semiconductor transistor;
the output voltage passes through a voltage divider of one of the N output stage circuits to generate a feedback voltage;
receiving the feedback voltage through N error amplifiers and comparing the feedback voltage with a reference voltage to generate a reference current; and
generating N paths of output current through a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor in the N output stage circuits respectively;
the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor form a matching current mirror so as to form current sharing between the N paths of output currents.
To achieve another objective of the present invention, another technical solution provided by the present invention is as follows:
a power supply apparatus having a low dropout voltage regulator circuit supporting multiple direct parallel outputs, comprising: the system comprises a power supply, a switching circuit, a low-dropout voltage stabilizing circuit and M loads;
the low dropout voltage stabilizing circuit comprises N error amplifiers, N output stage circuits and N voltage dividers, wherein the error amplifiers are used for comparing the feedback voltage of the reference voltage and the output voltage and outputting error signals based on the comparison result, and the error amplifiers are biased by the input voltage; the output stage circuit comprises a plurality of metal oxide semiconductor transistors, wherein each metal oxide semiconductor transistor is provided with a grid connected with an error signal, a source connected with an input voltage and a drain connected with an output voltage; the voltage divider is used for feeding back a predetermined part of the output voltage to the error amplifier as a feedback signal;
wherein N ≧ 2 and N ≧ M, each error amplifier, each output stage circuit, and each voltage divider are formed in parallel, and each output stage circuit includes a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor, the first metal oxide semiconductor transistor has a source connected to an input voltage, a drain connected to the error amplifier, and a gate and a drain connected to each other; the second metal oxide semiconductor transistor has a source connected to the input voltage, a drain connected to the output voltage, and a gate connected to the gate of the first metal oxide semiconductor transistor; the output end of the power supply is connected with the input end of the switching circuit; the output end of the power supply is connected with the input end of the low-dropout voltage stabilizing circuit; the output end of the switching circuit is connected with the input end of the low-dropout voltage stabilizing circuit; the input end of the low dropout voltage stabilizing circuit is connected with a load; according to the multi-path current output requirements of M loads, the N error amplifiers, the N output stage circuits and the N voltage dividers are increased or reduced to form a parallel configuration so as to obtain the same or different multi-path current output
In one possible design, the power supply apparatus with a low dropout voltage regulator circuit supporting multiple direct circuit outputs is applied to a multi-channel power management chip (PMU chip).
Drawings
Fig. 1 is a circuit architecture diagram of a prior art parallel LDO regulator using diodes.
FIG. 2 is a circuit diagram of a prior art parallel LDO regulator using a ballast resistor.
3a-3b are schematic diagrams of a low dropout voltage regulator circuit supporting two direct parallel outputs according to the present invention.
FIG. 4a is a diagram illustrating an exemplary low dropout voltage regulator circuit supporting multiple direct parallel outputs according to the present invention.
FIG. 4b is another exemplary embodiment of a low dropout voltage regulator circuit supporting multiple direct parallel outputs according to the present invention
FIG. 5 is a block diagram of a power supply apparatus having a low dropout voltage regulator circuit according to the present invention.
Fig. 6a-6c show different embodiments of the power supply apparatus of fig. 3a-3b extended to N-way according to the present invention.
Description of reference numerals: 10-low dropout voltage regulator circuit; 20-a power supply; 30-a switching circuit; 40-load; LDO, LDO1, LDO2, LDO3 and LDO 4-low dropout voltage regulator circuit; OTA, OTA1, OTA 2-error amplifier; output stage, output stage1, output stage 2-output stage circuit; RD, RD1, RD 2-voltage divider; OPA1, OPA2 — operational amplifier; m1, M3-first metal oxide semiconductor transistor; m2, M4-second metal oxide semiconductor transistor; vref-reference voltage; vin-input voltage; vout-output voltage; vFB-a feedback voltage; iref — reference current; iout 1-first output current; iout 2-second output current.
Detailed Description
The following detailed description and technical contents of the present invention are described with reference to the drawings, which are provided for reference and illustration purposes only and are not intended to limit the present invention. Various embodiments of the present invention will be described in detail below with reference to the accompanying drawings, but the present invention is not limited to only these embodiments. The invention is intended to cover alternatives, modifications, equivalents, and alternatives that may be included within the spirit and scope of the invention. In the following description of the preferred embodiments of the present invention, specific details are set forth in order to provide a thorough understanding of the present invention, and it will be apparent to those skilled in the art that the present invention may be practiced without these specific details.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the present disclosure does not denote any order, quantity, or importance, but rather the terms "first," "second," and the like are used to distinguish one element from another. The use of "including," "comprising," "having," and the like in this disclosure is intended to mean that the component or object before the word "appears in the art" includes reference to the component or object listed after the word and its equivalents, rather than excluding other components or objects. The terms "upper", "lower", and the like are used only to indicate relative positional relationships, and when the absolute position of the object to be described is changed, the relative positional relationships may be changed accordingly. The term "coupled" as used throughout this specification means "connected directly or indirectly through an intermediate connection (e.g., a switch) that is electrical, mechanical, etc., and is not necessarily limited to physical connections. Additionally, the connection may be such that the objects are permanently connected or releasably connected. The connection may be through a switch.
Referring to fig. 3a-3b, schematic diagrams of the low dropout voltage regulator circuit supporting multiple direct parallel outputs according to the present invention are shown (since the reference voltage generating circuit, the current source generating circuit, and the amplifier circuit are not critical to the present invention, and those skilled in the art can obtain them from the prior art, the description of the embodiment is not made in detail). In order to effectively solve the problems in the prior art, firstly, how to realize the direct parallel application of two or more LDO voltage regulators and ensure the current-sharing output by a good matching technology and a layout under the condition of not needing an external diode or a ballast resistor; and secondly, how to ensure good loop stability under the condition of parallel application of the multi-path LDO voltage stabilizer.
The invention provides a low dropout voltage regulator circuit 10 supporting multi-path direct parallel output, comprising: the circuit comprises N error amplifiers OTA, N output stage circuits output stage and N voltage dividers RD, wherein each error amplifier OTA, each output stage circuit output stage and each voltage divider RD are connected in parallel to form a plurality of groups of types; in this embodiment, we use 2 sets (N ═ 2) of embodiments to illustrate, which include 2 sets of error amplifiers (OTA1, OTA2), output stage1, output stage2, and voltage dividers (RD1, RD2), which are shown as 2 sets in the figure, but not limited thereto.
As mentioned above, the error amplifier (OTA1, OTA2) is used to compare the reference voltage Vref with the feedback voltage V of the output voltage VoutFBAnd outputs an error signal based on the comparison result, and an error amplifier (OTA1, OTA2) is biased by the input voltage Vin; the output stage circuit (output stage1, output stage2) comprises a plurality of metal oxide semiconductor transistors (M1, M2, M3, M4) and the metal oxide semiconductor transistors are provided with a grid connected with an error signal, a source connected with an input voltage Vin and a drain connected with an output voltage Vout; a voltage divider (R1, R2) to feed back a predetermined portion of the output voltage Vout as a feedback signal to the error amplifier (OTA1, OTA 2); wherein the first output stage1 comprises a first Metal-Oxide-Semiconductor (MOS) transistor M1 and a second MOS transistor M2, and the other output stage2 comprises a first MOS transistor M3 and a second MOS transistor M4; the first metal oxide semiconductor transistor (M1, M3) of each group of output stage circuits (output stage1, output stage2) is provided with a source connected with the input voltage Vin, a drain connected with the error amplifier (OTA1, OTA2), and a grid and the drain are connected with each other; the second metal oxide semiconductor transistor (M2, M4) has a source connected to the input voltage Vin, a drain connected to the output voltage Vout, and a gate connected to the gate of the first metal oxide semiconductor transistor (M1, M3).
According to an embodiment of the present invention, for such a circuit structure, the first mos transistor (M1, M3) and the second mos transistor (M2, M4) of each group of output stage circuits (output stage1, output stage2) may be pmos power transistors. The voltage of the first metal oxide semiconductor transistor (M1, M3) and the second metal oxide semiconductor transistor (M2, M4) as channel devices (pass devices) may be referred to as a "drop-out". According to the embodiment of the present invention, the smaller the voltage difference voltage is, the more preferable. Due to the interconnection of the gates of the first metal oxide semiconductor transistor (M1, M3) and the second metal oxide semiconductor transistor (M2, M4), the gate voltages thereof can be provided by any bandgap reference source with any structure, can be provided by any constant voltage terminal in the circuit, and can also be provided by any circuit capable of providing a reference voltage.
According to an embodiment of the invention, in order to obtain a good matching technology and layout to implement direct parallel application of two or more LDO voltage regulators and guarantee current-sharing output, the first metal oxide semiconductor transistor (M1, M3) and the second metal oxide semiconductor transistor (M2, M4) of each output stage (output stage1, output stage2) form a matching current mirror to copy and convert the reference current into a fixed multiple current.
Further, the matching technique may be implemented by using a common centroid layout for the first mos transistor (M1, M3) and the second mos transistor (M2, M4) of each output stage (output stage1, output stage2) to reduce the output current mismatch problem.
According to an embodiment of the invention, each set of error amplifiers (OTA1, OTA2) is biased by an input voltage Vin, the error amplifiers (OTA1, OTA2) comparing a reference voltage Vref with a feedback voltage V of an output voltage VoutFBTo output an error signal to a gate of the first metal oxide semiconductor transistor (M1, M3) based on the comparison result. This means that for fast and accurate operation of the voltage regulator shown in example fig. 3b, the error amplifier mainly detects and amplifies the reference voltage Vref and the feedback voltage VFBThe difference between them. In the present embodiment, each error amplifier may employ an operational trans-impedance amplifier (OTA).
According to one embodiment of the present invention, each of the voltage dividers (RD1, RD2) includes a first resistor R1 and a second resistor R2 connected in series between the output voltage Vout and ground, and the feedback voltage VFBConnected between the first resistor R1 and the second resistor R2.
Based on the low dropout voltage regulator circuit supporting the multi-path direct parallel output in the embodiment, the invention provides an operation method of the low dropout voltage regulator circuit supporting the multi-path direct parallel output, which comprises the following steps:
the output voltage Vout passes through the voltage divider RD1 of the output stage1 of the first set of output stages to generate the feedback voltage VFB
Receiving the feedback voltage V by N error amplifiers (OTA1, OTA2)FBAnd comparing with a reference voltage Vref to generate a reference current Iref; and
the first output current Iout1 and the second output current Iout2 are generated by the first metal oxide semiconductor transistor (M1, M3) and the second metal oxide semiconductor transistor (M2, M4) in each output stage (output stage1, output stage2), respectively. In addition, if there are N output stage circuits (output stage1, output stage2 … output stage N), N output currents are generated by the first mos transistor (M1, M3) and the second mos transistor (M2, M4) in the output stage circuits, respectively.
Through the specific matching technology in the above embodiment, the first output current Iout1 and the second output current Iout2 of the two-way output stage circuit (output stage1, output stage2) can be completely matched and equalized without the aid of an external diode or a ballast resistor.
Referring to fig. 4a, the present invention is further illustrated with respect to the features of the low dropout voltage regulator circuit supporting multiple direct parallel outputs in the above embodiment, as shown in fig. 4a, the low dropout voltage regulators (LDO1, LDO2) are two identical low dropout voltage regulators, and the bold black nodes at the same position in the circuit structure are connected through the control switches K1_ A, K1_ B and K1_ C. When low dropout regulators (LDO1, LDO2) are required to be used in parallel, switches K1_ A, K1_ B and K1_ C can be closed simultaneously through register control, and complete current sharing of output currents Iout1 and Iout2 can be achieved through relevant matching technologies on circuits and layouts.
Referring to fig. 4b, the present invention is further illustrated with respect to the features of the low dropout voltage regulator circuit supporting multiple direct parallel outputs in the above embodiment, as another specific example shown in fig. 4b, according to the specific example shown in fig. 4a, in order to achieve better mirroring effect for the reference current Iref, the first output current and the second output current (Iout1, Iout2), the matching technique of the operational amplifier clamp current mirror is adopted in this embodiment, by clamping the drain potentials of the first metal oxide semiconductor transistor M1 and the second metal oxide semiconductor transistor M2 in one group through the operational amplifier OPA1, the Vds voltages of the first metal oxide semiconductor transistor M1 and the second metal oxide semiconductor transistor M2 are guaranteed to be equal (Vds is the voltage of the drain relative to the source), and good current mirror matching between the first metal oxide semiconductor transistor M1 and the second metal oxide semiconductor transistor M2 is achieved. Similarly, the drain potentials of the first metal oxide semiconductor transistor M3 and the second metal oxide semiconductor transistor M4 of the other group are clamped by the operational amplifier OPA2, so that the Vds voltages of the first metal oxide semiconductor transistor M3 and the second metal oxide semiconductor transistor M4 are ensured to be equal, and good current mirror matching between the first metal oxide semiconductor transistor M3 and the second metal oxide semiconductor transistor M4 is realized. Thereby, the first output current and the second output current (Iout1, Iout2) realize the current sharing effect.
Referring to fig. 5, based on the low dropout voltage regulator circuit supporting multiple direct parallel outputs in the above embodiment, the present invention provides a Power supply apparatus having a low dropout voltage regulator circuit supporting multiple direct parallel outputs, which can be applied to Power Management Units (PMUs) of multiple channels. The power supply device includes: a power supply 20, a switching circuit 30, the low dropout voltage regulator circuit 10, and M loads 40; the aforementioned low dropout voltage regulator circuit 10 will not be described herein; wherein N ≧ 2 and N ≧ M, the output terminal of the power supply 20 is connected to the input terminal of the switching circuit 30; the output end of the power supply 20 is connected with the input end of the low-dropout voltage stabilizing circuit 10; the output end of the switching circuit 30 is connected with the input end of the low dropout voltage stabilizing circuit 10; the input end of the low dropout voltage stabilizing circuit 10 is connected with a load 40; according to the multi-path current output requirements of the M loads, the N error amplifiers, the N output stage circuits and the N voltage dividers are increased or decreased to form a parallel configuration, so that the same or different multi-path current outputs are obtained.
Based on the power supply devices in the above embodiments, the following 3 implementation examples of the power supply devices are illustrated, as shown in fig. 6a to 6c, if the structure of the low dropout voltage regulator circuit supporting multiple direct parallel outputs of the present invention is adopted, only one LDO with a 100mA structure needs to be designed, and other three different load current requirements can be generated by connecting several LDOs with 100mA in parallel like using a similar building block method. The circuit structure shown in fig. 6a can provide two output currents of 200 mA; the circuit structure shown in FIG. 6b can provide two output currents of 300mA and 100 mA; the circuit arrangement represented in fig. 6c can provide a single output current of 400 mA. It can be seen that the various circuit configurations shown in fig. 6a-6c indicate that, for different load conditions, the low dropout voltage regulator circuit configuration of the present invention can use a method similar to building blocks to achieve good flexibility and adaptability.
To sum up, the low dropout voltage regulator circuit supporting multi-path direct parallel output, the operating method and the power supply device thereof of the invention have the following characteristics:
1. the output of the low-dropout voltage stabilizing circuit supporting the multi-path direct parallel output can be directly used in parallel by adopting a method similar to building blocks according to different load requirements, and the current equalization can be realized without an external diode or a ballast resistor.
2. In the low dropout voltage regulator circuit parallel structure supporting multi-path direct parallel output, a control switch Kn is adopted to realize connection of a zero pole position node related to loop stability in a single-path LDO voltage regulator.
3. The low-dropout voltage stabilizing circuit supporting multi-path direct parallel output adopts an operational amplifier clamp current mirror technology to ensure accurate matching of current.
4. After the low dropout voltage regulator circuits supporting multi-path direct parallel output are directly connected in parallel for use, frequency compensation is automatically completed without adjustment, and the stability of a loop is not influenced.
The foregoing description shows and describes several preferred embodiments of the invention, but as before, it is to be understood that the invention is not limited to the forms disclosed herein, but is not to be construed as excluding other embodiments and from various other combinations, modifications, and environments and is capable of changes within the scope of the inventive concept as expressed herein, commensurate with the above teachings, or the skill or knowledge of the relevant art. And that modifications and variations may be effected by those skilled in the art without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (11)

1. The utility model provides a support multichannel direct parallel output's low dropout voltage regulator circuit which characterized in that, support multichannel direct parallel output's low dropout voltage regulator circuit includes:
n error amplifiers, each of the error amplifiers is used for comparing a reference voltage with a feedback voltage of an output voltage and outputting an error signal based on the comparison result, the N error amplifiers are biased by an input voltage, each of the error amplifiers comprises a third metal oxide semiconductor transistor and a fourth metal oxide semiconductor transistor, the grid electrode of the third metal oxide semiconductor transistor is used for inputting the reference voltage, the grid electrode of the fourth metal oxide semiconductor transistor is used for inputting the feedback voltage, the drain electrodes of every two adjacent third metal oxide semiconductor transistors are connected through a first switch, and the drain electrodes of every two adjacent fourth metal oxide semiconductor transistors are connected through a second switch;
n output stage circuits, each of which includes a plurality of metal oxide semiconductor transistors having a gate connected to the error signal, a source connected to the input voltage, and a drain connected to the output voltage, wherein the gates in each two adjacent output stage circuits are connected through a third switch; and
n voltage dividers, each to feed back a predetermined portion of the output voltage as a feedback signal to the N error amplifiers;
wherein N ≧ 2, each of the error amplifiers, each of the output stage circuits, and each of the voltage dividers are connected in parallel, and each of the output stage circuits includes:
a first metal oxide semiconductor transistor having a source connected to the input voltage and a drain connected to the error amplifier, wherein a gate of the first metal oxide semiconductor transistor and the drain of the first metal oxide semiconductor transistor are connected to each other;
a second metal oxide semiconductor transistor having a source connected to the input voltage, a drain connected to the output voltage, and a gate connected to the gate of the first metal oxide semiconductor transistor; and
and an operational amplifier for clamping drain potentials of the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor to equalize drain-source potential differences of the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor and generate a current mirror image.
2. The low dropout voltage regulator circuit supporting multiple direct parallel outputs of claim 1 wherein said first metal oxide semiconductor transistor and said second metal oxide semiconductor transistor form a pair of matched current mirrors for replicating a reference current and converting to a fixed multiple current.
3. The low dropout voltage regulator circuit supporting multiple direct parallel outputs of claim 1 wherein said first metal oxide semiconductor transistor and said second metal oxide semiconductor transistor are implemented using a common centroid layout for reducing output current mismatch.
4. The low dropout voltage regulator circuit supporting multiple direct parallel outputs of claim 1 wherein each of said error amplifiers utilizes a P-channel metal oxide semiconductor transistor.
5. The low dropout voltage regulator circuit supporting multiple direct parallel outputs of claim 1 wherein each of said error amplifiers comprises an operational transimpedance amplifier.
6. The low dropout voltage regulator circuit of claim 1 wherein each of said voltage dividers has a first resistor and a second resistor connected in series between said output voltage and ground, said feedback voltage being connected between said first resistor and said second resistor.
7. An operation method of a low dropout voltage regulator circuit supporting multiple direct parallel outputs is characterized in that the operation method of the low dropout voltage regulator circuit supporting multiple direct parallel outputs comprises the following steps:
providing the low dropout voltage regulator circuit of claim 1 that supports multiple direct parallel outputs;
the output voltage is passed through the voltage divider of one of N of the voltage dividers to generate the feedback voltage;
receiving the feedback voltage through N error amplifiers and comparing the feedback voltage with the reference voltage to generate reference current; and
generating N output currents through the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor in the N output stage circuits respectively;
the first metal oxide semiconductor transistor and the second metal oxide semiconductor transistor form a pair of matched current mirrors so as to match the N paths of output currents to form current sharing.
8. A power supply device with a low dropout voltage regulator circuit supporting multiple direct parallel outputs, the power supply device with the low dropout voltage regulator circuit supporting multiple direct parallel outputs comprising:
the low dropout voltage regulator circuit of claim 1 that supports multiple direct parallel outputs;
the power supply, the switching circuit and the M loads, wherein N is more than or equal to M;
the output end of the power supply is connected with the input end of the switching circuit;
the output end of the power supply is connected with the input end of the low-dropout voltage stabilizing circuit;
the output end of the switching circuit is connected with the input end of the low-dropout voltage stabilizing circuit; and
the output end of the low dropout voltage stabilizing circuit is connected with the load;
according to the multi-path current output requirements of the M loads, the number of the N error amplifiers, the number of the N output stage circuits and the number of the N voltage dividers are increased or decreased to form a parallel configuration, so that the same or different multi-path current outputs can be obtained.
9. The power supply apparatus of claim 8, wherein said first mos transistor and said second mos transistor form a pair of matched current mirrors for replicating a reference current and converting to a fixed multiple current.
10. The power supply apparatus of claim 8, wherein said first mos transistor and said second mos transistor are implemented using a common centroid layout for reducing output current mismatch.
11. The power supply apparatus having a low dropout voltage regulator circuit supporting multiple direct parallel outputs according to claim 8, wherein said power supply apparatus having a low dropout voltage regulator circuit supporting multiple direct parallel outputs is applied to a multi-channel power management chip.
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