CN112414207A - Portable general parallel test equipment - Google Patents

Abstract

The invention provides portable general parallel test equipment, which is designed based on a CPCI industrial bus architecture and realizes parallel fast detection of 4 all-in-one machines or missiles for the first time in the field of a flying missile weapon system, so that the technical guarantee efficiency of the missiles is greatly improved; the efficiency is improved and the development cost of the model test equipment is greatly reduced by developing novel portable test equipment by means of a parallel test technology; the technical scheme which is mature as much as possible is adopted for logical recombination, the test equipment is comprehensive in function coverage, high in reliability and low in technical risk, and the operability of comprehensive guarantee and test of individual soldiers is improved through the portable design; the parallel test greatly shortens the whole flow cycle of the batch production line and greatly reduces the human resource overhead; the universal design scheme ensures that the requirement of sharing the multi-model and multi-project weapon system test equipment can be met only by replacing the test cable, and the equipment performance is superior.

Description

Portable general parallel test equipment

Technical Field

The invention relates to the technical field of automatic testing, in particular to portable universal parallel testing equipment of a weapon system.

Background

Since the 21 st century, in the army and army field of weapon system guarantee, based on the equipment construction needs, the successful practice in the civil field and the active promotion of the army high-rise, the equipment guarantee transformation construction is continuously strengthened, one of the symbolic achievements is to implement a guarantee strategy based on performance, and the purposes of reducing the logistics scale, reducing the use and guarantee cost and improving the guarantee efficiency and the equipment integrity are achieved. Performance-Based assurance (PBL) is an acquisition and guarantee integration process for purchasing weapon system Performance, improves the readiness integrity of the weapon system, and promotes the system reliability, the assurance and the whole-life management of total ownership cost. The guarantee based on the performance is the most important guarantee transformation strategy since 21 st century of the America army, is a fundamental significant change of the America army guarantee guiding idea, is also an important practice of modern management theory in the field of America army equipment guarantee, and brings obvious influence on the readiness integrity and the economic tolerance of the America army equipment.

In recent years, the demands of various military species for different functions and different types of tactical weapons in China are continuously increased, domestic weapons enter the rapid development stage, the promotion of various tests such as delivery, acceptance and the like accompanying with items and models of a batch production line is established, and the advantages of performance guarantee strategies are fully recognized, so that higher requirements are put forward in the fields of comprehensive guarantee and test of weapons in the aspects of cost, efficiency, personnel and the like. The existing production line adopts a traditional one-to-one test mode in the test link, and in order to meet the test requirements of high-efficiency and large-batch products, the development work of models can be completed only by matching the mode of continuously putting test equipment, the development cost of the models is greatly increased, the development efficiency of the models cannot be obviously improved, and the input-output ratio is difficult to adapt to the urgent needs of modern enterprises, particularly the national defense field.

Disclosure of Invention

In view of the above, the present invention aims to overcome the defects of the prior art, and provide a novel portable general multiple-generation parallel test apparatus which adopts a novel parallel test software platform and a novel multi-core multi-thread parallel management technology to solve the problem thoroughly, improve the rapid detection capability of the aeronautical missile, develop the attack of the portable, general and parallel test technologies based on performance guarantee strategies, and develop the parallel test apparatus.

In order to solve the technical problem, the invention provides portable general parallel test equipment for detecting a weapon system, which comprises a reinforced case, a mainboard, a plurality of composite board cards, a plurality of rear wiring boards, a program-controlled power supply, a waterproof keyboard and a monitoring display screen, wherein the mainboard, the plurality of composite board cards, the plurality of rear wiring boards and the program-controlled power supply are fixed in a guide rail in the case; an air inlet and an air outlet are arranged on the upper and lower sides of the case, and a stepless speed-regulating direct-current fan is arranged at the air outlet on the lower side and used for radiating heat of the internal board card; the program control power supply is independently designed with double cooling fans and the redundant heat is directly removed from the side wall; the multiple composite boards comprise signal input and output boards and communication interface boards; the back wiring boards comprise a host back board, a signal input and output back board and a communication interface back board; the output of the programmable power supply is supplied to 4 tested objects through the power supply control relay board, the output of the programmable power supply is supplied to each board card in the case through the power supply control relay board, the control relay board is controlled by an RS232 serial port of a rear board of the computer host, the control relay board has multi-path external direct current power supply output, the on-off of each path of power supply is controlled respectively, the power supply control relay board also has the function of controlling the internal and external power supply input conversion, and the input of the programmable power supply in the case can be automatically switched between an alternating current power supply or a direct current power supply.

The bus backboard is provided with a bus interface;

and a monitoring module is arranged in the case and used for monitoring the working states of the fan and the voltages of all paths, and a monitoring display screen on one side of the waterproof keyboard displays the monitored working state.

Furthermore, the main board, the expansion card and the back board are fixed through a pin hole connector with very high stability and a guide rail structure; manufacturing a case by adopting an aluminum magnesium alloy profile; the portable case adopts the design of a flip-down waterproof dustproof silica gel keyboard, and is provided with a display; the CPCI back board is vertically installed, the board card is vertically inserted into the case from the side face of the case, and the board card is inserted into the board card which is shielded by the back outer side installation panel; handles are arranged on two sides of the upper part of the case; the keyboard of the case is designed with rubber wrap angles, and the case is integrally provided with rubber pads.

Furthermore, 3 signal input/output boards are provided, and the signal input/output boards can provide a plurality of groups of different types of isolation resources to realize 3-imitation-4 structures.

Further, the signal input and output board integrates the following signal input and output ports: 2 groups of 6-path digital-analog conversion interfaces DA, and two groups of groups are physically isolated, wherein the first group of 4-path digital-analog conversion interfaces DA and the second group of 2-path digital-analog conversion interfaces DA are respectively connected with the first group of 4-path digital-analog conversion interfaces DA; supporting multi-path synchronous consistent conversion; 6 groups of 28-path analog-digital conversion interfaces AD, 6 groups of analog-digital conversion interfaces AD are physically isolated from each other, wherein 2 groups of analog-digital conversion interfaces AD are differential acquisition interfaces, the first group of 6-path differential acquisition, the second group of 2-path differential acquisition and two groups of groups are physically isolated; 4 groups of analog-digital conversion interfaces AD single-ended acquisition, and a first group of 10 paths of analog-digital conversion interfaces AD single-ended acquisition; the second group of 4-channel analog-digital conversion interface AD single-end acquisition; the third group of 4 paths of analog-digital conversion interfaces AD single-end acquisition; the fourth group of 2-path analog-digital conversion interface AD single-end acquisition; the four groups are physically isolated, and multi-path synchronous consistent conversion is supported; the 32-path digital input interface DI is divided into 4 groups, each 8 paths form one group, and the groups are mutually isolated; 2 groups of 8-path digital output interfaces DO adopt relay isolation output, the current allowed by each path of output is not less than 10mA, the first group of 6-path digital output interfaces DO and the second group of 2-path digital output interfaces DO are isolated from each other.

Furthermore, when the signal input/output board adopts a 3-way 4-way structure, the 4 independent parallel test channels respectively have 19 DI (digital interface), 6 DO (data input/output), 20 AD (analog/digital) and 4 DA (digital/analog) resources.

Furthermore, the communication interface board has 4 blocks, each communication interface board has 6 paths of digital output interfaces DO, each path has relay output isolation, and the current allowed by each path of output is not less than 10 mA; the 1-path dual-redundancy 1553B communication bus can operate in three working modes of BC, RT and MT; 3 paths of CAN bus interfaces supporting CAN2.0A/B protocols, and each path of CAN bus interface is provided with independent photoelectric isolation; each path of the high-speed RS422 communication interface is provided with an independent 32M byte sending cache and an independent 32M byte receiving cache, the 4 paths of high-speed RS422 serial communication interfaces are mutually independent and adopt photoelectric isolation, and power supplies of the high-speed RS422 serial communication interfaces are mutually independent and adopt on-board direct current/direct current isolation power supplies; the LVDS interface includes 1-way transmission channels and 1-way reception channels.

Furthermore, the signal input/output board card and the communication interface board both adopt a CPCI-6U board card structure.

Furthermore, the programmable power supply adopts a built-in case structure form and is positioned at the rear part in the test equipment host, the power supply input is standard AC220V or DC 28V, the programmable power supply outputs 4 paths of isolation adjustable voltage through the power supply control relay board, and the 4 paths of isolation adjustable voltage are respectively switched into 8 paths of external adjustable voltage by the power supply control relay board and are output externally; the on-off control function of the adjustable voltage output is controlled by an RS232 serial port of the computer host.

Furthermore, the program-controlled power supply has the functions of outputting constant current, inputting overvoltage protection, inputting undervoltage protection, outputting overvoltage protection, outputting undervoltage protection and outputting short-circuit protection.

The device designed based on the CPCI industrial bus architecture realizes the parallel fast detection of 4 all-in-one machines or missiles for the first time in the field of flight guided missile weapon systems, and the technical guarantee efficiency of the missiles is greatly improved; the efficiency is improved and the development cost of the model test equipment is greatly reduced by developing novel portable test equipment by means of a parallel test technology; the technical scheme which is mature as much as possible is adopted for logical recombination, the test equipment is comprehensive in function coverage, high in reliability and low in technical risk, and the operability of comprehensive guarantee and test of individual soldiers is improved through the portable design; the parallel test greatly shortens the whole flow cycle of the batch production line and greatly reduces the human resource overhead; the universal design scheme ensures that the requirement of sharing the multi-model and multi-project weapon system test equipment can be met only by replacing the test cable, and the equipment performance is superior.

1. The parallel fast detection of 4 integrated machines or missiles is firstly realized in the field of flying missiles, and the technical guarantee efficiency of the missiles is greatly improved; by developing novel portable testing equipment based on a parallel testing technology, the efficiency is improved, and meanwhile, the cost of three traditional sets of testing equipment can be saved by a single set of equipment with the same effect;

2. the system has the advantages of abundant resources, comprehensive test coverage, high reliability and low technical risk, the portable design can realize the individual operation of equipment, the parallel test of 4 products/set of products can directly improve the test efficiency to 400 percent, the whole flow period of a batch production line is greatly shortened, the technical guarantee maintenance period of weaponry is greatly shortened, and simultaneously the investment of human resources is greatly reduced;

3. the multi-core multi-thread management technology of equipment development expands the technical innovation in the design architecture aspect of the multi-core processor cluster resource scheduling system in the field of flight test, and reserves a set of mature and efficient parallel test technical scheme. The technical development in the test field is promoted, and the mechanism reform of the development system of the related industry is promoted.

Drawings

Fig. 1 is a device host connection relationship diagram.

Fig. 2 is a schematic view of an external appearance structure of the chassis.

Fig. 3 is a schematic diagram of the internal structure of the chassis.

Fig. 4 is a heat dissipation diagram of the chassis.

Fig. 5 is a functional block diagram of an a-type composite board card.

Fig. 6 is a functional block diagram of a B-type composite board card.

Fig. 7 is a schematic diagram of a front panel of the programmable power supply.

Fig. 8 is a schematic diagram of a programmable power supply back panel.

Fig. 9 is a schematic diagram of a power supply control relay board.

Fig. 10 is a software configuration diagram.

FIG. 11 is a multi-tasking parallel testing work schematic.

FIG. 12 is a schematic diagram of a portable universal parallel test apparatus.

Detailed Description

The invention is further described with reference to the following figures and detailed description.

The design selects and uses the reinforced case to be matched with a special interface board to form the automatic test equipment host, the mainboard, the expansion card and the backboard in the framework are fixed through a pin hole connector and a guide rail structure with very high stability, the self has very high reliability, and has good effects in the aspects of vibration impact resistance, oxidation resistance and the like. The whole testing equipment is very easy to unfold and withdraw, and is more convenient to transport and flexibly guarantee.

The portable case structure developed and designed can be inserted with 7 composite board cards besides the mainboard, and the composite board cards comprise signal input and output boards, namely A-type board cards for short; a communication interface board, referred to as a B-type board card for short; the plurality of rear wiring boards comprise a host rear board; the signal input and output back board is called A-type back board for short, and the communication interface back board is called B-type back board for short. The number of the A-type board cards is 3, and the number of the B-type board cards is 4. The two composite boards are wired from the rear wiring board, and signals on the boards are connected to a connector of the case through cables in the case. 4 paths of power supply modules are placed in the case, a relay board is designed to control power supply output, the relay board can remotely use RS232 communication and is connected to an RS232 port of the main board, and a portable connection relation block diagram is shown in an attached drawing 1.

The test equipment host machine adopts a standard 6U CPCI bus form to realize functions such as function expansion and communication among board cards, and a CPCI bus framework adopted by the whole machine realizes modular design, so that the test equipment host machine has high reliability and maintainability and is convenient to use and maintain.

In the aspect of parallel testing, 4 sets of equipment are designed and realized for parallel testing, and meanwhile, in order to avoid interference among channels, all resources among 4 paths of testing channels are physically isolated, so that other channels can still work normally and are not influenced when a certain channel breaks down accidentally. Considering the single-machine volume control of the testing equipment, the selected bus bottom plate can expand at most 7 functional board cards except a mainboard, various types of resources are called without distinction for realizing 4-channel testing channels of the upper computer, various resources are grouped through hardware design, physical isolation among groups is realized, 3A type board cards are virtualized into 4 blocks through software design, the function of simulating 4 is realized, 4 virtual board cards can be called without distinction when the upper computer is called, and sufficient convenience is provided for compiling special function codes of the upper computer and calling bottom-layer resources.

In the aspect of universality, the design of the test stand-alone machine provides 96 paths of DI, 48 paths of DO, 84 paths of AD, 18 paths of DA, 12 paths of CAN buses, 16 paths of RS422 buses, 4 paths of dual redundant 1553B, 4 paths of LVDS, 8 paths of programmable power supplies, 1 path of Ethernet ports and 2 paths of USB interfaces, the resource types are rich, the quantity is sufficient, and the basic test requirements of weapon equipment in most aviation fields CAN be met only by replacing a special test cable for a tested object.

In the aspect of portability, the A, B dual-type composite board card design realizes high resource integration, the board level circuit is reasonably arranged to improve the resource types and the number in a unit area as much as possible, the mainboard, 7 functional board cards, a program-controlled power supply, a control panel and a heat dissipation system are compactly and reliably arranged to realize efficient and full utilization of the space of the case, the size of the case is controlled to be less than or equal to 450 multiplied by 400mm and the weight of the case is controlled to be less than or equal to 35kg under the condition of realizing general parallel detection of 4 devices, and the single-soldier portable operation can be realized by combining the.

The first embodiment is as follows:

1. hardware design

1.1 Chassis

The machine case customization is completed according to the equipment architecture and the single function machine structures, and the appearance and the internal layout of the machine case are respectively shown as the attached figures 2 and 3.

Because the arrangement in the case is compact, and the heat generation of partial components of each functional board card and 8-path high-bearing-capacity power supply is serious, the heat dissipation of the case adopts a high-performance air cooling heat dissipation design. The upper part and the lower part of the case are respectively provided with a vent hole, the lower side of the case is provided with a 12V high-power direct current fan, and the fan supporting the stepless speed regulation function sends cold air into a card insertion area through the vent hole at the lower side of the case, takes away heat generated by a board card and a power supply, and discharges the cold air through the vent hole at the upper side of the case. Meanwhile, the program-controlled power supply additionally and independently designs double radiating fans and directly removes redundant heat from the side wall, so that the equipment is ensured to have excellent radiating performance.

Fig. 4 provides a schematic diagram of the heat dissipation of the chassis.

1.2A type composite board card

The A-type composite board card mainly completes data acquisition between the test equipment host and the detected object, and functions of DI, DO, AD, DA and the like are realized. A CPCI-6U board card structure is adopted, and a functional block diagram of an A-type composite board card is shown in an attached figure 5.

The A board realizes resource integration through design: 2 groups of 6 paths (4 paths +2 paths) DA, isolation among groups and support multi-path synchronous consistent conversion; 6 groups of 28 paths of AD functions, wherein 2 groups (6 paths +2 paths) are differential acquisition, 4 groups (10 paths +4 paths +2 paths) are single-ended acquisition, and 6 groups of AD are mutually isolated and support multi-path synchronous consistent conversion; the 32-path DI function is divided into 4 groups, each 8-path DI function is a group, and the groups are mutually isolated; 2 groups of 8-path DO (6 paths and 2 paths) interfaces, and the outputs are isolated by adopting relays, and the current allowed to pass through each path of output is not less than 10 mA. The isolation design scheme between the test channels and between each group of resources can realize isolation measurement of signals isolated from different detection objects, can provide a plurality of groups of isolation resources of different types to finish simulation 4 of the A board 3, and finally realizes that 4 independent parallel test channels respectively have 19 paths of DI (digital interface), 6 paths of DO (data input) and 20 paths of AD (analog output) and 4 paths of DA (digital output) resources.

1.3B type composite board card

The B-type composite board card mainly completes communication between a test equipment host and a detected object, and realizes functions of DO, CAN, RS422, 1553B, LVDS and the like. A CPCI-6U board card structure is adopted, and a functional block diagram of a board card is shown in an attached figure 6.

The B board realizes resource integration through design: 6 routes of DO relay isolation outputs, wherein the current allowed to pass through each route of output is not less than 10 mA; 1 path of dual-redundancy 1553B communication bus can be provided with three working modes of BC, RT and MT; the 3-channel CAN bus interface supports CAN2.0A/B protocol, and each channel of port is isolated by independent photoelectricity; each path of the intelligent communication port is provided with an independent 32M byte sending cache and an independent 32M byte receiving cache, the format of a communication frame can be adjusted by software, the 4 paths of serial communication ports are mutually independent and adopt photoelectric isolation, and power supplies are mutually independent and adopt an on-board DC/DC isolation power supply; the LVDS interface is provided with a 1-path sending channel and a 1-path receiving channel, and the RAM in the board is 64 Mbytes in total.

1.4 program-controlled power supply

The test device adopts a built-in case structure form, is positioned at the rear part in a test device host, has a power supply input of standard AC220V or direct current 28V, outputs four paths of isolated adjustable voltage DC 18-34V, and has the functions of outputting constant current, inputting overvoltage, inputting undervoltage, outputting overvoltage, outputting undervoltage and outputting short circuit. The schematic view of the panel is shown in fig. 7 and fig. 8.

The control of 28.5V power supply and the conversion of internal and external power supply input to 4 tested objects are completed through a power supply control relay board, 4-distance control direct-current power supply output is divided into 8 paths through a relay, and an SONGLE relay with the model of SLA-24VDC-C-30A is selected. The schematic diagram of the power supply circuit is shown in fig. 9.

The power supply control relay board is controlled by an RS232 serial port of the computer host, has 8 external 28V power output on-off control functions respectively, and can automatically switch 220V or 28V power supply in the case.

In summary, through the development design, resource integration and call allocation of the two types of composite board cards and the power control relay board, 4 isolated parallel test channels are formed by using 3 a-type composite boards, 4B-type composite boards, 1 power control board and the programmable power supply, and the statistics of the hardware resources that can be independently allocated and called in each test channel are shown in table 1.

Table 1 single channel test resource statistical table

1.5 software design

Aiming at power protection and control requirements, the development and encapsulation of bottom layer software interface modules such as voltage value control, overvoltage value setting, power state query, channel output and the like are completed; aiming at the A-type composite board card, the bottom-layer related interface function modules such as board initialization, DI/DO calling, AD/DA calling, board number reading and distribution and the like are developed, and different types and different groups of isolation resources can be virtually called through upper-layer software to realize the 4-imitating function of the whole machine A board 3; for the B-type composite board card, bottom layer interface functions such as 1553B, RS422, CAN, LVDS related initialization, mode selection, function setting, data transceiving and the like are developed.

After the design of bottom software is finished, parallel test software design is developed according to the rapid detection requirement, and a novel multi-thread parallel detection technology based on a multi-core CPU is developed. Through the design of special parallel test software, the binding relationship between CPU 'cores' and threads is reasonably distributed, the utilization rate of a cache is improved while the space-time expenditure of system resources is reduced, the static load balance of a program is better realized, the concurrent progress of multiple threads of the program is ensured, a high-acceleration-coefficient parallel test technology is established, a multi-core and multi-thread parallel management technology is researched and developed, a novel parallel test special function module is formed, the problems of thread stationarity, cache thrashing, convoying effect, thread blocking, time slice forced waiting and the like which are common in the parallel test process are thoroughly solved, the design quality of product software is ensured, and the interruption of scientific research and production tasks caused by the problems in the actual use process of parallel test equipment is successfully avoided. The software structure schematic diagram of the upper computer and the lower computer is shown in the attached figure 10.

The parallel test application software has the main core idea that a test task is statically decomposed, a core and part of core threads are bound through a multi-core multi-thread management technology, and a WINDOWS dynamic self-adaptive allocation strategy is adopted for tasks with relatively random and unfixed resource consumption. The working principle is as follows: corresponding core threads are created according to the number of the objects to be tested and are respectively bound to different CPU 'cores', unified initialization of equipment resources is realized by semaphore operation, detection, communication, data storage and automatic interpretation of digital quantity and analog quantity of the objects to be tested are completed according to a set test task flow, and mutual exclusion protection of shared data is realized by using a kernel variable and a critical section until the testing is finished and resources are released. A schematic diagram of the parallel multi-task synchronous testing software is shown in fig. 11.

FIG. 12 is a schematic diagram of a portable universal parallel test device.

The portable general parallel test equipment is designed in a CPCI-6U bus mode, the main board, the expansion card and the back board in the framework are fixed through the pin hole connector with high stability and the guide rail structure, the reliability is high, and the portable general parallel test equipment has good effects in vibration impact resistance, oxidation resistance and the like.

An aluminum magnesium alloy section is adopted to design a case host, and the appearance is sprayed according to requirements.

The portable case adopts the design of turning down waterproof dustproof silica gel keyboard to install 17 cun LCD display.

The CPCI back plate is vertically installed, the board card is vertically inserted into the case from the side face of the case, and the panel is installed on the outer side of the inserted board card to shield the board card.

And a monitoring module is arranged in the case, monitors the working states of the fan and the voltages of all paths, and monitors the display screen for display.

Handles are arranged on two sides of the upper part of the case, so that the case is convenient to carry.

The keyboard of the case is designed with rubber wrap angles, and the case is integrally provided with rubber pads, so that the shock absorption and protection of the case are facilitated.

The chassis backplane supports the rear IO plug-in card.

The A-type board card adopts a Xilinx company A7 series chip XC7A100T-2FGG484 as a control unit and a CPCI-6U board card structure.

The B-type board card adopts a K7 series chip XC7K325T-FFG900 of Xilinx company as a control unit and has a CPCI-6U board card structure.

The power supply control relay board adopts an A7 series chip XC7A100T-2FGG484 of Xilinx company as a control unit.

The front mainboard of the computer adopts Linghua CPCI-6940, and the rear mainboard adopts Linghua CPCI-R6002 and CPCI-6U board structures.

And (3) developing an application program of the upper computer by utilizing a VC development environment, and writing codes by adopting a C + + language.

The portable general parallel test device shown in fig. 12 is formed by customizing a case, designing and developing a functional board card, arranging an internal structure and reasonably assembling all components in the machine.

And developing general parallel test application software of an upper computer based on a multi-core CPU multi-thread core binding parallel detection technology. A group of A + B composite multifunctional instrument modules realize the detection of a set of detected objects, the concurrent logic is reasonably designed to realize the mutually independent rapid detection of 4 devices, the detection result and data are automatically stored in a computer for later inspection, and meanwhile, the automatic reading function of the detection data realized by software is used for verifying the function and performance assessment result of each subsystem of the detected objects. During the test: the multithreading synchronization technology is utilized to uniformly complete identification, initialization, resource calling and release on each instrument module of the test equipment; and the read-write mutual exclusion protection of the data in the shared storage area is realized by using the critical section, and the problem of data competition among multiple threads is avoided.

The parallel test equipment is developed and manufactured to realize the parallel detection work of 4 tested objects according to the multi-task parallel test working principle shown in fig. 11, and a large number of butt test verifications show that the equipment design scheme is effective and the work is stable and reliable. After the device is put into a batch production line of certain weapon system equipment for use, the problems of high cost and low efficiency of the traditional testing link are fundamentally solved, the whole flow cycle of batch production is greatly shortened, the batch production efficiency is improved, the requirement of sharing the testing equipment by multiple series of models can be realized, and a sufficiently powerful ground guarantee is provided for a technical position.

The above examples are intended only to illustrate the technical solution of the present invention and not to limit it, and although the present invention has been described in detail with reference to the preferred embodiments, those skilled in the art should understand that: modifications and equivalents may be made to the invention without departing from the spirit and scope of the invention.

Claims (9)

1. A portable universal parallel test device for detecting a weapon system comprises a reinforced case, a main board fixed by a guide rail in the case, a plurality of composite board cards, a plurality of rear wiring boards, a programmable power supply, a waterproof keyboard and a monitoring display screen, wherein the waterproof keyboard and the monitoring display screen are fixed in a front panel of the case;

the method is characterized in that: an air inlet and an air outlet are arranged on the upper and lower sides of the case, and a stepless speed-regulating direct-current fan is arranged at the air outlet on the lower side and used for radiating heat of the internal board card; the program control power supply is independently designed with double cooling fans and the redundant heat is directly removed from the side wall; the multiple composite boards comprise signal input and output boards and communication interface boards; the back wiring boards comprise a host back board, a signal input and output back board and a communication interface back board; the output of the programmable power supply is supplied to 4 tested objects through the power supply control relay board, the output of the programmable power supply is supplied to each board card in the case through the power supply control relay board, the control relay board is controlled by an RS232 serial port of a rear board of the computer host, the control relay board has multi-path external direct current power supply output, the on-off of each path of power supply is controlled respectively, the power supply control relay board also has the function of controlling the internal and external power supply input conversion, and the input of the programmable power supply in the case can be automatically switched between an alternating current power supply or a direct current power supply.

The bus backboard is provided with a bus interface;

and a monitoring module is arranged in the case and used for monitoring the working states of the fan and the voltages of all paths, and a monitoring display screen on one side of the waterproof keyboard displays the monitored working state.

2. A portable universal parallel test apparatus as recited in claim 1, wherein: the main board, the expansion card and the back board are fixed through a pin hole connector with high stability and a guide rail structure; manufacturing a case by adopting an aluminum magnesium alloy profile; the portable case adopts the design of a flip-down waterproof dustproof silica gel keyboard, and is provided with a display; the CPCI back board is vertically installed, the board card is vertically inserted into the case from the side face of the case, and the board card is inserted into the board card which is shielded by the back outer side installation panel; handles are arranged on two sides of the upper part of the case; the keyboard of the case is designed with rubber wrap angles, and the case is integrally provided with rubber pads.

3. A portable universal parallel test apparatus as recited in claim 1, wherein: the number of the signal input and output boards is 3, and the signal input and output boards can provide a plurality of groups of different types of isolation resources to realize a 3-imitation-4 structure.

4. A portable universal parallel test apparatus according to claim 3, wherein: the signal input and output board integrates the following signal input and output ports: 2 groups of 6-path digital-analog conversion interfaces DA, and two groups of groups are physically isolated, wherein the first group of 4-path digital-analog conversion interfaces DA and the second group of 2-path digital-analog conversion interfaces DA are respectively connected with the first group of 4-path digital-analog conversion interfaces DA; supporting multi-path synchronous consistent conversion; 6 groups of 28-path analog-digital conversion interfaces AD, 6 groups of analog-digital conversion interfaces AD are physically isolated from each other, wherein 2 groups of analog-digital conversion interfaces AD are differential acquisition interfaces, the first group of 6-path differential acquisition, the second group of 2-path differential acquisition and two groups of groups are physically isolated; 4 groups of analog-digital conversion interfaces AD single-ended acquisition, and a first group of 10 paths of analog-digital conversion interfaces AD single-ended acquisition; the second group of 4-channel analog-digital conversion interface AD single-end acquisition; the third group of 4 paths of analog-digital conversion interfaces AD single-end acquisition; the fourth group of 2-path analog-digital conversion interface AD single-end acquisition; the four groups are physically isolated, and multi-path synchronous consistent conversion is supported; the 32-path digital input interface DI is divided into 4 groups, each 8 paths form one group, and the groups are mutually isolated; 2 groups of 8-path digital output interfaces DO adopt relay isolation output, the current allowed by each path of output is not less than 10mA, the first group of 6-path digital output interfaces DO and the second group of 2-path digital output interfaces DO are isolated from each other.

5. The portable universal parallel test device of claim 4, wherein: when the signal input and output board adopts a 3-way 4-way structure, the 4 independent parallel test channels respectively have 19 DI (digital interface), 6 DO (data access), 20 AD (analog interface) and 4 DA (digital interface) resources.

6. A portable universal parallel test apparatus as recited in claim 1, wherein: the communication interface board has 4 blocks, each communication interface board has 6 paths of digital output interfaces DO, each path has relay output isolation, and the current allowed by each path of output is not less than 10 mA; the 1-path dual-redundancy 1553B communication bus can operate in three working modes of BC, RT and MT; 3 paths of CAN bus interfaces supporting CAN2.0A/B protocols, and each path of CAN bus interface is provided with independent photoelectric isolation; each path of the high-speed RS422 communication interface is provided with an independent 32M byte sending cache and an independent 32M byte receiving cache, the 4 paths of high-speed RS422 serial communication interfaces are mutually independent and adopt photoelectric isolation, and power supplies of the high-speed RS422 serial communication interfaces are mutually independent and adopt on-board direct current/direct current isolation power supplies; the LVDS interface includes 1-way transmission channels and 1-way reception channels.

7. A portable universal parallel test apparatus as recited in claim 1, wherein: the signal input and output board card and the communication interface board adopt CPCI-6U board card structures.

8. A portable universal parallel test apparatus as recited in claim 1, wherein: the programmable power supply adopts a built-in case structure form and is positioned at the rear part in the test equipment host, the power supply input is standard AC220V or DC 28V, the programmable power supply outputs 4 paths of isolation adjustable voltage through the power supply control relay board, and the 4 paths of isolation adjustable voltage are respectively switched into 8 paths of external adjustable voltage by the power supply control relay board and are output externally; the on-off control function of the adjustable voltage output is controlled by an RS232 serial port of the computer host.

9. The portable universal parallel test device of claim 8, wherein: the programmable power supply has the functions of outputting constant current, inputting overvoltage protection, inputting undervoltage protection, outputting overvoltage protection, outputting undervoltage protection and outputting short-circuit protection.

Images