CN112349593A - 一种石墨烯为源漏电极的二维薄膜晶体管及制备方法 - Google Patents
一种石墨烯为源漏电极的二维薄膜晶体管及制备方法 Download PDFInfo
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- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 title claims abstract description 82
- 229910021389 graphene Inorganic materials 0.000 title claims abstract description 82
- 239000010409 thin film Substances 0.000 title claims abstract description 34
- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- 239000010408 film Substances 0.000 claims abstract description 82
- 239000000463 material Substances 0.000 claims abstract description 80
- 239000002390 adhesive tape Substances 0.000 claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 27
- 108010025899 gelatin film Proteins 0.000 claims abstract description 26
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 17
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims abstract description 11
- 239000010931 gold Substances 0.000 claims abstract description 11
- 229910052737 gold Inorganic materials 0.000 claims abstract description 11
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 9
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 9
- 238000001704 evaporation Methods 0.000 claims abstract description 6
- 239000010703 silicon Substances 0.000 claims abstract description 6
- 238000002207 thermal evaporation Methods 0.000 claims abstract description 6
- NRJVMVHUISHHQB-UHFFFAOYSA-N hafnium(4+);disulfide Chemical compound [S-2].[S-2].[Hf+4] NRJVMVHUISHHQB-UHFFFAOYSA-N 0.000 claims description 54
- 239000002184 metal Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 20
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 claims description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 8
- KFZMGEQAYNKOFK-UHFFFAOYSA-N Isopropanol Chemical compound CC(C)O KFZMGEQAYNKOFK-UHFFFAOYSA-N 0.000 claims description 8
- 229910001220 stainless steel Inorganic materials 0.000 claims description 8
- 239000010935 stainless steel Substances 0.000 claims description 8
- 239000013078 crystal Substances 0.000 claims description 7
- 239000011521 glass Substances 0.000 claims description 7
- 230000003287 optical effect Effects 0.000 claims description 7
- 238000003825 pressing Methods 0.000 claims description 7
- 230000003647 oxidation Effects 0.000 claims description 5
- 238000007254 oxidation reaction Methods 0.000 claims description 5
- 229910052710 silicon Inorganic materials 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 5
- 238000004140 cleaning Methods 0.000 claims description 4
- 239000008367 deionised water Substances 0.000 claims description 4
- 229910021641 deionized water Inorganic materials 0.000 claims description 4
- 230000008020 evaporation Effects 0.000 claims description 4
- 229910052757 nitrogen Inorganic materials 0.000 claims description 4
- 238000004506 ultrasonic cleaning Methods 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 238000000861 blow drying Methods 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims 1
- 238000000609 electron-beam lithography Methods 0.000 abstract description 4
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 2
- 238000004377 microelectronic Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 25
- 230000000052 comparative effect Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000001301 oxygen Substances 0.000 description 4
- 229910052760 oxygen Inorganic materials 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000005693 optoelectronics Effects 0.000 description 2
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 2
- 239000004926 polymethyl methacrylate Substances 0.000 description 2
- 230000002269 spontaneous effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BWGNESOTFCXPMA-UHFFFAOYSA-N Dihydrogen disulfide Chemical compound SS BWGNESOTFCXPMA-UHFFFAOYSA-N 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000001105 regulatory effect Effects 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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Abstract
本发明公开了一种石墨烯为源漏电极的二维薄膜晶体管及制备方法,所述二维晶体管属于底栅顶接触型晶体管。其制备方法首先使用机械剥离法用英格兰蓝色胶带从二维材料块材上剥离薄膜到Gelpak机械剥离专用PF凝胶膜,选择合适厚度且表面均匀的材料转移到硅/二氧化硅衬底上作为N型半导体沟道层。再剥离两块石墨烯薄膜分别转移到半导体层两端作为源、漏电极,最后利用掩模版通过热蒸发法蒸镀金电极,由此制备得到所述二维薄膜晶体管。本发明区别于其他二维器件制备工艺,无需复杂昂贵的电子束光刻,所用材料安全环保,成本低廉,不仅得到了以二维材料为源漏电极和沟道的微电子器件,而且从迁移率、开关比等方面优化了现有的二维晶体管。
Description
技术领域
本发明涉及二维薄膜晶体管制备技术领域,具体地说,是采用二维材料石墨烯作为晶体管的源漏电极,从而优化传统的二维薄膜晶体管。
背景技术
近年来,以二硫化物、石墨烯和黑磷(BP)等为代表的二维层状半导体材料由于具有优异的电学性能受到了广泛关注。科研人员已经研制出基于二维半导体的高性能电子器件,但其实际应用却受到半导体材料自发氧化的严重影响。例如,少层黑磷在室温下具有高的p型载流子迁移率(1000cm2V-1S-1),由于在空气中不稳定,限制了其在电子器件和电路方面的应用。为了解决器件稳定性问题,研究人员已研发出多种方案对沟道材料进行保护以避免自发氧化,包括剥离后的聚甲基丙烯酸甲酯(PMMA)涂层、原子层沉积(ALD)生长的Al2O3涂层、h-BN封装,以及选择使用隔离水氧的手套箱进行材料制备等。当然由于其不稳定问题,导致二维晶体管中半导体层与金属电极之间的接触问题也尤为重要,严重影响了二维器件的进一步发展。
另一方面,HfS2具有独特的结构且带隙可由层数调控,是一种具有超高电学性能的二维材料,有望在电子/光电子器件领域实现应用,尽管二硫化铪具有许多吸引人的电学和光电特性,但是二硫化铪的水氧性很差,在空气中暴露数小时后,二硫化铪薄膜会由于吸附水分和氧而严重的自发氧化,从而致使器件的电学性能出现严重退化。并且由于二维材料与金属电极之间存在接触问题,严重影响到二维薄膜晶体管的电学性能。
发明内容
本发明的目的是提供一种以石墨烯为源/漏电极的N型二维薄膜晶体管及其制备方法。其制备方法适用的二维薄膜晶体管为底栅顶接触结构,晶体管由下至上依次是栅极、介电层、N型半导体有源层、源/漏电极。该方法在二维薄膜晶体管半导体层制备完毕后,通过同样的机械剥离方法制备并转移得到二维材料源/漏电极,通过该方法既可以改善二维材料只能用电子束光刻和尺寸较小的铜网进行掩膜制备的限制,又可以改善二维材料与金电极之间的接触,从而提升了N型二维薄膜半导体的电学性能。
实现本发明目的的具体技术方案是:
一种石墨烯为源漏电极的二维薄膜晶体管的制备方法,该制备方法包括以下具体步骤:
步骤1:二维材料薄膜的制备
A1:二硫化铪半导体薄膜的制备
将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄二硫化铪薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用;
A2:石墨烯薄膜材料的制备
将石墨烯晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层石墨烯薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄石墨烯薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断石墨烯薄膜的厚度,选择厚度5-10nm,表面均匀且长度为50-200μm的两块石墨烯薄膜材料备用,分别记为石墨烯薄膜材料A和石墨烯薄膜材料B;
步骤2:二硫化铪和石墨烯二维薄膜材料的转移
B1:衬底的清洗
选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮***吹干作为目标衬底备用;
B2:二硫化铪薄膜材料的转移
利用二维材料转移***以及配套显微镜将步骤A1制备的PF凝胶膜上的二硫化铪薄膜转移到步骤B1的目标衬底上作为二维晶体管的半导体导电沟道;
B3:石墨烯薄膜材料A、B的转移
利用二维材料转移***以及配套显微镜将步骤A2制备的PF凝胶膜上的石墨烯薄膜材料A及石墨烯薄膜材料B分别转移到步骤B2目标衬底的二硫化铪薄膜的两端,所述石墨烯薄膜材料A、B与二硫化铪薄膜在各自最大长度的方向上呈水平堆叠,且两端重叠5-15μm,石墨烯薄膜材料A、B作为晶体管的二维源、漏电极,中间露的二硫化铪薄膜为半导体导电沟道;
步骤3:源、漏金属电极的制备
C1:固定掩模版
利用二维材料转移***将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述二硫化铪薄膜完全被掩模版掩模部分覆盖且两侧露出石墨烯薄膜材料A和石墨烯薄膜材料B;
C2:蒸镀金属源、漏电极
采用常规的真空热蒸发法利用不锈钢掩模版在石墨烯薄膜材料A和石墨烯薄膜材料B上蒸镀金,得到厚度为50nm的金作为源、漏金属电极;制得所述二维薄膜晶体管。
步骤3中,所述蒸镀金的电流为80-90A,速率为0.1-0.12nm/s。
一种上述方法制得的石墨烯为源漏电极的二维薄膜晶体管。
本发明与现有技术相比,最大的优势在于:本发明没有用到大部分二维器件制备所需的复杂的电子束光刻技术,操作简单,成本低廉;用石墨烯做源漏电极,实现了同时用二维材料做半导体层与半导体沟道层,且由于石墨烯功函数小于二硫化铪功函数,改善了二硫化铪与电极之间的接触,促进了载流子的运输,在一定程度上提升了二维薄膜晶体管的迁移率和开关电流比。
附图说明
图1为本发明所述方法制备的石墨烯为源/漏电极的二维薄膜晶体管的截面结构示意图;
图2为对比例制备的二维薄膜晶体管的截面结构示意图;
图3为本发明有无石墨烯电极层二维薄膜晶体管的转移特性曲线对比图。
具体实施方式
下面结合附图及实施例和对比例对本发明进一步说明。
参阅图1,本发明所述实施例的二维薄膜晶体管为底栅顶接触结构,包括栅电极5、介电层4、半导体层3、二维源/漏电极2及金属电极1;其中,所述栅电极5为硅衬底;所述介电层4为二氧化硅层;所述半导体层3是通过机械剥离法转移得到的二硫化铪半导体材料;所述源漏电极2是通过机械剥离法转移得到的石墨烯材料;所述金属电极1是通过热蒸发的方式形成的金源漏电极。
以下本发明提供优选实施例和对比例,但不应该被认为仅限于在此阐述的实施例。
实施例
石墨烯作为源漏电极的优化二维薄膜晶体管制备方法:
(1)将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用;再将石墨烯晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的石墨烯薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察,通过颜色判断石墨烯薄膜的厚度,选择厚度5-10nm,表面均匀且长度为50-200μm的两块石墨烯薄膜材料备用,分别记为石墨烯A、石墨烯薄膜材料B;
(2)选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮***吹干作为目标衬底备用;利用二维材料转移***以及配套显微镜将(1)制备的PF凝胶膜上的二硫化铪薄膜转移到目标衬底上作为二维晶体管的半导体导电沟道;利用二维材料转移***以及配套显微镜将(1)制备的PF凝胶膜上的石墨烯薄膜材料A及石墨烯薄膜材料B分别转移到步骤B目标衬底的二硫化铪薄膜的两端,所述石墨烯薄膜材料A、B与二硫化铪薄膜在各自最大长度的方向上呈水平堆叠,且两端重叠5-15μm,石墨烯薄膜材料A、B作为晶体管的二维源漏电极,中间露的二硫化铪薄膜作为半导体导电沟道。
(3)利用二维材料转移***将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述二硫化铪薄膜完全被掩模版掩模部分覆盖且两端露出石墨烯薄膜材料A和石墨烯薄膜材料B;采用常规的真空热蒸发法利用不锈钢掩模版在石墨烯薄膜材料A和石墨烯薄膜材料B上蒸镀得到厚度为50nm的金作为源、漏金属电极;制得所述二维薄膜晶体管。
对比例
单层金属作为源漏电极的传统二维薄膜晶体管制备方法:
(1)将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开。在撕开的英格兰胶带上会自然黏附一层较厚的二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15nm、表面均匀且长度15-200μm的材料标记备用。
(2)选择二氧化硅/硅(SiO2/Si)衬底,其中二氧化硅热氧化层的厚度为300nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮***吹干作为目标衬底备用;利用二维材料转移***以及配套显微镜将(1)制备的PF凝胶膜上的二硫化铪薄膜转移到目标衬底上作为二维晶体管的半导体导电沟道。
(3)利用二维材料转移***将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述掩模部分两侧均露出部分二硫化铪薄膜,最后采用常规的真空热蒸发法利用不锈钢掩模版在转移到目标衬底上蒸镀得到厚度为50nm的金作为源、漏金属电极,制得所述二维晶体管。
实施例中所制备的将石墨烯作为源漏电极的二维薄膜晶体管与对比例中制备的传统二维晶体管的电学参数对比如下所示:表1是石墨烯作为源漏电极的二维薄膜晶体管相对于传统二维晶体管的电学参数对比;图3是石墨烯作为源漏电极的二维薄膜晶体管相对于传统二维晶体管的转移特性曲线图。对比表1、图3、可知,在二维半导体与金属电极之间***一层石墨烯作为源漏电极优化的薄膜晶体管,其源漏电流大幅度增加,阈值电压有所减小,电流开关比增加了1个数量级,迁移率从0.01cm2V-1S-1增加了一个数量级到0.1cm2V-1S-1。因此,经本发明制备的以石墨烯作为二维薄膜晶体管的源漏电极,优化了传统二维晶体管的结构,其电学性能得到了显著提升,对以后二维晶体管到全二维晶体管的发展具有非常重要的意义。
二维晶体管中半导体层与金属源漏电极之间存在接触问题,会影响载流子的传输,利用二维材料石墨烯***到半导体层和金属电极之间,由于石墨烯是零带隙半导体,与金属之间载流子传输非[常容易,且石墨烯的功函数为4.6eV,小于二硫化铪的功函数4.9eV,所以在一定程度上对二硫化铪形成了N型电子掺杂,促进了载流子的运输,改善了半导体层和金属电极之间的接触,增大了沟道中载流子浓度,故提升了传统的二维晶体管的电学性能。
因此,通过本发明,利用石墨烯做源漏电极,不用复杂昂贵的电子束光刻技术,操作简单,成本低廉,从而实现半-全二维薄膜晶体管,并且改善二维材料和金属电极之间的接触问题,提升二维晶体管的电学性能,对之后实现全二维晶体管意义重大。
表1
晶体管电学参数 | 无石墨烯 | 有石墨烯 |
开关比 | 10<sup>4</sup> | 10<sup>6</sup> |
迁移率(cm<sup>2</sup>V<sup>-1</sup>S<sup>-1</sup>) | 0.01 | 0.1 |
阈值电压(V) | 51 | 35 |
Claims (3)
1.一种石墨烯为源漏电极的二维薄膜晶体管的制备方法,其特征在于,该制备方法包括以下具体步骤:
步骤1:二维材料薄膜的制备
A1:二硫化铪半导体薄膜的制备
将二硫化铪晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层二硫化铪薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄二硫化铪薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断二硫化铪薄膜的厚度,选择蓝色半透明、厚度为10-15 nm、表面均匀且长度15-200 μm的材料标记备用;
A2:石墨烯薄膜材料的制备
将石墨烯晶体块材置于英格兰蓝色胶带上,对折胶带,按压,然后撕开;在撕开的英格兰胶带上会自然黏附一层石墨烯薄片,将所述胶带在新鲜胶带表面对撕3-5次,减薄石墨烯薄片后,贴附到附在载玻片上的Gelpak机械剥离专用PF凝胶膜上再轻轻揭起,用光学显微镜观察所述PF凝胶膜,通过颜色判断石墨烯薄膜的厚度,选择厚度5-10 nm,表面均匀且长度为50-200 μm的两块石墨烯薄膜材料备用,分别记为石墨烯薄膜材料A和石墨烯薄膜材料B;
步骤2:二硫化铪和石墨烯二维薄膜材料的转移
B1:衬底的清洗
选择二氧化硅/硅衬底,其中二氧化硅热氧化层的厚度为300 nm,将衬底依次置于丙酮、异丙醇、去离子水中用超声波清洗机依次清洗5分钟,然后用氮***吹干作为目标衬底备用;
B2:二硫化铪薄膜材料的转移
利用二维材料转移***以及配套显微镜将步骤A1制备的PF凝胶膜上的二硫化铪薄膜转移到步骤B1的目标衬底上作为二维晶体管的半导体导电沟道;
B3:石墨烯薄膜材料A、B的转移
利用二维材料转移***以及配套显微镜将步骤A2制备的PF凝胶膜上的石墨烯薄膜材料A及石墨烯薄膜材料B分别转移到步骤B2目标衬底的二硫化铪薄膜的两端,所述石墨烯薄膜材料A、B与二硫化铪薄膜在各自最大长度的方向上呈水平堆叠,且两端重叠5-15 μm,石墨烯薄膜材料A、B作为晶体管的二维源、漏电极,中间露的二硫化铪薄膜为半导体导电沟道;
步骤3:源、漏金属电极的制备
C1:固定掩模版
利用二维材料转移***将不锈钢掩模版固定在目标衬底的二硫化铪薄膜上,所述二硫化铪薄膜完全被掩模版掩模部分覆盖且两侧露出石墨烯薄膜材料A和石墨烯薄膜材料B;
C2:蒸镀金属源、漏电极
采用常规的真空热蒸发法利用不锈钢掩模版在石墨烯薄膜材料A和石墨烯薄膜材料B上蒸镀金,得到厚度为50 nm的金作为源、漏金属电极;制得所述二维薄膜晶体管。
2.根据权利要求1所述的制备方法,其特征在于,步骤3中,所述蒸镀金的电流为80-90A,速率为0.1-0.12 nm/s。
3.一种权利要求1所述方法制得的石墨烯为源漏电极的二维薄膜晶体管。
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