CN112346739A - Remapping method and device of interrupt vector table, microprocessor and electronic device - Google Patents
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Abstract
The invention discloses a remapping method and device of an interrupt vector table, a microprocessor and an electronic device. The method comprises the following steps: opening up a first storage area in the static random access memory, and copying an interrupt vector table of a user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area; opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area; during the start of execution of the user program, the start address of the first memory area is mapped to the start address of the memory structure. The invention solves the technical problem that in the prior art, because the kernel of a Cortex-M0 microprocessor can not support the remapping of an interrupt vector table, in the process of executing a downloading program operation or executing a program upgrading operation, a program code is generally required to be burnt to the initial address of the eflash, thereby limiting the use flexibility of the eflash.
Description
Technical Field
The present invention relates to the field of computers, and in particular, to a method and an apparatus for remapping an interrupt vector table, a microprocessor, and an electronic apparatus.
Background
A Cortex-M0 microprocessor (i.e., a microprocessor based on the Cortex-M0 core) is a 32-bit processor introduced by ARM. The Cortex-M0 microprocessor has small area, low power consumption, small code amount, stable performance and low cost, and thus has wide application in market.
At present, Cortex-M0 microprocessors are produced and sold in large quantities in the market. These microprocessors are typically configured with 128KB or larger embedded flash (flash). Most program codes usually occupy only a small part of the memory space of the eflash, and the remaining memory space in the eflash is not fully utilized.
Since the kernel of the Cortex-M0 microprocessor cannot support interrupt vector table remapping, program code typically needs to be burned to the start address of the eflash during the execution of a download program operation or the execution of a program upgrade operation, thereby limiting the flexibility of use of the eflash.
In view of the above problems, no effective solution has been proposed.
Disclosure of Invention
At least some embodiments of the present invention provide a method, an apparatus, a microprocessor, and an electronic apparatus for remapping an interrupt vector table, so as to solve at least the technical problem in the related art that, because a kernel of a Cortex-M0 microprocessor cannot support the remapping of the interrupt vector table, a program code is usually required to be burned to a start address of an eflash during a process of executing a downloading program operation or executing a program upgrading operation, thereby limiting flexibility of use of the eflash.
According to an embodiment of the present invention, there is provided a method for remapping an interrupt vector table, which is applied to a microprocessor, wherein a core of the microprocessor adopts an architecture in which an instruction and data share a same bus, and a storage structure of the microprocessor includes: static random access memory and embedded flash memory, the method comprising:
opening up a first storage area in the static random access memory, and copying an interrupt vector table of a user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area; opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area; during the start of execution of the user program, the start address of the first memory area is mapped to the start address of the memory structure.
Optionally, copying the interrupt vector table to the first storage area comprises: and copying the interrupt vector table to a first storage area from the initial address of the static random access memory by adopting a preset interface program, wherein the preset interface program is a program executed firstly by the microprocessor when the microprocessor is powered on or reset.
Optionally, programming the user program to the second storage area includes: acquiring a to-be-programmed address of a user program; compiling the source code of the user program into a binary file according to the address to be programmed; and programming the binary file of the user program to the second storage area based on the address to be programmed.
Optionally, mapping the start address of the first storage area to the start address of the storage structure includes: skipping to a user program; in the start code of the user program, the start address of the first memory area is mapped to the start address of the memory structure.
Optionally, after mapping the start address of the first storage area to the start address of the storage structure, the method further includes: when abnormal interruption occurs in the execution process of the user program, acquiring an interruption vector from the initial address of the storage structure, wherein the interruption vector is the initial address of an interruption processing function; and executing an interrupt handling function based on the interrupt vector jump.
According to an embodiment of the present invention, there is further provided an apparatus for remapping an interrupt vector table, which is applied to a microprocessor, where a core of the microprocessor adopts an architecture in which instructions and data share a same bus, and a storage structure of the microprocessor includes: static random access memory and embedded flash memory, the apparatus comprising:
the copying module is used for opening up a first storage area in the static random access memory and copying an interrupt vector table of the user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area; the programming module is used for opening up a second storage area in the embedded flash memory and programming the user program to the second storage area; and the remapping module is used for mapping the starting address of the first storage area to the starting address of the storage structure in the process of starting to execute the user program.
Optionally, the copying module is configured to copy the interrupt vector table to the first storage area from a start address of the sram by using a preset interface program, where the preset interface program is a program that is executed first by the microprocessor when the microprocessor is powered on or reset.
Optionally, the programming module comprises: the device comprises an acquisition unit, a processing unit and a control unit, wherein the acquisition unit is used for acquiring an address to be programmed of a user program; the compiling unit is used for compiling the source code of the user program into a binary file according to the address to be programmed; and the programming unit is used for programming the binary file of the user program to the second storage area based on the address to be programmed.
Optionally, the remapping module comprises: the jumping unit is used for jumping to a user program; and the remapping unit is used for mapping the starting address of the first storage area to the starting address of the storage structure in the starting code of the user program.
Optionally, the apparatus further comprises: the acquisition module is used for acquiring an interrupt vector from an initial address of the storage structure when abnormal interrupt occurs in the execution process of the user program, wherein the interrupt vector is the initial address of an interrupt processing function; and the execution module is used for executing the interrupt processing function based on the interrupt vector jump.
There is further provided, according to an embodiment of the present invention, a storage medium having a computer program stored therein, where the computer program is configured to execute, when running, the method for remapping the interrupt vector table in any one of the above.
According to an embodiment of the present invention, there is further provided a microprocessor, configured to run a program, where the program executes a remapping method of the interrupt vector table according to any one of the above.
There is further provided, according to an embodiment of the present invention, an electronic device including a memory and a microprocessor, where the memory stores a computer program, and the microprocessor is configured to execute the computer program to perform the method for remapping the interrupt vector table in any one of the above.
In at least some embodiments of the present invention, a method of opening up a first storage area in an sram and copying an interrupt vector table of a user program to the first storage area, where a start address of the sram is the same as a start address of the first storage area, and opening up a second storage area in an embedded flash memory and programming the user program to the second storage area is adopted, and by mapping the start address of the first storage area to a start address of a storage structure in a process of starting execution of the user program, a remapping method of mapping the start address of the first storage area to the start address of the storage structure is adopted to replace a remapping method of first programming the user program to the start address of the embedded flash memory and then mapping the start address of the embedded flash memory to the start address of the storage structure, thereby achieving a remapping method of improving flexibility of a programming process, The technical effect of improving the system stability is achieved, and the technical problem that in the related art, because the kernel of the Cortex-M0 microprocessor cannot support the remapping of the interrupt vector table, in the process of executing a downloading program operation or executing a program upgrading operation, a program code is generally required to be burnt to the initial address of the eflash, so that the use flexibility of the eflash is limited is solved.
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The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a flow diagram of a method for remapping an interrupt vector table according to one embodiment of the invention;
FIG. 2 is a schematic diagram of a memory structure of a microprocessor according to an alternative embodiment of the present invention;
FIG. 3 is a flowchart of an interrupt vector table remapping process in accordance with an alternative embodiment of the present invention;
FIG. 4 is a block diagram of a remapping apparatus of an interrupt vector table according to an embodiment of the present invention;
fig. 5 is a block diagram of a remapping apparatus of an interrupt vector table according to an alternative embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
In accordance with one embodiment of the present invention, there is provided an embodiment of a method for remapping an interrupt vector table, where the steps illustrated in the flowchart of the figure may be performed in a computer system, such as a set of computer-executable instructions, and where a logical order is illustrated in the flowchart, in some cases the steps illustrated or described may be performed in an order different than that described herein.
The method embodiment may be performed in an electronic device. The electronic device can be widely applied in various application scenes. For example: the electronic device can be a household appliance applied to an intelligent household scene, can also be communication equipment applied to an instant messaging scene, can also be medical equipment applied to an intelligent medical scene, or can be emergency equipment applied to an intelligent rescue scene. For example, when running on a mobile terminal, the mobile terminal may include one or more processors (which may include a Microprocessor (MCU) and may of course include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a Digital Signal Processing (DSP) chip, a processing device such as a programmable logic device (FPGA)), and memory for storing data. Optionally, the mobile terminal may further include a transmission device, an input/output device, and a display device for a communication function. It will be understood by those skilled in the art that the foregoing structural description is only illustrative and not restrictive of the structure of the mobile terminal. For example, the mobile terminal may also include more or fewer components than described above, or have a different configuration than described above.
The memory may be used to store computer programs, for example, software programs and modules of application software, such as a computer program corresponding to the remapping method of the interrupt vector table in the embodiment of the present invention, and the processor executes various functional applications and data processing by running the computer program stored in the memory, that is, implements the remapping method of the interrupt vector table described above. The memory may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory may further include memory located remotely from the processor, and these remote memories may be connected to the mobile terminal through a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The transmission device is used to receive or transmit data via a network. Specific examples of the network described above may include a wireless network provided by a communication provider of the mobile terminal. In one example, the transmission device includes a Network adapter (NIC) that can be connected to other Network devices through a base station to communicate with the internet. In one example, the transmission device may be a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.
The display device may be, for example, a touch screen type Liquid Crystal Display (LCD) and a touch display (also referred to as a "touch screen" or "touch display screen"). The liquid crystal display may enable a user to interact with a user interface of the mobile terminal. In some embodiments, the mobile terminal has a Graphical User Interface (GUI) with which a user can interact human-machine by touching finger contacts and/or gestures on a touch-sensitive surface, where human-machine interaction functions optionally include the following interactions: executable instructions for creating web pages, drawing, word processing, making electronic documents, games, video conferencing, instant messaging, emailing, call interfacing, playing digital video, playing digital music, and/or web browsing, etc., for performing the above-described human-computer interaction functions, are configured/stored in one or more processor-executable computer program products or readable storage media.
In this embodiment, a remapping method of an interrupt vector table running in the electronic device is provided, fig. 1 is a flowchart of a remapping method of an interrupt vector table according to an embodiment of the present invention, as shown in fig. 1, the method is applied to a microprocessor, a core of the microprocessor adopts an architecture in which an instruction and data share a same bus, and a storage structure of the microprocessor includes: static Random Access Memory (SRAM) and embedded flash memory (eflash), the method comprising the steps of:
step S12, opening up a first storage area in the SRAM, and copying the interrupt vector table of the user program to the first storage area, wherein the initial address of the SRAM is the same as the initial address of the first storage area;
step S14, opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area;
in step S16, in the process of starting execution of the user program, the start address of the first storage area is mapped to the start address of the storage structure.
Through the steps, a first storage area is opened up in the static random access memory, the interrupt vector table of the user program is copied to the first storage area, the initial address of the static random access memory is the same as the initial address of the first storage area, a second storage area is opened up in the embedded flash memory, and the user program is programmed to the second storage area, the initial address of the first storage area is mapped to the initial address of the storage structure in the process of starting to execute the user program, so that the aim of adopting a remapping mode of mapping the initial address of the first storage area to the initial address of the storage structure to replace the remapping mode of firstly programming the user program to the initial address of the embedded flash memory and then mapping the initial address of the embedded flash memory to the initial address of the storage structure is fulfilled, and the flexibility, the speed and the writing process of the program code are improved, The technical effect of improving the system stability is achieved, and the technical problem that in the related art, because the kernel of the Cortex-M0 microprocessor cannot support the remapping of the interrupt vector table, in the process of executing a downloading program operation or executing a program upgrading operation, a program code is generally required to be burnt to the initial address of the eflash, so that the use flexibility of the eflash is limited is solved.
The microprocessor core may be in the M0 family of the Cortex-M family. Cortex-M0 is a 32-bit, 3-stage pipelined RISC processor whose core employs an architecture in which instructions and data share the same bus. It should be noted that the Cortex-M0 core is only one alternative example of the present invention, and should not be construed as a limitation of the present invention. Other microprocessors that use the same architecture (i.e., architecture in which instructions and data share the same bus) core are also within the scope of the present invention.
FIG. 2 is a diagram illustrating a memory structure of a microprocessor according to an alternative embodiment of the present invention, wherein after the user program source code is compiled into a binary file, the interrupt vector table is located at the start of the binary file as shown in FIG. 2. Since the ARM architecture provides that the start address of the interrupt handling function is obtained from the 0x00000000 address (i.e. the start address of the memory structure) when an interrupt occurs, after the user program is burnt into eflash, the interrupt vector table needs to be mapped to the 0 address. Considering that the Cortex-M0 kernel cannot support interrupt vector table remapping, the interrupt vector table remapping approach provided in the related art is usually to burn a user program to the start address of eflash, and then to map eflash to the address of 0x 00000000.
Whereas the ARM architecture has specified that the interrupt vector table needs to be fetched from the 0 address, the Cortex-M0 microprocessor is not specified to fetch the address of the instruction. For this reason, if the Cortex-M0 microprocessor can fetch an instruction from an eflash physical address and fetch the start address of the interrupt handling function from the 0x00000000 address when an abort occurs, the function of the Cortex-M0 interrupt vector table remapping can be implemented.
Alternatively, in step S12, copying the interrupt vector table to the first storage area may include performing the steps of:
step S121, copying the interrupt vector table to the first storage area from the initial address of the sram by using a preset interface program, where the preset interface program is a program executed first by the microprocessor when the microprocessor is powered on or reset.
One of the preconditions that needs to be met in order to achieve Cortex-M0 microprocessor remapping is a default interface program. In an alternative embodiment, the preset interface program may be a diskless boot ROM interface (bootrom) program. A memory area (namely the first memory area) is opened at the position of the initial address of the SRAM, and then the Cortex-M0 microprocessor is configured to start from the bootrom program after being powered on. In the bootrom program, the interrupt vector table of the user program is copied to the start address of the SRAM (which is the same as the start address of the first memory area) for subsequent mapping of the start address of the SRAM to the 0x00000000 address.
Alternatively, in step S14, programming the user program to the second storage area may include performing the steps of:
step S141, acquiring an address to be programmed of a user program;
step S142, compiling the source code of the user program into a binary file according to the address to be programmed;
and step S143, programming the binary file of the user program to the second storage area based on the address to be programmed.
In order to implement Cortex-M0 microprocessor remapping, the preconditions required include: the address of the user program to be programmed and the user program compiled according to the address of the user program to be programmed. In the process of compiling the user program from the source code into the binary file, the user program can be compiled according to the eflash address to be programmed, and then the binary file of the user program is programmed into the second storage area pointed by the eflash address to be programmed.
In order to solve the problem that the Cortex-M0 microprocessor can only burn to the eflash start address in the program burning process, as an optional embodiment of the invention, in the process of remapping the Cortex-M0 interrupt vector table, the program code can be burned to any storage position in the eflash instead of only to the eflash start address, thereby improving the flexibility of the program code burning process. In addition, a plurality of user programs can be burnt into a plurality of different address fields in the eflash at the same time, so that different programs can run on the Cortex-M0 microprocessor.
Furthermore, considering that the upgrading program is likely to cover the original program code in the process of executing the program upgrading by the Cortex-M0 microprocessor, for this reason, the upgrading program can be burnt into the remaining storage space outside the storage area occupied by the original program code in the eflash, and the original program code is used as the backup of the upgrading program, which is beneficial to improving the system stability.
Alternatively, in step S16, mapping the start address of the first storage area to the start address of the storage structure may include performing the steps of:
step S161, jumping to a user program;
step S162, in the start code of the user program, mapping the start address of the first storage area to the start address of the storage structure.
After copying the interrupt vector table of the user program to the starting address of the SRAM in the bootrom program, it is necessary to jump to the user program to execute the program instruction. In the start code of the user program, the SRAM is mapped to an address of 0x 00000000. The Cortex-M0 microprocessor then fetches and executes instructions from the physical address of the eflash. When an abnormal interrupt occurs during the execution of the user program, the Cortex-M0 microprocessor acquires the start address of the interrupt processing function from the 0x00000000 address and then executes the interrupt processing function, because the start address of the SRAM is mapped to the 0x00000000 address.
Optionally, after mapping the start address of the first storage area to the start address of the storage structure in step S16, the method may further include the following steps:
step S17, when abnormal interruption occurs in the execution process of the user program, acquiring an interruption vector from the initial address of the storage structure, wherein the interruption vector is the initial address of the interruption processing function;
in step S18, the interrupt handling function is executed based on the interrupt vector jump.
The Cortex-M0 microprocessor executes program instructions in turn by using the physical address of eflash, and when an abnormal interrupt occurs in the execution process of a user program, the Cortex-M0 microprocessor acquires an interrupt vector from the address of 0x00000000, wherein the interrupt vector is the starting address of an interrupt processing function. And then executing the interrupt processing function based on the interrupt vector jump.
FIG. 3 is a flowchart of the remapping process of the interrupt vector table according to an alternative embodiment of the present invention, as shown in FIG. 3, first, the Cortex-M0 microprocessor is configured to start with the bootrom program after being powered on, so as to copy the interrupt vector table of the user program to the initial address of the SRAM in the bootrom program. Secondly, after copying the interrupt vector table of the user program to the starting address of the SRAM in the bootrom program, it is necessary to jump to the user program to execute the program instruction. In the start code of the user program, the SRAM is mapped to an address of 0x 00000000. Then, when an abnormal interrupt occurs during the execution of the user program, since the start address of the SRAM is already mapped to the address 0x00000000, the Cortex-M0 microprocessor acquires the start address of the interrupt handling function from the address 0x00000000, and then executes the interrupt handling function.
Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present invention.
In this embodiment, a remapping device for an interrupt vector table is also provided, where the remapping device is used to implement the foregoing embodiments and preferred embodiments, and details are not repeated for what has been described. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. Although the means described in the embodiments below are preferably implemented in software, an implementation in hardware, or a combination of software and hardware is also possible and contemplated.
Fig. 4 is a block diagram of a remapping apparatus of an interrupt vector table according to an embodiment of the present invention, which is applied to a microprocessor, a core of the microprocessor adopting an architecture in which instructions and data share a same bus, a storage structure of the microprocessor including: static random access memory and embedded flash memory, as shown in fig. 4, the apparatus includes: a copy module 10, configured to open a first storage area in the sram, and copy the interrupt vector table of the user program to the first storage area, where a start address of the sram is the same as a start address of the first storage area; the programming module 20 is configured to open a second storage area in the embedded flash memory and program a user program into the second storage area; a remapping module 30, configured to map a start address of the first storage area to a start address of the storage structure in a process of starting execution of the user program.
Optionally, the copying module 10 is configured to copy the interrupt vector table to the first storage area from a start address of the sram by using a preset interface program, where the preset interface program is a program that is executed first by the microprocessor when the microprocessor is powered on or reset.
Optionally, the programming module 20 includes: an acquiring unit (not shown in the figure) for acquiring an address to be programmed of a user program; a compiling unit (not shown in the figure) for compiling the source code of the user program into a binary file according to the address to be programmed; and a programming unit (not shown in the figure) for programming the binary file of the user program to the second storage area based on the address to be programmed.
Optionally, the remapping module 30 comprises: a jumping unit (not shown in the drawings) for jumping to the user program; a remapping unit (not shown in the figure) for mapping the start address of the first storage area to the start address of the storage structure in the start code of the user program.
Optionally, fig. 5 is a block diagram of a remapping apparatus of an interrupt vector table according to an alternative embodiment of the present invention, and as shown in fig. 5, the apparatus includes, in addition to all modules shown in fig. 4: an obtaining module 40, configured to obtain an interrupt vector from an initial address of a storage structure when an abnormal interrupt occurs during execution of a user program, where the interrupt vector is an initial address of an interrupt processing function; and an execution module 50, configured to execute an interrupt handling function based on the interrupt vector jump.
It should be noted that, the above modules may be implemented by software or hardware, and for the latter, the following may be implemented, but not limited to: the modules are all positioned in the same processor; alternatively, the modules are respectively located in different processors in any combination.
Embodiments of the present invention also provide a storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the above method embodiments when executed.
Alternatively, in the present embodiment, the storage medium may be configured to store a computer program for executing the steps of:
s1, opening up a first storage area in the static random access memory, and copying the interrupt vector table of the user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area;
s2, opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area;
s3, during the process of starting execution of the user program, maps the start address of the first storage area to the start address of the storage structure.
Optionally, the storage medium is further arranged to store a computer program for performing the steps of: and copying the interrupt vector table to a first storage area from the initial address of the static random access memory by adopting a preset interface program, wherein the preset interface program is a program executed firstly by the microprocessor when the microprocessor is powered on or reset.
Optionally, the storage medium is further arranged to store a computer program for performing the steps of: acquiring a to-be-programmed address of a user program; compiling the source code of the user program into a binary file according to the address to be programmed; and programming the binary file of the user program to the second storage area based on the address to be programmed.
Optionally, the storage medium is further arranged to store a computer program for performing the steps of: skipping to a user program; in the start code of the user program, the start address of the first memory area is mapped to the start address of the memory structure.
Optionally, the storage medium is further arranged to store a computer program for performing the steps of: when abnormal interruption occurs in the execution process of the user program, acquiring an interruption vector from the initial address of the storage structure, wherein the interruption vector is the initial address of an interruption processing function; and executing an interrupt handling function based on the interrupt vector jump.
Optionally, in this embodiment, the storage medium may include, but is not limited to: various media capable of storing computer programs, such as a usb disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk.
Embodiments of the present invention also provide an electronic device comprising a memory having a computer program stored therein and a processor arranged to run the computer program to perform the steps of any of the above method embodiments.
Optionally, the electronic apparatus may further include a transmission device and an input/output device, wherein the transmission device is connected to the processor, and the input/output device is connected to the processor.
Optionally, in this embodiment, the processor may be configured to execute the following steps by a computer program:
s1, opening up a first storage area in the static random access memory, and copying the interrupt vector table of the user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area;
s2, opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area;
s3, during the process of starting execution of the user program, maps the start address of the first storage area to the start address of the storage structure.
Optionally, the processor may be further configured to execute the following steps by a computer program: and copying the interrupt vector table to a first storage area from the initial address of the static random access memory by adopting a preset interface program, wherein the preset interface program is a program executed firstly by the microprocessor when the microprocessor is powered on or reset.
Optionally, the processor may be further configured to execute the following steps by a computer program: acquiring a to-be-programmed address of a user program; compiling the source code of the user program into a binary file according to the address to be programmed; and programming the binary file of the user program to the second storage area based on the address to be programmed.
Optionally, the processor may be further configured to execute the following steps by a computer program: skipping to a user program; in the start code of the user program, the start address of the first memory area is mapped to the start address of the memory structure.
Optionally, the processor may be further configured to execute the following steps by a computer program: when abnormal interruption occurs in the execution process of the user program, acquiring an interruption vector from the initial address of the storage structure, wherein the interruption vector is the initial address of an interruption processing function; and executing an interrupt handling function based on the interrupt vector jump.
Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation manners, and this embodiment is not described herein again.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (13)
1. A remapping method of interrupt vector table is applied to a microprocessor, the kernel of the microprocessor adopts an architecture that an instruction and data share the same bus, and the storage structure of the microprocessor comprises: static random access memory and embedded flash memory, the method comprising:
opening up a first storage area in the static random access memory, and copying an interrupt vector table of a user program to the first storage area, wherein the initial address of the static random access memory is the same as the initial address of the first storage area;
opening up a second storage area in the embedded flash memory, and programming the user program to the second storage area;
and in the process of starting to execute the user program, mapping the starting address of the first storage area to the starting address of the storage structure.
2. The method of claim 1, wherein copying the interrupt vector table to the first storage area comprises:
and copying the interrupt vector table to the first storage area from the initial address of the static random access memory by adopting a preset interface program, wherein the preset interface program is a program executed firstly by the microprocessor when the microprocessor is powered on or reset.
3. The method of claim 1, wherein programming the user program to the second storage area comprises:
acquiring an address to be programmed of the user program;
compiling the source code of the user program into a binary file according to the address to be programmed;
and programming the binary file of the user program to the second storage area based on the address to be programmed.
4. The method of claim 1, wherein mapping the starting address of the first storage region to the starting address of the storage structure comprises:
jumping to the user program;
and mapping the starting address of the first storage area to the starting address of the storage structure in the starting code of the user program.
5. The method of claim 1, further comprising, after mapping the starting address of the first storage region to the starting address of the storage structure:
when abnormal interruption occurs in the execution process of the user program, acquiring an interruption vector from the initial address of the storage structure, wherein the interruption vector is the initial address of an interruption processing function;
executing the interrupt handling function based on the interrupt vector jump.
6. An apparatus for remapping an interrupt vector table, applied to a microprocessor, wherein a core of the microprocessor adopts an architecture in which an instruction and data share a same bus, and a storage structure of the microprocessor comprises: static random access memory and embedded flash memory, the apparatus comprising:
the copying module is used for opening up a first storage area in the static random access memory and copying an interrupt vector table of a user program to the first storage area, wherein the starting address of the static random access memory is the same as the starting address of the first storage area;
the programming module is used for opening up a second storage area in the embedded flash memory and programming the user program to the second storage area;
and the remapping module is used for mapping the starting address of the first storage area to the starting address of the storage structure in the process of starting to execute the user program.
7. The apparatus of claim 6, wherein the copying module is configured to copy the interrupt vector table to the first storage area from a start address of the sram using a predetermined interface program, wherein the predetermined interface program is a program that is executed first by the microprocessor when the microprocessor is powered on or reset.
8. The apparatus of claim 6, wherein the programming module comprises:
the acquisition unit is used for acquiring the address to be programmed of the user program;
the compiling unit is used for compiling the source code of the user program into a binary file according to the address to be programmed;
and the programming unit is used for programming the binary file of the user program to the second storage area based on the address to be programmed.
9. The apparatus of claim 6, wherein the remapping module comprises:
a jumping unit for jumping to the user program;
a remapping unit, configured to map, in a start code of the user program, a start address of the first storage area to a start address of the storage structure.
10. The apparatus of claim 6, further comprising:
an obtaining module, configured to obtain an interrupt vector from an initial address of the storage structure when an abnormal interrupt occurs during execution of the user program, where the interrupt vector is an initial address of an interrupt processing function;
and the execution module is used for executing the interrupt processing function based on the interrupt vector jump.
11. A storage medium having stored thereon a computer program, wherein the computer program is arranged to execute the method of remapping an interrupt vector table as claimed in any one of claims 1 to 5 when running.
12. A microprocessor, wherein the microprocessor is configured to run a program, wherein the program is configured to perform the method of remapping an interrupt vector table of any one of claims 1 to 5 when running.
13. An electronic device comprising a memory and a microprocessor, wherein the memory has stored therein a computer program, the microprocessor being arranged to run the computer program to perform the method of remapping an interrupt vector table as claimed in any one of claims 1 to 5.
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