CN112309854B - Method and system for controlling corrosion uniformity of TiNiAg layer on wafer - Google Patents
Method and system for controlling corrosion uniformity of TiNiAg layer on wafer Download PDFInfo
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- CN112309854B CN112309854B CN201910688718.7A CN201910688718A CN112309854B CN 112309854 B CN112309854 B CN 112309854B CN 201910688718 A CN201910688718 A CN 201910688718A CN 112309854 B CN112309854 B CN 112309854B
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- 230000007797 corrosion Effects 0.000 title claims abstract description 55
- 238000005260 corrosion Methods 0.000 title claims abstract description 55
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000001259 photo etching Methods 0.000 claims abstract description 9
- 238000012360 testing method Methods 0.000 claims description 19
- 239000007788 liquid Substances 0.000 abstract description 21
- 238000004519 manufacturing process Methods 0.000 abstract description 7
- 238000012544 monitoring process Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 238000000206 photolithography Methods 0.000 description 5
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229910017727 AgNi Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32134—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by liquid etching only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67075—Apparatus for fluid treatment for etching for wet etching
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention discloses a method and a system for controlling corrosion uniformity of a TiNiAg layer on a wafer, wherein the control method comprises the following steps: acquiring a first area corresponding to a wafer; acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein a plurality of dies are arranged in the second area; acquiring a target area without arranging a die in the wafer according to the first area and the second area; and filling the target area by adopting a tube core when the TiNiAg layer is subjected to photoetching. The invention ensures that the transverse and longitudinal scribing grooves of the whole wafer are completely communicated, thereby improving the uniformity of liquid flow during corrosion, ensuring the smoothness of liquid flow during corrosion, ensuring that the corrosion state of each tube core is similar, achieving uniform corrosion, having no Ni residue and further improving the production efficiency and the product yield.
Description
Technical Field
The invention relates to the technical field of processing equipment, in particular to a method and a system for controlling corrosion uniformity of a TiNiAg layer on a wafer.
Background
The TiNiAg process is commonly used on single-tube products such as voltage protection devices, schottky, etc. The front TiNiAg layer is mainly used for meeting the packaging requirement of the patch, the packaging mode does not need gold leads, the packaging size is small, and the aim of effectively reducing the cost can be achieved.
Considering that the flow of the liquid has great influence on the corrosion of Ni, and the test pattern, the alignment mark, the monitoring pattern and the blank area are different from the exposed areas of the normal tube core after photoetching, the flow of the liquid in the areas can be blocked, so that the corrosion rate of Ni is reduced, ni residues are easily caused, and once AgNi corrosion is left, the scrapping of products is caused, the yield is reduced, and great waste is caused for online production.
Disclosure of Invention
The invention aims to overcome the defects that in the prior art, liquid is easy to corrode and unclean at positions such as a test pattern, an alignment mark, a monitoring pattern and a blank area, and product scrapping is easy to cause, and provides a method and a system for controlling corrosion uniformity of a TiNiAg layer on a wafer.
The invention solves the technical problems by the following technical scheme:
the invention provides a control method for corrosion uniformity of a TiNiAg layer on a wafer, which comprises the following steps:
acquiring a first area corresponding to a wafer;
acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein a plurality of dies are arranged in the second area;
acquiring a target area without arranging a die in the wafer according to the first area and the second area;
and filling the target area by adopting a tube core when the TiNiAg layer is subjected to photoetching.
Preferably, the step of obtaining the target area without arranging the dies in the wafer according to the first area and the second area includes:
and determining the areas except the second area in the first area as the target area without arranging the dies in the wafer.
Preferably, the step of filling the target area with a die includes:
and filling the target area by using a die.
Preferably, when the die fills the target area, the arrangement state of the die in the target area is consistent with the arrangement state of the die in the second area.
Preferably, the target area includes at least one of a test pattern, an alignment mark, a monitor pattern, and a blank area.
The invention also provides a control system for the corrosion uniformity of the TiNiAg layer on the wafer, which comprises a first region acquisition module, a second region acquisition module, a target region acquisition module and a control module;
the first region acquisition module is used for acquiring a first region corresponding to the wafer;
the second region acquisition module is used for acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein a plurality of dies are arranged in the second area;
the target area acquisition module is used for acquiring a target area without arranging a die in the wafer according to the first area and the second area;
the control module is used for filling the target area by adopting a tube core when the TiNiAg layer is subjected to photoetching.
Preferably, the second area obtaining module is configured to determine that an area except the second area in the first area is the target area in the wafer where no die is arranged.
Preferably, the control module is configured to fill the target area with a die.
Preferably, when the die fills the target area, the arrangement state of the die in the target area is consistent with the arrangement state of the die in the second area.
Preferably, the target area includes at least one of a test pattern, an alignment mark, a monitor pattern, and a blank area.
The invention has the positive progress effects that:
according to the invention, the target areas such as the test patterns, the alignment marks, the monitoring patterns and the blank areas of the wafer without arranging the dies are obtained, and then the dies are adopted to fill the target areas synchronously when the TiNiAg layer is subjected to photolithography, so that the die arrangement state of the target areas is consistent with the die arrangement state of the second area corresponding to the TiNiAg layer, namely, the transverse and longitudinal scribing grooves of the whole wafer are completely communicated, the uniformity of liquid flow during corrosion is improved, the smooth liquid flow during corrosion is ensured, the corrosion state of each die is similar, uniform corrosion is achieved, no Ni residues are caused, and the production efficiency and the product yield are further improved.
Drawings
FIG. 1 is a flow chart of a method for controlling the etch uniformity of a TiNiAg layer on a wafer according to example 1 of this invention.
FIG. 2 is a flow chart of a method for controlling the etch uniformity of a TiNiAg layer on a wafer according to example 2 of this invention.
FIG. 3 is a schematic diagram showing the distribution of target areas in the method for controlling the etch uniformity of a TiNiAg layer on a wafer according to example 2 of this invention.
FIG. 4 is a schematic diagram of a first target area in a method for controlling the etch uniformity of a TiNiAg layer on a wafer according to example 2.
FIG. 5 is a schematic diagram of a second target area in a method for controlling the etch uniformity of a TiNiAg layer on a wafer according to example 2.
FIG. 6 is a schematic diagram of a third target area in a method for controlling corrosion uniformity of a TiNiAg layer on a wafer according to example 2.
FIG. 7 is a schematic block diagram of a system for controlling the etch uniformity of a TiNiAg layer on a wafer in accordance with inventive example 3.
Detailed Description
The invention is further illustrated by means of the following examples, which are not intended to limit the scope of the invention.
Example 1
As shown in fig. 1, the method for controlling corrosion uniformity of the TiNiAg layer on the wafer according to the embodiment includes:
s101, acquiring a first area corresponding to a wafer;
s102, acquiring a second area corresponding to the TiNiAg layer on the wafer; wherein, a plurality of dies are arranged in the second area, namely the front surface of the TiNiAg layer.
S103, acquiring a target area without arranging the dies in the wafer according to the first area and the second area;
specifically, the area except the second area in the first area is determined to be a target area without arranging the dies in the wafer.
The target areas include, but are not limited to, test patterns, alignment marks, monitor patterns, and blank areas.
And S104, filling the target area by using the tube core when the TiNiAg layer is subjected to photoetching.
In this embodiment, by acquiring the target areas such as the test pattern, the alignment mark, the monitoring pattern, the blank area and the like of the wafer, and then synchronously filling the target areas with the dies when the TiNiAg layer is subjected to photolithography, the die arrangement state of the target areas is consistent with the die arrangement state of the second area corresponding to the TiNiAg layer, that is, the transverse and longitudinal scribe grooves of the whole wafer are completely communicated, so that the uniformity of liquid flow during corrosion is improved, the smoothness of liquid flow during corrosion is ensured, the corrosion state of each die is similar, uniform corrosion is achieved, no Ni residue is generated, and further the production efficiency and the product yield are improved.
Example 2
As shown in fig. 2, the method for controlling the corrosion uniformity of the TiNiAg layer on the wafer in this embodiment is a further improvement of embodiment 1, specifically:
step S104 includes:
s1041, filling the target area by using the tube core when the TiNiAg layer is subjected to photoetching.
Specifically, when the die fills up the target area, the arrangement state of the die in the target area coincides with the arrangement state of the die in the second area.
The transverse direction of the scribing groove of each tube core in the second area is consistent with the transverse direction of the scribing groove of each tube core in the target area, and the longitudinal direction of the scribing groove of each tube core in the second area is consistent with the longitudinal direction of the scribing groove of each tube core in the target area, namely, the transverse direction and the longitudinal direction of the scribing groove of the whole wafer are completely communicated, so that the uniformity of liquid flow in corrosion is improved, the smooth liquid flow in corrosion is ensured, the corrosion state of each tube core is similar, and even corrosion is achieved without Ni residues.
The following description is made in connection with specific examples:
as shown in fig. 3, when the target region is not filled, the region a indicates the first region, the region B indicates the second region, and the regions a, B, c, d, and e are all target regions.
Specifically, the c region, the d region, and the e region are regions that do not include an alignment mark, and when any one of the c region, the d region, and the e region includes a test pattern, a monitor pattern, and a blank region, as shown in fig. 4, the internal region of the rectangular frame B is the c region, the d region, or the e region, the rectangular frame a represents the region where the test pattern and the monitor pattern are located, and the region of the rectangular frame B other than the region where the rectangular frame a is located is the blank region.
The region a and the region b are regions comprising alignment marks, and are distributed at the left side and the right side of the wafer.
When any one of the area a and the area B includes the test pattern, the alignment mark, the monitoring pattern and the blank area, as shown in fig. 5, the rectangular frame B and the rectangular frame C together form the area a or the area B, the area corresponding to the square frame D in the rectangular frame C is the area where the alignment mark is located, and the area of the rectangular frame C except for the square frame D is also the blank area. The region corresponding to the square frame D remains to the alignment mark region of the TiNiAg layer, and the region cannot be filled with the TiNiAg layer pattern (the area should be as small as possible).
At this time, only the second area corresponding to the TiNiAg layer is provided with the effective dies (i.e. the dies which can be normally used), and the dies are not provided in the area a, the area b, the area c, the area d and the area e, and the effective dies at the positions and around are easy to corrode and unclean.
The areas a, b, c, d and e of the target areas are filled with dies, and the area c is taken as an example, as shown in fig. 6, wherein each small lattice represents different dies, gaps between the dies are dicing grooves, the arrangement state of the small lattices is completely consistent with that of each die in a second area corresponding to the TiNiAg layer, so that the dicing grooves in the transverse direction and the longitudinal direction are completely communicated, the uniformity of the flow of corrosive liquid is improved, the corrosion state of each die is similar, the purpose of uniform corrosion is achieved, and the existing wafer yield can be improved to 99% by 80%.
In this embodiment, by acquiring the target areas such as the test pattern, the alignment mark, the monitoring pattern, the blank area and the like of the wafer, and then synchronously filling the target areas with the dies when the TiNiAg layer is subjected to photolithography, the die arrangement state of the target areas is consistent with the die arrangement state of the second area corresponding to the TiNiAg layer, that is, the transverse and longitudinal scribe grooves of the whole wafer are completely communicated, so that the uniformity of liquid flow during corrosion is improved, the smoothness of liquid flow during corrosion is ensured, the corrosion state of each die is similar, uniform corrosion is achieved, no Ni residue is generated, and further the production efficiency and the product yield are improved.
Example 3
As shown in fig. 7, the system for controlling corrosion uniformity of the TiNiAg layer on the wafer according to the present embodiment includes a first region acquiring module 1, a second region acquiring module 2, a target region acquiring module 3, and a control module 4.
The first region acquisition module 1 is used for acquiring a first region corresponding to a wafer;
the second region acquisition module 2 is used for acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein, a plurality of dies are arranged in the second area, namely the front surface of the TiNiAg layer;
the target area obtaining module 3 is configured to obtain a target area without arranging a die in the wafer according to the first area and the second area;
specifically, the area except the second area in the first area is determined to be a target area without arranging the dies in the wafer.
The target areas include, but are not limited to, test patterns, alignment marks, monitor patterns, and blank areas.
The control module 4 is used for filling the target area by using the die when the TiNiAg layer is subjected to photoetching.
In this embodiment, by acquiring the target areas such as the test pattern, the alignment mark, the monitoring pattern, the blank area and the like of the wafer, and then synchronously filling the target areas with the dies when the TiNiAg layer is subjected to photolithography, the die arrangement state of the target areas is consistent with the die arrangement state of the second area corresponding to the TiNiAg layer, that is, the transverse and longitudinal scribe grooves of the whole wafer are completely communicated, so that the uniformity of liquid flow during corrosion is improved, the smoothness of liquid flow during corrosion is ensured, the corrosion state of each die is similar, uniform corrosion is achieved, no Ni residue is generated, and further the production efficiency and the product yield are improved.
Example 4
The control system for corrosion uniformity of the TiNiAg layer on the wafer of the present embodiment is a further improvement of embodiment 3, specifically:
the second area obtaining module 2 is configured to determine that an area except the second area in the first area is a target area in the wafer where no die is arranged.
The control module 4 is used to fill the target area with dies.
Specifically, when the die fills up the target area, the arrangement state of the die in the target area coincides with the arrangement state of the die in the second area.
The transverse direction of the scribing groove of each tube core in the second area is consistent with the transverse direction of the scribing groove of each tube core in the target area, and the longitudinal direction of the scribing groove of each tube core in the second area is consistent with the longitudinal direction of the scribing groove of each tube core in the target area, namely, the transverse direction and the longitudinal direction of the scribing groove of the whole wafer are completely communicated, so that the uniformity of liquid flow in corrosion is improved, the smooth liquid flow in corrosion is ensured, the corrosion state of each tube core is similar, and even corrosion is achieved without Ni residues.
The following description is made in connection with specific examples:
as shown in fig. 3, when the target region is not filled, the region a indicates the first region, the region B indicates the second region, and the regions a, B, c, d, and e are all target regions.
Specifically, the c region, the d region, and the e region are regions that do not include an alignment mark, and when any one of the c region, the d region, and the e region includes a test pattern, a monitor pattern, and a blank region, as shown in fig. 4, the internal region of the rectangular frame B is the c region, the d region, or the e region, the rectangular frame a represents the region where the test pattern and the monitor pattern are located, and the region of the rectangular frame B other than the region where the rectangular frame a is located is the blank region.
The region a and the region b are regions comprising alignment marks, and are distributed at the left side and the right side of the wafer.
When any one of the area a and the area B includes the test pattern, the alignment mark, the monitoring pattern and the blank area, as shown in fig. 5, the rectangular frame B and the rectangular frame C together form the area a or the area B, the area corresponding to the square frame D in the rectangular frame C is the area where the alignment mark is located, and the area of the rectangular frame C except for the square frame D is also the blank area. The region corresponding to the square frame D remains to the alignment mark region of the TiNiAg layer, and the region cannot be filled with the TiNiAg layer pattern (the area should be as small as possible).
At this time, only the second area corresponding to the TiNiAg layer is provided with the effective dies (i.e. the dies which can be normally used), and the dies are not provided in the area a, the area b, the area c, the area d and the area e, and the effective dies at the positions and around are easy to corrode and unclean.
The areas a, b, c, d and e of the target areas are filled with dies, and the area a is taken as an example, as shown in fig. 6, wherein each small lattice represents different dies, gaps between the dies are dicing grooves, the arrangement state of the small lattices is completely consistent with that of each die in a second area corresponding to the TiNiAg layer, so that the dicing grooves in the transverse direction and the longitudinal direction are completely communicated, the uniformity of the flow of corrosive liquid is improved, the corrosion state of each die is similar, the purpose of uniform corrosion is achieved, and the existing wafer yield can be improved to 99% by 80%.
In this embodiment, by acquiring the target areas such as the test pattern, the alignment mark, the monitoring pattern, the blank area and the like of the wafer, and then synchronously filling the target areas with the dies when the TiNiAg layer is subjected to photolithography, the die arrangement state of the target areas is consistent with the die arrangement state of the second area corresponding to the TiNiAg layer, that is, the transverse and longitudinal scribe grooves of the whole wafer are completely communicated, so that the uniformity of liquid flow during corrosion is improved, the smoothness of liquid flow during corrosion is ensured, the corrosion state of each die is similar, uniform corrosion is achieved, no Ni residue is generated, and further the production efficiency and the product yield are improved.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the principles and spirit of the invention, but such changes and modifications fall within the scope of the invention.
Claims (6)
1. The control method for the corrosion uniformity of the TiNiAg layer on the wafer is characterized by comprising the following steps:
acquiring a first area corresponding to a wafer;
acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein a plurality of dies are arranged in the second area;
acquiring a target area without arranging a die in the wafer according to the first area and the second area;
filling the target area by using a tube core when carrying out photoetching on the TiNiAg layer;
and when the die fills the target area, the arrangement state of the die in the target area is consistent with the arrangement state of the die in the second area.
2. The method for controlling corrosion uniformity of a TiNiAg layer on a wafer according to claim 1, wherein the step of obtaining a target area of the wafer where no dies are arranged according to the first area and the second area comprises:
and determining the areas except the second area in the first area as the target area without arranging the dies in the wafer.
3. The method of claim 1, wherein the target area comprises at least one of a test pattern, an alignment mark, a monitor pattern, and a blank area.
4. The control system for the corrosion uniformity of the TiNiAg layer on the wafer is characterized by comprising a first area acquisition module, a second area acquisition module, a target area acquisition module and a control module;
the first region acquisition module is used for acquiring a first region corresponding to the wafer;
the second region acquisition module is used for acquiring a second region corresponding to the TiNiAg layer on the wafer; wherein a plurality of dies are arranged in the second area;
the target area acquisition module is used for acquiring a target area without arranging a die in the wafer according to the first area and the second area;
the control module is used for filling the target area by adopting a tube core when the TiNiAg layer is subjected to photoetching;
and when the die fills the target area, the arrangement state of the die in the target area is consistent with the arrangement state of the die in the second area.
5. The system of claim 4, wherein the second region obtaining module is configured to determine a region of the first region other than the second region as the target region of the wafer in which no dies are arranged.
6. The system for controlling corrosion uniformity of a TiNiAg layer on a wafer according to claim 4, wherein said target area comprises at least one of a test pattern, an alignment mark, a monitor pattern, and a blank area.
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| CN201910688718.7A CN112309854B (en) | 2019-07-29 | 2019-07-29 | Method and system for controlling corrosion uniformity of TiNiAg layer on wafer |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040069292A (en) * | 2003-01-28 | 2004-08-05 | 노드슨 코포레이션 | Method for efficient capillary underfill |
| US20120168958A1 (en) * | 2010-12-30 | 2012-07-05 | Stmicroelectronics, Inc. | Method and system for forming dummy structures in accordance with the golden ratio |
| CN104201135A (en) * | 2014-08-28 | 2014-12-10 | 中航（重庆）微电子有限公司 | Wet etching device and use method thereof |
| US9514925B1 (en) * | 2015-09-10 | 2016-12-06 | Amazon Technologies, Inc. | Protective coating for silicon substrate |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6913517B2 (en) * | 2002-05-23 | 2005-07-05 | Cabot Microelectronics Corporation | Microporous polishing pads |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20040069292A (en) * | 2003-01-28 | 2004-08-05 | 노드슨 코포레이션 | Method for efficient capillary underfill |
| US20120168958A1 (en) * | 2010-12-30 | 2012-07-05 | Stmicroelectronics, Inc. | Method and system for forming dummy structures in accordance with the golden ratio |
| CN104201135A (en) * | 2014-08-28 | 2014-12-10 | 中航（重庆）微电子有限公司 | Wet etching device and use method thereof |
| US9514925B1 (en) * | 2015-09-10 | 2016-12-06 | Amazon Technologies, Inc. | Protective coating for silicon substrate |
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Address after: No.385, Hongcao Road, Xuhui District, Shanghai 200233 Applicant after: SHANGHAI ADVANCED SEMICONDUCTO Address before: No.385, Hongcao Road, Xuhui District, Shanghai 200233 Applicant before: ADVANCED SEMICONDUCTOR MANUFACTURING Co.,Ltd. |
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Effective date of registration: 20210518 Address after: 200131 No.600 Yunshui Road, Lingang New District, China (Shanghai) pilot Free Trade Zone, Pudong New Area, Shanghai Applicant after: Shanghai Jita Semiconductor Co.,Ltd. Address before: No.385, Hongcao Road, Xuhui District, Shanghai 200233 Applicant before: SHANGHAI ADVANCED SEMICONDUCTO |
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