CN112290812A - AC-DC control chip and AC-DC flyback controller - Google Patents
AC-DC control chip and AC-DC flyback controller Download PDFInfo
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- CN112290812A CN112290812A CN202011156680.8A CN202011156680A CN112290812A CN 112290812 A CN112290812 A CN 112290812A CN 202011156680 A CN202011156680 A CN 202011156680A CN 112290812 A CN112290812 A CN 112290812A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00304—Overcurrent protection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/007—Regulation of charging or discharging current or voltage
- H02J7/00712—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters
- H02J7/007182—Regulation of charging or discharging current or voltage the cycle being controlled or terminated in response to electric parameters in response to battery voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/02—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries for charging batteries from ac mains by converters
- H02J7/04—Regulation of charging current or voltage
- H02J7/06—Regulation of charging current or voltage using discharge tubes or semiconductor devices
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
- H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
- H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
- H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
- H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
- H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention provides an AC-DC control chip, and also provides an AC-DC flyback controller comprising the chip; the AC-DC control chip in the embodiment of the invention comprises a reset/set (RS) trigger, a turn-on signal module, a turn-off signal module, an overload protection module and a driving module, wherein the turn-on signal module, the turn-off signal module, the overload protection module and the driving module are respectively and electrically connected with the RS trigger; the output end of the turn-on signal module is connected with an S-end pin of the RS trigger, the output end of the turn-off signal module is connected with an R-end pin of the RS trigger, and the input end of the driving module is connected with a Q-end pin of the RS trigger; the starting signal module is used for adjusting the feedback voltage FB to control the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage so as to realize the continuous smooth change of the output frequency.
Description
Technical Field
The invention relates to the field of AC-DC switch control, in particular to an AC-DC control chip and an AC-DC flyback controller.
Background
In recent years, with the development of portable electronic products, the USB PD quick charging power source has also been developed. The existing USB PD quick charging power supply is configured with multi-gear output voltage, so that in an AC-DC control chip in an AC-DC flyback controller of the existing USB PD quick charging power supply, when the load of an output end is increased or reduced, the output voltage can be reduced, and when an operational amplifier in a protocol chip in the AC-DC flyback controller detects that the output voltage is lower than a set value, the current of an optical coupler can be reduced, so that the feedback voltage FB input into the AC-DC control chip is increased, and the increase of the feedback voltage FB can cause the sudden increase of the output frequency of an oscillator in the AC-DC control chip, the rise of a CS threshold value, and the sudden increase of the switching frequency and the overload protection threshold value of a system. Therefore, how to realize that the USB PD quick charging power supply has multi-gear output voltage, the system switching frequency and the overload protection threshold value of the system can continuously and smoothly change in the output voltage change process without jumping.
Disclosure of Invention
The invention provides an AC-DC control chip and a flyback controller, which solve the problem that the switching frequency of a system and the overload protection threshold value of the system can continuously and smoothly change without jumping in the output voltage change process when a USB PD quick charging power supply in the prior art has multi-level output voltage.
In order to solve the above technical problem, one technical solution adopted by the present invention is to provide an AC-DC control chip, including: the device comprises a reset/set (RS) trigger, a starting signal module, a turn-off signal module, an overload protection module and a driving module, wherein the starting signal module, the turn-off signal module, the overload protection module and the driving module are respectively and electrically connected with the RS trigger; the output end of the turn-on signal module is connected with an S-end pin of the RS trigger, the output end of the turn-off signal module is connected with an R-end pin of the RS trigger, and the input end of the driving module is connected with a Q-end pin of the RS trigger; the starting signal module is used for adjusting the control of the feedback voltage FB on the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage so as to enable the continuous smooth change of the output frequency and further enable the switching frequency of a system where the chip is located to achieve smooth change.
Further, the start signal module includes an oscillator, one end of the oscillator is connected to a feedback voltage FB, a zero-crossing detector ZCD is disposed between the oscillator and the feedback voltage FB, the zero-crossing detector ZCD is configured to detect a value of an output voltage, and subtract the value of the output voltage from a voltage value of the feedback voltage FB, and an obtained voltage difference value is used as an input voltage of the oscillator, so that the feedback voltage FB input to the oscillator is slowly increased/decreased, thereby continuously and smoothly increasing/decreasing an output frequency of the oscillator, and smoothly changing a switching frequency of a system in which a chip is located.
Further, the overload protection module is used for adjusting the threshold value of the maximum output power of the system according to the continuous change of the voltage value of the output voltage, so that the peak power can support the system load.
Further, the overload protection module includes an open circuit protector OLP, the negative input terminal of the open circuit protector OLP is connected to the feedback voltage FB, the positive input terminal of the open circuit protector OLP is connected to the internal reference voltage, a zero-crossing detector ZCD is disposed between the open circuit protector OLP and the internal reference voltage, the zero-crossing detector ZCD is configured to detect a value of the output voltage, add a voltage value of the internal reference voltage to the value of the output voltage, obtain a voltage sum value as a positive input voltage of the open circuit protector OLP, and adjust the voltage sum value according to the voltage value of the output voltage detected by the zero-crossing detector ZCD, so as to adjust an overload protection threshold of the system.
Further, the voltage sum is the sum of the input internal reference voltage and the output voltage value detected by the zero-crossing detector ZCD multiplied by K.
Further, the overload protection module is further configured to reset the preset delay and count again when the output voltage reaches a set value in a rising process.
Further, the overload protection module further includes a timer connected to an output end of the OLP, and an output end of the timer is connected to the RS flip-flop; the timer is also connected with a timing zero clearing unit, the timing zero clearing unit is provided with a plurality of timing zero clearing voltages, when the output voltage reaches the zero clearing voltage, the timer is cleared, and the timing is restarted; to ensure that the system can continuously and smoothly raise the output power in a plurality of timing cycles.
The invention also provides an AC-DC flyback controller comprising the AC-DC control chip described in the preceding claims 1 to 7.
Further, the controller further includes:
the rectifier bridge is used for converting alternating current into direct current and outputting voltage through a bus;
the starting resistor is used for providing voltage required by starting for the AC-DC control chip; two ends of the starting resistor are respectively connected with a bus voltage, a VCC pin of the AC-DC control chip and a first capacitor, and the voltage required by starting is provided for the AC-DC control chip;
one end of the primary side of the transformer is connected with the rectified bus voltage, and the secondary side of the transformer is connected with the output end through a first rectifying diode and a second capacitor;
the switching tube is connected with the OUT port of the AC-DC control chip, the source electrode of the switching tube is connected with an induction resistor, and the drain electrode of the switching tube is connected with the dotted terminal of the primary side of the transformer;
a protocol chip;
an optical coupler;
the output end generates feedback voltage to the FB end of the AC-DC control chip through a protocol chip and an optical coupler.
Further, the transformer further comprises an auxiliary winding NA, wherein the auxiliary winding NA is connected to the second rectifying diode and the first capacitor, and provides a required voltage for the AC-DC control chip after the AC-DC control chip is started.
The invention has the beneficial effects that: the invention provides an AC-DC control chip, which can realize that when the voltage value of an output voltage rises, a starting signal module of the chip can adjust a feedback voltage FB to control the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage, thereby realizing the continuous and smooth change of the output frequency without jumping.
When the USB PD quick charging power supply has multi-gear output voltage, the system switching frequency and the system maximum power can continuously and smoothly change in the output voltage change process, and jumping does not occur.
Drawings
FIG. 1 is a logic block diagram of an AC-DC control chip according to the present invention;
FIG. 2 is a schematic circuit diagram of an AC-DC control chip according to the present invention;
FIG. 3 is a schematic circuit diagram of another AC-DC control chip of the present invention;
FIG. 4 is a schematic circuit diagram of another AC-DC control chip of the present invention;
FIG. 5 is a schematic diagram of a rising edge pulse of a zero timing unit in another AC-DC control chip according to the present invention;
fig. 6 is a circuit schematic diagram of an AC-DC flyback controller according to the present invention;
FIG. 7 is a graph of the frequency of the AC-DC flyback controller according to the present invention as a function of the feedback voltage and the output voltage;
fig. 8 is a graph of the CS threshold and the overload protection threshold as a function of the feedback voltage and the output voltage for an AC-DC flyback controller of the present invention.
Detailed Description
In order to facilitate an understanding of the invention, the invention is described in more detail below with reference to the accompanying drawings and specific examples. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It is to be noted that, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
As shown in fig. 1, fig. 1 is a logic block diagram of an AC-DC control chip. The AC-DC control chip comprises an RS trigger 101, and a starting signal module 102, a shutting signal module 103, an overload protection module 104 and a driving module 105 which are electrically connected with the RS trigger 101; specifically, the output end of the turn-on signal module 102 is connected with an S-end pin of the RS flip-flop 101, the output end of the turn-off signal module 103 is connected with an R-end pin of the RS flip-flop 101, and the input end of the driving module 105 is connected with a Q-end pin of the RS flip-flop 101; when the voltage value of the output voltage rises, the start signal module 102 may adjust the feedback voltage FB to control the output frequency of the start signal module 102 according to the continuous change of the voltage value of the output voltage, so as to achieve the continuous and smooth change of the output frequency and avoid the sudden change of the frequency. When the AC-DC control chip in the embodiment is used in the AC-DC flyback control system, the switching frequency and the overload protection threshold value of the system can be continuously and smoothly changed when the output voltage of the AC-DC flyback control system is changed.
Referring to fig. 2, fig. 2 is a schematic circuit diagram of an AC-DC control chip.
In fig. 2, the AC-DC control chip includes a sampling unit 201, a slope compensation unit 202, a line voltage compensation unit 203, a PWM comparator unit 204, a cycle-by-cycle current limiting unit 205, an or gate unit 206, an oscillator 207, an RS flip-flop 208, and a driving unit 209. The feedback voltage FB is provided to the inverting input of the PWM comparator 204. It can be proved by the ramp supplementary principle known in the art that if a ramp signal with a rising slope larger than half of the falling slope of the inductor current is superimposed on the actual detected current waveform, the disturbance effect of different duty ratios to the average inductor current can be removed, so that the controlled peak inductor current is finally converged to the average inductor current. Therefore, the primary current detection signal CS first passes through a sampling unit 202 to output a sampling signal CS1, the CS1 passes through the slope compensation unit 102 to output a signal CS2, the CS2 is sent to the non-inverting input terminal of the PWM comparator 204, and the PWM comparator 204 outputs a PWM signal. When the CS2 signal is higher than the value of the M times feedback voltage FB, the PWM signal is high, otherwise, the PWM signal is low; that is, when CS2> FB × M, the PWM signal is high, and when CS2< FB × M, the PWM signal is low; the value of M is set according to the loop gain requirement, and typically, M is 0.2 ≦ M ≧ 0.5. In order to protect the internal power tube, the primary inductor current peak is protected by cycle-by-cycle current limiting, so that the sampling signal CS1 is sent to the non-inverting terminal of the cycle-by-cycle current limiting unit 205. In order to achieve better uniformity of the primary inductor current peaks at different input voltages VI N, a CS threshold is generated for the internal reference voltage Vref1 by the line voltage compensation unit 203, and then the CS threshold is sent to the inverting terminal of the cycle-by-cycle current limiting unit 205, and then the cycle-by-cycle current limiting unit 205 outputs a signal OCP. The OCP signal is high when the sampled signal CS1 is above the CS threshold voltage, and low otherwise. The resulting PWM signal and OCP signal pass through a logic unit or gate 206, which outputs a shutdown signal. The turn-on signal output by the oscillator unit 207 and the turn-off signal output by the or gate 206 are respectively connected to the S terminal and the R terminal of the RS flip-flop unit 208, the output terminal, i.e., the Q terminal, of the RS flip-flop 208 is connected to the input terminal of the driving unit 209, the output terminal of the driving unit 209 is connected to the OUT pin of the control chip, and the OUT pin is output to the gate of the NMOS transistor and used for driving the external power NMOS transistor.
One end of the oscillator 207 is connected to the feedback voltage FB, and a zero-crossing detector ZCD for detecting a value of the output voltage is disposed between the oscillator 207 and the feedback voltage FB; the value of the output voltage detected by the zero-cross detector ZCD is subtracted from the voltage value of the feedback voltage FB, and the resulting voltage difference is used as the input voltage of the oscillator 207. In a normal case, the loop control is that the oscillator 207 generates an on signal, and the PWM comparator unit 206 outputs an off signal. When the output voltage suddenly rises, for example, the voltage suddenly rises from 5V to 20V, in the conventional AC-DC control chip, the oscillation frequency of the oscillator 207 also suddenly rises, so that the rated full-load power of the entire AC-DC flyback controller also rises. In the AC-DC control chip provided in this embodiment, the output voltage detection signal detected by the zero-crossing detector ZCD controls the feedback voltage FB to gradually increase or decrease, so that the oscillation frequency of the feedback voltage FB control oscillator 207 gradually increases or decreases, and thus the rated full load power of the entire AC-DC flyback controller also stably increases or decreases, and the system is more stable.
Further, in another embodiment, the overload protection module 104 is configured to adjust the overload protection threshold of the entire AC-DC flyback controller according to a continuous change of the voltage value of the output voltage, so that the transmission power can support the system load. Referring to fig. 3, fig. 3 is a schematic circuit diagram of another AC-DC control chip.
In fig. 3, the overload protection module 104 includes a trip protector OLP 110, the trip protector OLP 110 has a negative input terminal connected to the feedback voltage FB and a positive input terminal connected to the internal reference voltage Vref2, wherein a zero-crossing detector ZCD is connected between the trip protector OLP 110 and the internal reference voltage Vref2, and is configured to detect a value of the output voltage and output the detected voltage value of the output voltage; the voltage value obtained by adding the voltage value of the internal reference voltage to the value of the output voltage is used as the positive input voltage of the open-circuit protector OLP 110, wherein the voltage value is changed and adjusted according to the voltage value of the output voltage detected by the zero-crossing detector ZCD, so that the voltage value can adjust the overload protection threshold value of the whole AC-DC flyback controller system, the overload protection threshold value can be stably increased or decreased, and the system is more stable.
Further, the voltage and value are calculated in the following manner: the sum of the voltages is equal to the input internal reference voltage Vref2+ K × the output voltage value detected by the zero-crossing detector ZCD. K is a fixed value, and the value of K can be set according to the requirement of system design.
Further, in another embodiment, the overload protection module 104 is further configured to zero the preset delay and count again when the output voltage reaches the set value within a preset time. Referring to fig. 4, fig. 4 is a schematic circuit diagram of another AC-DC control chip.
In fig. 4, the overload protection module 104 further includes a timer 111 connected to the output terminal of the trip protector OLP 110, the output terminal of the timer 111 is connected to the RS flip-flop 208, and the OLP signal output by the output terminal of the trip protector OLP 110 passes through the timer 111 and is output to the RS flip-flop 208; the timer 111 is also connected with a timing zero clearing unit 112, the timing zero clearing unit 112 sets a plurality of timing zero clearing voltages, and when the output voltage reaches the zero clearing voltage, the timer is cleared and starts timing again; to ensure that the system can continuously and smoothly raise the output power in a plurality of timing cycles. In this embodiment, the most common output voltage, 5 th gear, is 5V, 9V, 12V, 15V, 20V, and the rated full load is 3A. The timing zero clearing unit is set with 4 timing zero clearing voltages which are intermediate values of two adjacent gears of output voltage and are respectively 7.5V, 10.5V, 13.5V and 17.5V, once the zero detector ZCD detects that the output voltage is in a rising process, any one of four nodes is reached, and on the rising edge, the timing zero clearing unit 112 sends a zero clearing signal, clears the 150ms delay and times again. Therefore, the whole AC-DC flyback controller system can provide more sufficient time for the continuous and steady rise of the output voltage without affecting the existing timing parameters, and the system is more stable, please refer to the rising edge pulse diagram of fig. 5. The overload protection module in the embodiment can ensure that the AC-DC flyback controller system can be protected at the fastest speed and started in a normal load mode when the overload protection delay is balanced, so that the system is more stable in use.
In the AC-DC control chip in this embodiment, the output voltage detected by the feedback voltage FB and the zero detector ZCD jointly controls the oscillation frequency of the system and the control of the overload protection threshold, so that the output voltage and the output voltage can be changed, continuously adjusted in real time, and smoothly transited. Specifically, the method comprises the following steps:
referring to fig. 7, fig. 7 is a graph of the frequency variation with the feedback voltage and the output voltage when the AC-DC flyback controller operates. In this embodiment, the most common output voltage, 5 th gear, is 5V, 9V, 12V, 15V, 20V, and the rated full load is 3A. The oscillator is jointly controlled by the feedback voltage FB and the output voltage detection voltage ZCD, the output is 5V at the beginning, then the protocol chip receives a rear-stage load signal and requires to increase the output voltage to 20V, the protocol chip immediately increases the setting of the output voltage from the original 5V to 20V, the FB voltage gradually starts to rise, the output power of the system starts to increase, the output voltage starts to rise cycle by cycle, each voltage point in 5V-20V is sequentially and smoothly experienced in the output voltage rising process, the curve of the working frequency smoothly changes and transits from the leftmost curve in FIG. 7 to the left and right curves, no jump exists in the middle, and the continuity of the whole boosting process is guaranteed. Conversely, when the voltage is reduced from 20V to 5V, the frequency curve is continuously and smoothly transited from the rightmost curve to the leftmost curve, and the continuity of the whole voltage reduction process is ensured.
Referring to fig. 8, fig. 8 is a graph of the CS threshold and the overload protection threshold as a function of the feedback voltage and the output voltage when the AC-DC flyback controller operates. Fig. 8 shows the continuous variation of the overload protection threshold during a variation of the output voltage. Assuming that the system is fully loaded at 3A, the maximum power of the system gradually rises from 15W as the output voltage starts to rise from 5V until the maximum power of the system reaches 60W when the output voltage is 20V; in the process of increasing the output voltage, the overload protection threshold of the feedback voltage FB continuously and smoothly increases along with the output voltage detection voltage ZCD, that is, the overload protection threshold 15W at 5V increases to the overload protection threshold 72W at 20V, and it should be noted that the overload protection threshold is generally set to be 1.2 times of the rated full load power; because the overload protection threshold value is always larger than the rated full-load power, the smooth transition can ensure that the output voltage rises smoothly when the system is fully loaded, and the overload protection threshold value under each voltage is always 1.2 times of the rated full-load power under the voltage.
In addition, in the process of starting the AC-DC control chip and switching up the output voltage, FB will quickly rise to FB _ max, where the primary side current detection signal CS threshold corresponding to F _ max is 0.42, where F _ max is higher than the overload protection threshold corresponding to any output voltage, for example, F _ max reaches 90W, so that the AC-DC control chip can continuously operate for 150ms at a peak power of 90W during the starting process or when the subsequent stage load has a capacitive load/an inductive load, thereby ensuring the normal establishment of the output voltage.
In addition, in the process of establishing the 5-gear output voltage of the AC-DC control chip, four middle nodes (7.5V, 10.5V, 13.5V and 17.5V) between every two nodes are respectively taken to judge that the output voltage is in the rising process, once the output voltage is detected to be in the rising process, any one of the four nodes is reached, and on the rising edge reached, the internal timing zero clearing unit of the chip sends out a zero clearing signal, the 150ms delay is cleared, and the timing is restarted.
Supposing that the AC-DC control chip is overloaded when working at an output voltage of 5V, the feedback voltage FB rises to exceed an overload protection threshold OLP corresponding to 5V, and if the AC-DC control chip is still in an overload state after timing for 150ms and the output voltage is not reestablished, the pulse is turned off; similarly, when the system works at 9V, 12V, 15V and 20V, overload occurs, and 150ms protection is delayed, so that not only is enough time for the system to reestablish the output voltage ensured, but also the system can be protected in time, and the system is prevented from being damaged by long-time overload.
When the AC-DC control chip is overloaded due to the increase of the output voltage, for example, the system requires the output voltage to increase from 5V to 20V at a certain moment, the system may not complete the establishment from 50V to 20V only within 150ms, and the chip internal timing zero clearing unit plays an important role at this moment; when the output voltage is set to be changed from 5V to 20V, FB rises and exceeds the overload protection threshold OLP, the chip starts to time for 150ms, meanwhile, the feedback voltage FB rises, the transmission energy is increased, the output voltage starts to rise, when 7.5V is risen, the timing zero clearing unit sends a timing zero clearing pulse to restart the timing, namely, as long as the system is within 150ms, the output voltage can rise from 5V to 7.5V, the protection cannot occur; then, the timing is started for 150ms from 7.5V, when the output voltage reaches 10.5V of a second node, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise to 10.5V from 7.5V within 150ms of the system, the protection cannot occur; then, the timing is started for 150ms from 10.5V, when the output voltage reaches the third node of 13.5V, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise from 10.5V to 13.5V within 150ms, the protection can not occur; then, the timing is started for 150ms from 13.5V, when the output voltage reaches 17.5V of the fourth node, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise from 13.5V to 17.5V within 150ms of the system, the protection cannot occur; therefore, on the premise of ensuring the safety of the system without increasing the protection delay, the output voltage can be ensured to have enough establishment time in the rising switching process to the maximum extent, and the switching from low to high can be smoothly carried out. Therefore, the overload protection module in the embodiment can ensure that the system can be protected fastest and started in a normal load mode when the overload protection delay is balanced in the AC-DC flyback controller system, so that the system is more stable in use.
In this embodiment, an AC-DC control chip is provided, which includes an RS flip-flop, and an on signal module, an off signal module, an overload protection module, and a driving module electrically connected to the RS flip-flop; specifically, the output end of the turn-on signal module is connected with an S-end pin of the RS trigger, the output end of the turn-off signal module is connected with an R-end pin of the RS trigger, and the input end of the driving module is connected with a Q-end pin of the RS trigger; when the voltage value of the output voltage rises, the starting signal module adjusts the feedback voltage FB to control the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage, so that the continuous adjustment and smooth transition of the output frequency are realized, and the sudden change of the frequency is avoided.
As shown in fig. 6, fig. 6 is a circuit schematic diagram of an AC-DC flyback controller. An AC-DC flyback controller according to an embodiment of the present invention includes the AC-DC control chip described in the foregoing embodiment.
Specifically, the AC-DC flyback control in this embodiment includes:
the AC-DC control chip 10 comprises a feedback voltage FB input end, a primary side current detection end CS, a driving output end OUT, a power supply pin VCC, a pin ZCD which is used for simultaneously detecting output voltage and demagnetizing a secondary side to zero and a chip ground GND, wherein the AC-DC control chip 10 comprises a feedback voltage FB input end, a primary side current detection end CS, a driving output end OUT, a power supply pin VCC;
the rectifier bridge 31 is connected with alternating current at the upper end and the lower end of the rectifier bridge 31, and connected with a bus capacitor 32 at the left end and the right end, and used for converting the alternating current into direct current and outputting voltage through a bus Vilne;
the two ends of the starting resistor 33 are respectively connected with the bus voltage, a VCC pin of the AC-DC control chip and a first capacitor 34, and the voltage required by starting is provided for the AC-DC control chip;
one end of the primary side of the transformer 30 is connected with the rectified bus voltage, and the secondary side of the transformer 30 is connected with the output end through a first rectifying diode 40 and a second capacitor 50;
a grid electrode of the switch tube 20 is connected with an OUT port at the driving end of the AC-DC control chip, a source electrode is connected with an induction resistor 90, and a drain electrode is connected with the dotted end of the primary side of the transformer;
a protocol chip 70;
the output end of the optical coupler 60 generates a feedback signal to the FB end of the control chip 10 through the protocol chip 70 and the optical coupler 60.
Further, the transformer 30 further includes an auxiliary winding NA, wherein the auxiliary winding NA is connected to the second rectifying diode 35 and the first capacitor 34, and provides a required voltage to the AC-DC control chip 10 after starting.
In the AC-DC flyback control in this embodiment, the oscillation frequency of the system and the overload protection threshold are controlled by the output voltage detected by the feedback voltage FB and the zero detector ZCD, so that the output voltage and the overload protection threshold can be adjusted in real time and continuously and smoothly along with the change of the output voltage. Specifically, the method comprises the following steps:
referring to fig. 7, fig. 7 is a graph of the frequency variation with the feedback voltage and the output voltage when the AC-DC flyback controller operates. In this embodiment, the most common output voltage, 5 th gear, is 5V, 9V, 12V, 15V, 20V, and the rated full load is 3A. The oscillator is jointly controlled by the feedback voltage FB and the output voltage detection voltage ZCD, the output is 5V at the beginning, then the protocol chip receives a rear-stage load signal and requires to increase the output voltage to 20V, the protocol chip immediately increases the setting of the output voltage from the original 5V to 20V, the FB voltage gradually starts to rise, the output power of the system starts to increase, the output voltage starts to rise cycle by cycle, each voltage point in 5V-20V is sequentially and smoothly experienced in the output voltage rising process, the curve of the working frequency smoothly changes and transits from the leftmost curve in FIG. 7 to the left and right curves, no jump exists in the middle, and the continuity of the whole boosting process is guaranteed. Conversely, when the voltage is reduced from 20V to 5V, the frequency curve is continuously and smoothly transited from the rightmost curve to the leftmost curve, and the continuity of the whole voltage reduction process is ensured.
Referring to fig. 8, fig. 8 is a graph of the CS threshold and the overload protection threshold as a function of the feedback voltage and the output voltage when the AC-DC flyback controller operates. Fig. 8 shows the continuous variation of the overload protection threshold during a variation of the output voltage. Assuming that the system is fully loaded at 3A, the maximum power of the system gradually rises from 15W as the output voltage starts to rise from 5V until the maximum power of the system reaches 60W when the output voltage is 20V; in the process of increasing the output voltage, the overload protection threshold of the feedback voltage FB continuously and smoothly increases along with the output voltage detection voltage ZCD, that is, the overload protection threshold 15W at 5V increases to the overload protection threshold 72W at 20V, and it should be noted that the overload protection threshold is generally set to be 1.2 times of the rated full load power; because the overload protection threshold value is always larger than the rated full-load power, the smooth transition can ensure that the output voltage rises smoothly when the system is fully loaded, and the overload protection threshold value under each voltage is always 1.2 times of the rated full-load power under the voltage.
In addition, in the process of starting the AC-DC control chip and switching up the output voltage, FB will quickly rise to FB _ max, where the primary side current detection signal CS threshold corresponding to F _ max is 0.42, where F _ max is higher than the overload protection threshold corresponding to any output voltage, for example, F _ max reaches 90W, so that the AC-DC control chip can continuously operate for 150ms at a peak power of 90W during the starting process or when the subsequent stage load has a capacitive load/an inductive load, thereby ensuring the normal establishment of the output voltage.
In addition, in the process of establishing the 5-gear output voltage of the AC-DC control chip, four middle nodes (7.5V, 10.5V, 13.5V and 17.5V) between every two nodes are respectively taken to judge that the output voltage is in the rising process, once the output voltage is detected to be in the rising process, any one of the four nodes is reached, and on the rising edge reached, the internal timing zero clearing unit of the chip sends out a zero clearing signal, the 150ms delay is cleared, and the timing is restarted.
Supposing that the AC-DC control chip is overloaded when working at an output voltage of 5V, the feedback voltage FB rises to exceed an overload protection threshold OLP corresponding to 5V, and if the AC-DC control chip is still in an overload state after timing for 150ms and the output voltage is not reestablished, the pulse is turned off; similarly, when the system works at 9V, 12V, 15V and 20V, overload occurs, and 150ms protection is delayed, so that not only is enough time for the system to reestablish the output voltage ensured, but also the system can be protected in time, and the system is prevented from being damaged by long-time overload.
When the AC-DC control chip is overloaded due to the increase of the output voltage, for example, the system requires the output voltage to increase from 5V to 20V at a certain moment, the system may not complete the establishment from 50V to 20V only within 150ms, and the chip internal timing zero clearing unit plays an important role at this moment; when the output voltage is set to be changed from 5V to 20V, FB rises and exceeds the overload protection threshold OLP, the chip starts to time for 150ms, meanwhile, the feedback voltage FB rises, the transmission energy is increased, the output voltage starts to rise, when 7.5V is risen, the timing zero clearing unit sends a timing zero clearing pulse to restart the timing, namely, as long as the system is within 150ms, the output voltage can rise from 5V to 7.5V, the protection cannot occur; then, the timing is started for 150ms from 7.5V, when the output voltage reaches 10.5V of a second node, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise to 10.5V from 7.5V within 150ms of the system, the protection cannot occur; then, the timing is started for 150ms from 10.5V, when the output voltage reaches the third node of 13.5V, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise from 10.5V to 13.5V within 150ms, the protection can not occur; then, the timing is started for 150ms from 13.5V, when the output voltage reaches 17.5V of the fourth node, the timing zero clearing unit can send out a timing zero clearing pulse again to restart the timing, namely, as long as the output voltage can rise from 13.5V to 17.5V within 150ms of the system, the protection cannot occur; therefore, on the premise of ensuring the safety of the system without increasing the protection delay, the output voltage can be ensured to have enough establishment time in the rising switching process to the maximum extent, and the switching from low to high can be smoothly carried out.
In this embodiment, an AC-DC flyback control is provided, where the AC-DC flyback control includes an AC-DC control chip, and the AC-DC control chip includes an RS flip-flop, and an on signal module, an off signal module, an overload protection module, and a driving module that are electrically connected to the RS flip-flop; specifically, the output end of the turn-on signal module is connected with an S-end pin of the RS trigger, the output end of the turn-off signal module is connected with an R-end pin of the RS trigger, and the input end of the driving module is connected with a Q-end pin of the RS trigger; when the voltage value of the output voltage rises, the starting signal module adjusts the feedback voltage FB to control the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage, so that the continuous adjustment and smooth transition of the output frequency are realized, and the sudden change of the frequency is avoided.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all equivalent structural changes made by using the contents of the present specification and the drawings, or applied directly or indirectly to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. An AC-DC control chip is characterized by comprising a reset/set (RS) trigger, a turn-on signal module, a turn-off signal module, an overload protection module and a driving module, wherein the turn-on signal module, the turn-off signal module, the overload protection module and the driving module are respectively and electrically connected with the RS trigger; the output end of the turn-on signal module is connected with an S-end pin of the RS trigger, the output end of the turn-off signal module is connected with an R-end pin of the RS trigger, and the input end of the driving module is connected with a Q-end pin of the RS trigger; the starting signal module is used for adjusting the control of the feedback voltage FB on the output frequency of the starting signal module according to the continuous change of the voltage value of the output voltage so as to enable the continuous smooth change of the output frequency and further enable the switching frequency of a system where the chip is located to achieve smooth change.
2. The chip of claim 1, wherein the turn-on signal module comprises an oscillator, one end of the oscillator is connected to a feedback voltage FB, a zero-crossing detector ZCD is disposed between the oscillator and the feedback voltage FB, the zero-crossing detector ZCD is configured to detect a value of an output voltage, subtract the value of the output voltage from the voltage value of the feedback voltage FB, and use a voltage difference value obtained by using the voltage difference value as an input voltage of the oscillator, so that the feedback voltage FB input to the oscillator slowly rises/falls, and thus when the output voltage changes, an output frequency of the oscillator continuously and smoothly rises/falls, and a switching frequency of a system in which the chip is located is smoothly changed.
3. The chip of claim 1, wherein the overload protection module is configured to adjust a threshold of a maximum output power of the system according to a continuous variation of a voltage value of the output voltage, so that a peak power can support a system load.
4. The chip of claim 3, wherein the overload protection module includes a circuit breaker OLP, the negative terminal of the input of the circuit breaker OLP is connected to the feedback voltage FB, the positive terminal of the input is connected to the internal reference voltage, a zero crossing detector ZCD is disposed between the circuit breaker OLP and the internal reference voltage, the zero crossing detector ZCD is configured to detect a value of the output voltage, and add a voltage value of the internal reference voltage to the value of the output voltage, and the obtained voltage sum is used as the positive terminal input voltage of the circuit breaker OLP, and the voltage sum is adjusted according to the voltage value of the output voltage detected by the zero crossing detector ZCD, so as to adjust the overload protection threshold of the system.
5. The chip of claim 4, wherein the voltage sum is a sum of an input internal reference voltage plus a K-times value of an output voltage detected by a zero-crossing detector ZCD.
6. The chip of claim 5, wherein the overload protection module is further configured to clear the preset delay and count again when the output voltage reaches a set value during a rising process.
7. The chip of claim 6, wherein the overload protection module further comprises a timer connected to an output of the OLP, and an output of the timer is connected to the RS flip-flop; the timer is also connected with a timing zero clearing unit, the timing zero clearing unit is provided with a plurality of timing zero clearing voltages, when the output voltage reaches the zero clearing voltage, the timer is cleared, and the timing is restarted; to ensure that the system can continuously and smoothly raise the output power in a plurality of timing cycles.
8. An AC-DC flyback controller, characterized in that the controller comprises the AC-DC control chip of the preceding claim 1 to claim 7.
9. The controller of claim 8, further comprising:
the rectifier bridge is used for converting alternating current into direct current and outputting voltage through a bus;
the starting resistor is used for providing voltage required by starting for the AC-DC control chip; two ends of the starting resistor are respectively connected with a bus voltage, a VCC pin of the AC-DC control chip and a first capacitor, and the voltage required by starting is provided for the AC-DC control chip;
one end of the primary side of the transformer is connected with the rectified bus voltage, and the secondary side of the transformer is connected with the output end through a first rectifying diode and a second capacitor;
the switching tube is connected with the OUT port of the AC-DC control chip, the source electrode of the switching tube is connected with an induction resistor, and the drain electrode of the switching tube is connected with the dotted terminal of the primary side of the transformer;
a protocol chip;
an optical coupler;
the output end generates feedback voltage to the FB end of the AC-DC control chip through a protocol chip and an optical coupler.
10. The controller of claim 9, wherein the transformer further comprises an auxiliary winding NA, the auxiliary winding NA connecting the second rectifying diode and the first capacitor to provide a desired voltage to the AC-DC control chip after the AC-DC control chip is started.
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| US7936160B1 (en) * | 2007-04-25 | 2011-05-03 | National Semiconductor Corporation | Apparatus and method for valley emulated current mode control |
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| CN105406740A (en) * | 2015-12-31 | 2016-03-16 | 浙江大学 | Control chip for realizing low-standby power consumption of AC-DC switch power supply |
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| US7936160B1 (en) * | 2007-04-25 | 2011-05-03 | National Semiconductor Corporation | Apparatus and method for valley emulated current mode control |
| CN102761273A (en) * | 2012-06-26 | 2012-10-31 | 深圳市稳先微电子有限公司 | No-load control system of original-side feedback AC-DC switching power supply |
| CN104601015A (en) * | 2014-01-14 | 2015-05-06 | 深圳市稳先微电子有限公司 | Flyback AC-DC converter |
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