CN112289770A - Solder mask structure of DBC substrate, DBC substrate and electronic device thereof - Google Patents
Solder mask structure of DBC substrate, DBC substrate and electronic device thereof Download PDFInfo
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- CN112289770A CN112289770A CN202011180772.XA CN202011180772A CN112289770A CN 112289770 A CN112289770 A CN 112289770A CN 202011180772 A CN202011180772 A CN 202011180772A CN 112289770 A CN112289770 A CN 112289770A
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- Prior art keywords
- dbc substrate
- solder
- bonding
- solder mask
- solder resist
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- 229910000679 solder Inorganic materials 0.000 title claims abstract description 94
- 239000000758 substrate Substances 0.000 title claims abstract description 60
- 238000003466 welding Methods 0.000 claims abstract description 34
- 229910052751 metal Inorganic materials 0.000 claims abstract description 25
- 239000002184 metal Substances 0.000 claims abstract description 25
- 229910052782 aluminium Inorganic materials 0.000 claims description 19
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 19
- 239000000919 ceramic Substances 0.000 claims description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 abstract description 9
- 238000002360 preparation method Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- 238000011109 contamination Methods 0.000 abstract description 2
- 238000000034 method Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000005476 soldering Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 206010063385 Intellectualisation Diseases 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000001680 brushing effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49113—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
Landscapes
- Physics & Mathematics (AREA)
- Geometry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention belongs to the technical field of power electronics, and relates to a solder mask structure of a DBC substrate, the DBC substrate and an electronic device of the DBC substrate. The solder mask structure of the DBC substrate comprises a plurality of solder mask bonding wires, wherein the solder mask bonding wires are arranged around a welding area, and the welding area is located on a metal layer of the DBC substrate. Solder-resisting bonding wires are arranged on the periphery of the welding area, so that solder is limited in the welding area, the DBC substrate can be ensured to realize solder resistance under a high-temperature condition, and the solder-resisting effect is not influenced by temperature; the short circuit of the circuit caused by the overflow of the solder is prevented, and the contamination of the non-welding point by the solder is prevented, thereby effectively protecting the circuit; in addition, the solder mask structure is flexible in preparation process, and can be designed in any range of the DBC substrate metal layer according to the solder mask requirement so as to realize solder mask, so that the production efficiency is improved, and the production cost is saved.
Description
Technical Field
The invention belongs to the technical field of power electronics, relates to a DBC substrate, and particularly relates to a solder mask structure of the DBC substrate, the DBC substrate and an electronic device of the DBC substrate.
Background
DBC is an abbreviation of English Direct Bonded coater, has the advantages of low thermal resistance, high bonding strength, convenience in pattern printing, good weldability and the like, and is widely applied to power electronic modules such as GTR, IGBT, MCT and the like for nearly more years. The DBC substrate is convenient for packaging the chip in the same module, so that internal leads are shortened and reduced, the reliability of the module is improved, process conditions are created for intellectualization of the power module, and meanwhile, the remarkable reduction of thermal resistance is convenient for the module to develop to larger power.
In IGBT module manufacturing, soldering between the chip and the DBC substrate is very critical. The chip and the DBC substrate are welded at high temperature by solder, the solder is melted at high temperature, and if the welding is not limited, the melted solder overflows, so that the problems of short circuit of a circuit, pollution to a non-welding area and the like are caused. Therefore, solder mask design needs to be considered in the DBC substrate to prevent solder overflow and achieve the purpose of protecting the circuit.
At present, a solder mask technology is more common, in which a solder mask material is coated on a soldering area of a DBC substrate, so that a melted solder is limited to the soldering area, as shown in fig. 1. However, because the existing solder mask material has certain temperature limit, the solder mask material cannot play a role of solder mask after the temperature limit is exceeded; meanwhile, the process of brushing the solder mask is added in the DBC substrate manufacturing process, so that the production period of the product is increased inevitably, and the production cost of the product is increased at the same time.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned disadvantages of the prior art, and to provide a solder resist structure of a DBC substrate, and an electronic device thereof, in which solder is confined in a bonding area by a bonding wire, thereby preventing a short circuit of a circuit due to an overflow of solder and preventing a non-bonding point from being contaminated by solder, thereby effectively protecting the circuit.
The purpose of the invention is solved by the following technical scheme:
in a first aspect, the invention provides a solder mask structure of a DBC substrate, which includes a plurality of solder mask bonding wires, where the solder mask bonding wires are disposed around a welding area, and the welding area is located on a metal layer of the DBC substrate.
Further, the solder-resisting bonding wire is a solder-resisting bonding aluminum wire.
Further, the resistance welding bonding aluminum wire is bonded around the welding area through a bonding machine.
Further, the distance between the resistance welding bonding aluminum wire and the edge of the welding area is 0.5-1 mm.
Further, the metal layer is made of any one of aluminum, copper, nickel, silver and gold.
Furthermore, the bonding pad is located at the right lower corner of the DBC substrate and is rectangular.
Further, the number of the solder resist bonding wires is at least two.
In a second aspect, the present invention further provides a DBC substrate, including the above solder mask structure, where the DBC substrate includes a ceramic sheet and a metal layer formed on the ceramic sheet, the welding area is located on the metal layer, and solder mask bonding wires are distributed around the welding area.
In a third aspect, the present invention further provides an electronic device, including a DBC substrate and a chip soldered on the DBC substrate, where the DBC substrate includes a ceramic sheet and a metal layer formed on the ceramic sheet, a solder pad is disposed on the metal layer, and solder-resist bonding wires are distributed around the solder pad.
Compared with the prior art, the technical scheme provided by the invention has the following beneficial effects: solder-resisting bonding wires are arranged on the periphery of the welding area, so that solder is limited in the welding area, the DBC substrate can be ensured to realize solder resistance under a high-temperature condition, and the solder-resisting effect is not influenced by temperature; the short circuit of the circuit caused by the overflow of the solder is prevented, and the contamination of the non-welding point by the solder is prevented, thereby effectively protecting the circuit; in addition, the solder mask structure is flexible in preparation process, and can be designed in any range of the DBC substrate metal layer according to the solder mask requirement so as to realize solder mask, so that the production efficiency is improved, and the production cost is saved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
FIG. 1 is a schematic structural diagram of a conventional solder mask design;
fig. 2 is a schematic diagram of a solder resist structure of a DBC substrate provided by the present invention;
fig. 3 is a schematic cross-sectional view of a solder resist bonding wire provided by the present invention.
Wherein: 1. a chip; 2. a DBC substrate; 3. a metal layer; 4. a welding zone; 5. welding resistance bonding wires; 6. a solder resist layer; 7. a chip bonding wire; 8. and (3) soldering.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present invention. Rather, they are merely examples of structures consistent with certain aspects of the invention, as detailed in the appended claims.
In order to make those skilled in the art better understand the technical solution of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings and examples.
Examples
Referring to fig. 2-3, in one aspect, the present invention provides a solder mask structure of a DBC substrate, including several solder mask bonding lines, where the solder mask bonding lines are disposed around a bonding area, and the bonding area is located on a metal layer of the DBC substrate.
As a preferred or optional implementation manner of this embodiment, the solder resist bonding wire is a solder resist bonding aluminum wire.
As a preferred or optional implementation manner of this embodiment, the solder resist bonding aluminum wire is bonded around the welding area by a bonding machine; the bonding machine adopts an ultrasonic aluminum wire bonding machine, realizes surface welding of different media by utilizing an ultrasonic friction principle, and is a physical change process; the specific welding process is as follows: ultrasonic waves from an ultrasonic generator generate high-frequency vibration through a transducer, the high-frequency vibration is transmitted to a chopper through the transducer, when the chopper is in contact with an aluminum wire and a welded part, under the action of pressure and vibration, the surfaces of the aluminum wire and DBC metal are mutually rubbed, an oxide film is damaged, and plastic deformation is generated, so that two pure metal surfaces are in close contact, the combination of atomic distance is achieved, and finally firm mechanical connection is formed.
As a preferable or optional implementation manner of this embodiment, a distance from the solder resist bonding aluminum wire to an edge of the welding area is 0.5 to 1mm, and an area surrounded by the solder resist bonding aluminum wire is larger than the welding area.
Further, the metal layer is made of any one of aluminum, copper, nickel, silver and gold.
As a preferable or optional implementation manner of this embodiment, the bonding pad is located at a right lower corner of the DBC substrate and is rectangular, and the number of the solder resist bonding wires is at least two.
The solder mask structure is flexible in preparation process and free from temperature influence, the solder mask structure can be designed in any range of the DBC substrate metal layer according to the solder mask requirement to realize solder mask, the shape can be linear or polygonal, and the number of solder mask bonding wires can be determined according to the actual welding condition.
In summary, the solder resist structure of the DBC substrate provided by the present invention bonds several solder resist bonding aluminum wires on the copper layer of the DBC substrate around the periphery of the bonding area. The solder-resisting bonding aluminum wire is arranged around the welding area, the solder is melted into liquid under the high-temperature condition, and the solder can be prevented from overflowing outwards due to the existence of the solder-resisting bonding aluminum wire, so that the purpose of solder resistance is achieved. The design of the solder resisting structure can solve the problem of overflowing of solder, and the solder resisting effect is not affected by the welding temperature. In addition, the preparation process of the solder mask structure can be performed simultaneously with the chip bonding process, and the production efficiency of the DBC substrate is improved.
In another aspect, the present invention provides a DBC substrate, including the above solder mask structure, where the DBC substrate includes a ceramic sheet and a metal layer formed on the ceramic sheet, the welding area is located on the metal layer, and solder mask bonding wires are distributed around the welding area.
In another aspect, the present invention further provides an electronic device, including a DBC substrate and a chip soldered on the DBC substrate, where the DBC substrate includes a ceramic sheet and a metal layer formed on the ceramic sheet, a solder pad is disposed on the metal layer, and solder resist bonding wires are distributed around the solder pad.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention.
It is to be understood that the present invention is not limited to what has been described above, and that various modifications and changes may be made without departing from the scope thereof. The scope of the invention is limited only by the appended claims.
Claims (9)
1. The solder mask structure of the DBC substrate is characterized by comprising a plurality of solder mask bonding wires, wherein the solder mask bonding wires are arranged on the periphery of a welding area, and the welding area is located on a metal layer of the DBC substrate.
2. The solder resist structure of the DBC substrate of claim 1, wherein the solder resist bonding wire is a solder resist bonding aluminum wire.
3. The solder resist structure of the DBC substrate of claim 2, wherein the solder resist bonding aluminum wire is bonded around a land by a bonding machine.
4. The solder resist structure of the DBC substrate of claim 2, wherein the distance of the solder resist bonding aluminum wire from the edge of the solder land is 0.5-1 mm.
5. The solder resist structure of the DBC substrate according to claim 1, wherein the metal layer is made of any one of aluminum, copper, nickel, silver, and gold.
6. The solder resist structure of the DBC substrate of claim 1, wherein the land is located at a lower right corner of the DBC substrate and has a rectangular shape.
7. The solder resist structure of the DBC substrate of claim 6, wherein the number of the solder resist bonding wires is at least two segments.
8. A DBC substrate comprising the solder resist structure according to any one of claims 1 to 7, wherein the DBC substrate comprises a ceramic sheet and a metal layer formed on the ceramic sheet, the bonding area is located on the metal layer, and solder resist bonding wires are distributed around the bonding area.
9. An electronic device comprises a DBC substrate and a chip welded on the DBC substrate, wherein the DBC substrate comprises a ceramic wafer and a metal layer formed on the ceramic wafer, and is characterized in that a welding area is arranged on the metal layer, and solder-resisting bonding wires are distributed around the welding area.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN202011180772.XA CN112289770A (en) | 2020-10-29 | 2020-10-29 | Solder mask structure of DBC substrate, DBC substrate and electronic device thereof |
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CN202011180772.XA CN112289770A (en) | 2020-10-29 | 2020-10-29 | Solder mask structure of DBC substrate, DBC substrate and electronic device thereof |
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CN202011180772.XA Pending CN112289770A (en) | 2020-10-29 | 2020-10-29 | Solder mask structure of DBC substrate, DBC substrate and electronic device thereof |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531663B1 (en) * | 1998-01-30 | 2003-03-11 | Delphi Technologies, Inc. | Solder stop for an electrical connection and method therefor |
CN2711900Y (en) * | 2004-06-09 | 2005-07-20 | 威盛电子股份有限公司 | Pin grid array electric package unit and carrying board thereof |
US20050253258A1 (en) * | 2004-04-21 | 2005-11-17 | International Rectifier Corporation | Solder flow stops for semiconductor die substrates |
CN105321916A (en) * | 2015-10-16 | 2016-02-10 | 杭州大和热磁电子有限公司 | Semiconductor module with special structure |
CN211555869U (en) * | 2019-12-13 | 2020-09-22 | 深圳市绎立锐光科技开发有限公司 | Ceramic substrate |
-
2020
- 2020-10-29 CN CN202011180772.XA patent/CN112289770A/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6531663B1 (en) * | 1998-01-30 | 2003-03-11 | Delphi Technologies, Inc. | Solder stop for an electrical connection and method therefor |
US20050253258A1 (en) * | 2004-04-21 | 2005-11-17 | International Rectifier Corporation | Solder flow stops for semiconductor die substrates |
CN2711900Y (en) * | 2004-06-09 | 2005-07-20 | 威盛电子股份有限公司 | Pin grid array electric package unit and carrying board thereof |
CN105321916A (en) * | 2015-10-16 | 2016-02-10 | 杭州大和热磁电子有限公司 | Semiconductor module with special structure |
CN211555869U (en) * | 2019-12-13 | 2020-09-22 | 深圳市绎立锐光科技开发有限公司 | Ceramic substrate |
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Application publication date: 20210129 |