CN112271919B - Current compensation method, medium and current compensation device based on power factor correction - Google Patents
Current compensation method, medium and current compensation device based on power factor correction Download PDFInfo
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- CN112271919B CN112271919B CN202011230513.3A CN202011230513A CN112271919B CN 112271919 B CN112271919 B CN 112271919B CN 202011230513 A CN202011230513 A CN 202011230513A CN 112271919 B CN112271919 B CN 112271919B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
- H02M1/4208—Arrangements for improving power factor of AC input
- H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a current compensation method, a medium and a current compensation device based on power factor correction, wherein the current compensation method based on the power factor correction comprises the following steps: detecting an original current signal of a bus in a power factor correction loop; performing bandwidth adjustment on the original current signal to obtain an additional current detection signal; compensating the detection error of the original current signal according to the original current signal and the additional current detection signal, and determining a corrected current sampling value; and inputting the corrected current sampling value into the power factor correction loop to control a current inner loop. The invention provides a current detection and compensation technology, which is characterized in that a current detection signal is additionally added on a direct current bus to periodically compensate the error of the original current detection, so that the compensated current signal is consistent with the actual average current value, and a better power factor correction effect is obtained while the sampling error is reduced.
Description
Technical Field
The invention belongs to the technical field of power factor correction, relates to a current detection and compensation method, and particularly relates to a current compensation method, medium and current compensation device based on power factor correction.
Background
Currently, Boost type power factor correction technology is widely applied to single-phase air conditioners. The conventional single-phase Boost type power factor correction technology uses a double-loop average current control scheme of a current inner loop and a voltage outer loop, wherein current detection is an important part forming the current inner loop. Limited by chip performance, in conventional digital control methods, current sampling obtains current information at one sampling point in each sampling period, however, the current actually varies throughout the sampling period. When the sampling frequency is high enough, the deviation is negligible. However, for the average current control scheme, there is an exception: when the inductance is not enough to keep the current continuous, the power factor correction enters a DCM (Discontinuous connection Mode), and at this time, if no appropriate measures are taken, the sampled current signal cannot accurately reflect the actual average current, resulting in current distortion and affecting the power factor correction effect.
Therefore, how to provide a current compensation method, medium and current compensation device based on power factor correction to solve the defect that the prior art can not accurately reflect the actual average current in different current modes becomes a technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide a current compensation method, medium and current compensation device based on power factor correction, which are used to solve the problem that the prior art can not accurately reflect the actual average current in different current modes.
To achieve the above and other related objects, an aspect of the present invention provides a current compensation method based on power factor correction, including: detecting an original current signal of a bus in a power factor correction loop; performing bandwidth adjustment on the original current signal to obtain an additional current detection signal; compensating the detection error of the original current signal according to the original current signal and the additional current detection signal, and determining a corrected current sampling value; and inputting the corrected current sampling value into the power factor correction loop to control a current inner loop.
In an embodiment of the invention, after the step of performing bandwidth adjustment on the original current signal to serve as an additional current detection signal, and before the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal and determining a modified current sampling value, the method for current compensation based on power factor correction further includes: comparing the error of the original current signal with the additional current detection signal; judging the size relation between the error and a first preset error threshold value; when the error is smaller than the first preset error threshold value, inputting the original current signal into the power factor correction loop to control a current inner loop; and when the error is greater than or equal to the first preset error threshold value, determining a corrected current sampling value according to the original current signal and the additional current detection signal.
In an embodiment of the present invention, the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal includes: taking the difference value of the original current signal corresponding to the kth switching period of the current power supply period and the additional current detection signal as a compensation coefficient; and determining the corrected current sampling value according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the additional current detection signal.
In an embodiment of the present invention, the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal includes: taking the ratio of the additional current detection signal corresponding to the kth switching period of the current power supply period to the original current signal as a compensation coefficient; and determining the corrected current sampling value according to the product of the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the ratio of the original current signal corresponding to the kth switching period of the next power supply period to the additional current detection signal.
In an embodiment of the present invention, the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal includes: adjusting the sampling time for multiple times until the difference value between the sampled current signal and the additional current detection signal is within a preset range, and taking the current signal as a third current detection signal corresponding to the kth switching period of the current power supply period; calculating the difference value of an original current signal corresponding to the kth switching period of the current power supply period and an original current signal corresponding to the kth switching period of the previous power supply period; when the difference value is smaller than a second preset error threshold value, inputting the third current detection signal into the power factor correction loop to control a current inner loop; and when the difference value is greater than or equal to the second preset error threshold value, inputting an original current signal corresponding to the kth switching period of the current power supply period into the power factor correction loop to control the current inner loop.
In an embodiment of the present invention, the step of performing bandwidth adjustment on the original current signal to serve as an additional current detection signal includes: amplifying the sampling voltage corresponding to the original current signal and increasing a bias voltage to form an adjusted voltage; and after low-pass filtering the adjusting voltage, forming the additional current detection signal.
In an embodiment of the present invention, the power factor correction loop is a boost circuit correction loop, and the boost circuit correction loop adopts a dual-loop average current control manner of a current inner loop and a voltage outer loop.
In an embodiment of the present invention, the step of detecting the original current signal of the bus in the pfc loop includes: and acquiring an original current signal detected by a current sampling device in the power factor correction loop, wherein the current sampling device is a current sampling resistance circuit or a Hall sampling device.
Another aspect of the present invention provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method for power factor correction-based current compensation.
A final aspect of the present invention provides a current compensation apparatus, comprising: a processor and a memory; the memory is used for storing a computer program, and the processor is used for executing the computer program stored by the memory so as to enable the current compensation device to execute the current compensation method based on power factor correction.
As described above, the current compensation method, medium, and current compensation apparatus according to the present invention have the following advantages:
the invention provides a novel current detection and compensation method.A current detection signal is additionally added on a direct current bus to obtain an average current signal, the average current signal is compared with an original current detection signal to periodically compensate the error of original current detection, so that the compensated current signal is matched with the actual average current value and then used for controlling a current inner loop, and the sampling error under DCM (Discontinuous current Mode) is reduced to obtain better power factor correction effect.
Drawings
Fig. 1 is a schematic diagram of power factor correction according to an embodiment of the present invention.
FIG. 2 is a schematic flow chart illustrating a method for power factor correction based current compensation according to an embodiment of the present invention.
FIG. 3 is a signal conditioning circuit diagram of the PFC-based current compensation method according to an embodiment of the present invention.
FIG. 4 is a flowchart illustrating an error determination process of the PFC-based current compensation method according to an embodiment of the present invention.
FIG. 5 is a schematic current diagram illustrating a continuous current mode of the PFC-based current compensation method according to an embodiment of the present invention.
Fig. 6 is a schematic current diagram illustrating an interrupted current mode of the power factor correction-based current compensation method according to an embodiment of the invention.
FIG. 7 is a schematic compensation diagram of the PFC-based current compensation method according to an embodiment of the present invention.
Fig. 8 is a schematic structural connection diagram of a current compensation device according to an embodiment of the invention.
Description of the element reference numerals
8 current compensation device
81 processor
82 memory
S21-S24
S41-S44
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The current compensation method based on power factor correction provides a current detection and compensation technology, a current detection signal is additionally added on a direct current bus, the error of original current detection is periodically compensated, and a better power factor correction effect is obtained while the sampling error is reduced.
The principle and implementation of the current compensation method, medium and current compensation device based on power factor correction according to the present embodiment will be described in detail below with reference to fig. 1 to 8, so that those skilled in the art can understand the current compensation method, medium and current compensation device based on power factor correction according to the present embodiment without creative work.
Referring to fig. 1, a schematic diagram of power factor correction according to an embodiment of the present invention is shown. As shown in fig. 1, the original power factor correction uses a typical Boost type correction loop, and adopts a typical current inner loop and voltage outer loop double-loop average current control strategy. The alternating current power supply rectifies the input power supply through the rectifier bridge, and then inputs the rectified voltage and the rectified current into a bus capacitor and a load which are connected with the rectified voltage and the current, wherein the voltage and the current are output by the power factor correction loop in a subsequent power factor correction loop. The original current detection signal participates in current inner loop control, so that the current of the power grid is sinusoidal and the unit power factor is obtained. The current compensation method based on power factor correction is characterized in that on the basis of an original Boost type power factor correction loop, a current detection signal, namely an additional current detection signal Y, is additionally added on a branch path with continuous controlled current, and the additional current detection signal Y has a narrower bandwidth after bandwidth adjustment, so that the current compensation method is closer to an ideal average current value.
Referring to fig. 2, a schematic flow chart of a power factor correction based current compensation method according to an embodiment of the invention is shown. As shown in fig. 2, the current compensation method based on power factor correction specifically includes the following steps:
and S21, detecting the original current signal of the bus in the power factor correction loop.
In an embodiment, the power factor correction loop is a boost circuit correction loop, and the boost circuit correction loop adopts a double-loop average current control mode of a current inner loop and a voltage outer loop. Specifically, the original current detection signal participates in current inner loop control, so that the grid current is sinusoidal and obtains a unity power factor.
In one embodiment, the raw current signal detected by the current sampling device is obtained in the pfc loop, and the current sampling device is a current sampling resistor circuit, a hall sampling device, or other current sampling devices.
And S22, after the bandwidth of the original current signal is adjusted, the original current signal is used as an additional current detection signal, so that a detection signal of the average current is obtained through the original current signal and the additional current detection signal.
In this embodiment, a sampling voltage corresponding to the original current signal is amplified and a bias voltage is added to form an adjusted voltage.
And after low-pass filtering the adjusting voltage, forming the additional current detection signal.
Referring to fig. 3, a signal conditioning circuit diagram of a power factor correction based current compensation method according to an embodiment of the invention is shown. As shown in fig. 3, the difference circuit with an operational amplifier as a core amplifies a sampling voltage Vin corresponding to an original current signal, increases a bias voltage Vb, and outputs an additional current detection signal Y through first-order low-pass filtering composed of R5 and C1, thereby realizing a bandwidth of at least 0.1 times or less of a switching frequency. For example, if the switching frequency of the switching tube in the power factor correction loop is 40KHz, the bandwidth can be realized below 4 KHz.
Referring to fig. 4, a flowchart of an error determination of a power factor correction-based current compensation method according to an embodiment of the invention is shown. As shown in fig. 4, before compensation, an error determination is performed on the original current signal and the additional current detection signal, and the specific steps include:
s41, comparing the error of the original current signal and the additional current detection signal.
Specifically, after sampling the original current detection signal and the additional current detection signal, the sampling values of the two are periodically compared.
And S42, judging the size relation between the error and a first preset error threshold value. The first preset error threshold may be 0.1A, for example. In addition, according to actual engineering and project requirements, reasonable adjustment of the first preset error threshold is also within the protection scope of the invention.
And S43, when the error is smaller than the first preset error threshold, inputting the original current signal into the power factor correction loop to control the current inner loop. For example, in the case where the power factor correction loop is actually only operating in continuous current mode.
Fig. 5 is a schematic current diagram illustrating a continuous current mode of the power factor correction-based current compensation method according to an embodiment of the invention. As shown in fig. 5, in CCM (Continuous current Mode), the thick solid line represents the actual current, the thin solid line represents the average current, the average value of the current in each switching period ≈ the current value at the midpoint time of the on/off interval, and when the sampling frequency is high enough, the error is negligible.
And S44, when the error is larger than or equal to the first preset error threshold value, determining a corrected current sampling value according to the original current signal and the additional current detection signal.
Fig. 6 is a schematic current diagram illustrating an interrupted current mode of the current compensation method based on pfc according to an embodiment of the present invention. As shown in fig. 6, in DCM (Discontinuous current Mode), a thick solid line represents an actual current, a thin solid line represents an average current, and a dotted line represents a connection of original current sampling values, so that a current signal obtained by midpoint sampling cannot accurately reflect the actual average current, resulting in current distortion, and only a corrected current sampling value can ensure the power factor correction effect.
And S23, compensating the detection error of the original current signal according to the original current signal and the additional current detection signal, and determining a corrected current sampling value.
Please refer to fig. 7, which is a schematic compensation diagram illustrating a power factor correction-based current compensation method according to an embodiment of the present invention. As shown in fig. 7, the thick solid line represents the actual current, the thin solid line represents the average current, and the dotted line represents the connection of the original current sample, which presents a schematic diagram of compensation of the current sample in the kth switching period.
The present invention will be described in detail with reference to fig. 7 by illustrating the following three compensation methods.
In embodiment 1, compensation is performed by the difference between the original current signal and the additional current detection signal. The method specifically comprises the following steps:
(1-1) taking the difference value of the original current signal corresponding to the kth switching period of the current power supply period and the additional current detection signal as a compensation coefficient.
Specifically, the compensation method is described by taking the kth switching cycle of the nth power source cycle as an example. Where (n, k) attached to each variable indicates the value of the variable corresponding to the kth switching cycle of the nth power supply cycle. Let the compensation coefficient G (n, k) be a (n, k) -B (n, k).
(1-2) determining the corrected current sampling value according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the additional current detection signal.
Specifically, the correction current sample value is C (n +1, k) ═ a ((n +1, k) -G (n, k), and the current inner loop input to the power factor correction circuit participates in control, and, in the k-th switching period of the next power supply period, a ((n +1, k) -B (n +1, k) is stored with a new compensation coefficient G (n +1, k).
In embodiment 2, compensation is performed by the ratio of the additional current detection signal to the original current signal. The method specifically comprises the following steps:
and (2-1) taking the ratio of the additional current detection signal corresponding to the kth switching period of the current power supply period to the original current signal as a compensation coefficient.
Specifically, the compensation method is described by taking the kth switching cycle of the nth power source cycle as an example. Let the compensation coefficient G (n, k) ═ B (n, k) ÷ a (n, k).
(2-2) determining the corrected current sampling value according to the product of the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the ratio of the original current signal corresponding to the kth switching period of the next power supply period to the additional current detection signal.
Specifically, the correction current sample value is C (n +1, k) ═ a ((n +1, k) × G (n, k), the current inner loop input to the power factor correction circuit participates in control, and, in the k-th switching period of the next power supply period, a ((n +1, k) ÷ B (n +1, k) is stored with a new compensation coefficient G (n +1, k).
In embodiment 3, compensation is performed by adding the third current detection signal. The method specifically comprises the following steps:
(3-1) adjusting the sampling time for multiple times until the difference value between the sampled current signal and the additional current detection signal is within a preset range, and taking the current signal as a third current detection signal corresponding to the kth switching period of the current power supply period.
Specifically, the compensation method is described by taking the kth switching cycle of each nth power source cycle as an example. For the signal X, an additional sampling is added, the time difference between the additional sampling and the original sampling time is t, and the sampling value is C. And adjusting the sampling time for multiple times until the sampling value (the third current detection signal) C (n, k) is approximately equal to B (n, k). Wherein, the preset range of C (n, k) and B (n, k) which can be approximately equivalent is 0.1A. In addition, the reasonable adjustment of the numerical value in the preset range according to the actual engineering and project requirements is also within the protection scope of the invention.
And (3-2) calculating the difference value of the original current signal corresponding to the kth switching period of the current power supply period and the original current signal corresponding to the kth switching period of the previous power supply period.
(3-3) when the difference value is smaller than a second preset error threshold value, inputting the third current detection signal into the power factor correction loop to control a current inner loop; and when the difference value is greater than or equal to the second preset error threshold value, inputting an original current signal corresponding to the kth switching period of the current power supply period into the power factor correction loop to control the current inner loop.
Specifically, when the difference between A (n, k) and A (n-1, k) is not large, C (n, k) is input to the current inner loop of the power factor correction loop to participate in control. Otherwise, the current inner loop inputting A (n, k) to the power factor correction loop participates in the control. And the difference between A (n, k) and A (n-1, k) is judged through a second preset error threshold. The second preset error threshold may be, for example, 0.1A. In addition, according to actual engineering and project requirements, reasonable adjustment of the second preset error threshold is also within the protection scope of the invention.
And S24, inputting the corrected current sampling value into the power factor correction loop to control the current inner loop.
It should be noted that the above embodiments 1 to 3 are only three embodiments of the current compensation method based on power factor correction according to the present invention, and in addition, other methods that can implement compensation by combining the original current signal and the additional current detection signal to perform numerical processing and calculation are also included in the scope of the present invention.
The protection scope of the current compensation method based on power factor correction according to the present invention is not limited to the execution sequence of the steps listed in this embodiment, and all the solutions implemented by the steps addition, subtraction, and step replacement in the prior art according to the principles of the present invention are included in the protection scope of the present invention.
The present embodiment provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the power factor correction-based current compensation method.
Those of ordinary skill in the art will understand that: all or part of the steps for implementing the above method embodiments may be performed by hardware associated with a computer program. The aforementioned computer program may be stored in a computer readable storage medium. When executed, the program performs steps comprising the method embodiments described above; and the aforementioned computer-readable storage media comprise: various computer storage media that can store program codes, such as ROM, RAM, magnetic or optical disks.
Fig. 8 is a schematic structural connection diagram of a current compensation device according to an embodiment of the invention. As shown in fig. 8, the present embodiment provides a current compensation apparatus 8, where the current compensation apparatus 8 specifically includes: a processor 81 and a memory 82. The memory is used for storing a computer program, and the processor is used for executing the computer program stored by the memory so as to enable the current compensation device to execute the steps of the current compensation method based on the power factor correction.
In practical applications, the current compensation device is an MCU (micro controller Unit, micro control Unit or single chip microcomputer), and the single chip microcomputer is connected to the circuit shown in fig. 1 to execute the current compensation method based on power factor correction. The Single-Chip Microcomputer is an integrated circuit Chip, which is a small and perfect Microcomputer system formed by integrating the functions of a central processing unit CPU with data processing capacity, a random access memory RAM, a read-only memory ROM, various I/O ports, interrupt systems, timers/counters and the like (which can also comprise a display driving circuit, a pulse width modulation circuit, an analog multiplexer, an A/D converter and other circuits) on a silicon Chip by adopting a super-large scale integrated circuit technology.
In summary, the current compensation method, medium and current compensation apparatus based on power factor correction according to the present invention provide a novel current detection and compensation method, wherein a current detection signal is additionally added to a dc bus for obtaining an average current signal, which is compared with an original current detection signal to periodically compensate an error of original current detection, so that the compensated current signal is matched with an actual average current value, and then used for controlling a current inner loop, thereby reducing a sampling error in a discontinuous current mode to obtain a better power factor correction effect. The invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (9)
1. A current compensation method based on power factor correction is characterized in that the current compensation method based on power factor correction comprises the following steps:
detecting an original current signal of a bus in a power factor correction loop;
amplifying the sampling voltage corresponding to the original current signal and increasing a bias voltage to form an adjusted voltage; performing low-pass filtering on the regulated voltage to form an additional current detection signal;
compensating the detection error of the original current signal according to the original current signal and the additional current detection signal which correspond to the same switching period of different power supply periods, and determining a corrected current sampling value;
and inputting the corrected current sampling value into the power factor correction loop to control a current inner loop.
2. The power factor correction based current compensation method of claim 1, wherein after the step of forming an additional current detection signal, prior to the step of determining a modified current sample value, the power factor correction based current compensation method further comprises:
comparing the error of the original current signal with the additional current detection signal;
judging the size relation between the error and a first preset error threshold value;
when the error is smaller than the first preset error threshold value, inputting the original current signal into the power factor correction loop to control a current inner loop; and when the error is greater than or equal to the first preset error threshold value, determining a corrected current sampling value according to the original current signal and the additional current detection signal.
3. The method according to claim 1, wherein the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal corresponding to the same switching period of different power source periods comprises:
taking the difference value of the original current signal corresponding to the kth switching period of the current power supply period and the additional current detection signal as a compensation coefficient;
and determining the corrected current sampling value according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the difference value between the original current signal corresponding to the kth switching period of the next power supply period and the additional current detection signal.
4. The method according to claim 1, wherein the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal corresponding to the same switching period of different power source periods comprises:
taking the ratio of the additional current detection signal corresponding to the kth switching period of the current power supply period to the original current signal as a compensation coefficient;
and determining the corrected current sampling value according to the product of the original current signal corresponding to the kth switching period of the next power supply period and the compensation coefficient, and updating the compensation coefficient according to the ratio of the original current signal corresponding to the kth switching period of the next power supply period to the additional current detection signal.
5. The method according to claim 1, wherein the step of compensating the detection error of the original current signal according to the original current signal and the additional current detection signal corresponding to the same switching period of different power source periods comprises:
adjusting the sampling time for multiple times until the difference value between the sampled current signal and the additional current detection signal is within a preset range, and taking the current signal as a third current detection signal corresponding to the kth switching period of the current power supply period;
calculating the difference value of an original current signal corresponding to the kth switching period of the current power supply period and an original current signal corresponding to the kth switching period of the previous power supply period;
when the difference value is smaller than a second preset error threshold value, inputting the third current detection signal into the power factor correction loop to control a current inner loop; and when the difference value is greater than or equal to the second preset error threshold value, inputting an original current signal corresponding to the kth switching period of the current power supply period into the power factor correction loop to control the current inner loop.
6. The power factor correction based current compensation method according to claim 1,
the power factor correction loop is a booster circuit correction loop, and the booster circuit correction loop adopts a double-loop average current control mode of a current inner loop and a voltage outer loop.
7. The pfc-based current compensation method of claim 1, wherein the step of detecting a raw current signal of the bus in the pfc loop comprises:
and acquiring an original current signal detected by a current sampling device in the power factor correction loop, wherein the current sampling device is a current sampling resistance circuit or a Hall sampling device.
8. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the method for power factor correction based current compensation according to any one of claims 1 to 7.
9. A current compensation apparatus, comprising: a processor and a memory;
the memory is used for storing a computer program, and the processor is used for executing the computer program stored by the memory to enable the current compensation device to execute the current compensation method based on power factor correction according to any one of claims 1 to 7.
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