CN112216235B

CN112216235B - Feedback signal detection method and display system

Info

Publication number: CN112216235B
Application number: CN202011037580.3A
Authority: CN
Inventors: 林兴武; 张盛东; 张敏; 焦海龙; 黄杰; 邱赫梓; 李成林; 文金元
Original assignee: Peking University Shenzhen Graduate School
Current assignee: Peking University Shenzhen Graduate School
Priority date: 2020-09-28
Filing date: 2020-09-28
Publication date: 2022-06-17
Anticipated expiration: 2040-09-28
Also published as: CN112216235A; WO2022061996A1

Abstract

The invention provides a feedback signal detection method and a display system, wherein the system comprises M rows of driving channels; each column driving channel comprises a pixel unit and a detection unit; the detection unit comprises a source driving module and a detection module; the source driving module comprises a digital-to-analog converter, and the detection module comprises a comparator; the digital-to-analog converter is connected to the pixel unit through a display signal line; a first input end of the comparator is connected to the pixel unit through a feedback signal line and used for receiving a feedback voltage corresponding to a feedback signal of the pixel unit; the second input end of the reference voltage comparator is connected to the reference digital-to-analog converter and used for receiving the comparison voltage output by the reference digital-to-analog converter; the output end of the voltage regulator is used for outputting a detection result obtained by comparing the feedback voltage with the comparison voltage. The display system adopts a digital domain compensation method, utilizes the digital-to-analog converter and the comparator to detect the feedback aging information, and can carry out various detections on devices such as TFT, OLED, QLED and the like.

Description

Feedback signal detection method and display system

Technical Field

The invention relates to the technical field of photoelectricity, in particular to a feedback signal detection method and a display system.

Background

In the prior art, there are various Display products, such as an AMOLED (Active matrix Organic Light Emitting Diode or Active matrix Organic Light Emitting Diode) which uses a TFT (Thin Film Transistor) for pixel unit circuit Display and adds an OLED (Organic Light Emitting Diode or Organic electroluminescent Display, also called as an Organic Light Emitting Diode, an Organic electroluminescent Display or an Organic Light Emitting semiconductor) Display screen thereon.

The micro-display product of OLED-on-Silicon or QLED-on-Silicon type is a pixel unit circuit array made of Silicon, and OLED or QLED (Quantum Dot Light Emitting Diodes T1) Light Emitting devices are added on the micro-display product.

TFT, OLED, QLED, etc. all suffer from aging problems after light emission, e.g., TFT threshold voltage rise causes the TFT to age the same display signal giving less current. When the display screen starts displaying, the threshold voltage of the aging TFT or the threshold voltage of the aging OLED can shift. The increase in OLED threshold voltage results in a decrease in OLED current. The light emitting efficiency of an aging OLED decreases, i.e., the same input current, and the light emitted by the aging OLED decreases.

Besides the aging problem, the TFT, OLED, QLED, etc. have the problem of uneven threshold voltage, for example, uneven threshold voltage and thus uneven light emission of the display screen may be caused during the production process due to the process. Due to the different display positions of the pixel units on the display screen, the uneven power supply voltage of the pixel units can be caused by the flowing of current when the display screen emits light, and the uneven temperature can cause the uneven current of the driving tubes. The unevenness of each channel source driving module can cause the unevenness of the feedback driving current.

In addition, the display driving chips of all pixel systems have the problem of uneven driving of different driving channels, i.e. driving circuits.

Disclosure of Invention

The invention provides a display system of a feedback signal detection method, which comprises M rows of driving channels; each column driving channel comprises a pixel unit and a detection unit; the detection unit comprises a source driving module and a detection module; the source driving module comprises a digital-to-analog converter, and the detection module comprises a comparator; the digital-to-analog converter is connected to the pixel unit through a display signal line; a first input end of the comparator is connected to the pixel unit through a feedback signal line and used for receiving a feedback voltage corresponding to a feedback signal of the pixel unit; the second input end of the reference voltage comparator is connected to the reference digital-to-analog converter and used for receiving the comparison voltage output by the reference digital-to-analog converter; the output end of the comparator is used for outputting a detection result obtained by comparing the feedback voltage with the comparison voltage; wherein M is an integer of 1 or more.

The invention also provides a feedback signal detection method, which comprises the following processes:

sequentially gating the writing channels of the pixel units in the 1 st row to the Nth row and carrying out detection operation when the writing channel of each row of pixel units is gated;

repeating the operation, gating the writing channels of the pixel units in the 1 st row to the Nth row again, and performing detection operation when the writing channel of each row of pixel units is gated;

the detection operation process comprises the following steps: when the writing channel of the nth row of pixel units is gated, controlling the pixel units to generate feedback signals and controlling the reference digital-to-analog converter to output comparison voltage, so that the first input end of the comparator receives the feedback voltage corresponding to the feedback signals, and the second input end of the comparator receives the comparison voltage; comparing the feedback voltage with the comparison voltage; the control comparator feeds back the detection result obtained by comparison to the aging information memory through the shift-out circuit.

The display system of the out-of-pixel compensation single DAC (Digital-to-Analog Converter) adopts a Digital domain compensation method, utilizes the DAC and a comparator to detect information fed back by a target pixel unit, can carry out various detections on devices such as TFT, OLED, QLED and the like, for example, the detection of the problems of device aging, uneven threshold voltage, uneven driving and the like, and is suitable for various products such as AMOLED, OLED-on-Silicon, QLED-on-Silicon, PMOLED (Passive matrix organic electroluminescent diode), LCD driving chip, OLED lighting driving chip and the like.

Drawings

FIG. 1 is a schematic diagram of a conventional external compensation display system;

FIG. 2 is a schematic diagram of a pixel unit structure suitable for the present invention;

FIG. 3 is a schematic diagram of a pixel unit structure suitable for the present invention;

FIG. 4 is a schematic partial structure diagram of a display system according to a first embodiment;

FIG. 5 is a schematic view of a partial structure of a display system according to a second embodiment;

FIG. 6 is a schematic diagram of a partial structure of a display system according to a third embodiment;

FIG. 7 is a partial structural diagram of a display system according to a fourth embodiment and a fifth embodiment;

FIG. 8 is a schematic view of the detection operation of the present invention;

FIG. 9 is a diagram illustrating comparison between feedback voltage and comparison voltage.

Reference numerals: the display device comprises a controller 10, a row scanning driver 20, a source driver 30, a display panel 40, a timing control module 11, a compensation algorithm module 12, an aging information memory 13, a shift-in circuit 31, a detection unit 32, a shift-out circuit 33, a source driving module 321, a detection module 322, a digital-to-analog converter 51, a comparator 52, a current source 53, a current copy circuit 54, a current-to-voltage circuit 55, a pixel unit 41, a display address line 42, a feedback address line 43, a display signal line 44, a feedback signal line 45, a second switching tube Q2, a third switching tube Q3, a driving tube Q1 and a light-emitting diode T1.

Detailed Description

The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present invention have not been shown or described in the specification in order to avoid obscuring the present invention from the excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they can be fully understood from the description in the specification and the general knowledge in the art.

Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of clearly describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where a certain sequence must be followed.

The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" as used herein includes both direct and indirect connections (couplings), unless otherwise specified.

Herein, N is an integer of 1 or more and N or less; m is an integer greater than or equal to 1, and M is an integer greater than or equal to 1 and less than or equal to M; k is a natural number larger than 0, K is a natural number larger than 0, and t is an integer larger than or equal to 1 and smaller than or equal to M.

In the technical field, schemes for compensating an AMOLED display system are divided into in-pixel compensation and out-pixel compensation (or external compensation), an out-pixel compensation method is divided into a real-time compensation method and a non-real-time compensation method, the non-real-time compensation method is divided into a digital domain compensation method and an analog domain compensation method, and the digital domain compensation method is adopted in the AMOLED display system.

The digital domain compensation method is generally to calculate the display digital signal and the aging signal in the memory through a compensation algorithm into a compensated digital display signal, and then to transmit the compensated digital display signal from the controller to the source driver.

The compensated digital display signal will typically have a larger bit width than the original digital display signal, e.g. the aging information is 8 bits, the display signal is 8 bits, and the digital display signal compensated by the compensation algorithm may be 10 bits.

The digital domain compensation method is generally applied to single DAC display systems, for example using a linear DAC of 10 bit width. The 1024 different potential voltages of the DAC may be from a resistor string, for example, with 1023 resistor strings to divide the 1024 potentials (including the lowest and highest voltages) between the highest and lowest voltages in the form of resistor division.

The 8-bit digital display signal is calculated by the controller through a compensation algorithm by using the data in the aging memory to generate a 10-bit compensated digital display signal, and then the compensated digital display signal is transmitted to the source driver. The source driver block for each channel in the source driver has a 10-bit linear DAC that converts the 10-bit compensated digital display signal into a compensated analog display signal for writing to the gated pixel cell.

The pixel units form an array, the pixel units suitable for the off-pixel compensation display system need to be provided with feedback channels, and aging information in the pixel units needs to be fed back to an aging signal detection module in the source driver for aging detection.

The line scan driver sends out line scan signals to the display address lines (corresponding to the display address signals) and the feedback address lines (corresponding to the feedback address signals), respectively. When the display address signal is asserted, the pixel circuit of the row connected to the display address line is turned on to write the signal (e.g., the correction signal or the compensated analog display signal) on the display signal line to the pixel cell connected thereto. When the feedback address signal is effective, the feedback channel of the pixel unit can be conducted, and the information of the aging or the uneven threshold voltage of the pixel unit is transmitted to the feedback signal line in the form of current or voltage.

The aging signal detection module is used for detecting whether the aging signal fed back from the pixel unit deviates from the expected aging degree. The detection result is a digit of one bit, which represents that the expected aging degree is lower or higher, and the detection result is output to the controller through the shift-out circuit, and then the aging information memory is updated.

Since it is necessary to transfer the aging information in the pixel unit to the feedback signal line, the pixel unit circuit has a feedback channel output port and a control input port of the feedback channel, such as the third switch tube of fig. 2, which forms the feedback channel connecting the pixel unit and the feedback signal line.

The Controller not only has the function of controlling the source driver and the row scanning driver to write the display signals in the time sequence row-by-row gating pixel units by a time sequence control module (Timing Controller) of the traditional display system, but also comprises an aging information memory, each pixel unit can be subjected to various aging compensations according to the aging information, and the digital compensation value of each pixel unit is calculated by using a compensation algorithm. In addition, the controller also receives the detection result of the pixel unit feedback voltage from the source driver.

The off-pixel compensated display system may perform two operations, a display operation and a corrective feedback detection operation. The display operation is generally the same as that of a conventional display system. The implementation details of the corrective feedback detection operation need to be matched to the design of the entire off-pixel compensated display system. The correction feedback detection operation may be performed when the display system is not performing the display operation. For example, after the display system is powered on, before the display screen starts displaying pictures, when the display screen is powered off and then power is supplied, or a blank period before frames or frames, or a period of time is specially scheduled for not performing display operation but performing correction feedback detection operation.

In the display operation, the controller sends a control signal to the line scanning driver, the line scanning driver sends a line scanning signal to the display address line to gate a certain row of pixel units (or a part of pixel units of a certain row), the controller performs compensation calculation for the input 8-bit-wide digital display signal by using the aging data of the aging information memory, and outputs the 10-bit-wide compensated digital display signal to the source driver. The source driver serially receives the input 10-bit wide compensated digital display signals using the shift-in circuit, arranging each compensated digital display signal under a corresponding channel. The controller also outputs a control signal to the source driver to control the compensated digital display signal of the whole row to be output to the source driving module in parallel. Each source driving module comprises a 10-bit DAC, and the DAC converts 10-bit compensated digital display signals into compensated analog display signals, outputs the compensated analog display signals to corresponding display signal lines, and writes the compensated analog display signals into gated pixel units.

In the correction feedback detection operation, a display signal writing channel of a designated row pixel unit (or a part of pixel units of a certain row) is gated through a row scanning driver, and then a correction signal is written through a display signal line, wherein the correction signal can be generated from a controller or a source driver of a local same channel (such as fig. 4, sw1 is turned on, and sw2 is turned off and turned on), after the correction signal is written, the row scanning driver gates the feedback channel of the row pixel unit, the aging information detection result detected by the detection module is latched in parallel, and then the aging information detection result is output to the controller in series through a shift-out circuit, and then the aging information memory is updated.

Fig. 1 is a schematic structural diagram of a conventional external compensation display system, which includes a controller 10, a line scan driver 20, a source driver 30, and a display panel 40, wherein the controller 10 is connected to the line scan driver 20 and the source driver 30. The controller 10 includes a timing control module 11, a compensation algorithm module 12 and an aging information memory 13 connected in sequence. The source driver 30 includes a shift-in circuit 31, a shift-out circuit 33, and M detection units 32; the detection unit 32 includes a source driving module 321 and a detection module 322.

The display panel 40 comprises N rows and M columns of pixel units 41, and the row scanning driver 20 draws out N rows of display address lines 42 and feedback address lines 43; wherein, the nth row display address line 42 and the feedback address line 43 are respectively connected to each pixel unit 41 of the nth row; the row scan driver 20 is configured to receive a row control signal from the controller 10 and gate the write channels of the pixel units in the rows 1 to N sequentially through the row 1 to N display address lines. The pixel units in the first row are respectively numbered as [1,1]. multidot. [1, M ]. multidot. [1, M ], the pixel units in the nth row are respectively numbered as [ N,1]. multidot. [ N, M ], and the pixel units in the nth row are respectively numbered as [ N,1]. multidot. [ N, M ].

The compensation algorithm module 12, the shift-in circuit 31, and the source driving module 321 of the m-th column detection unit 32 are connected in sequence. The source driving module 321 of the m-th column detecting unit 32 is connected to the m-th column display signal line 44 and further connected to each pixel unit 41 of the m-th column, respectively, for receiving the signal input by the controller 10 through the shift-in circuit 31 and writing the compensated analog display signal or correction signal into the pixel unit 41 of the m-th column gated by the display address signal line through the m-th column display signal line 44.

The detection modules 322 of the m-th column of detection units 32 are respectively connected to the pixel units 41 of the m-th column through the m-th column feedback signal lines 45, and are configured to receive feedback voltages corresponding to the feedback signals of the pixel units 41.

The output end of the detection module 322 of the mth row of detection units 32, the shift-out circuit 33, and the aging information memory 13 are sequentially connected, so that the output end of the detection module 32 of the mth row of detection units 32 compares the feedback voltage with the comparison voltage through the shift-out circuit 33, and a detection result obtained by comparing the feedback voltage with the comparison voltage is fed back to the controller 10 through the shift-out circuit 33.

The M-th row of the pixel units 41 and the M-th row of the detecting units 32 form an M-th row of the driving channels, and the display system is divided into M rows of the driving channels.

In the present invention, the pixel unit 41 includes a second switching tube Q2, a driving tube Q1, a third switching tube Q3 and a light emitting diode T1. The second switch tube Q2 in the pixel unit 41 in the nth row and the mth column is connected to the display address line 42 in the nth row and the display signal line 44 in the mth column; the second switching tube Q2, the driving tube Q1 and the third switching tube Q3 are connected in sequence; the light emitting diode T1 is connected between the driving tube Q1 and the third switching tube Q3; the third switching tube Q3 in the pixel unit 41 of the nth row and the mth column is connected to the feedback address line 43 of the nth row and the feedback signal line 45 of the mth column.

Specifically, as shown in fig. 2, an optional pixel unit 41 of the present invention includes a second switching tube Q2, a driving tube Q1, a third switching tube Q3, and a light emitting diode T1; the second switching tube Q2, the driving tube Q1 and the third switching tube Q3 are N-shaped tubes. In the pixel unit 41 in the nth row and the mth column, the gate of the second switch Q2 is connected to the display address line 42 in the nth row, the first pole thereof is connected to the display signal line 44 in the mth column, and the second pole thereof is connected to the gate of the driving transistor Q1. A first pole of the driving transistor Q1 is connected to the operating voltage terminal VDD _ OLED thereof, and a second pole thereof is connected to the anode of the light emitting diode T1 and the first pole of the third switching transistor Q3; the operating voltage of the display panel may be different from the operating voltage of the source driver or the row scan driver. The cathode of the light emitting diode T1 is connected to its ground terminal VSS _ OLED (a negative voltage or 0V can be selected). The gate of the third switching transistor Q3 is connected to the feedback address line 43 of the nth row and the second pole thereof is connected to the feedback signal line 45 of the mth column.

Fig. 3 shows another optional pixel unit 41 of the present invention, which includes a second switching tube Q2, a driving tube Q1, a third switching tube Q3 and a light emitting diode T1; the second switching tube Q2, the driving tube Q1 and the third switching tube Q3 are P-type tubes. The gate of the second switch Q2 in the pixel unit 41 of the nth row and the mth column is connected to the display address line 42 of the nth row, the first pole thereof is connected to the display signal line 44 of the mth column, and the second pole thereof is connected to the gate of the driving transistor Q1. The first pole of the driving transistor Q1 is connected to the cathode of the led T1 and the first pole of the third switching transistor Q3, and the second pole thereof is connected to the ground terminal VSS _ OLED. The anode of the light emitting diode T1 is connected to the operating voltage terminal VDD _ OLED thereof. The gate of the third switching transistor Q3 is connected to the feedback address line 43 of the nth row and the second pole thereof is connected to the feedback signal line 45 of the mth column.

The specific types of the driving tube Q1, the second switching tube Q2 and the third switching tube Q3 can be selected by those skilled in the art according to actual situations, and the driving tube Q1, the second switching tube Q2 and the third switching tube Q3 may be transistors prepared by amorphous silicon, polysilicon, an oxide semiconductor, an organic semiconductor, a thin film process, an NMOS process, a PMOS process or a CMOS process, for example. When the specific types of the driving transistor Q1, the second switching transistor Q2, and the third switching transistor Q3 are selected, the conventional circuit structure of the display panel can be formed only by adaptively adjusting the connection relationship of the three, and it is also a conventional technical means in the field to replace the driving transistor Q1, the second switching transistor Q2, and the third switching transistor Q3 of the present invention with a certain type of transistor and design the display panel, i.e., it is also within the protection scope of the present invention to design the circuit of the display panel by using other types of transistors.

In the design process of a specific circuit structure, a person skilled in the art can use a source electrode of a transistor as a first pole and a drain electrode as a second pole; alternatively, the drain of the transistor may be a first electrode and the source may be a second electrode.

In the following embodiments, the preset potential may be the low potential V1 or the high potential V2, and the low potential V1 and the high potential V2 may be set fixed voltages.

In the following embodiments, the t-th column detection unit may be adjacent to the m-th column detection unit, for example, the t-th column detection unit is the m-1-th column detection unit, or the t-th column detection unit is the m + 1-th column detection unit. The t-th column detection unit may be spaced from the m-th column detection unit by another detection unit.

It should be understood by those skilled in the art that, in the present invention, the "feedback signal" may refer to "feedback voltage" hereinafter, and may also refer to "feedback information". In the following embodiments, the feedback information, the feedback signal and the feedback voltage may represent the aging information or the aging condition of the device.

The display system of the invention is an out-of-pixel compensation single DAC display system, or referred to as an out-of-pixel compensation AMOLED display system.

The comparator 52 of the detection unit 32 in the present invention is a voltage comparator, and the detection module 322 is a module for detecting aging information.

The Light Emitting device is a Light Emitting Diode, and may be an Organic Light Emitting Diode (OLED), or a quantum dot Light Emitting Diode (QLED), or a general type and other various types of LEDs (Light-Emitting Diode).

The aging information memory 13 can store various kinds of aging information.

The first embodiment is as follows:

as shown in fig. 1 and fig. 4, this embodiment is an improvement on the conventional external compensation display system, in the display system of the feedback signal detection method of this embodiment, the display system uses the pixel unit shown in fig. 2, the source driving module 321 includes a digital-to-analog converter 51, the detection module 322 includes a comparator 52 and a current source 53, and the current source 53 of the m-th column of detection units is respectively connected to each pixel unit 41 of the m-th column through the m-th column of feedback signal line 45.

The predetermined potential of the present embodiment is the low potential V1, and in each column driving channel, the digital-to-analog converter 51 of the detecting unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column. The display signal line 44 is also connected to a low potential V1 through a first switch sw1, and V1 may be 0V. The first switch sw1 and the second switch sw2 are operated in opposite directions, one is turned on and the other is turned off.

The positive input end of the comparator 52 in the m-th column of detection units is connected with the m-th column of feedback signal line 45, and the negative input end of the comparator 52 is connected with the digital-to-analog converter 51 of the m-th column of detection units.

In the present embodiment, the digital-to-analog converter 51 is referred to as an m-th column detection unit. In other embodiments of the present invention, the reference dac may be a dac of a detection unit other than the m-th column.

When the aging phenomenon occurs after the light emitting diode T1 starts emitting light, the threshold voltage of the light emitting diode T1 shifts to a higher value. The feedback signal detection method of the embodiment is used for detecting the threshold voltage of the light emitting diode T1, and includes the following steps:

the first process is as follows: sequentially gating the writing channels of the pixel units in the 1 st row to the Nth row and carrying out detection operation when the writing channel of each row of pixel units is gated;

for the nth row of pixel units, as shown in fig. 8, the detection operation specifically includes:

st1, the line scan driver 20 gates the write channel of the nth row of pixel units, the line scan driver 20 outputs the scan signal to the nth row of display address lines 42, so that the low voltage is written into the gate of the driving tube Q1, turning off the driving tube Q1;

st2, the pixel unit is controlled to generate the feedback signal and the reference dac is controlled to output the comparison voltage such that the positive input terminal of the comparator receives the feedback voltage and the negative input terminal of the comparator receives the comparison voltage.

Specifically, the timing control module 11 controls the second switch sw2 of the mth column driving channel to be turned off and the first switch sw1 to be turned on. When the second switch sw2 is turned off, the connection between the dac 51 and the display signal line 44 is broken, and the dac 51 is matched with the voltage comparator 52 to detect the aging information. Since the first switch sw1 is turned on, the low potential V1 inputs a low voltage to the display signal line 44 through the first switch sw 1.

The row scanning driver 20 gates the feedback channel of the nth row of pixel units;

the current source 53 of the m-th column detection unit inputs a preset low current (e.g., 1nA) to the pixel unit 41 through the m-th column feedback signal line 45; since the current ratio is relatively small, the voltage at the anode of the light emitting diode T1 and the voltage on the feedback signal line 45 can be considered as the threshold voltage of the light emitting diode T1. When the voltage on the feedback signal line 45 is stable, the voltage can be compared with the voltage selected by the digital-to-analog converter;

the feedback voltage of the pixel unit 41 in the nth row and the mth column is obtained as the voltage on the feedback signal line 45 in the mth column.

The timing control module 11 controls the digital-to-analog converters 51 of the m-th row of detecting units to generate the selected voltage, and the obtained comparison voltage is the voltage selected by the digital-to-analog converters 51 of the m-th row of detecting units. Preferably, the comparison voltage is: the controller 10 outputs the DAC input value corresponding to the threshold voltage of the light emitting diode T1 of the pixel unit 41 in the m-th column to the 10-bit digital-to-analog converter 51 of the detection unit in the m-th column, and outputs the voltage through the digital-to-analog converter 51.

St3, comparator 52 compares the feedback voltage with the comparison voltage.

St4, the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result and updates the data.

And a second process: repeating the first process, as the first process is repeated, the input value of the dac 51 will steadily jump between K and K +1 in the following operation, and the final result of the comparison between the feedback voltage and the comparison voltage can be determined.

Those skilled in the art will appreciate that the first process may be repeated over and over again.

Example two:

as shown in fig. 1 and fig. 5, this embodiment is an improvement on the conventional external compensation display system, in the display system of the feedback signal detection method of this embodiment, the display system uses the pixel unit shown in fig. 2, the source driving module 321 includes a digital-to-analog converter 51, the detection module 322 includes a comparator 52, the preset potential is a high potential V2, V2 may be a high voltage from a resistor string or a high voltage with a known voltage value, the high voltage can ensure that the driving transistor Q1 is turned on, and V2 corresponds to Vg below. In each column of driving channels, the digital-to-analog converter 51 of the detecting unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column. The display signal line 44 is also connected to a high potential V2 through the first switch sw 1.

The m-th column display signal line 44 of the present embodiment is also connected to the high potential V2 through the first switch sw 1.

The negative input of the comparator 52 of the m-th column of detection units is connected to the digital-to-analog converter 51 of the m-th column of detection units.

The feedback signal detection method of the embodiment is used for detecting the threshold voltage of the driving tube Q1, and comprises the following processes:

for the nth row of pixel units, as shown in fig. 8, the process of the detection operation specifically includes:

st1, the row scan driver 20 gates the write channel of the nth row of pixel cells 41, the row scan driver 20 outputs a scan signal to the nth row of display address lines 42;

Specifically, the second switch sw2 of the mth column driving channel is controlled to be turned off, and the first switch sw1 is controlled to be turned on; when the second switch sw2 is turned off, the connection between the digital-to-analog converter 51 and the display signal line 44 is broken;

since the first switch sw1 is turned on, so that a high voltage is written into the gate of the driving tube Q1, the driving tube Q1 is turned on; the high voltage may be an optional voltage Vg of the 10-bit DAC (for example, Vg is an output voltage when the input of the 10-bit DAC is equal to 1000) or a high voltage with a known voltage value, which can ensure that the driving transistor Q1 is turned on;

the row scanning driver 20 gates the feedback channel of the nth row of pixel units 41, and outputs the source end voltage (i.e. the OLED anode voltage) of the driving tube Q1 to the positive input end of the comparator 52 through the feedback signal line 45;

the feedback voltage of the pixel unit 41 in the nth row and the mth column is the voltage on the feedback signal line 45 in the mth column, i.e., the source terminal voltage of the driving transistor Q1.

The timing control module 11 controls the digital-to-analog converters 51 of the m-th row of detecting units to generate the selected voltage, and the obtained comparison voltage is the voltage selected by the digital-to-analog converters 51 of the m-th row of detecting units. Preferably, the comparison voltage is: the controller 10 outputs the DAC input value corresponding to the threshold voltage of the driving transistor Q1 of the pixel unit 41 in the m-th row, which is detected before, to the 10-bit digital-to-analog converter 51 of the detection unit in the m-th row, and then outputs the voltage through the digital-to-analog converter 51.

St3, comparator 52 compares the feedback voltage with the comparison voltage.

And a second process: repeating the first process, as the first process is repeated, the input value of the dac 51 will steadily jump between K and K +1 in the following operation, and the final result of the comparison between the feedback voltage and the comparison voltage can be determined. At this time, the input value of the 10-bit DAC corresponding to the source voltage of the driving transistor Q1 can be considered to be K.

In a display system, after the pixel unit 41 starts emitting light, the aging of the driving transistor Q1 causes the threshold voltage to drift upward, and the source voltage of the driving transistor Q1 is equal to the gate voltage minus the threshold voltage.

The voltage Vg of the grid electrode of the driving tube Q1 is enabled to correspond to the input value G of the 10-bit DAC, and the voltage Vs of the source electrode of the driving tube Q1 is enabled to correspond to the input value S of the 10-bit DAC; vs is Vg-Vth, so Vth is Vg-Vs. The threshold voltage Vth here already includes the body effect of the driving transistor Q1. The value of Vg is pre-selected and known, and Vs can be detected by the dac 51 and the comparator 52, so Vth of the driving transistor Q1 can be calculated. When the Vth value rises after the driving tube Q1 ages, the detected Vs will correspondingly drop.

Example three:

as shown in fig. 1 and fig. 6, this embodiment is an improvement on the conventional external compensation display system, in the display system of the feedback signal detection method of this embodiment, the display system uses the pixel unit shown in fig. 2, the source driving module 321 includes a digital-to-analog converter 51, the detection module 322 includes a comparator 52, a current copy circuit 54 and a current-to-voltage circuit 55, the positive input terminal of the comparator 52 of the m-th column of detection units is connected to the m-th column of feedback signal line 45 sequentially through the current-to-voltage circuit 55 and the current copy circuit 54, and is further connected to each pixel unit 41 of the m-th column.

In each column of driving channels, the digital-to-analog converter 51 of the detecting unit is connected to the display signal line 44 through the second switch sw2, and further connected to each pixel unit 41 of the column. The display signal line 44 is also connected to the low potential V1 through the first switch sw 1.

In this embodiment, the pixel units 41 in all columns are divided into a single-column driving channel and an even-column driving channel, for example, the m-th column detection unit may be in the single-column driving channel (left-side driving channel in fig. 6), and the t-th column detection unit may be in the even-column driving channel (right-side driving channel in fig. 6); alternatively, the m-th column of detecting elements may be in even-numbered driving channels, and the t-th column of detecting elements may be in odd-numbered driving channels. The negative input of the comparator 52 of the m-th column of detection units is connected to the digital-to-analog converter of the t-th column of detection units.

In this embodiment, the digital-to-analog converter is referred to as a digital-to-analog converter of the t-th column detection unit. The t-th column of detecting units may be adjacent to the m-th column of detecting units, or may be spaced from the m-th column of detecting units by other detecting units.

The feedback signal detection method of the embodiment is used for detecting the current of the driving tube Q1 so as to calculate the threshold voltage of the driving tube Q1, and comprises the following processes:

st1, the row scan driver 20 sends out a scan signal to the display address signal line to gate the write channel of the nth row of pixel units 41;

st2, the pixel unit is controlled to generate a feedback signal and the reference digital-to-analog converter is controlled to output a comparison voltage, such that the positive input of the comparator receives the feedback voltage and the negative input of the comparator receives the comparison voltage.

Specifically, the compensation algorithm module 12 writes the compensated digital correction signal to the digital-to-analog converter 51 of the mth column of detection units through the shift-in circuit 31; for example, the compensated digital correction signal may be a compensated display gray level 1 value corresponding to a desired current output from the driving transistor Q1, such as 10 nA;

the digital-to-analog converter 51 of the m-th column of detection units outputs a compensated analog correction signal;

the controller 10 controls the second switch sw2 of the tth column driving channel to be turned off and the first switch sw1 to be turned on, so that a low voltage (e.g. 0V) is written into the tth column driving transistor Q1; since the second switch sw2 is turned off, the digital-to-analog converters of the source driving modules in the t-th column are disconnected from the display signal lines;

the compensated digital correction signal causes the target pixel unit 41 to output a feedback current of a predetermined magnitude;

the row scanning driver 20 sends a scanning signal to the feedback address line 43 to gate the feedback channel of the nth row pixel unit 41;

the current copy circuit 54 of the m-th column of detecting units fixes the voltage of the feedback signal line 45 at a low voltage (the low voltage is the possible voltage which is the minimum voltage lower than the threshold of the OLED, for example, 0.8V; generally, the threshold voltage of the OLED exceeds 1V), so as to ensure that the light emitting diode T1 is turned off and turned on; all feedback currents of the driving tube Q1 are led to the feedback signal line 45 and then output to the current copy circuit 54, and the current copy circuit 54 copies the feedback currents to the output end and outputs the feedback currents to the current-to-voltage circuit 55;

the current-to-voltage circuit 55 of the m-th row of detection units converts the current into a voltage signal and outputs the voltage signal to the positive input end of the comparator 52;

the obtained feedback voltage of the pixel unit 41 in the nth row and the mth column is a voltage signal from the current-to-voltage circuit 55 in the mth column detection unit.

The compensation algorithm module 12 outputs the DAC input value corresponding to the feedback current of the driving transistor Q1 of the pixel unit 41 in the mth column (i.e. the DAC input value corresponding to the feedback current of the driving transistor Q1 under the correction signal) to the 10-bit DAC of the detection unit in the tth column;

the digital-to-analog converter of the t-th column of detecting units converts the DAC input value into a voltage signal and outputs the voltage signal to the negative input end of the comparator 52 of the m-th column of detecting units;

the obtained comparison voltage is a voltage signal from a digital-to-analog converter of the detection unit in the t column.

St3, comparator 52 compares the feedback voltage with the comparison voltage. The comparison of the results may indicate whether the previous test results stored by the controller 10 are large or small.

After the m-th column of pixel cells 41 completes the calibration feedback detection operation, the calibration feedback detection operation is performed on the t-th column of pixel cells in the row, and the effect of the m-th column and the t-th column in the calibration feedback detection operation is reversed.

Example four:

as shown in fig. 1 and fig. 7, this embodiment is an improvement on the conventional external compensation display system, in the display system of the feedback signal detection method of this embodiment, the display system uses the pixel unit shown in fig. 2, the source driving module 321 includes a digital-to-analog converter 51, the detection module 322 includes a comparator 52 and a current source 53, and the current source 53 of the m-th column of detection units is respectively connected to each pixel unit 41 of the m-th column through the m-th column of feedback signal line 45.

In this embodiment, the pixel units 41 in all columns are divided into a single-column driving channel and an even-column driving channel, for example, the m-th column detection unit may be in the single-column driving channel (left-side driving channel in fig. 7), and the t-th column detection unit may be in the even-column driving channel (right-side driving channel in fig. 7); alternatively, the m-th column of detecting elements may be in even-numbered driving channels, and the t-th column of detecting elements may be in odd-numbered driving channels. The negative input of the comparator 52 of the m-th column of detection units is connected to the digital-to-analog converter of the t-th column of detection units.

In this embodiment, the reference digital-to-analog converter is a digital-to-analog converter of the t-th column detection unit. The t-th column of detecting units may be adjacent to the m-th column of detecting units, or may be spaced from the m-th column of detecting units by other detecting units.

The feedback signal detection method of the embodiment is used for detecting the threshold voltage of the light emitting diode T1, and includes the following steps:

st1, the line scan driver 20 sends out a scan signal to the display address signal line of the nth row, and gates the write channel of the pixel units 41 of the nth row;

Specifically, the compensation algorithm module 12 inputs a zero input signal (i.e., writes a digital 0) to the digital-to-analog converter 51 of the m-th column of detection units through the shift-in circuit 31;

the digital-to-analog converter 51 of the m-th column detection unit converts a zero input signal into a voltage signal and writes the voltage signal into the pixel unit 41 of the m-th column, so that the driving tube Q1 of the m-th column is turned off and on; this low voltage can also be generated locally without input from the controller 10; the compensation algorithm module 12 outputs the DAC input value corresponding to the OLED threshold voltage detected before the mth column of detection units (or the DAC input value corresponding to the expected OLED threshold voltage) to the digital-to-analog converter of the tth column of detection units;

the controller 10 controls the second switch sw2 of the tth column driving channel to be turned off and the first switch sw1 to be turned on, so that a low voltage (for example, 0V) is written into the pixel unit of the tth column, and the driving tube Q1 of the tth column is turned off and turned on; the second switch sw2 is turned off, so that the digital-to-analog converters of the t column are disconnected from the display signal lines;

the current source 53 of the m-th column detection unit inputs a preset current (for example, 1nA) to the pixel unit 41 through the m-th column feedback signal line 45;

after the voltage on the feedback signal line 45 is stabilized, the obtained feedback voltage of the pixel unit 41 in the nth row and the mth column is the voltage on the feedback signal line 45 in the mth column. If the light emitting diode T1 ages, the threshold voltage will drift upward.

The digital-to-analog converter of the t-th column of detection units converts the input value into a voltage signal and outputs the voltage signal to the negative input end of the comparator 52 of the m-th column of detection units;

the obtained comparison voltage is a voltage signal converted by the digital-to-analog converter of the t-th column detection unit from the DAC input value corresponding to the OLED threshold voltage detected before the m-th column detection unit.

St3, comparator 52 compares the feedback voltage with the comparison voltage. The comparison results may indicate whether the OLED threshold voltage expected by the controller 10 is large or small.

St4, the comparator 52 feeds back the detection result obtained by the comparison to the aging information memory 13 through the shift-out circuit 33, and the aging information memory 13 stores the detection result.

Example five:

st1, the line scanning driver 20 sends out a scanning signal to the display address signal line of the nth row, and gates the writing channel of the pixel units 41 of the nth row;

Specifically, the compensation algorithm module 12 inputs a correction signal (for example, 1000) to the digital-to-analog converter 51 of the m-th column of detection units through the shift-in circuit 31, where the correction signal is required to ensure that the driving transistor Q1 can be turned on when writing into the pixel unit 41; outputting the DAC input value corresponding to the threshold voltage of the driving tube Q1 detected before the m-th column of detection units (or the DAC input value corresponding to the expected threshold voltage of the driving tube Q1) to the digital-to-analog converter of the t-th column of detection units;

the digital-to-analog converter 51 of the m-th column of detection units converts the correction signal into a voltage signal and writes the voltage signal into the pixel unit 41 of the m-th column, so that the driving tube Q1 of the m-th column is turned on; the correction signal may also be a locally generated voltage signal of a selected voltage value, without input from the controller 10;

the second switch sw2 for controlling the t-th column driving channel is turned off and the first switch sw1 is turned on, so that a low voltage (for example, 0V) is written into the pixel units of the t-th column, and the driving tube Q1 of the t-th column is turned off and turned on; the second switch sw2 is turned off, so that the digital-to-analog conversion modules in the t column are disconnected with the display signal line;

an analog correction signal is written into the gate (gate voltage is Vg) of the driving tube Q1 of the pixel unit 41 in the mth column, and the source voltage of the driving tube Q1 of the pixel unit 41 is Vs ═ Vg-Vth, where Vth is the threshold voltage of the driving tube Q1 of the pixel unit 41 in the mth column;

the row scanning driver 20 sends a scanning signal to the nth row feedback address signal line to gate the feedback channel of the nth row pixel unit 41, so that the source voltage of the driving transistor Q1 in the mth column pixel unit 41 is output to the positive input terminal of the comparator 52 through the feedback signal line 45;

the feedback voltage of the pixel unit 41 in the nth row and the mth column is obtained through the feedback signal line 45 in the mth column.

The digital-to-analog converter of the t column of detection units converts the DAC input value corresponding to the threshold voltage of the driving tube Q1 detected before the m column of detection units into a voltage signal and outputs the voltage signal to the negative input end of the comparator 52 of the m column of detection units;

the obtained comparison voltage is a voltage signal converted by the digital-to-analog converter of the t-th column detection unit from the DAC input value corresponding to the threshold voltage of the driving tube Q1 detected before the m-th column detection unit.

St3, comparator 52 compares the feedback voltage with the comparison voltage.

Fig. 8 is a schematic flow chart illustrating a method for detecting a feedback signal according to the present invention, which is suitable for illustrating a method of a display system according to the first to fifth embodiments of the present invention, wherein the display system according to the first to fifth embodiments of the present invention has different circuit structures due to different digital-to-analog converters for reference, and the main difference of the method according to the first to fifth embodiments of the present invention is the St2 process. For convenience of description and analysis, the detection operation herein is directed to the pixel units in the nth row and the mth column, and the pixel units in the nth row and the mth column are used as the target pixel units. The St1 process and the St2 process may be performed simultaneously.

The feedback signal detection method of the present invention comprises the following processes:

for the nth row of pixel units, the detection operation process specifically includes: st1, gating the write channel of the pixel cells of the nth row; st2, controlling the pixel unit to generate the feedback signal and controlling the reference dac to output the comparison voltage such that the first input terminal of the comparator receives the feedback voltage and the second input terminal of the comparator receives the comparison voltage; st3, comparing the feedback voltage with the comparison voltage; st4, controlling the comparator to feed the detection result obtained by comparison back to the aging information memory through the shift-out circuit;

and a second process: repeating process one, the input value of the dac 51 will steadily jump between K and K +1 in the following operation as process one is repeated. Those skilled in the art will appreciate that the first process may be repeated over and over again.

In the present invention, the positive input terminal of the comparator 52 may be set as the first input terminal, and the negative input terminal may be set as the second input terminal. St3 compares the feedback voltage with the comparison voltage by:

when the row scan driver 20 performs the write channel for gating the pixel units on the nth row in the first scan, the comparator 52 compares the comparison voltage with the feedback voltage;

if the output result of the comparator 52 comparing the comparison voltage with the feedback voltage in the first scanning is 1, when the line scan driver 20 performs the n-th line writing channel in the second scanning, the comparison voltage is controlled to increase by the preset value k; if the output result of the comparator 52 comparing the comparison voltage with the feedback voltage in the first scanning is 0, when the line scanning driver 20 performs the second scanning, the nth line writing channel is gated again, the comparison voltage is controlled to decrease by the preset value k;

after the comparator 52 compares the comparison voltage with the feedback voltage and outputs a result that is inverted for the first time when the line scan driver 20 performs a certain scanning round, if the result is inverted for the first time to 1 to 0, the comparison voltage is controlled to be reduced by 1 when the nth line writing channel is next gated; if the first inversion is 0 to 1, controlling the comparison voltage to increase by 1 when the nth row writing channel is gated next time;

the row scanning driver 20 continues to repeatedly perform multiple scanning strobes on the pixel units in the 1 st row to the Nth row, and when the writing channel in the nth row is strobed again, if the result of the last comparison is 1, the comparison voltage is controlled to be increased by 1; if the result of the last comparison is 0, the comparison voltage is controlled to be reduced by 1;

the line scan driver 20 continues to repeatedly perform multiple scanning strobes on the pixel units in the 1 st to nth rows until the writing channel in the nth row is subsequently strobed, and if the result output by comparing the feedback voltage with the comparison voltage with the value of K +1 is 0 and the result output by comparing the feedback voltage with the comparison voltage with the value of K is 1, a certain value between K and K +1 is taken as a final result. For example, an intermediate value between K and K +1, an average value, a value K, or a value K +1 may be used as the detection result, and the solution of the average value includes calculating an arithmetic scheme such as an arithmetic average value or a geometric average value. The operation of "take a certain value between K and K +1 as the final result" can be performed by the timing control module 11, and can be determined by the skilled person.

For example, as shown in fig. 9, the display system uses the pixel cell shown in fig. 2, the comparison voltage is a DAC input value, first, a value is selected at the DAC input end, and after the value is assumed to start from 0, the DAC converts the DAC into an analog signal (voltage) corresponding to the value 0 and outputs the analog signal to the negative input end of the comparator 52, and the signal to be detected (i.e., the feedback voltage) is input to the positive input end of the comparator 52. If the result is 0, the selected voltage of the DAC is indicated to be higher, but the input of the DAC is already 0 and can not be lower any more, and the voltage which needs to be detected by the input is indicated to be beyond the detectable range. If 1, it means that the voltage selected by the DAC is not enough, k needs to be added to the input value of the DAC in the next comparison. Where k is an integer other than 0, e.g., 1. If the next round of comparison still yields a 1, the DAC input value is again raised until the output of the comparator 52 is 0, indicating that the voltage corresponding to the input value selected by the DAC has exceeded the detected signal at the positive input of the comparator, which is the first flip.

As shown in fig. 9, the DAC value starts from 0 and the final achieved state should be: when the DAC value rises to K +1, the output result of the comparator 52 is 0, which indicates that the voltage selected by the DAC is larger than the compared voltage, and then the voltage selected by the DAC is reduced by 1 in the next comparison; when the DAC value drops to K, the output result of the comparator 52 is 1, which indicates that the voltage selected by the DAC is smaller than the compared voltage, and then the voltage selected by the DAC is increased by 1 in the next comparison; the above steps are repeated to achieve stability. Finally, the input value of the whole DAC is stabilized to jump between K and K +1, and the compared voltage is between the voltages corresponding to K and K + 1.

Alternatively, the negative input terminal of the comparator 52 may be set as the first input terminal and the positive input terminal may be set as the second input terminal according to the actual requirements of the circuit design. Then, St3 compares the feedback voltage with the comparison voltage by:

if the output result of the comparator 52 comparing the comparison voltage with the feedback voltage in the first scanning is 0, when the line scan driver 20 performs the n-th line writing channel in the second scanning, the comparison voltage is controlled to increase by the preset value k; if the result of comparing the comparison voltage with the feedback voltage by the comparator 52 in the first scanning is 1, controlling the comparison voltage to decrease by the preset value k when the nth row writing channel is gated again in the second scanning by the row scanning driver 20;

after the comparator 52 compares the comparison voltage with the feedback voltage and outputs a result that is inverted for the first time when the line scan driver 20 performs a certain scanning round, if the result is inverted to 0 to 1 for the first time, when the nth line write channel is next gated, the comparison voltage is controlled to be reduced by 1; if the first inversion is 1 to 0, controlling the comparison voltage to increase by 1 when the nth row writing channel is gated next time;

the row scanning driver 20 continues to repeatedly perform multiple scanning strobes on the pixel units in the 1 st row to the Nth row, and when the writing channel in the nth row is strobed again, if the result of the last comparison is 0, the comparison voltage is controlled to be increased by 1; if the result of the last comparison is 1, the comparison voltage is controlled to be reduced by 1;

the line scan driver 20 continues to repeatedly perform multiple scanning strobes on the pixel units in the 1 st to nth rows until the writing channel in the nth row is subsequently strobed, and if the feedback voltage is compared with the comparison voltage with the value of K +1 to output a result of 1 and the feedback voltage is compared with the comparison voltage with the value of K to output a result of 0, then a certain value between K and K +1 is taken as a final result. For example, an intermediate value between K and K +1, an average value, a value K, or a value K +1 may be used as the detection result, and the solution of the average value includes calculating an arithmetic mean value or a geometric mean value.

The system of the feedback signal detection method is an out-of-pixel compensation single DAC display system, utilizes a digital-to-analog converter matched with a comparator to detect information (such as aging information) fed back by a target pixel unit, can perform various detections on devices such as TFT, OLED, QLED and the like, for example, the detections on the problems of device aging, uneven threshold voltage, uneven driving and the like, and is suitable for various products such as AMOLED, OLED-on-Silicon, QLED-on-Silicon, PMOLED, LCD driving chips, OLED lighting driving chips and the like.

The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.

Claims

1. A display system capable of detecting feedback signals of pixel units comprises,

a display panel (40), the display panel (40) having disposed thereon: n rows and M columns of pixel units (41); the pixel units of each row are gated to the writing channel through the display address line corresponding to the pixel units, and are gated to the feedback channel through the feedback address line corresponding to the pixel units; the pixel units of each column write in display signals through the display signal lines corresponding to the pixel units and output feedback signals through the feedback signal lines corresponding to the pixel units;

a source driver (30), the source driver (30) comprising detection units (32) in one-to-one correspondence with M columns of pixel units; the detection unit (32) comprises a source driving module (321) and a detection module (322); the source driving module (321) comprises a digital-to-analog converter (51), and the detection module (322) comprises a comparator (52); the digital-to-analog converter (51) is connected to the pixel unit (41) through a display signal line (44); a first input end of the comparator (52) is connected to the pixel unit (41) through a feedback signal line (45) and is used for receiving a feedback voltage corresponding to a feedback signal of the pixel unit (41); the second input end of the reference voltage comparator is connected to a reference digital-to-analog converter which is a digital-to-analog converter belonging to the same detection unit as the comparator or a digital-to-analog converter of a different detection unit, and is used for receiving the comparison voltage output by the reference digital-to-analog converter; the digital-to-analog converter (51) provides the display signal line with the compensated analog display signal in the display operation, and provides the comparator (52) with a preset comparison voltage when serving as a reference digital-to-analog converter in the correction feedback detection operation, and the comparator (52) compares the feedback voltage with the comparison voltage and then outputs the obtained detection result through the output end of the comparator.

2. The display system of claim 1,

the device also comprises a controller (10), a line scanning driver (20), a first switch and a second switch;

the m column digital-to-analog converter (51) is connected to the m column display signal line (44) through a second switch and further connected to each pixel unit (41) of the m column respectively;

the m-th column display signal line (44) is also connected to a preset potential through a first switch;

the controller (10) is connected to the line scan driver (20) and the source driver (30);

the line scanning driver (20) is respectively connected with N lines of display address lines (42) and feedback address lines (43), the line scanning driver (20) is used for receiving line control signals of the controller (10), gating write-in channels of the pixel units in the 1 st line to the N th line sequentially through the 1 st line to the N th line of display address lines, gating feedback channels of the pixel units in the 1 st line to the N th line sequentially through the 1 st line to the N th line of feedback address lines, and when the write-in channel and the feedback channels of the N th line are in a gating state simultaneously, the pixel units of the N th line output feedback voltages to a first input end of the comparator (52);

the source driver (30) further comprises a shift-in circuit (31) and a shift-out circuit (33);

the controller (10), the shift-in circuit (31) and the m-th column digital-to-analog converter (51) are connected in sequence;

the controller (10) is used for controlling the reference digital-to-analog converter to output a comparison voltage;

the output end of the m column comparator (52) is connected to the controller (10) through the shift-out circuit (33) and used for feeding back the detection result to the controller (10) through the shift-out circuit (33), the controller (10) modifies the comparison voltage according to the detection result, so that the comparison voltage approaches the feedback voltage, and repeatedly and sequentially gates the write-in channel and the feedback channel from the 1 st row to the Nth row to obtain a final result, and aging information used for compensating the display signal of the pixel unit is updated according to the final result;

wherein N is an integer greater than or equal to 1 and less than or equal to N; m is an integer of 1 to M.

3. The display system of claim 2,

the first input end of the comparator (52) is a positive input end, and the second input end is a negative input end;

when the row scanning driver (20) gates a writing channel of the pixel units of the nth row, the comparator (52) is used for comparing a comparison voltage with a feedback voltage;

if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 1, when the nth row writing channel is gated again, the controller (10) controls the comparison voltage to increase by a preset value k; if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 0, when the nth row writing channel is gated again, the controller (10) controls the comparison voltage to be reduced by a preset value k;

when the comparator (52) firstly inverts the comparison voltage and the feedback voltage to output a result, and if the result is inverted to 1 to 0 for the first time, the controller (10) controls the comparison voltage to be reduced by 1 when the nth row writing channel is next gated; if the first inversion is 0 to 1, when the nth row writing channel is gated next time, the controller (10) controls the comparison voltage to increase by 1;

when the nth row writing channel is gated again, if the last comparison result is 1, the controller (10) controls the comparison voltage to increase by 1; if the last comparison result is 0, the controller (10) controls the comparison voltage to be reduced by 1;

until the nth row of write channels is subsequently gated, comparing the feedback voltage with the comparison voltage with the value of K +1 to output a result of 0 and comparing the feedback voltage with the comparison voltage with the value of K to output a result of 1, and taking a certain value between K and K +1 as a final result;

or the first input end of the comparator (52) is a negative input end, and the second input end is a positive input end;

when the row scanning driver (20) gates a writing channel of the pixel units of the nth row, the comparator (52) is used for comparing the comparison voltage with the feedback voltage;

if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 0, when the nth row writing channel is gated again, the controller (10) controls the comparison voltage to increase by a preset value k; if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 1, when the writing channel of the nth row is gated again, the controller (10) controls the comparison voltage to be reduced by a preset value k;

when the comparator (52) firstly inverts the comparison voltage and the feedback voltage to output the result, if the result is inverted to 0 to 1 for the first time, when the nth row writing channel is gated next time, the controller (10) controls the comparison voltage to be reduced by 1; if the first inversion is 1 to 0, when the nth row writing channel is gated next time, the controller (10) controls the comparison voltage to increase by 1;

when the nth row writing channel is gated again, if the last comparison result is 0, the controller (10) controls the comparison voltage to increase by 1; if the result of the last comparison is 1, the controller (10) controls the comparison voltage to be reduced by 1;

until the nth row of write channels is subsequently gated, comparing the feedback voltage with the comparison voltage with the value of K +1 to output a result of 1 and comparing the feedback voltage with the comparison voltage with the value of K to output a result of 0, and taking a certain value between K and K +1 as a final result;

wherein K is a natural number greater than 0, and K is a natural number greater than 0.

4. The display system of claim 2 or 3,

the controller (10) comprises a time sequence control module (11), a compensation algorithm module (12) and an aging information memory (13) which are connected in sequence;

the compensation algorithm module (12), the shift-in circuit (31) and the m-th column digital-to-analog converter (51) are connected in sequence;

the output end of the m-th row comparator (52), the shift-out circuit (33) and the aging information memory (13) are connected in sequence;

the pixel unit (41) comprises a second switching tube, a driving tube, a third switching tube and a light-emitting device;

in the pixel unit (41) of the nth row and the mth column, a light-emitting device and a driving tube are connected between a high potential and the ground in series, a second switching tube is connected between a grid electrode of the driving tube and a display signal line (44) of the mth column, the grid electrode of the second switching tube is connected to a display address line (42) of the nth row, a third switching tube is connected between an intermediate node of the light-emitting device and a feedback signal line (45) of the mth column, and the grid electrode of the third switching tube is connected to a feedback address line (43) of the nth row.

5. The display system of claim 4,

the detection module (322) further comprises a current source (53), and the current source (53) in the mth column is connected to each pixel unit (41) in the mth column through a feedback signal line (45) in the mth column;

the second input end of the mth column comparator (52) is connected to the mth column digital-to-analog converter (51);

the time sequence control module (11) is used for controlling the second switch of the mth column to be switched off and the first switch to be switched on;

the line scanning driver (20) is used for gating a writing channel of the pixel units (41) in the nth row, so that a first preset voltage from the preset potential is written into the driving tube, and the driving tube is turned off and conducted; the row scanning driver (20) is also used for gating a feedback channel of the pixel unit (41) of the nth row;

the m column current source (53) is used for inputting preset current to the pixel unit (41) through the m column feedback signal line (45);

the timing control module (11) is also used for controlling the m column digital-to-analog converter (51) to generate a selected voltage;

the feedback voltage of the pixel unit (41) of the nth row and the mth column is the voltage on the feedback signal line (45) of the mth column, and the comparison voltage is the voltage selected by the digital-to-analog converter (51) of the mth column.

6. The display system of claim 4,

the line scanning driver (20) is used for gating a writing channel of the pixel units (41) in the nth row, so that a second preset voltage from the preset potential is written into the driving tube; the row scanning driver (20) is also used for gating a feedback channel of the pixel unit (41) of the nth row;

7. The display system of claim 4,

the detection module (322) further comprises a current copy circuit (54) and a current-to-voltage circuit (55), wherein a first input end of the mth column comparator (52) is connected to the mth column feedback signal line (45) sequentially through the current-to-voltage circuit (55) and the current copy circuit (54) and further connected to each pixel unit (41) of the mth column;

the second input end of the mth column comparator (52) is connected to the digital-to-analog converter of the tth column detection unit;

the time sequence control module (11) is used for controlling the conduction of a second switch of the mth column;

the compensation algorithm module (12) is used for writing a compensated digital correction signal into the m column digital-to-analog converter (51) through a shift-in circuit (31);

the row scanning driver (20) is used for gating a writing channel of the pixel units (41) of the nth row;

the m column digital-to-analog converter (51) is used for outputting a compensated analog correction signal;

the time sequence control module (11) is also used for controlling the second switch of the t-th column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the driving tube;

the row scanning driver (20) is also used for gating a feedback channel of the pixel unit (41) of the nth row;

the current copy circuit (54) of the m-th row of detection units (32) is used for fixing the voltage of the feedback signal line (45) and outputting the current of the driving tube to the current-to-voltage circuit (55);

a current-to-voltage circuit (55) of the m-th column detection unit (32) converts the current into a voltage signal and outputs the voltage signal to a comparator (52);

the controller (10) is also used for outputting a DAC input value corresponding to the feedback current of the driving tube of the pixel unit (41) in the mth column to a digital-to-analog converter of the detection unit in the tth column;

the digital-to-analog converter of the t column detection unit is used for converting the DAC input value into a voltage signal and outputting the voltage signal to the m column comparator (52);

the feedback voltage of the pixel units (41) in the nth row and the mth column is a voltage signal from a current-to-voltage circuit (55) in the mth column detection unit (32), and the comparison voltage is a voltage signal from a digital-to-analog converter in the tth column detection unit;

wherein t is an integer of 1 or more and M or less.

8. The display system of claim 4,

the time sequence control module (11) is used for inputting a zero input signal to the m-th column digital-to-analog converter (51) and outputting a DAC input value corresponding to the threshold voltage of the light-emitting device detected by the m-th column detection unit (32) before or a DAC input value corresponding to the expected threshold voltage of the light-emitting device to the digital-to-analog converter of the t-th column detection unit;

the m-th column digital-to-analog converter (51) is used for converting a zero input signal into a voltage signal and writing the voltage signal into the pixel unit (41) of the m-th column, so that the driving tube of the m-th column is turned off and turned on;

the time sequence control module (11) is also used for controlling the second switch of the t-th column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the pixel units of the t-th column, and the driving tube of the t-th column is switched off and switched on;

the digital-to-analog converter of the t column detection unit is used for converting the received DAC input value into a voltage signal and outputting the voltage signal to the m column comparator (52);

the feedback voltage of the pixel units (41) in the nth row and the mth column is the voltage on the feedback signal line (45) in the mth column, and the comparison voltage is a voltage signal converted by the digital-to-analog converter of the detection unit in the tth column from the received DAC input value;

wherein t is an integer of 1 or more and M or less.

9. The display system of claim 4,

the time sequence control module (11) is used for inputting a correction signal to the m-th column digital-to-analog converter (51) and outputting a DAC input value corresponding to the driving tube threshold voltage detected by the m-th column detection unit (32) before or a DAC input value corresponding to the expected driving tube threshold voltage to the digital-to-analog converter of the t-th column detection unit;

the m-th column digital-to-analog converter (51) is used for converting the correction signal into a voltage signal and writing the voltage signal into the pixel unit (41) of the m-th column, so that the driving tube of the m-th column is conducted;

the time sequence control module (11) is also used for controlling the second switch of the t-th column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the pixel units of the t-th column, and the driving tube of the t-th column is switched off and on;

the row scanning driver (20) is also used for gating a feedback channel of the pixel unit (41) in the nth row, so that a source electrode voltage of a driving tube in the pixel unit (41) in the mth column is output to the comparator (52) through a feedback signal line (45);

wherein t is an integer of 1 or more and M or less.

10. A feedback signal detecting method of a display system according to claim 1, comprising:

the detection operation process comprises the following steps: enabling the writing channel and the feedback channel of the nth row to be in a gating state at the same time, controlling the pixel unit to generate a feedback signal and controlling the reference digital-to-analog converter to output a comparison voltage, enabling a first input end of the comparator to receive the feedback voltage corresponding to the feedback signal, and enabling a second input end of the comparator to receive the comparison voltage; comparing the feedback voltage with the comparison voltage; modifying the comparison voltage according to the detection result output by the comparator to enable the comparison voltage to approach the feedback voltage;

repeating the operation, and gating the writing channel and the feedback channel of the pixel units in the 1 st row to the Nth row again until a final result is obtained;

and updating aging information for compensating the display signals of the pixel units according to the final result.

11. The method of claim 10, wherein the display system further comprises a controller (10), a line scan driver (20), a first switch and a second switch; the m column digital-to-analog converter (51) is connected to the m column display signal line (44) through a second switch and further connected to each pixel unit (41) of the m column respectively; the m-th column display signal line (44) is also connected to a preset potential through a first switch; the controller (10) is connected to the line scan driver (20) and the source driver (30); the line scanning driver (20) is respectively connected with N lines of display address lines (42) and feedback address lines (43), the line scanning driver (20) is used for receiving line control signals of the controller (10), gating write-in channels of the pixel units in the 1 st line to the N th line sequentially through the 1 st line to the N th line of display address lines, gating feedback channels of the pixel units in the 1 st line to the N th line sequentially through the 1 st line to the N th line of feedback address lines, and when the write-in channel and the feedback channels of the N th line are in a gating state simultaneously, the pixel units of the N th line output feedback voltages to a first input end of the comparator (52); the method further comprises the following steps:

the process of comparing the feedback voltage with the comparison voltage is as follows:

when the row scanning driver (20) gates a writing channel of the pixel units of the nth row, controlling a comparator (52) to compare a comparison voltage with a feedback voltage;

if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 1, controlling the comparison voltage to increase by a preset value k when the nth row writing channel is gated again; if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 0, controlling the comparison voltage to reduce by a preset value k when the nth row writing channel is gated again;

when the comparator (52) firstly inverts the result output by comparing the comparison voltage with the feedback voltage, if the result is inverted to 1 to 0 for the first time, when the nth row writing channel is next gated, the comparison voltage is controlled to be reduced by 1; if the first inversion is 0 to 1, controlling the comparison voltage to increase by 1 when the nth row writing channel is gated next time;

when the nth row writing channel is gated again, if the result of the last comparison is 1, the comparison voltage is controlled to be increased by 1; if the result of the last comparison is 0, the comparison voltage is controlled to be reduced by 1;

until the writing channel of the nth row is subsequently gated, comparing the feedback voltage with the comparison voltage with the value of K +1 to output a result of 0 and comparing the feedback voltage with the comparison voltage with the value of K to output a result of 1, and taking a certain value between K and K +1 as a final result;

when the row scanning driver (20) gates the writing channel of each pixel unit in the nth row, the comparator (52) is controlled to compare the comparison voltage with the feedback voltage;

if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 0, controlling the comparison voltage to increase by a preset value k when the nth row writing channel is gated again; if the comparator (52) compares the comparison voltage with the feedback voltage and outputs a result of 1, controlling the comparison voltage to reduce by a preset value k when the nth row writing channel is gated again;

when the comparator (52) firstly inverts the result output by comparing the comparison voltage with the feedback voltage, if the result is firstly inverted to 0 to 1, when the nth row writing channel is next gated, the comparison voltage is controlled to be reduced by 1; if the first inversion is 1 to 0, controlling the comparison voltage to increase by 1 when the nth row writing channel is gated next time;

when the nth row writing channel is gated again, if the result of the last comparison is 0, the comparison voltage is controlled to be increased by 1; if the result of the last comparison is 1, the comparison voltage is controlled to be reduced by 1;

12. The method of claim 11 for detecting a light emitting device threshold voltage,

in the display system, the detection module (322) further comprises a current source (53), the current source (53) in the mth column is connected to each pixel unit (41) in the mth column through a feedback signal line (45) in the mth column;

a second input end of the mth column comparator (52) is connected to the mth column digital-to-analog converter (51);

the process of controlling the pixel unit to generate the feedback signal and controlling the reference digital-to-analog converter to output the comparison voltage is as follows:

controlling the second switch of the mth column to be switched off and the first switch to be switched on;

the writing channel of the pixel unit (41) of the nth row is gated so that a first preset voltage from the preset potential is written into the driving tube, and the driving tube is turned off and conducted;

gating a feedback channel of the pixel unit (41) of the nth row;

inputting a preset current to the pixel unit (41) through an m-th column feedback signal line (45);

controlling the m-th column digital-to-analog converter (51) to generate the selected voltage;

the feedback voltage of the pixel unit (41) of the nth row and the mth column is obtained as the voltage on the feedback signal line (45) of the mth column, and the obtained comparison voltage is the voltage selected by the digital-to-analog converter (51) of the mth column.

13. The method of claim 11 for detecting a drive tube threshold voltage,

in the display system, a second input end of an m column comparator (52) is connected to an m column digital-to-analog converter (51);

the writing channel of the pixel unit (41) in the nth row is gated so that a second preset voltage from the preset potential is written into the driving tube;

gating a feedback channel of the pixel unit (41) of the nth row;

14. The method of claim 11 for sensing a drive tube current to obtain a drive tube threshold voltage,

in the display system, the detection module (322) further comprises a current copy circuit (54) and a current-to-voltage circuit (55), and a first input end of the mth column comparator (52) is connected to the mth column feedback signal line (45) through the current-to-voltage circuit (55) and the current copy circuit (54) in sequence and further connected to each pixel unit (41) of the mth column;

controlling the second switch of the mth column to be conducted;

writing the compensated digital correction signal to the m-th column digital-to-analog converter (51) by a shift-in circuit (31);

controlling the digital-to-analog converter to output a compensated analog correction signal;

controlling the second switch of the t-th column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the driving tube;

gating a feedback channel of the pixel unit (41) of the nth row;

controlling a current copy circuit (54) of the m-th row detection unit (32) to fix the voltage of the feedback signal line (45) and output the current of the driving tube to a current-to-voltage circuit (55);

a current-to-voltage circuit (55) for controlling the m-th row of detection units (32) converts the current into a voltage signal and outputs the voltage signal to a comparator (52);

a DAC (digital-to-analog converter) which outputs a DAC input value corresponding to the feedback current of the driving tube of the pixel unit (41) in the mth column to a detection unit in the tth column;

controlling a digital-to-analog converter of the t column detection unit to convert the DAC input value into a voltage signal and outputting the voltage signal to an m column comparator (52);

the feedback voltage of the pixel unit (41) of the nth row and the mth column is obtained as a voltage signal from a current-to-voltage circuit (55) of the mth column detection unit (32), and the obtained comparison voltage is a voltage signal from a digital-to-analog converter of the tth column detection unit.

15. The method of claim 11 for detecting a light emitting device threshold voltage,

inputting a zero input signal to the m-th column digital-to-analog converter (51), and outputting a DAC input value corresponding to a light-emitting device threshold voltage detected by the m-th column detection unit (32) before or a DAC input value corresponding to an expected light-emitting device threshold voltage to the digital-to-analog converter of the t-th column detection unit;

controlling an m-th column digital-to-analog converter (51) to convert a zero input signal into a voltage signal and write the voltage signal into a pixel unit (41) of an m-th column, so as to cut off and conduct a driving tube of the m-th column;

controlling the second switch of the t-th column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the pixel unit of the t-th column, and the driving tube of the t-th column is switched off and on;

controlling the m column current source (53) to input preset current to the pixel unit (41) through the m column feedback signal line (45);

controlling a digital-to-analog converter of the t-th column detection unit to convert the received DAC input value into a voltage signal and output the voltage signal to an m-th column comparator (52);

the feedback voltage of the pixel unit (41) of the nth row and the mth column is obtained as the voltage on the feedback signal line (45) of the mth column, and the obtained comparison voltage is the voltage signal converted by the digital-to-analog converter of the detection unit of the tth column from the received DAC input value.

16. The method of claim 11 for detecting a drive tube threshold voltage,

in the display system, an m column current source (53) is connected to each pixel unit (41) of an m column through an m column feedback signal line (45);

inputting a correction signal to an m-th column digital-to-analog converter (51), and outputting a DAC input value corresponding to the driving tube threshold voltage detected by the m-th column detection unit (32) before or a DAC input value corresponding to the expected driving tube threshold voltage to a digital-to-analog converter of the t-th column detection unit;

controlling an m-th column digital-to-analog converter (51) to convert the correction signal into a voltage signal and write the voltage signal into a pixel unit (41) of the m-th column, thereby conducting a driving tube of the m-th column;

controlling the second switch of the t column to be switched off and the first switch to be switched on, so that a first preset voltage from the preset potential is written into the pixel unit of the t column, and the driving tube of the t column is switched off and switched on;

gating a feedback channel of the pixel unit (41) in the nth row so that a source electrode voltage of a driving tube in the pixel unit (41) in the mth column is output to a comparator (52) through a feedback signal line (45);