CN112185939B - Capacitor assembly, manufacturing method thereof and memory - Google Patents
Capacitor assembly, manufacturing method thereof and memory Download PDFInfo
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- CN112185939B CN112185939B CN201910595971.8A CN201910595971A CN112185939B CN 112185939 B CN112185939 B CN 112185939B CN 201910595971 A CN201910595971 A CN 201910595971A CN 112185939 B CN112185939 B CN 112185939B
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- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
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Abstract
The invention relates to the field of semiconductors, and discloses a capacitor assembly, a manufacturing method thereof and a memory. In the invention, the manufacturing method of the capacitor assembly comprises the following steps: providing a substrate; forming a first electrode on the surface of the substrate; forming a capacitance medium layer on the surface of the first electrode; forming a second electrode on the surface of the capacitance dielectric layer; the second electrode comprises a blocking layer formed on the surface of the capacitance medium layer and a thickening layer formed on the surface of the blocking layer, and the blocking layer is used for blocking a raw material for forming the thickening layer from contacting with the capacitance medium layer. The capacitor assembly, the manufacturing method thereof and the memory provided by the embodiment of the invention have the advantage of reducing the leakage current of the capacitor assembly.
Description
Technical Field
The invention relates to the field of semiconductors, in particular to a capacitor assembly, a manufacturing method thereof and a memory.
Background
With the continuous development of semiconductor technology, the performance requirements of capacitive components in semiconductor integrated circuits are higher and higher, and for example, the stability of the power storage of the capacitive components is expected to be higher and higher. One solution is to reduce the leakage current of the capacitive component.
However, the inventors of the present invention have found that as electronic devices are more and more miniaturized, the size requirements of the capacitor element in the semiconductor integrated circuit are also more and more reduced, resulting in a reduced thickness of the capacitor dielectric layer and an increased leakage current of the capacitor element. Therefore, how to effectively reduce the leakage current of the capacitor element becomes a problem to be solved urgently.
Disclosure of Invention
An object of the embodiments of the present invention is to provide a capacitor device, a method for manufacturing the same, and a memory, so that a leakage current of the capacitor device is reduced.
In order to solve the above technical problem, an embodiment of the present invention provides a method for manufacturing a capacitor module, including: providing a substrate; forming a first electrode on the surface of the substrate; forming a capacitance medium layer on the surface of the first electrode; forming a second electrode on the surface of the capacitance dielectric layer; the second electrode comprises a blocking layer formed on the surface of the capacitance medium layer and a thickening layer formed on the surface of the blocking layer, and the blocking layer is used for blocking a raw material for forming the thickening layer from contacting with the capacitance medium layer.
The embodiment of the invention also provides a capacitor assembly which is manufactured and formed by the capacitor assembly manufacturing method.
The embodiment of the invention also provides a memory, which comprises the capacitor assembly.
Compared with the prior art, the second electrode comprises the blocking layer formed on the surface of the capacitor dielectric layer, and the blocking layer can be used for blocking the raw material for forming the thickening layer from contacting with the capacitor dielectric layer, so that the capacitor dielectric layer is prevented from being damaged due to the contact of the raw material for forming the thickening layer with the capacitor dielectric layer when the thickening layer is prepared subsequently, the capacitor dielectric layer is effectively protected, the dielectric constant of the capacitor dielectric layer is prevented from being reduced, and the leakage current of the capacitor assembly is effectively reduced.
In addition, the forming of the second electrode on the surface of the capacitor dielectric layer specifically includes: depositing metal nitride on the surface of the capacitance dielectric layer by using nitrogen plasma and a metal organic compound as raw materials through a chemical vapor deposition method to form the metal nitride as the barrier layer; and forming a thickening layer on the surface of the barrier layer. The method comprises the following steps of taking nitrogen plasma and metal organic compounds as raw materials, depositing and forming metal nitride on the surface of a capacitor dielectric layer to serve as a blocking layer, wherein the chemical property of nitrogen is stable, so that the material for forming the blocking layer can be prevented from damaging the capacitor dielectric layer; in addition, the metal nitride film formed by the nitrogen plasma and the metal organic compound is compact, so that the raw material for forming a thickening layer can be effectively prevented from contacting with the capacitor dielectric layer, the dielectric constant of the capacitor dielectric layer is prevented from being reduced, and the leakage current of the capacitor assembly is further reduced.
In addition, the forming of the thickening layer on the surface of the barrier layer specifically includes: and depositing metal nitride on the surface of the barrier layer by using a chemical vapor deposition method by using a metal inorganic compound and ammonia gas as raw materials to form the metal nitride as the thickening layer. Because the cost of the metal inorganic compound and the ammonia gas is low, the condition for forming the metal nitride by reaction is simple, and the cost for preparing the capacitor component can be effectively reduced.
In addition, the material of the barrier layer is the same as that of the thickening layer. The material of the blocking layer is the same as that of the thickening layer, so that the conductivity of each layer in the second electrode can be ensured to be the same, and the electrical property of the capacitor assembly is improved.
In addition, the method also comprises the step of forming a filling layer on the surface of the second electrode, wherein the filling layer is used for filling gaps formed among different parts of the second electrode.
In addition, the filling layer is made of silicon germanium.
In addition, the capacitance dielectric layer is made of an oxide with a dielectric constant larger than a preset threshold value.
In addition, the barrier layer has a thickness of 1 to 3 nanometers; the thickness of the thickening layer is 2 to 4 nanometers.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention. Moreover, the drawings and the description are not intended to limit the scope of the inventive concept in any way, but rather to illustrate it by those skilled in the art with reference to specific embodiments.
FIG. 1 is a flowchart of a process for preparing a capacitor device according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a capacitor device after a first electrode is formed in a method for manufacturing a capacitor device according to a first embodiment of the present invention;
FIG. 3 is a flowchart illustrating a process of forming a first electrode in a method of manufacturing a capacitor device according to a first embodiment of the present invention;
fig. 4 is a schematic structural diagram of a capacitor device after a second electrode is formed in a method for manufacturing a capacitor device according to a first embodiment of the present invention;
FIG. 5 is a flowchart illustrating a process of forming a second electrode in the method of manufacturing a capacitor device according to the first embodiment of the present invention;
fig. 6 to 7 are schematic structural diagrams corresponding to steps of forming a second electrode in a method for manufacturing a capacitor device according to a first embodiment of the present invention;
FIG. 8 is a flowchart of a process for preparing a capacitor device according to a second embodiment of the present invention;
fig. 9 is a schematic structural diagram of a capacitor device after a filling layer is formed in a method for manufacturing a capacitor device according to a second embodiment of the present invention;
fig. 10 is a schematic structural diagram of a capacitor module according to a third embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
The capacitor assembly in the prior art has the problem of large leakage current, and after the research of the inventor, the inventor finds that in addition to the increase of the leakage current of the capacitor assembly caused by the reduction of the thickness of the capacitor dielectric layer, when the capacitor assembly is prepared, in the process of continuously preparing other parts of the capacitor assembly after the preparation of the capacitor dielectric layer is finished, partial raw materials and byproducts can contact with the capacitor dielectric layer and undergo chemical reaction, so that the capacitor dielectric layer is damaged, and the leakage current of the capacitor assembly is increased.
A first embodiment of the present invention relates to a method of manufacturing a capacitor assembly. The specific process is shown in fig. 1, and comprises the following steps:
step S101: a substrate is provided.
Specifically, in this step, the substrate may be made of monocrystalline silicon, polycrystalline silicon, amorphous silicon, silicon germanium compound, silicon-on-insulator (SOI), or the like, or other materials known to those skilled in the art, and a plurality of node contacts are formed in the substrate and electrically connected to the first electrode formed on the surface of the substrate subsequently. It should be noted that other device structures such as an isolation structure may be formed in the substrate, which is not illustrated herein, and may be flexibly disposed according to actual needs.
Step S102: a first electrode is formed on the surface of the substrate.
Specifically, in this embodiment, the material of the first electrode is a metal nitride. It is to be understood that the material of the first electrode is metal type nitride, which is only a specific example in the present embodiment, and is not limited thereto, and any other material that can be used as a capacitor electrode can be used as the first electrode in the present invention, such as metals such as silver and copper, which are not listed here.
Preferably, in this embodiment, the material of the first electrode is titanium nitride. Because titanium nitride has good conductivity and chemical stability, the titanium nitride is used as the first electrode, so that the capacitor assembly can be ensured to have good electrical property, and the stability of the capacitor assembly can be ensured. It is to be understood that the material of the first electrode is titanium nitride merely by way of example and is not limited in this embodiment, and in other embodiments of the present invention, the first electrode may be another material such as zirconium nitride, which is not illustrated herein, and may be used flexibly according to actual needs.
Further, in this step, a first electrode was formed on the surface of the substrate by chemical vapor deposition using titanium tetrachloride and ammonia gas as raw materials, and the specific shape is shown in fig. 2, in which 10 is the substrate and 20 is the first electrode. The specific preparation process is shown in fig. 3, and comprises the following steps:
step S201: a sacrificial layer is formed on the surface of the substrate.
Step S202: a plurality of through holes penetrating the sacrificial layer to expose the substrate are formed in the sacrificial layer.
Step S203: forming a first electrode on the surface of the sacrificial layer, wherein the first electrode covers the side wall and the bottom of the through hole to form a plurality of cylindrical structures;
step S204: and removing the sacrificial layer.
It should be noted that the preparation of the first electrode made of titanium nitride using titanium tetrachloride and ammonia gas as raw materials is merely a specific example in the present embodiment, and is not limited thereto, and in other embodiments of the present invention, the raw materials for preparing the first electrode may be other materials, such as titanium hydride and nitrogen gas, and are not listed here.
Step S103: and forming a capacitance dielectric layer on the surface of the first electrode.
Specifically, as shown in fig. 4, in this step, the capacitor dielectric layer 30 is formed on the surface of the first electrode 20.
Further, in the embodiment, the material of the capacitor dielectric layer is an oxide. It should be noted that the material of the capacitor dielectric layer is an oxide, which is merely an example of the material of the capacitor dielectric layer in this embodiment, and is not limited thereto, and in other embodiments of the present invention, the capacitor dielectric layer may be another material or a combination of multiple materials, such as silicon nitride, boron nitride, and the like, which are not listed here.
Preferably, in this embodiment, the material of the capacitor dielectric layer is zirconium dioxide. Because the zirconium dioxide has higher dielectric constant and good insulation, the capacitance value can be larger by using the zirconium dioxide as the capacitor dielectric layer. In addition, the chemical property of the zirconium dioxide is stable, so that the stability of the capacitor assembly can be effectively improved.
Step S104: and forming a second electrode on the surface of the capacitance dielectric layer.
Specifically, in this step, the second electrode includes a blocking layer formed on a surface of the capacitor dielectric layer and a thickening layer formed on a surface of the blocking layer, and the blocking layer is used for blocking a raw material forming the thickening layer from contacting the capacitor dielectric layer. The specific preparation steps are shown in fig. 5 and comprise:
step S301: and forming a barrier layer on the surface of the capacitance dielectric layer.
Specifically, as shown in fig. 6, the barrier layer 41 is formed on the surface of the capacitor dielectric layer 30.
Further, in this embodiment, the barrier layer is a metal nitride formed by a chemical vapor deposition method using nitrogen plasma and a metal organic compound as raw materials. The chemical property of nitrogen is stable, so that the capacitor dielectric layer can be prevented from being damaged by the material for forming the barrier layer; in addition, the metal nitride film formed by the nitrogen plasma and the metal organic compound is compact, so that the raw material for forming a thickening layer can be effectively prevented from contacting with the capacitor dielectric layer, the dielectric constant of the capacitor dielectric layer is prevented from being reduced, and the leakage current of the capacitor assembly is further reduced. It is to be understood that the material of the barrier layer is a metal nitride, which is merely a specific example in this embodiment, and is not limited thereto, and in other embodiments of the present invention, the barrier layer may be made of other materials, such as polysilicon, and is not illustrated here.
Preferably, in this embodiment, the material of the barrier layer is titanium nitride, and the materials forming the barrier layer are nitrogen plasma and tetrakis (dimethylamino) titanium TDMAT. Specifically, in the present embodiment, the reaction temperature of the nitrogen plasma and the tetrakis (dimethylamino) titanium is 360 to 500 ℃, and the pressure is 133 to 266 Pa. The reaction temperature is set to be 360-500 ℃, the pressure is set to be 133-266 Pa, the deposition rate of the titanium nitride in the barrier layer can be effectively improved, and the microhardness of the titanium nitride is improved. In addition, at the reaction temperature of 360-500 ℃, the titanium tetra (dimethylamino) can be pyrolyzed to generate free dimethylamino in the titanium nitride film, so that the resistivity of the barrier layer can be effectively reduced. It is understood that the material of the barrier layer is titanium nitride, the material forming the barrier layer is nitrogen plasma and TDMAT, which are only a specific example and are not limiting in the present embodiment, and in other embodiments of the present invention, the material of the barrier layer may be other materials and materials, such as zirconium nitride prepared from nitrogen plasma and organic zirconium compound, which are not listed herein.
Step S302: and forming a thickening layer on the surface of the barrier layer.
Specifically, as shown in fig. 7, a thickening layer 42 is formed on the surface of the barrier layer 41, and the barrier layer 41 and the thickening layer 42 together constitute the second electrode 40.
Further, in this embodiment, the thickening layer is a metal nitride formed by depositing on the surface of the barrier layer by a chemical vapor deposition method using a metal inorganic compound and ammonia gas as raw materials. Because the cost of the metal inorganic compound and the ammonia gas is low, the condition for forming the metal nitride by reaction is simple, and the cost for preparing the capacitor component can be effectively reduced. It should be understood that the material of the thickening layer is metal nitride, which is only a specific example in this embodiment, and is not limiting, and in other embodiments of the present invention, the thickening layer may be other materials, such as polysilicon, and is not listed here.
Preferably, in this embodiment, the material of the thickening layer is the same as that of the barrier layer, the material of the thickening layer is titanium nitride, and the raw materials for forming the thickening layer are ammonia gas and titanium tetrachloride. The thickening layer and the blocking layer are made of the same material, so that the same conductivity of each layer in the second electrode can be ensured, and the electrical property of the capacitor assembly is improved. It is understood that the material of the thickening layer is titanium nitride, and the raw materials for forming the thickening layer are ammonia and titanium tetrachloride, which are only a specific example in this embodiment, and are not limiting, and in other embodiments of the present invention, the barrier layer may be other materials and raw materials, such as zirconium nitride prepared from nitrogen plasma and organic compounds of zirconium, which are not listed here.
Preferably, in the present embodiment, the thickness of the barrier layer is 1 nm to 3 nm; the thickness of the thickening layer is 2 to 4 nanometers.
Compared with the prior art, the method for manufacturing the capacitor assembly provided by the first embodiment of the invention divides the manufacturing process of the second electrode into two steps of manufacturing the blocking layer and manufacturing the thickening layer, the blocking layer formed on the surface of the capacitor dielectric layer can be used for blocking the raw material for forming the thickening layer from contacting with the capacitor dielectric layer, so that the capacitor dielectric layer is prevented from being damaged due to the contact of the raw material for forming the thickening layer with the capacitor dielectric layer when the thickening layer is manufactured subsequently, the capacitor dielectric layer is effectively protected, the dielectric constant of the capacitor dielectric layer is prevented from being reduced, and the leakage current of the capacitor assembly is effectively reduced.
A second embodiment of the present invention relates to a method of manufacturing a capacitor assembly. The second embodiment is substantially the same as the first embodiment, and as shown in fig. 8, includes the following specific steps:
comprises the following steps:
step S401: a substrate is provided.
Step S402: a first electrode is formed on the surface of the substrate.
Step S403: and forming a capacitance dielectric layer on the surface of the first electrode.
Step S404: and forming a second electrode on the surface of the capacitance dielectric layer.
It can be understood that, since steps S401 to S404 are substantially the same as steps S101 to S104 in the first embodiment, specific details may refer to the description in the first embodiment, and are not repeated herein.
Step S405: and forming a filling layer on the surface of the second electrode.
Specifically, as shown in fig. 9, the filling layer 60 is disposed in the gaps formed between different portions of the second electrode 50 and completely fills the gaps.
In this embodiment, the filling layer is made of silicon germanium. It should be understood that the filling layer is made of silicon germanium, which is only a specific example in this embodiment, and is not limited thereto, and in other embodiments of the present invention, the filling layer may be made of other materials, such as polysilicon, monocrystalline silicon, etc., which are not illustrated herein, and may be flexibly set according to actual needs.
Compared with the prior art, the second embodiment of the invention has the advantages that the filling layer is arranged on the surface of the second electrode to fill the gaps between different parts of the second electrode while keeping all the technical effects of the first embodiment, so that the mechanical strength of the capacitor assembly can be effectively improved.
The steps of the above methods are divided for clarity, and it is within the scope of the present patent to combine the steps into one step or to split some steps into multiple steps when implementing the methods, as long as the same logical relationship is included.
A third embodiment of the present invention relates to a capacitor device, which is formed by any one of the capacitor device manufacturing methods according to the embodiments of the present invention, as shown in fig. 10, and includes a substrate 101, a first electrode 102 disposed on a surface of the substrate 101, a capacitor dielectric layer 103 disposed on a surface of the first electrode 102, and a second electrode 104 disposed on a surface of the capacitor dielectric layer 103, wherein the second electrode 104 includes a blocking layer 1041 and a thickening layer 1042.
Compared with the prior art, in the capacitor assembly provided by the third embodiment of the present invention, since the barrier layer 1041 is disposed to protect the capacitor dielectric layer 103, the capacitor dielectric layer 103 is less damaged, and the leakage current of the capacitor assembly is correspondingly reduced.
A fourth embodiment of the present invention relates to a memory. Including a capacitive assembly as provided in any of the embodiments of the invention.
Compared with the prior art, the memory provided by the fourth embodiment of the invention comprises the capacitor assembly provided by any embodiment of the invention, so that the leakage current of the capacitor assembly is smaller, and the reliability of data stored in the memory is higher.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.
Claims (8)
1. A method of making a capacitor assembly, comprising:
providing a substrate;
forming a first electrode on the surface of the substrate;
forming a capacitance medium layer on the surface of the first electrode;
forming a second electrode on the surface of the capacitance dielectric layer;
the second electrode comprises a blocking layer formed on the surface of the capacitance medium layer and a thickening layer formed on the surface of the blocking layer, and the blocking layer is used for blocking a raw material for forming the thickening layer from contacting with the capacitance medium layer;
the method of forming the second electrode includes: depositing and forming metal nitride on the surface of the capacitance dielectric layer by taking nitrogen plasma and a metal organic compound as raw materials to serve as the barrier layer; the method of forming the thickening layer includes: and depositing metal nitride on the surface of the barrier layer by taking a metal inorganic compound and ammonia gas as raw materials to form the thickening layer.
2. The method of claim 1, wherein the barrier layer and the thickening layer are made of the same material.
3. The method of claim 1, further comprising forming a filling layer on the surface of the second electrode, wherein the filling layer is used to fill gaps formed between different portions of the second electrode.
4. The method of claim 3, wherein the fill layer is a silicon germanium material.
5. The method of claim 1, wherein the capacitor dielectric layer is made of an oxide.
6. The method of claim 1, wherein the barrier layer has a thickness of 1 nm to 3 nm;
the thickness of the thickening layer is 2 to 4 nanometers.
7. A capacitor assembly formed by the method of any one of claims 1 to 6.
8. A memory comprising the capacitive component of claim 7.
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