CN112164721A - SGT MOSFET device with bidirectional ESD protection capability - Google Patents
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- CN112164721A CN112164721A CN202011197260.4A CN202011197260A CN112164721A CN 112164721 A CN112164721 A CN 112164721A CN 202011197260 A CN202011197260 A CN 202011197260A CN 112164721 A CN112164721 A CN 112164721A
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- 230000002457 bidirectional effect Effects 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 abstract description 17
- 229920005591 polysilicon Polymers 0.000 abstract description 17
- 238000000034 method Methods 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 5
- 238000011161 development Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- ASQGEHNNQJZKAU-UHFFFAOYSA-N NPNPNPNPN Chemical compound NPNPNPNPN ASQGEHNNQJZKAU-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000012938 design process Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000001727 in vivo Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
- H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses an SGT MOSFET device with bidirectional ESD protection capability, which comprises a cell structure, wherein the cell structure comprises drain metal, an N + substrate, an N-type drift region and source metal which are sequentially stacked from bottom to top; a groove grid structure is formed on one side of the upper surface of the N-type drift region, and the groove grid structure comprises an N + Poly grid, a P-type lightly doped first region, an N-type lightly doped region, a P-type lightly doped second region and an N-type source contact region which are sequentially arranged from top to bottom. The invention realizes the simultaneous improvement of the switching performance and the ESD protection performance of a power MOS device on the basis of the traditional SGT MOSFET structure and the longitudinal MOSFET structure with multi-doped polysilicon.
Description
Technical Field
The invention relates to the technical field of power semiconductor devices, in particular to an SGT MOSFET device with bidirectional ESD protection capability.
Background
In the development of power devices, power MOSFETs have been playing a very important role. The power MOSFET is developed from a transverse direction to a longitudinal direction and from a planar gate to a trench gate, wherein the voltage resistance level, reliability, manufacturing process and other aspects of the longitudinal MOSFET are superior to those of the transverse MOSFET, the trench gate changes a channel from a horizontal direction to a vertical direction, the influence of parasitic JFET resistance of a planar structure is thoroughly eliminated, the cell size is greatly reduced while the on-resistance is reduced, the defect of the planar gate MOSFET is greatly eliminated, and the longitudinal MOSFET of the trench becomes the main development direction of the power MOSFET.
The low-voltage trench vertical MOSFET device is generally used as a voltage-driven high-frequency switch in the aspects of motor driving, synchronous rectification and the like, the working mode of the low-voltage trench vertical MOSFET device is different from the working condition of a general circuit, the device not only prevents a gate oxide layer from being broken down due to static electricity, but also prevents overvoltage generated by an application system from being applied to a grid electrode of a power MOSFET to cause damage of the power device. Therefore, in addition to considering the avalanche resistance of the device, the device design of the power MOSFET needs to improve the ESD (Electro-Static Discharge) protection capability of the power MOSFET; meanwhile, because the application of the power MOSFET in a high-frequency circuit needs better switching characteristics, the gate capacitance of the device needs to be further paid attention in the design process, and the gate capacitance of the device is reduced as much as possible to improve the switching speed of the device.
In the development of optimizing the switching characteristics of the power MOSFET, a shielded Gate Trench MOSFET (SGT MOSFET) utilizes a shielded Gate to reduce the overlapping area between the grid and the drain so as to greatly reduce the grid-drain capacitance of the device; meanwhile, the shielding grid can be used as an in-vivo field plate buried in a body to perform auxiliary depletion on current carriers in the drift region, so that the depletion capability of the drift region of the device is effectively improved, and the electric field distribution of the drift region is optimized, so that the SGT MOSFET is ensured to have higher doping concentration of the drift region and thinner thickness of the drift region on the premise of the same breakdown voltage, and lower specific on-resistance is realized. SGT MOSFETs have therefore become a major development in optimizing the characteristics of power MOS switches, with the device structure shown in fig. 1. The ESD protection for power MOSFETs has two aspects: on one hand, the improvement of external factors, namely the improvement of the production, the operation, the storage environment and the specification of devices and circuits; on the other hand, the method aims at the internal design of the device, namely, the performance of the one-sided ESD protection circuit is improved, and the method is also a main means for improving the ESD resistance of the IC at present. The method for designing the ESD resistance by utilizing the multi-finger NMOSFET is an important method for improving the ESD resistance of the current CMOS integrated circuit, but the method mainly aims at a transverse MOS device, and the device designed by the method has large occupied area and poor process operability and controllability.
Disclosure of Invention
The invention aims to provide an SGT MOSFET device with bidirectional ESD protection capability, which realizes the simultaneous improvement of the switching performance and the ESD protection performance of a power MOS device on the basis of the traditional SGT MOSFET structure and a polysilicon multi-doped longitudinal MOSFET structure.
In order to realize the purpose, the following technical scheme is adopted:
an SGT MOSFET device with bidirectional ESD protection capability comprises a cell structure, wherein the cell structure comprises drain metal, an N + substrate, an N-type drift region and source metal which are sequentially stacked from bottom to top; a groove grid structure is formed on one side of the upper surface of the N-type drift region, and the groove grid structure comprises an N + Poly grid, a P-type lightly doped first region, an N-type lightly doped region, a P-type lightly doped second region and an N-type source contact region which are sequentially arranged from top to bottom; a P-type base region adjacent to the trench gate structure is arranged on the other side of the upper surface of the N-type drift region; the upper surface of the P-type base region is provided with an N-type heavily doped region and a P-type heavily doped region which are mutually contacted, and the N-type heavily doped region is arranged close to the trench gate structure; and the lower surface, the side surface and the upper surface of the trench gate structure are respectively provided with an oxide layer for isolating the N-type drift region, the P-type base region, the N-type heavily doped region and the source metal.
Preferably, the oxide layer between the side surfaces of the P-type lightly doped first region, the N-type lightly doped region, the P-type lightly doped second region and the N-type source contact region and the N-type drift region is a thick oxide layer, and the oxide layer on the side surface of the N + Poly gate is a thin oxide layer.
Preferably, the N-type source contact region is connected with the source metal.
According to the invention, the N + Poly gate, the P type lightly doped first region, the N type lightly doped region, the P type lightly doped second region and the N type source contact region jointly form a symmetrical NPNPN structure in the groove, so that the influence between the shielding gate and the drain is improved, the gate-drain capacitance of the device is further reduced, the switching characteristic of the device is improved, and meanwhile, the ESD protection capability of the device is enhanced by using the symmetrical polysilicon diode structure.
Compared with the traditional shielded gate trench MOSFET, the method effectively reduces the deposition times of the oxide layer in the trench gate, simplifies the layout design steps of the device and improves the design efficiency.
By adopting the scheme, the invention has the beneficial effects that:
the invention provides an SGT MOSFET device structure with bidirectional ESD protection capability on the basis of the traditional SGT MOSFET structure and a polysilicon multi-doped MOSFET structure, and the structure is characterized in that a symmetrical NPNPN structure formed in a groove is utilized: on one hand, the overlapping between the grid electrode and the drain electrode is reduced, so that the grid leakage capacitance is reduced, and the faster switching speed and the smaller switching loss are realized; on the other hand, a longitudinally symmetrical polysilicon diode structure formed in the groove can bear the voltage applied on the oxide layer and provide a new ESD current discharge channel, thereby effectively reducing the damage of ESD on the device and improving the ESD resistance of the device.
Drawings
FIG. 1 is a schematic diagram of a prior art shielded gate trench MOSFET device in a lateral cross-sectional configuration;
FIG. 2 is a schematic cross-sectional view of the present invention;
wherein the figures identify the description:
1-N type heavily doped region, 2-P type heavily doped region,
3-P type base region, 4-N type drift region,
5-N + substrate, 6-drain metal,
7-source metal, 8-N + Poly gate,
9-a P-type lightly doped region, 10-an N-type lightly doped region,
11-a P-type lightly doped region, 12-an N-type source contact region,
13-oxide layer.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
In order to realize the simultaneous improvement of the switching performance and the ESD protection performance, the invention provides an SGT MOSFET device with bidirectional ESD protection capability based on the conventional SGT MOSFET structure and the polysilicon multi-doped MOSFET structure, as shown in fig. 2. The main improvement of the structure is that: the grid electrode-dielectric layer-shielding grid structure in the groove is changed into a symmetrical structure with multiple longitudinal polysilicon doping, namely an NPNPN polysilicon multiple doping structure is formed in the groove, and the polysilicon diode formed by the longitudinal symmetrical structure realizes bidirectional ESD protection of the device.
The technical scheme of the invention is described in detail in the following with the accompanying drawings:
referring to fig. 2, the SGT MOSFET device with bidirectional ESD protection capability according to the present invention includes a cell structure, where the cell structure includes a drain metal 6, an N + substrate 5, an N-type drift region 4, and a source metal 7, which are sequentially stacked from bottom to top; a trench gate structure is formed on one side of the upper surface of the N-type drift region 4, and the trench gate structure comprises an N + Poly gate 8, a P-type lightly doped first region 9, an N-type lightly doped region 10, a P-type lightly doped second region 11 and an N-type source contact region 12 which are sequentially arranged from top to bottom; the other side of the upper surface of the N-type drift region 4 is provided with a P-type base region 3 adjacent to the trench gate structure; the upper surface of the P-type base region 3 is provided with an N-type heavily doped region 1 and a P-type heavily doped region 2 which are mutually contacted, the N-type heavily doped region 1 is arranged next to the trench gate structure, and the upper surfaces of the N-type heavily doped region 1 and the P-type heavily doped region 2 are contacted with a source metal 7; and the lower surface, the side surface and the upper surface of the trench gate structure are respectively provided with an oxide layer 13 for isolating the N-type drift region 4, the P-type base region 3, the N-type heavily doped region 1 and the source metal 7.
The oxide layer 13 between the side surfaces of the P-type lightly doped first region 9, the N-type lightly doped region 10, the P-type lightly doped second region 11 and the N-type source contact region 12 and the N-type drift region 4 is a thick oxide layer, and the oxide layer 13 on the side surface of the N + Poly gate is a thin oxide layer. The N-type source contact region 12 is connected to the source metal 7.
The invention provides a method for forming a polysilicon PN junction by applying different doping types to a polysilicon gate on the basis of the design idea of a multi-finger NMOSFET structure on the basis of the traditional longitudinal MOSFET. When ESD occurs, the voltage applied to the oxide layer 13 is borne by the polysilicon diode, and dielectric breakdown of the oxide layer 13 of the device is avoided; meanwhile, large current generated by the device can be released through a diode formed by the introduced PN junction, so that overcurrent melting or secondary breakdown of the device is avoided, and the damage of ESD to the longitudinal power MOS device is effectively prevented.
The principle of the invention is as follows: based on a traditional SGT MOSFET structure and a polysilicon multi-doped longitudinal MOSFET structure, a longitudinally symmetrical polysilicon multi-doped NPNPN structure is arranged in the groove to further optimize the switching characteristics and the ESD resistance of the device, wherein an N-type heavily doped region in the NPNPN structure is led out as a poly gate, and a lowermost N-type source contact region 12 is connected with a source. Compared with the traditional SGT MOSFET, the SGT MOSFET device with the bidirectional ESD protection capability has the advantages that the shielding effect between the grid electrode and the drain electrode is enhanced, the grid-drain capacitance of the device is greatly reduced, and meanwhile, the source-drain capacitance of the new structure is far smaller than that of the traditional SGT MOSFET device due to the fact that the groove grid NPNPNPNPN multiple diodes are connected in series to form smaller structure capacitance, so that the switching speed and the switching loss of the device are effectively improved. Meanwhile, the longitudinal symmetric polysilicon diode structure realized by the NPNPN structure in the groove gate can bear large voltage applied on the oxide layer 13, so that dielectric breakdown of the oxide layer 13 of the SGT MOSFET is avoided, a new channel can be provided to lead out large current in the device, so that overcurrent melting or secondary breakdown of the device is avoided, loss caused by ESD is effectively prevented, the device is prevented from failure, and the ESD protection capability of the device is greatly enhanced; meanwhile, the NPNPN structure which is longitudinally symmetrical is arranged inside the groove gate, so that bidirectional ESD protection can be effectively carried out on the device, and the reliability of the device is further enhanced.
In summary, on the basis of the conventional shielded gate trench MOSFET structure and the polysilicon heavily-doped vertical MOSFET structure, the SGT MOSFET device with bidirectional ESD protection capability, which is realized by arranging the vertically symmetric polysilicon heavily-doped NPNPN structure in the trench, can improve the ESD protection capability of the device and enhance the reliability of the device while further optimizing the gate-drain capacitance of the device and realizing faster switching speed and lower switching loss.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions and improvements made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. An SGT MOSFET device with bidirectional ESD protection capability comprises a cell structure, and is characterized in that the cell structure comprises drain metal, an N + substrate, an N-type drift region and source metal which are sequentially stacked from bottom to top; a groove grid structure is formed on one side of the upper surface of the N-type drift region, and the groove grid structure comprises an N + Poly grid, a P-type lightly doped first region, an N-type lightly doped region, a P-type lightly doped second region and an N-type source contact region which are sequentially arranged from top to bottom; a P-type base region adjacent to the trench gate structure is arranged on the other side of the upper surface of the N-type drift region; the upper surface of the P-type base region is provided with an N-type heavily doped region and a P-type heavily doped region which are mutually contacted, and the N-type heavily doped region is arranged close to the trench gate structure; and the lower surface, the side surface and the upper surface of the trench gate structure are respectively provided with an oxide layer for isolating the N-type drift region, the P-type base region, the N-type heavily doped region and the source metal.
2. The SGT MOSFET device with bidirectional ESD protection capability of claim 1, wherein the oxide layer between the side of the P-type lightly doped first region, the N-type lightly doped region, the P-type lightly doped second region, the N-type source contact region and the N-type drift region is a thick oxide layer, and the oxide layer on the side of the N + Poly gate is a thin oxide layer.
3. An SGT MOSFET device with bidirectional ESD protection capability as recited in claim 1 wherein said N-type source contact region is connected to the source metal.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011197260.4A CN112164721A (en) | 2020-10-30 | 2020-10-30 | SGT MOSFET device with bidirectional ESD protection capability |
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| CN202011197260.4A CN112164721A (en) | 2020-10-30 | 2020-10-30 | SGT MOSFET device with bidirectional ESD protection capability |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116314341A (en) * | 2023-05-25 | 2023-06-23 | 江苏应能微电子股份有限公司 | SGT device with built-in ESD protection diode and manufacturing method thereof |
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- 2020-10-30 CN CN202011197260.4A patent/CN112164721A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116314341A (en) * | 2023-05-25 | 2023-06-23 | 江苏应能微电子股份有限公司 | SGT device with built-in ESD protection diode and manufacturing method thereof |
| CN116314341B (en) * | 2023-05-25 | 2023-08-08 | 江苏应能微电子股份有限公司 | SGT device with built-in ESD protection diode and manufacturing method thereof |
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