CN112152501A - Current source type converter direct current balancing method and system for comprehensive energy - Google Patents

Current source type converter direct current balancing method and system for comprehensive energy Download PDF

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Publication number
CN112152501A
CN112152501A CN202010812823.XA CN202010812823A CN112152501A CN 112152501 A CN112152501 A CN 112152501A CN 202010812823 A CN202010812823 A CN 202010812823A CN 112152501 A CN112152501 A CN 112152501A
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current
current source
direct current
source type
type converter
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Inventor
王瑞琪
张爱群
郭光华
路军
卞峰
范云鹏
张海静
牛蔚然
鞠文杰
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State Grid Shandong Integrated Energy Service Co ltd
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State Grid Shandong Integrated Energy Service Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/81—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal arranged for operation in parallel
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/12—Arrangements for reducing harmonics from ac input or output
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/797—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00—Circuit arrangements for ac mains or ac distribution networks
    • H02J3/36—Arrangements for transfer of electric power between ac networks via a high-tension dc link
    • H02J2003/365—Reducing harmonics or oscillations in HVDC
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00—Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/10—Power transmission or distribution systems management focussing at grid-level, e.g. load flow analysis, node profile computation, meshed network optimisation, active network management or spinning reserve management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y02E60/60—Arrangements for transfer of electric power between AC networks or generators via a high voltage DC link [HVCD]

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Rectifiers (AREA)

Abstract

The invention provides a method and a system for balancing direct current of a current source type converter facing comprehensive energy, belonging to the technical field of operation control of an electric power system, wherein the method comprises the following steps: acquiring operation parameter data of a power conversion system of a back-to-back current source type converter; according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control; the present disclosure enables joint balanced control of positive and negative dc current, enabling good control of ac line current quality to be maintained at low switching frequencies (typically at several hundred hertz).

Description

Current source type converter direct current balancing method and system for comprehensive energy
Technical Field
The disclosure relates to the technical field of power system operation control, in particular to a method and a system for balancing direct current of a current source type converter facing comprehensive energy.
Background
The statements in this section merely provide background information related to the present disclosure and may not necessarily constitute prior art.
The Current Source Converter (CSC) has a simple structure, a good short-circuit Current rejection, and a natural bidirectional power flow capability, and is widely used in high-power applications such as medium-voltage power driving, high-voltage direct-Current power transmission, renewable energy grid connection, and superconducting energy storage. In these applications, the switching frequency of CSCs is typically below 1khz to reduce the switching losses of high power converters.
The inventors of the present disclosure found that there are two Modulation methods for the high power PWM CSC in general, namely, a Space Vector Modulation (SVM) and a Selective Harmonic Elimination (SHE) method to obtain a sine wave current. However, when the switching frequency is low, especially for high power converters, the application of SVM to CSC generates harmonic distortion. Furthermore, in high power CSC applications, the SVM may inverse amplify the parallel resonance of the filter as the SVM sampling/switching frequency approaches the natural resonant frequency of the output CL filter. SHE is considered a better choice for high power applications due to the superior performance resulting in reduced output current harmonics. However, the dynamic response of the standard SHE modulation method is slow, and in order to solve this limitation, a bypass band injection method capable of adjusting the modulation index is proposed, but the bypass band width and the independent angular position are calculated on an off-line basis.
On the other hand, CSC parallel operation has received increasing attention in recent years due to the ever increasing demand for power conversion ratings and the flexibility provided by the coordinated control of the parallel converters. To avoid overload problems of individual converters, achieving proper dc rail current balancing is an important task of parallel converters. In previous studies, dc current balance SVM methods typically operate at several kilohertz. For high power applications requiring low switching frequencies of several hundred hertz, a backup board with in-line tuned non-fixed switching modes for dc current balancing may cause non-trivial CL filter resonances, which in turn, the dc rail current ripple is amplified.
Disclosure of Invention
In order to overcome the defects of the prior art, the present disclosure provides a method and a system for balancing the dc current of a comprehensive energy-oriented current source converter, which achieve the combined balance control of the positive dc current and the negative dc current, and can achieve the good control of the current quality of the ac line at a low switching frequency (usually several hundred hertz).
In order to achieve the purpose, the following technical scheme is adopted in the disclosure:
the first aspect of the disclosure provides a current source type converter direct current balancing method for comprehensive energy.
A current source type converter direct current balancing method for comprehensive energy comprises the following steps:
acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
The second aspect of the disclosure provides a current source type converter direct current balance system facing comprehensive energy.
A current source type converter direct current balance system facing comprehensive energy comprises:
a data acquisition module configured to: acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
a balance control module configured to: and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
A third aspect of the present disclosure provides a medium having stored thereon a program that, when executed by a processor, implements the steps in the integrated energy-oriented current source converter dc current balancing method according to the first aspect of the present disclosure.
A fourth aspect of the present disclosure provides an electronic device, including a memory, a processor, and a program stored in the memory and executable on the processor, where the processor executes the program to implement the steps in the method for balancing dc current of an integrated energy-oriented current source converter according to the first aspect of the present disclosure.
Compared with the prior art, the beneficial effect of this disclosure is:
1. according to the method, the system and the medium, the independent delay angle is set for each current source type converter to carry out positive current balance control, the bypass belt is injected in the selective harmonic elimination control mode to carry out negative current balance control, good control on the current quality of the alternating current line can be kept under low switching frequency (usually hundreds of hertz), and the method, the system and the medium have wide engineering application prospects.
2. The method, the system and the medium can simultaneously realize reasonable balance of direct current rail current of the current source type converter under the condition of good alternating current quality.
3. The method, the system and the medium can be applied to a high-power current source conversion system using a high-power parallel module, and have wide engineering application prospect.
4. The methods, systems, and media of the present disclosure achieve direct current balance and preserve current quality in both transient and steady states.
Drawings
The accompanying drawings, which are included to provide a further understanding of the disclosure, illustrate embodiments of the disclosure and together with the description serve to explain the disclosure and are not to limit the disclosure.
Fig. 1 is a schematic diagram of a typical back-to-back CSC power conversion system provided in embodiment 1 of the present disclosure.
Fig. 2 is a schematic diagram of a parallel CSR (Current Source rectifier) system provided in embodiment 1 of the present disclosure.
Fig. 3 is a schematic diagram of threshold voltage and PWM current modes of the quasi-SHE mode according to embodiment 1 of the present disclosure.
Fig. 4 shows the positive rail dc terminal voltage of a CSR provided in embodiment 1 of the present disclosure.
Fig. 5 is a schematic diagram of parallel CSR control provided in embodiment 1 of the present disclosure.
Detailed Description
The present disclosure is further described with reference to the following drawings and examples.
It should be noted that the following detailed description is exemplary and is intended to provide further explanation of the disclosure. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments according to the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, and it should be understood that when the terms "comprises" and/or "comprising" are used in this specification, they specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof, unless the context clearly indicates otherwise.
The embodiments and features of the embodiments in the present disclosure may be combined with each other without conflict.
Example 1:
the embodiment 1 of the present disclosure provides a current source converter dc current balancing method for comprehensive energy, including the following steps:
acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
In this embodiment, each CSC adopts an improved SHE modulation method, and realizes dc positive rail current (forward current) balance by adjusting a reference current angle of each converter;
this approach may cause a negative rail current (negative current) imbalance, and to address this problem, the present embodiment takes the traditional SHE switching mode by catching the negative rail current balancing error and injecting a narrow bypass band.
In the control, the influence of the narrow band on the harmonic component of the output current characteristic is small, so that the line current harmonic distortion can be still reduced, the good balance control of the positive current and the negative current is realized through the coordination regulation of the reference current angle and the injection of the bypass band, and the method has wide engineering application prospect.
Specifically, a typical back-to-back CSC power conversion system is shown in fig. 1, and is composed of a three-phase grid, a load, a parallel Current Source Rectifier (CSR) and an inverter (CSI), which are connected to each other through differential and common mode dc chokes, and the neutral points of ac filter capacitors on both sides are grounded; for such a parallel CSC system, the inverter and the rectifier have the same structure; furthermore, dc current balancing can also be achieved in a similar manner on both sides.
When the output voltage size is changed by considering the delay angle and the bypass bandwidth, the angles of the grid voltage and the SHE pulse are preset, and the gating signals of each switch of the CSR are completely the same and only have phase differences.
In this embodiment, the pulse in the conventional SHE mode is adopted, and the constraints to be satisfied are:
1) the waveform must be half-wave and quarter-wave symmetric;
2) on both sides of the pi/6 and 5 pi/6 positions, the pulse pattern must be anti-mirror image;
3) the center of each half cycle, pi/3, does not allow PWM.
Based on the above considerations, only the parallel CSR will be described in detail.
A detailed circuit diagram of a parallel CSR system is shown in fig. 2. For each CSR bridge, it has six switches, S11,S16Is a switch of the first CSR; s21,S26Is a switch of the second CSR.
Parallel CSR bridge integrated grid-on-CL filter LfFilter inductance and CfFilter capacitor, the main grid phase voltage is described as usa、usb、usc(ii) a Is connected to a DC reactance L at a DC network CSR11And L2CSR2 is connected to a DC reactance L3And L4；R1To R4Is the resistance inside these reactances; u. ofp_c1、un_c1、up_c2And un_c2Represents the dc terminal voltage to ground of the two CSRs; the dc voltage may be determined entirely by the switch state.
For example, S of CSR111And S12On neglecting a small voltage drop of the alternating current reactance Lf, up_c1Is equal to usaAnd u isn_c1And uscThe same is true. i.e. ip_c1、in_c1、ip_c2And in_c2Is a dc link current and the parallel CSR in fig. 2 is connected to a load R.
For the 11 pulse SHE waveform in fig. 3, the injection bypass band may be at the beginning or end of any pulse. However, since these small width bypass bands have little effect on the harmonic spectrum of the SHE, each of which can positively affect the distribution of the dc-side differential voltage, the bypass band injection can be used for dc current balancing.
This embodiment selects the bypass band position at the start position of the fourth pulse as an example, as shown in fig. 3. In this case, the dc terminal differential voltage is adjusted by adjusting the width of the bypass band in an on-line manner.
The process of obtaining the dc voltage of a single CSR is shown in fig. 4. First, as shown in (a) of the simplified circuit diagram 4, the grid voltage is usa、usb、usc(ii) a The delay angle between the gate voltage and the control signal is α, and for this circuit, as shown in fig. 4 (b), the positive rail dc voltage upConsisting of three parts in the basic cycle, each of which is multiplied by the instantaneous phase voltage by the corresponding phase gating signal. The contribution of each phase switch to the DC terminal voltage is shown in FIG. 4 (c), the average positive rail DC terminal voltage u of this CSRp_aveComprises the following steps:
Figure BDA0002631644850000071
considering usa、usb、uscAnd G1、G3、G5Exactly the same but ideally with a phase shift of 120 degrees, so that the a-phase switching signal can be simply used as:
Figure BDA0002631644850000072
Umfor peak values of the mains phase voltage, UmAnd angle (theta)1,θ2…θ5) Is predetermined, therefore up_aveIs determined according to the delay angle alpha and the bypass belt width beta0The changes are varied.
The four terminal voltage of the dual CSR system dc of fig. 2 can then be obtained by a similar procedure:
Figure BDA0002631644850000073
Figure BDA0002631644850000074
Figure BDA0002631644850000075
Figure BDA0002631644850000076
wherein u isn_ave_c1、un_ave_c2、up_ave_c1、up_ave_c2Average positive and negative dc terminal voltages of CSR1 and CSR2, respectively; alpha is alphac1And alphac2Retardation angle, β, of CSR1 and CSR2, respectively0_c1And beta0_c2The widths of the bypass tapes of CSR1 and CSR2, respectively.
The system has four independent control variables alphac1、αc2、β0_c1And beta0_c2Each of which directly affects the dc terminal voltage that can be used to regulate the dc current.
Because the system also has four direct current track currents to be controlled, the four free variables can be dynamically adjusted, and the direct current balance of the upper track and the lower track can be realized at the same time. Furthermore, in dc rail current balance control, the ac line current can still be highly sinusoidal with limited bypass bandwidth.
Control system as shown in fig. 5, the upper part of fig. 5 shows the power supply circuit of the system, wherein two CSRs with the same power rating share ac and dc rails and the three-phase voltage is usa、usbAnd usc；ip_c1、in_c1、ip_c2And in_c2All are direct rail currents.
The control system is shown in the lower half of fig. 5. First, the three-phase grid voltage angle is obtained by a phase-locked loop (PLL), e.g. θg(ii) a Regulating the forward DC rail current i by regulating the delay angle of the corresponding reference line currentp_c1And ip_c2：
αc1＝(kp+ki/s)·(idc_pc1-0.5·idc_ref) (7)
αc2＝(kp+ki/s)·(idc_pc2-0.5·idc_ref) (8)
Wherein alpha isc1And alphac2CSR1 and CSR2, respectively, are at an angle θ relative to the three-phase grid voltagegThe delay angle of (d). The range of delay angles should be limited and adjusted within certain limits to ensure positive and negative variation to ensure proper stability of the system. Thus, two saturation blocks are added in the path of the delay angle modulator. k is a radical ofpAnd kiIs the proportional gain and integral gain, i, of the PI controllerdc_pc1And idc_pc2Is at a cut-off frequency omegacPositive rail dc current measured after lower Low Pass Filter (LPF):
idc_pc1＝ip_c1·ωc/(s+ωc) (9)
idc_pc2＝ip_c2·ωc/(s+ωc) (10)
since the delay angle control described above can only balance the positive rail dc current, additional regulation of the negative rail dc current is required.
The injection of the bypass band can be used to control the differential voltage of the negative rail, and the dwell time of the bypass band is adjusted according to the negative dc rail current difference, as follows:
β0＝(kp_0+ki_0/s)·(idc_nc1-idc_nc2) (11)
Figure BDA0002631644850000081
Figure BDA0002631644850000082
in the formula idc_nc1And idc_nc2Is a system negative rail direct current, k, measured after low pass filteringp_0And ki_0Proportional gain and integral gain of PI controller, respectively, with bypass bandwidth controlAdvantageously, to avoid excessive low-order output current harmonic components (e.g. at 5 and 7 th orders) caused by the bypass band, β is further regulated in the control map by a saturation block0。
In order to improve the balance performance of the direct currents of the parallel CSCs and maintain good control over the quality of the alternating current, the embodiment provides a current source converter direct current balance method based on quasi-SHE modulation, wherein positive rail current balance is realized by controlling independent delay angles of the CSCs, and negative rail current balance is realized by injecting a narrow bypass band in a traditional SHE mode; through detailed analysis, the injection of the narrow-band bypass gating is verified to have no obvious influence on the harmonic performance of the CSC line current; the method can realize the current balance of the positive and negative direct current rails under various conditions.
The embodiment is suitable for the CSC working under low switching frequency, so the modulation method can be applied to a high-power current source conversion system using high-power parallel modules, has wide engineering application prospect, can be widely applied to power system operation control occasions, and has wide engineering application prospect.
Example 2:
the embodiment 2 of the present disclosure provides a current source converter dc current balance system for comprehensive energy, including:
a data acquisition module configured to: acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
a balance control module configured to: and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
The working method of the system is the same as the method for balancing the direct current of the comprehensive energy-oriented current source converter provided in the embodiment 1, and details are not repeated here.
Example 3:
embodiment 3 of the present disclosure provides a medium on which a program is stored, which when executed by a processor, implements the steps in the method for balancing dc current of an integrated energy-oriented current source converter according to the first aspect of the present disclosure, where the steps are:
acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
The detailed steps are the same as those of the method for balancing the direct current of the comprehensive energy-oriented current source type converter provided in the embodiment 1, and are not repeated herein.
Example 4:
the embodiment 4 of the present disclosure provides an electronic device, which includes a memory, a processor, and a program stored in the memory and capable of running on the processor, where the processor executes the program to implement the steps in the method for balancing dc current of an integrated energy-oriented current source converter according to embodiment 1 of the present disclosure, where the steps are as follows:
acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
The detailed steps are the same as those of the method for balancing the direct current of the comprehensive energy-oriented current source type converter provided in the embodiment 1, and are not repeated herein.
As will be appreciated by one skilled in the art, embodiments of the present disclosure may be provided as a method, system, or computer program product. Accordingly, the present disclosure may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present disclosure may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present disclosure is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the disclosure. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, which can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic disk, an optical disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), or the like.
The above description is only a preferred embodiment of the present disclosure and is not intended to limit the present disclosure, and various modifications and changes may be made to the present disclosure by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present disclosure should be included in the protection scope of the present disclosure.

Claims (10)

1. A current source type converter direct current balancing method for comprehensive energy is characterized by comprising the following steps:
acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
2. The integrated energy-oriented current source converter direct current balancing method according to claim 1, wherein a bypass band is injected at a start position of a fourth pulse of the selective harmonic elimination control mode.
3. The integrated energy-oriented current source converter direct current balancing method according to claim 1, wherein the direct current terminal differential voltage is adjusted by adjusting a width of the bypass tape in an on-line manner.
4. The integrated energy-oriented current source converter direct current balancing method according to claim 1, wherein the magnitude of the average forward direct current terminal voltage of the current source converter is controlled according to the delay angle and the width of the bypass belt.
5. The integrated energy-oriented current source converter direct current balancing method according to claim 1, wherein the three-phase grid voltage angle is obtained by a phase-locked loop, and the forward direct current is regulated by regulating a delay angle of the corresponding reference line current.
6. The integrated energy-oriented current source converter direct current balancing method according to claim 1, wherein two saturation blocks for limiting a delay angle range are added in the delay angle modulation path, and the saturation blocks are proportional gain and integral gain of the PI controller respectively.
7. The integrated energy-oriented current source type converter direct current balancing method according to claim 1, wherein a bypass band is injected to control a negative differential voltage, and a dwell time of the bypass band is adjusted according to a negative direct current difference;
or, two saturation blocks for limiting the width of the bypass band are added in the bypass band injection control, namely the proportional gain and the integral gain of the PI controller for controlling the bypass band width.
8. The utility model provides a towards comprehensive energy's current source type converter direct current balance system which characterized in that includes:
a data acquisition module configured to: acquiring operation parameter data of a power conversion system of a back-to-back current source type converter;
a balance control module configured to: and according to the acquired operation parameter data, setting an independent delay angle for each current source type converter to perform positive current balance control, and injecting a bypass band in the selective harmonic elimination control mode to perform negative current balance control.
9. A medium having a program stored thereon, wherein the program, when executed by a processor, implements the steps in the integrated energy oriented current source converter dc current balancing method according to any one of claims 1 to 7.
10. An electronic device comprising a memory, a processor and a program stored on the memory and executable on the processor, wherein the processor executes the program to implement the steps of the method for balancing dc current of an integrated energy oriented current source converter according to any one of claims 1 to 7.
CN202010812823.XA 2020-08-13 2020-08-13 Current source type converter direct current balancing method and system for comprehensive energy Pending CN112152501A (en)

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