CN112135419A - Method for improving poor bubbles of QFN bottom bonding pad and bonding pad - Google Patents

Method for improving poor bubbles of QFN bottom bonding pad and bonding pad Download PDF

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Publication number
CN112135419A
CN112135419A CN202011105603.XA CN202011105603A CN112135419A CN 112135419 A CN112135419 A CN 112135419A CN 202011105603 A CN202011105603 A CN 202011105603A CN 112135419 A CN112135419 A CN 112135419A
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CN
China
Prior art keywords
bonding pad
qfn
pad
improving
via holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011105603.XA
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Chinese (zh)
Inventor
卢伟杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Suzhou Inspur Intelligent Technology Co Ltd
Original Assignee
Suzhou Inspur Intelligent Technology Co Ltd
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Filing date
Publication date
Application filed by Suzhou Inspur Intelligent Technology Co Ltd filed Critical Suzhou Inspur Intelligent Technology Co Ltd
Priority to CN202011105603.XA priority Critical patent/CN112135419A/en
Publication of CN112135419A publication Critical patent/CN112135419A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/115Via connections; Lands around holes or via connections
    • H05K1/116Lands, clearance holes or other lay-out details concerning the surrounding of a via
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007Surface contacts, e.g. bumps
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09372Pads and lands

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

The invention discloses a method for improving poor bubbles of a QFN bottom pad and a pad. The through-flow heat dissipation can be reduced by the aid of the air bubble generating rate, through-flow heat dissipation can be guaranteed, in addition, for better improvement of poor air bubbles, the hole plugging mode is updated according to the design of the material bonding pad, the half hole plugging mode of green oil is changed into resin hole plugging, hole plugging rate is improved, the problem of air bubbles caused by insufficient hole plugging of green oil is further reduced, the plurality of Via holes are changed from 0.04mm to 0.03mm, and the circulation rate can be met. Through the mode, the design of the Via hole of the QFN pad can be optimized, large bubbles generated by the QFN grounding pad can be reduced, the conductivity of the pad is ensured, and the reliability of the PCBA is improved.

Description

Method for improving poor bubbles of QFN bottom bonding pad and bonding pad
Technical Field
The invention relates to the technical field of electronics, in particular to a method for improving poor bubbles of a QFN bottom bonding pad and the bonding pad.
Background
In the process of high-speed development of the electronic industry, the PCBA becomes an important hardware component in a server framework, the PCB serves as a basic carrier plate of the PCBA and determines the quality of the PCBA to a great extent, the design of the QFN pad adopts Via holes which are uniformly distributed on a large pad and adopt half green oil hole plugging, large bubbles are easily generated after Reflow, and the large bubbles can influence the heat dissipation of a chip and further influence the reliability of the PCBA.
Disclosure of Invention
The invention mainly solves the technical problem of providing a method for improving poor bubbles of a QFN bottom pad and the pad, which can reduce the influence of a middle Via hole on the bubbles and provide the PCBA yield.
In order to solve the technical problems, the invention adopts a technical scheme that: the method for improving the poor bubble of the QFN bottom pad comprises the following steps: designing a Via hole position on a bonding pad; secondly, canceling a Via hole in the middle of the bonding pad; thirdly, adding a plurality of Via holes on the edge of the bonding pad; and fourthly, optimizing a welding mode.
Further, designing Via hole positions on the bonding pad comprises designing Via hole positions around the bonding pad according to rules in the bonding pad.
Further, the rule is to design Via holes according to the actual size of the bonding pad.
Furthermore, the plurality of Via holes are filled with resin in a half-plug manner.
Further, the aperture of the plurality of Via holes is 0.03 mm.
Further, the optimized welding mode comprises the steps of distributing and printing partial tin paste on the pad points, then mounting a tin sheet and a chip, and completing welding through wave soldering.
A bonding pad for improving poor bubble of a QFN bottom bonding pad comprises: the bonding pad is designed by the method, and a plurality of Via holes are additionally formed in the periphery of the QFN bonding pad according to the actual size of the QFN bonding pad.
Further, the Via holes of the bonding pad are symmetrically distributed in the bonding pad.
Furthermore, the Via hole half plug hole mode of the bonding pad is resin plug hole.
The invention has the beneficial effects that: according to the invention, by optimizing the design of the Via hole of the QFN pad, large bubbles generated by the QFN ground pad can be reduced, and meanwhile, the conductivity of the pad is ensured, so that the reliability of the PCBA is improved.
Drawings
FIG. 1 is a flow chart of a preferred embodiment of a method for improving QFN bottom pad blister failure in accordance with the present invention;
FIG. 2 is a diagram of an optimized welding mode in a method for improving poor bubbles of a QFN bottom pad according to the invention;
FIG. 3 is a diagram of a pad structure for improving the bubble defect of the QFN bottom pad.
Detailed Description
The following detailed description of the preferred embodiments of the present invention, taken in conjunction with the accompanying drawings, will make the advantages and features of the invention easier to understand by those skilled in the art, and thus will clearly and clearly define the scope of the invention.
Referring to fig. 1 and 2, an embodiment of the present invention includes:
referring to fig. 1, a method for improving QFN bottom pad blister defects includes: the Via hole position is designed according to the shape of the QFN pad, the Via hole in the middle of the pad is eliminated, and a plurality of Via holes are properly added on the edge of the pad according to the actual size of the pad to meet the flow conductivity of the PCBA. The bubble generation rate can be reduced, through-flow heat dissipation can be guaranteed, and in addition, the bubble defect can be improved better. The hole plugging mode is updated according to the design of the material bonding pad, the green oil half hole plugging mode is changed into the resin hole plugging mode, the hole plugging rate is improved, and the problem of bubbles caused by insufficient green oil hole plugging is solved. The pore diameter of the plurality of Via pores is changed from 0.04mm to 0.03mm, and the flow rate can be met; optimize the welding mode, paste the new improvement by direct printing tin cream and for distributing printing part tin cream at PAD point, paste tin sheet (0.05mm) again, then paste the chip again, accomplish the welding through wave-soldering, because the Flux that contains in the tin cream is more, volatilize through reflow soldering Flux and can't in time get rid of and lead to the bubble, so reduce tin cream printing and paste the supplementary soldering tin with tin sheet subsides, can alleviate the volatile influence to the bubble of Flux, and then it is bad to improve the bubble.
See fig. 2, which is a diagram of an optimized soldering mode, wherein the middle part represents a tin sheet, and tin is pasted and printed on the periphery of the tin sheet.
Referring to fig. 3, based on the same inventive concept as the method for improving the bubble defect of the QFN bottom pad in the foregoing embodiments, the present specification embodiment further provides a pad for improving the bubble defect of the QFN bottom pad, including: the pad is additionally provided with a plurality of Via holes around the QFN pad according to the actual size of the QFN pad; the Via holes of the bonding pad are symmetrically distributed in the bonding pad; and the Via hole half plug hole mode of the bonding pad is resin plug hole.
The above description is only an embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes performed by the present specification and drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims (9)

1. A method for improving QFN bottom pad blister defects, comprising: designing a Via hole position on a bonding pad; secondly, canceling a Via hole in the middle of the bonding pad; thirdly, adding a plurality of Via holes on the edge of the bonding pad; and fourthly, optimizing a welding mode.
2. The method of claim 1, wherein the method comprises the steps of: designing the Via hole positions on the bonding pad comprises designing the Via hole positions on the periphery of the bonding pad according to rules in the bonding pad.
3. The method of claim 2, wherein the step of improving the bubbling failure of the QFN bottom pad comprises the steps of: the rule is to design Via holes according to the actual size of the bonding pad.
4. The method of claim 1, wherein the method comprises the steps of: the plurality of Via holes are half plugged by resin.
5. The method of claim 1, wherein the method comprises the steps of: the aperture of the plurality of Via holes is 0.03 mm.
6. The method of claim 1, wherein the method comprises the steps of: the optimized welding mode comprises the steps of distributing and printing partial tin paste on the welding pad, then mounting a tin sheet and a chip, and completing welding through wave soldering.
7. A bonding pad for improving poor bubble of a QFN bottom bonding pad is characterized by comprising: the bonding pad is designed by the method of any one of claims 1 to 5, and a plurality of Via holes are additionally formed in the periphery of the QFN bonding pad according to the actual size of the QFN bonding pad.
8. A bonding pad for improving QFN bottom bonding pad bubble defect as claimed in claim 6, wherein: the Via holes of the bonding pad are symmetrically distributed in the bonding pad.
9. A bonding pad for improving QFN bottom bonding pad bubble defect as claimed in claim 6 or 7, wherein: and the Via hole half plug hole mode of the bonding pad is resin plug hole.
CN202011105603.XA 2020-10-15 2020-10-15 Method for improving poor bubbles of QFN bottom bonding pad and bonding pad Pending CN112135419A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011105603.XA CN112135419A (en) 2020-10-15 2020-10-15 Method for improving poor bubbles of QFN bottom bonding pad and bonding pad

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011105603.XA CN112135419A (en) 2020-10-15 2020-10-15 Method for improving poor bubbles of QFN bottom bonding pad and bonding pad

Publications (1)

Publication Number Publication Date
CN112135419A true CN112135419A (en) 2020-12-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011105603.XA Pending CN112135419A (en) 2020-10-15 2020-10-15 Method for improving poor bubbles of QFN bottom bonding pad and bonding pad

Country Status (1)

Country Link
CN (1) CN112135419A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130128485A1 (en) * 2010-06-28 2013-05-23 Huawei Device Co., Ltd. Method for enhancing reliability of welding spot of chip, printed circuit board and electronic device
CN206640873U (en) * 2017-03-23 2017-11-14 深圳市华严慧海电子有限公司 Pad reinforces pcb board
CN108513435A (en) * 2018-05-30 2018-09-07 烽火通信科技股份有限公司 A kind of PCB construction for reducing generation ground pad cavity
CN111372393A (en) * 2020-03-31 2020-07-03 佰电科技(苏州)有限公司 QFN element mounting method for reducing welding voidage

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20130128485A1 (en) * 2010-06-28 2013-05-23 Huawei Device Co., Ltd. Method for enhancing reliability of welding spot of chip, printed circuit board and electronic device
CN206640873U (en) * 2017-03-23 2017-11-14 深圳市华严慧海电子有限公司 Pad reinforces pcb board
CN108513435A (en) * 2018-05-30 2018-09-07 烽火通信科技股份有限公司 A kind of PCB construction for reducing generation ground pad cavity
CN111372393A (en) * 2020-03-31 2020-07-03 佰电科技(苏州)有限公司 QFN element mounting method for reducing welding voidage

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Application publication date: 20201225

RJ01 Rejection of invention patent application after publication