CN112100091B - Two-level mapping table data mapping method and device, storage medium and electronic equipment - Google Patents
Two-level mapping table data mapping method and device, storage medium and electronic equipment Download PDFInfo
- Publication number
- CN112100091B CN112100091B CN202010979565.4A CN202010979565A CN112100091B CN 112100091 B CN112100091 B CN 112100091B CN 202010979565 A CN202010979565 A CN 202010979565A CN 112100091 B CN112100091 B CN 112100091B
- Authority
- CN
- China
- Prior art keywords
- mapping table
- physical page
- secondary mapping
- stored
- table data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000013507 mapping Methods 0.000 title claims abstract description 218
- 238000000034 method Methods 0.000 title claims abstract description 46
- 238000013506 data mapping Methods 0.000 title claims abstract description 41
- 238000004590 computer program Methods 0.000 claims description 15
- 238000007726 management method Methods 0.000 abstract description 7
- 238000013403 standard screening design Methods 0.000 description 26
- 230000000875 corresponding effect Effects 0.000 description 21
- 229920002125 Sokalan® Polymers 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 230000007246 mechanism Effects 0.000 description 4
- 239000007787 solid Substances 0.000 description 4
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000013500 data storage Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 230000008569 process Effects 0.000 description 2
- 238000011084 recovery Methods 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004064 recycling Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0615—Address space extension
- G06F12/063—Address space extension for I/O modules, e.g. memory mapped I/O
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System (AREA)
- Memory System Of A Hierarchy Structure (AREA)
Abstract
The invention discloses a secondary mapping table data mapping method, a device, a storage medium and electronic equipment, wherein the secondary mapping table data mapping method comprises the following steps: a secondary mapping table storage area is allocated in advance on the nand; receiving secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in a secondary mapping table storage area according to the structure of a physical page; storing all physical page addresses for storing the data of the secondary mapping table to be stored in a memory; according to the invention, the data of the secondary mapping table data table is stored through the structure of the physical page, on one hand, the corresponding physical page can be accessed through the physical page address, so that only the physical page address is needed to be stored in the memory, and the space access of the high-capacity SSD is supported. Meanwhile, the three-level mapping table is not adopted to realize the space access of the high-capacity SSD, so that the overhead of introducing the three-level mapping table is avoided, the management of firmware is simplified, and the performance of the system can be improved.
Description
Technical Field
The present invention relates to the field of memory chip data storage technologies, and in particular, to a method and apparatus for mapping data in a secondary mapping table, a storage medium, and an electronic device.
Background
Currently, in the firmware field, a mapping mechanism for a large-capacity SSD (Solid STATE DISK or Solid STATE DRIVE, referred to as a Solid state disk or a Solid state drive) generally adopts a step-by-step simplification mode; for example, for an SSD of 1TB, mapping indexes are carried out in units of a size of 4KB, each mapping item needs 4Bytes of space, and an SSD of 1TB needs a primary mapping space of a size of 1 GB; in the same index mode, the first-level mapping table also needs 4Bytes space according to the mapping index of 4KB, and the first-level mapping table of 1GB needs 1 MB-sized second-level mapping space; however, for a DRAM-less (nonvolatile Memory) type main control chip, 1MB SRAM (Static Random-Access Memory) is also a huge space overhead; therefore, the common practice is to index the secondary mapping table through the tertiary mapping table, and the size of the tertiary mapping table only needs to be 1 KB;
this has the advantage that the three-level mapping table is small enough to reside in SRAM, but introduces the problem of:
1. the expense of inquiring the metadata in the reading and writing process is increased; if the secondary mapping table is required to be accessed, the address is required to be obtained from the tertiary mapping table and then read from a nand (flash memory) medium;
2. Management of the secondary mapping table also needs to adopt a management mechanism of the primary mapping table, including setting of memory page quota and allocation and recovery of nand space;
3. The access of the secondary mapping table triggers the reading and writing of the tertiary mapping table, and the reading and writing burden of the system is increased.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the two-level mapping table data mapping method, the device, the storage medium and the electronic equipment are provided, and the problem caused by introducing the three-level mapping table is avoided while the space access of the high-capacity SSD is supported.
In order to solve the technical problems, the invention adopts the following technical scheme:
a two-level mapping table data mapping method comprises the following steps:
A secondary mapping table storage area is allocated in advance on the nand;
receiving secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in a secondary mapping table storage area according to a physical page structure;
and storing all physical page addresses for storing the data of the secondary mapping table to be stored in a memory.
In order to solve the technical problems, the invention adopts another technical scheme that:
a secondary mapping table data mapping apparatus comprising:
the allocation module is used for pre-allocating a secondary mapping table storage area on the nand;
The storage module is used for receiving the secondary mapping table data to be stored and storing the secondary mapping table data to be stored in the secondary mapping table storage area according to the structure of the physical page;
And the storage module is used for storing all physical page addresses for storing the data of the secondary mapping table to be stored in the memory.
In order to solve the technical problems, the invention adopts another technical scheme that:
A computer-readable storage medium having stored thereon a computer program having stored thereon the above-described two-level map data mapping method.
In order to solve the technical problems, the invention adopts another technical scheme that:
An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the two-level mapping table data mapping method shown above when executing the computer program.
The invention has the beneficial effects that: the secondary mapping table data mapping method, the device, the storage medium and the electronic equipment store the secondary mapping table data through the structure of physical pages, on one hand, the corresponding physical pages can be accessed through the physical page addresses, so that only the physical page addresses are needed to be stored in a memory, and the space access of the SSD with large capacity is supported. Meanwhile, the three-level mapping table is not adopted to realize the space access of the high-capacity SSD, so that the overhead of introducing the three-level mapping table is avoided, the management of firmware is simplified, and the performance of the system can be improved.
Drawings
FIG. 1 is a flow chart of a two-level mapping table data mapping method according to an embodiment of the invention;
FIG. 2 is a schematic diagram of a selection process of a new data block according to an embodiment of the present invention;
FIG. 3 is an explanatory diagram of a block stripe according to an embodiment of the present invention;
FIG. 4 is a schematic diagram illustrating a data storage of a two-level mapping table data mapping method according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of data storage of a three-level mapping table in the prior art;
FIG. 6 is a schematic diagram illustrating a module connection of a second-level mapping table data mapping device according to an embodiment of the present invention;
Fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.
Description of the reference numerals:
1. a second-level mapping table data mapping device; 2. an electronic device; 11. a distribution module; 12. a storage module; 21. a processor; 22. a memory.
Detailed Description
In order to describe the technical contents, the achieved objects and effects of the present invention in detail, the following description will be made with reference to the embodiments in conjunction with the accompanying drawings.
Referring to fig. 1 to 4, an embodiment of the present invention provides a two-level mapping table data mapping method, which includes the steps of:
A secondary mapping table storage area is allocated in advance on the nand;
receiving secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in a secondary mapping table storage area according to a physical page structure;
and storing all physical page addresses for storing the data of the secondary mapping table to be stored in a memory.
As can be seen from the above description, the secondary mapping table data is stored by the structure of the physical page, on one hand, the corresponding physical page can be accessed by the physical page address, so that only the physical page address needs to be stored in the memory, thereby supporting the space access of the high-capacity SSD. Meanwhile, the three-level mapping table is not adopted to realize the space access of the high-capacity SSD, so that the overhead of introducing the three-level mapping table is avoided, the management of firmware is simplified, and the performance of the system can be improved.
Further, the secondary mapping table storage area is capable of storing at least N physical pages, where N is determined according to a secondary mapping space required by the capacity of the SSD.
From the above description, the capacity of the SSD and the space size of the mapping index are both fixed in advance, so that the secondary mapping space occupied by the secondary mapping data required when the entire SSD is written can be calculated, and for the physical pages of the preset size, the number of the required physical pages can be obtained according to the secondary mapping space when the entire SSD is written, so that the allocated secondary mapping table storage area is ensured to be sufficient to store the secondary mapping data required when the entire SSD is written.
Further, each physical page comprises control header information and stored secondary mapping table data, the control header information comprises header information and N physical page addresses corresponding to the physical pages one by one, and the header information comprises a magic word and a CRC value;
the secondary mapping table data mapping method further comprises the following steps:
When a secondary mapping table data reading request is received, calculating a target physical page stored by target secondary mapping table data to be read and a target physical address in the target physical page according to the secondary mapping table data reading request;
judging whether the magic word stored in the target physical page is consistent with a preset magic word, if so, calculating CRC values of other data except the header information in the target physical page, judging whether the calculated CRC values are consistent with the CRC values stored in the target physical page, and if so, reading target secondary mapping table data from the target physical address.
As is apparent from the above description, the stored data of the physical page is prevented from being tampered with and the integrity of the stored data of the physical page is ensured by the magic word (MagicWord) and the CRC (Cyclic Redundancy Check) value.
Further, the step of obtaining the N includes the following steps:
The number N of allocated physical pages is calculated by a first inequality:
(a-(b+c*N))*N≥M
The a is the storage space of a single physical page, the b is the storage space of the header information, the c is the storage space of a single physical page address, and the M is the secondary mapping space required by the capacity of the SSD.
From the above description, it is known that the required number of physical pages is obtained quickly by the above formula, so that sufficient space is allocated for storage.
Further, the pre-allocating a secondary mapping table storage area on the nand specifically includes the following steps:
allocating a block strip in an idle state as a secondary mapping table storage area for storing the secondary mapping table data;
the receiving the secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in the secondary mapping table storage area according to the structure of a physical page specifically comprises the following steps:
distributing one physical page at a time on the secondary mapping table storage area according to a preset sequence from left to right;
And receiving secondary mapping table data to be stored, writing the secondary mapping table data to be stored into the allocated physical pages until the current allocated physical pages are full of data, and continuing to allocate a new physical page to store the new secondary mapping table data.
Further, when each physical page is full of data, the method further comprises the following steps:
and updating the memory according to the physical page address corresponding to the physical page which is currently allocated.
Further, the method also comprises the following steps:
If the space of the allocated block stripe is full, the data on the physical pages corresponding to the N physical page addresses stored in the memory are integrally moved to the newly allocated block stripe.
From the above description, it can be seen that, when the nand space of the secondary mapping table is sequentially allocated, during the subsequent garbage collection, only the data of N physical pages need to be integrally moved to the newly allocated block strip, and the old block strip is integrally recycled, so that the excessive garbage collection operation is avoided.
Referring to fig. 6, another embodiment of the present invention provides a two-level mapping table data mapping apparatus 1, including:
a two-level mapping table data mapping apparatus 1, comprising:
An allocation module 11, configured to pre-allocate a secondary mapping table storage area on the nand;
The storage module 12 is configured to receive secondary mapping table data to be stored, and store the secondary mapping table data to be stored in the secondary mapping table storage area according to a structure of a physical page;
And the storage module 13 stores all physical page addresses for storing the secondary mapping table data to be stored in a memory.
Wherein, regarding the specific procedures and corresponding effects realized by the allocation module 11, the storage module 12 and the saving module 13, reference may be made to the relevant descriptions in the two-level mapping table data mapping method of the above-described embodiments.
Another embodiment of the present invention provides a computer-readable storage medium having stored thereon a computer program having stored thereon the two-level map data mapping method of the above embodiment.
With respect to the specific implementation procedure and corresponding effect of the second-level mapping table data mapping method included in the computer program in the present embodiment, reference may be made to the relevant description in the second-level mapping table data mapping method in the above embodiment.
Referring to fig. 7, another embodiment of the present invention provides an electronic device 2, including a memory 22, a processor 21, and a computer program stored in the memory 22 and capable of running on the processor 21, where the processor 21 implements the two-level mapping table data mapping method of the above embodiment when executing the computer program.
With respect to the specific implementation procedure and corresponding effect of the second-level mapping table data mapping method implemented by the processor 21 in this embodiment, reference may be made to the description related to the second-level mapping table data mapping method in the above embodiment.
The second-level mapping table data mapping method and the corresponding device, the storage medium and the electronic equipment 2 of the present application are mainly applied to application scenarios requiring second-level mapping table data mapping for any SSD, especially high-capacity SSDs, such as SSDs of 500GB, 1TB, etc., and are described below with reference to specific application scenarios:
according to the above description, and with reference to fig. 1 to 4, a first embodiment of the present invention is:
a two-level mapping table data mapping method comprises the following steps:
S1, a secondary mapping table storage area is allocated in advance on a nand;
The secondary mapping table storage area can store at least N physical pages, and N is determined according to a secondary mapping space required by the capacity of the SSD.
In this embodiment, the capacity of the SSD is 1TB, the space size of the mapping index is 4KB, and then a secondary mapping space of 1MB is required, the storage space of a single physical page is 16KB, and each physical page address item is 4Bytes, and then multiple physical pages are required to store.
The above-mentioned storage structure of fig. 2 is a single physical page, where each physical page includes control header information and stored secondary mapping table data, the control header information includes header information and physical page addresses corresponding to N physical pages one by one, and the header information includes a magic word and a CRC value. The HEAD in fig. 2 is header information, page_0 is an index of physical pages, and page_0address to page_n Address are N physical Page addresses corresponding to N physical pages one by one.
Thus, each 16K physical page cannot be used entirely to store secondary mapping table data. Therefore, the number N of physical pages required is calculated by a first inequality:
(a-(b+c*N))*N≥M
where a is the storage space of a single physical page, b is the storage space of header information, c is the storage space of a single physical page address, and M is the secondary mapping space required by the capacity of the SSD.
Corresponding to the embodiment, i.e., (16×1024- (8+4×n)) =1024×1024 (1 MB), N is determined to be 66, i.e., 66 physical pages are needed, so that since the size of each secondary mapping table entry is 4bytes, a portion of each physical page except the size of the control header information can store 4028 secondary mapping table entries.
More specifically, for the present embodiment, the preset magic word is stored in Firmware (Firmware) from which it is read when a comparison is required.
In the embodiment of the invention, the magic words stored in the header information in each physical page are set according to actual needs, and the magic words in the header information of all physical pages can be set to be uniform fields or characters, for example, 0xabcdefbc, then the preset magic words stored in the firmware are 0xabcdefbc, and if the magic words in the header information in the physical pages are set to be different fields or characters, then the firmware stores a corresponding relation table, and the corresponding relation table stores the preset magic words corresponding to the magic words of each physical page. When the magic words of the header information in the physical pages are different, when the magic word comparison is performed, the identification information of the physical page to be compared needs to be acquired first, the identification information comprises a number or a keyword, and the like, the preset magic word of the correspondence table stored in the firmware is read according to the identification information, and the comparison is performed between the read preset magic word and the magic word in the physical page.
In this embodiment, the comparison result of the magic word indicates whether the data stored in the physical page is the second-level mapping table data, and then the CRC value is calculated to determine whether the second-level mapping table data is tampered, and if there is a data change, the calculated CRC and the stored CRC will be inconsistent.
S2, receiving secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in a secondary mapping table storage area according to a physical page structure.
In this embodiment, the second-level mapping table data and the control header information are integrally packaged and written on the nand (flash memory), which reduces the overhead of writing the third-level mapping table separately, not only simplifies the flow, but also improves the performance.
For example, the system issues a write request for LBA (logic block address, logical block address) 56842365, the data of which is written to PAA (logic AREA ADDRESS, physical address) of 0x345e23d4; according to the mapping management of 4k, first LBA- > LAA is calculated:
LAA(7105295)＝56842365/8(8sector＝4kB)
calculating an index of a secondary mapping table by the LAA:
Secondary mapping table index (6938) =7105295/1024 (4 KB/PAA size 4 bytes=1024);
if a three-level mapping table mechanism is used, the position of the two-level mapping table index in the three-level mapping table needs to be calculated:
three-level mapping table index (6) =6398/1024 (4 KB/PAA size=1024);
Therefore, a mechanism of a three-level mapping table is used, and a primary mapping table, a secondary mapping table and a three-level mapping table need to be updated once; by using the embodiment, the calculated index (6938) of the secondary mapping table can directly calculate that the secondary mapping data falls on a physical page with index 1 (6938/4028) in 66 physical pages, directly update the PAA with index 1 in the physical page and the controller header information, save the PAA, and reduce the operation of updating the tertiary mapping table once.
S3, storing all physical page addresses for storing the data of the secondary mapping table to be stored in a memory;
thus, for 1TB SSD, the memory only needs to maintain 66 physical Page addresses, namely 264Bytes, and during power-up scanning, only the latest Page data is found, namely 66 physical Page addresses, and all the secondary mapping table data is recovered.
And after the writing is completed, the updated physical page address is required to be stored in the memory, so that the stored physical page addresses in the memory are all effective physical page addresses.
S4, when a secondary mapping table data reading request is received, calculating a target physical page stored in target secondary mapping table data to be read and a target physical address in the target physical page according to the secondary mapping table data reading request;
Judging whether the magic word stored in the target physical page is consistent with the preset magic word, if so, calculating CRC values of other data except the header information in the target physical page, judging whether the calculated CRC values are consistent with the CRC values stored in the target physical page, and if so, reading target secondary mapping table data from the target physical address.
According to the above description, and referring to fig. 1 to 4, a second embodiment of the present invention is:
Based on the first embodiment, the step S1 specifically includes the following steps:
Allocating a block strip in an idle state as a secondary mapping table storage area for storing secondary mapping table data;
as shown in fig. 4, channel is a data Channel, block is a data Block, a minimum erasure unit of SSD, plane is a data plane, a minimum execution unit of SSD, LUN is a logical unit number, target is a Target, and Block stripe is a stripe Block formed by blocks at the same position on each plane.
The step S2 specifically includes the following steps:
S21, distributing a physical page on the secondary mapping table storage area each time according to a preset sequence from left to right;
As shown in fig. 4, we assume that block N is divided, and according to the analysis of SSD of 1TB in the above embodiment, 4028 secondary mapping entries are stored in each physical page, so that each secondary mapping entry is generated, one physical page is allocated first.
S22, receiving secondary mapping table data to be stored, writing the secondary mapping table data to be stored into the allocated physical pages until the physical pages allocated currently are full of data, updating the memory according to the physical page addresses corresponding to the physical pages allocated currently, and continuing to allocate a new physical page to store the new secondary mapping table data;
In this embodiment, the second-level mapping table entry is filled into the allocated physical Page, for example, page 0 in fig. 4, and after the allocation of the physical Page of Page 0 is completed, the space of Page 1 is continuously allocated, and the cycle is repeated until the allocation of the whole block stripe is completed.
S23, if the space of the allocated block strip is full, the data on the physical pages corresponding to the N physical page addresses stored in the memory are integrally moved to the newly allocated block strip.
Once the space of the whole block stripe is allocated, the block stripe is only used for storing the data of the secondary mapping table, so that the whole block stripe only has 66 physical pages at most, and at the moment, only the data of 66 physical pages are required to be integrally moved to the newly allocated block stripe, and the old block stripe is integrally recycled.
In the prior art, as shown in fig. 5, once the allocation of the block stripe is completed, 256 (the size of the three-level mapping table is 1KB, each PAA is 4Bytes, so that the data of 256 PAAs in the three-level mapping table is moved to the new block stripe), so that the embodiment can avoid the excessive garbage recycling operation.
Referring to fig. 4, a third embodiment of the present invention is a second-level mapping table data mapping apparatus 1 corresponding to the second-level mapping table data mapping method in the first or second embodiment, including:
An allocation module 11, configured to pre-allocate a secondary mapping table storage area on the nand;
The storage module 12 is configured to receive secondary mapping table data to be stored, and store the secondary mapping table data to be stored in the secondary mapping table storage area according to a structure of a physical page;
And the storage module 13 stores all physical page addresses for storing the secondary mapping table data to be stored in a memory.
A fourth embodiment of the present invention is a computer-readable storage medium corresponding to the second-level map data mapping method of the first or second embodiment, in which a computer program is stored, and the computer program is stored with the second-level map data mapping method of the first or second embodiment.
Referring to fig. 5, a fifth embodiment of the present invention is an electronic device 2 corresponding to the second-level mapping table data mapping method in the first or second embodiment, including a memory 22, a processor 21, and a computer program stored on the memory 22 and capable of running on the processor 21, wherein the second-level mapping table data mapping method in the first or second embodiment is implemented when the processor 21 executes the computer program.
In the five embodiments provided in the present application, it should be understood that the disclosed method, apparatus, storage medium and electronic device 2 may be implemented in other manners. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the modules is merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple modules may be combined or integrated into another apparatus, or some features may be omitted or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed with each other may be an indirect coupling or communication connection via some interfaces, devices or modules, which may be in electrical, mechanical, or other forms.
The modules described as separate components may or may not be physically separate, and components shown as modules may or may not be physical modules, i.e., may be located in one place, or may be distributed over a plurality of network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each module may exist alone physically, or two or more modules may be integrated into one module. The integrated modules may be implemented in hardware or in software functional modules.
The integrated modules, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied essentially or in part or all of the technical solution or in part in the form of a software product stored in a storage medium, including instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
It should be noted that, for the sake of simplicity of description, the foregoing method embodiments are all expressed as a series of combinations of actions, but it should be understood by those skilled in the art that the present invention is not limited by the order of actions described, as some steps may be performed in other order or simultaneously in accordance with the present invention. Further, those skilled in the art will appreciate that the embodiments described in the specification are all preferred embodiments, and that the acts and modules referred to are not necessarily all required for the present invention.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to the related descriptions of other embodiments.
In summary, according to the method, the device, the storage medium and the electronic equipment for mapping the secondary mapping table data provided by the invention, the secondary mapping table data is stored through the structure of the physical page, on one hand, the corresponding physical page can be accessed through the physical page address, so that only the physical page address is needed to be stored in the memory, and the space access of the SSD with large capacity is supported. Meanwhile, the three-level mapping table is not adopted to realize the space access of the high-capacity SSD, so that the overhead of introducing the three-level mapping table is avoided, the management of firmware is simplified, and the performance of the system can be improved. And sequentially distributing nand spaces of the second-level mapping table, and only needing to integrally move data of N physical pages to newly distributed block strips when the subsequent garbage is recovered, wherein the old block strips are integrally recovered, so that the excessive garbage recovery operation is avoided.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent changes made by the specification and drawings of the present invention, or direct or indirect application in the relevant art, are included in the scope of the present invention.
Claims (7)
1. The data mapping method of the secondary mapping table is characterized by comprising the following steps:
A secondary mapping table storage area is allocated in advance on the nand;
receiving secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in a secondary mapping table storage area according to a physical page structure;
storing all physical page addresses for storing the data of the secondary mapping table to be stored in a memory;
further, the secondary mapping table storage area is at least capable of storing N physical pages, where N is determined according to a secondary mapping space required by the capacity of the SSD;
Further, each physical page comprises control header information and stored secondary mapping table data, the control header information comprises header information and N physical page addresses corresponding to the physical pages one by one, and the header information comprises a magic word and a CRC value;
the secondary mapping table data mapping method further comprises the following steps:
When a secondary mapping table data reading request is received, calculating a target physical page stored by target secondary mapping table data to be read and a target physical address in the target physical page according to the secondary mapping table data reading request;
judging whether the magic word stored in the target physical page is consistent with a preset magic word, if so, calculating CRC values of other data except the header information in the target physical page, judging whether the calculated CRC values are consistent with the CRC values stored in the target physical page, and if so, reading target secondary mapping table data from the target physical address;
further, the step of obtaining the N includes the following steps:
The number N of allocated physical pages is calculated by a first inequality:
(a-(b+c*N))*N≥M
The a is the storage space of a single physical page, the b is the storage space of the header information, the c is the storage space of a single physical page address, and the M is the secondary mapping space required by the capacity of the SSD.
2. The method for mapping secondary mapping table data according to claim 1, wherein the pre-allocating a secondary mapping table storage area on the nand specifically comprises the following steps:
allocating a block strip in an idle state as a secondary mapping table storage area for storing the secondary mapping table data;
the receiving the secondary mapping table data to be stored, and storing the secondary mapping table data to be stored in the secondary mapping table storage area according to the structure of a physical page specifically comprises the following steps:
distributing one physical page at a time on the secondary mapping table storage area according to a preset sequence from left to right;
And receiving secondary mapping table data to be stored, writing the secondary mapping table data to be stored into the allocated physical pages until the current allocated physical pages are full of data, and continuing to allocate a new physical page to store the new secondary mapping table data.
3. The method of mapping secondary mapping table data according to claim 2, further comprising the steps of, when each physical page is full of data:
and updating the memory according to the physical page address corresponding to the physical page which is currently allocated.
4. The secondary mapping table data mapping method according to claim 2, further comprising the steps of:
If the space of the allocated block stripe is full, the data on the physical pages corresponding to the N physical page addresses stored in the memory are integrally moved to the newly allocated block stripe.
5. A two-level mapping table data mapping apparatus, comprising:
The allocation module is used for pre-allocating a secondary mapping table storage area on the nand, wherein the secondary mapping table storage area can at least store N physical pages, N is determined according to a secondary mapping space required by the capacity of the SSD, each physical page comprises control header information and stored secondary mapping table data, the control header information comprises header information and N physical page addresses corresponding to the physical pages one by one, and the header information comprises a magic word and a CRC value;
the step of obtaining the N comprises the following steps:
The number N of allocated physical pages is calculated by a first inequality:
(a-(b+c*N))*N≥M
The a is the storage space of a single physical page, the b is the storage space of the head information, the c is the storage space of a single physical page address, and the M is the secondary mapping space required by the capacity of the SSD;
The storage module is used for receiving the secondary mapping table data to be stored and storing the secondary mapping table data to be stored in the secondary mapping table storage area according to the structure of the physical page;
The storage module is used for storing all physical page addresses for storing the data of the secondary mapping table to be stored in the memory;
The second-level mapping table data mapping device is further used for executing the following steps:
When a secondary mapping table data reading request is received, calculating a target physical page stored by target secondary mapping table data to be read and a target physical address in the target physical page according to the secondary mapping table data reading request;
judging whether the magic word stored in the target physical page is consistent with a preset magic word, if so, calculating CRC values of other data except the header information in the target physical page, judging whether the calculated CRC values are consistent with the CRC values stored in the target physical page, and if so, reading target secondary mapping table data from the target physical address.
6. A computer-readable storage medium having stored thereon a computer program, characterized by: the computer program stores the secondary mapping table data mapping method as claimed in any one of claims 1 to 4.
7. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor implements the secondary mapping table data mapping method of any of claims 1-4 when the computer program is executed by the processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010979565.4A CN112100091B (en) | 2020-09-17 | 2020-09-17 | Two-level mapping table data mapping method and device, storage medium and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010979565.4A CN112100091B (en) | 2020-09-17 | 2020-09-17 | Two-level mapping table data mapping method and device, storage medium and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112100091A CN112100091A (en) | 2020-12-18 |
| CN112100091B true CN112100091B (en) | 2024-06-11 |
Family
ID=73759804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010979565.4A Active CN112100091B (en) | 2020-09-17 | 2020-09-17 | Two-level mapping table data mapping method and device, storage medium and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112100091B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103176916A (en) * | 2013-03-07 | 2013-06-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Flash memory and address transfer approach thereof |
| CN103279366A (en) * | 2013-04-24 | 2013-09-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Solid state disk and method for rapidly start-up based on solid state disk after power failure |
| WO2015114754A1 (en) * | 2014-01-29 | 2015-08-06 | 株式会社日立製作所 | Storage device |
| CN105224478A (en) * | 2015-09-25 | 2016-01-06 | 联想(北京)有限公司 | A kind of formation of mapping table, renewal and restoration methods and electronic equipment |
| CN105243025A (en) * | 2015-09-25 | 2016-01-13 | 联想(北京)有限公司 | Mapping table forming and loading methods and electronic device |
| CN108415851A (en) * | 2018-01-18 | 2018-08-17 | 珠海全志科技股份有限公司 | A kind of method and apparatus for promoting flash memory device and starting speed |
| CN111459919A (en) * | 2020-04-26 | 2020-07-28 | 深圳佰维存储科技股份有限公司 | Data query method, loading assembly, search assembly and storage medium |
-
2020
- 2020-09-17 CN CN202010979565.4A patent/CN112100091B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103176916A (en) * | 2013-03-07 | 2013-06-26 | 中国科学院苏州纳米技术与纳米仿生研究所 | Flash memory and address transfer approach thereof |
| CN103279366A (en) * | 2013-04-24 | 2013-09-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Solid state disk and method for rapidly start-up based on solid state disk after power failure |
| WO2015114754A1 (en) * | 2014-01-29 | 2015-08-06 | 株式会社日立製作所 | Storage device |
| CN105224478A (en) * | 2015-09-25 | 2016-01-06 | 联想(北京)有限公司 | A kind of formation of mapping table, renewal and restoration methods and electronic equipment |
| CN105243025A (en) * | 2015-09-25 | 2016-01-13 | 联想(北京)有限公司 | Mapping table forming and loading methods and electronic device |
| CN108415851A (en) * | 2018-01-18 | 2018-08-17 | 珠海全志科技股份有限公司 | A kind of method and apparatus for promoting flash memory device and starting speed |
| CN111459919A (en) * | 2020-04-26 | 2020-07-28 | 深圳佰维存储科技股份有限公司 | Data query method, loading assembly, search assembly and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112100091A (en) | 2020-12-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10067684B2 (en) | File access method and apparatus, and storage device | |
| US10303596B2 (en) | Read-write control method for memory, and corresponding memory and server | |
| US9229876B2 (en) | Method and system for dynamic compression of address tables in a memory | |
| CN111125447A (en) | Metadata access method, device and equipment and readable storage medium | |
| US7761648B2 (en) | Caching method for NAND flash translation layer | |
| JP2019020788A (en) | Memory system and control method | |
| CN111143285A (en) | Small file storage file system and small file processing method | |
| CN113419675B (en) | Write operation method and read operation method for memory | |
| CN111522507A (en) | Low-delay file system address space management method, system and medium | |
| CN108491290B (en) | Data writing method and device | |
| CN109407985B (en) | Data management method and related device | |
| CN110569000A (en) | Host RAID (redundant array of independent disk) management method and device based on solid state disk array | |
| CN112052193B (en) | Garbage recycling method and device, readable storage medium and electronic equipment | |
| KR101936364B1 (en) | Memory management system using flash memory and method thereof | |
| CN111190835B (en) | Data writing method, device, equipment and medium | |
| CN112100091B (en) | Two-level mapping table data mapping method and device, storage medium and electronic equipment | |
| CN110968527B (en) | FTL provided caching | |
| CN115904255A (en) | Data request method, device, equipment and storage medium | |
| KR101377923B1 (en) | Apparatus and metohd for storing data in flash memory by using b-tree performing delayed update | |
| CN111796757B (en) | Solid state disk cache region management method and device | |
| CN110968520B (en) | Multi-stream storage device based on unified cache architecture | |
| CN112084121A (en) | Hard disk pre-reading method and device, computer readable storage medium and electronic equipment | |
| CN117891415B (en) | P2L data management method and device of storage device | |
| CN107832234B (en) | Quick log block hit method for NAND FLASH | |
| CN113703671B (en) | Data block erasing method and related device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 518000 floors 1-3 and 4 of buildings 4 and 8, zone 2, Zhongguan honghualing Industrial South Zone, No. 1213 Liuxian Avenue, Pingshan community, Taoyuan Street, Nanshan District, Shenzhen, Guangdong Applicant after: BIWIN STORAGE TECHNOLOGY Co.,Ltd. Address before: 518000 1st, 2nd, 4th and 5th floors of No.4 factory building, tongfuyu industrial town, Taoyuan Street, Nanshan District, Shenzhen City, Guangdong Province Applicant before: BIWIN STORAGE TECHNOLOGY Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |