CN112073113A - Satellite-borne broadband waveform generation assembly and method - Google Patents

Satellite-borne broadband waveform generation assembly and method Download PDF

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Publication number
CN112073113A
CN112073113A CN202010836052.8A CN202010836052A CN112073113A CN 112073113 A CN112073113 A CN 112073113A CN 202010836052 A CN202010836052 A CN 202010836052A CN 112073113 A CN112073113 A CN 112073113A
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China
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programmable logic
logic device
irradiation
fpga programmable
broadband
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CN202010836052.8A
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Chinese (zh)
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史康为
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Beijing Institute of Radio Measurement
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Beijing Institute of Radio Measurement
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/185Space-based or airborne stations; Stations for satellite systems
    • H04B7/1851Systems using a satellite or space-based relay
    • H04B7/18515Transmission equipment in satellites or space-based relays

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Astronomy & Astrophysics (AREA)
  • Aviation & Aerospace Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The invention discloses a satellite-borne broadband waveform generating assembly and a satellite-borne broadband waveform generating method, wherein the satellite-borne broadband waveform generating assembly comprises an anti-irradiation FLASH, an anti-irradiation read-back refreshing chip and an FPGA (field programmable gate array) programmable logic device, wherein the anti-irradiation read-back refreshing chip acquires a program configuration file of the FPGA programmable logic device from the anti-irradiation FLASH and starts the FPGA programmable logic device; the irradiation-resistant read-back refreshing chip monitors and refreshes the FPGA programmable logic device at intervals of n seconds, refreshes the FPGA programmable logic device after monitoring that the FPGA programmable logic device is turned over, and is used for recovering the turned FPGA programmable logic device, wherein n is a natural number. The invention adopts the irradiation-resistant read-back refreshing chip and the irradiation-resistant FLASH, and uses the broadband signal real-time generation and digital quadrature modulation technology in cooperation with the FPGA programmable logic device, thereby ensuring the performance of the satellite-borne broadband waveform generating assembly and improving the reliability and the irradiation resistance of the assembly.

Description

Satellite-borne broadband waveform generation assembly and method
Technical Field
The invention relates to the field of communication, in particular to a satellite-borne broadband waveform generation assembly and a method.
Background
The satellite-borne broadband waveform generating assembly in the prior art is limited by the radiation resistance, generally adopts an analog mode to generate broadband signals, the bandwidth of the waveforms is generally not more than 500MHz, and the quality of the signals is unstable. Under the space radiation environment, the turning of one bit in the SRAM type FPGA programmable logic device circuit of the existing satellite-borne broadband waveform generation assembly can not cause the function of the FPGA to be wrong, but if a correction measure is not taken timely, the turning number is accumulated continuously, and when the turning number is accumulated to a certain degree, the system can finally cause system failure.
Disclosure of Invention
It is an object of the present invention to provide a satellite-borne broadband waveform generating assembly to solve at least one of the problems of the prior art.
In order to achieve the purpose, the invention adopts the following technical scheme:
the invention provides a satellite-borne broadband waveform generating assembly, which comprises:
an anti-irradiation FLASH, an anti-irradiation read-back refreshing chip and an FPGA programmable logic device,
the irradiation-resistant read-back refreshing chip acquires a program configuration file of the FPGA programmable logic device from the irradiation-resistant FLASH and starts the FPGA programmable logic device;
the irradiation-resistant read-back refreshing chip monitors and refreshes the FPGA programmable logic device at intervals of n seconds, refreshes the FPGA programmable logic device after monitoring that the FPGA programmable logic device is turned over, and is used for recovering the turned FPGA programmable logic device, wherein n is a natural number.
Wherein, the 'broadband' in the satellite-borne broadband waveform generating component is not less than 900 MHz;
in one specific example, the waveform of the "wideband" has an in-band flatness of less than 1dB, and an in-band phase linearity of less than 10 degrees;
in a specific example, the assembly further includes a ground upper injection interface, which is used to connect the ground monitoring station with the anti-radiation read-back refreshing chip, so that the ground monitoring station reads and writes the anti-radiation FLASH connected with the anti-radiation read-back refreshing chip.
In a specific example, the FPGA programmable logic device further includes: the system comprises a broadband signal real-time generating unit and a digital quadrature modulation unit, wherein the broadband signal real-time generating unit is used for generating a broadband baseband signal in real time; the digital quadrature modulation unit is used for performing digital quadrature modulation on the broadband baseband signal so as to output a digital quadrature modulation signal.
In a specific example, the module further includes an anti-radiation interface for receiving an input control signal of the module, so that the broadband signal real-time generation unit generates the broadband baseband signal in real time according to the control signal.
In one specific example, the component further comprises a high-speed DAC for receiving an input clock signal of the component, receiving the digital quadrature modulated signal and thereby outputting the width waveform signal.
The high-speed DAC is a high-speed digital-to-analog converter, and the high-speed (more than or equal to 30MSPS) DAC comprises broadband radio frequency, intermediate frequency signal processing and general baseband category.
In a specific example, n is: n is more than or equal to 1 second and less than or equal to 30 seconds.
Preferably, n is 5 seconds;
the present invention provides a method of wideband waveform generation,
the irradiation-resistant read-back refreshing chip acquires a program configuration file of the FPGA programmable logic device from the irradiation-resistant FLASH and starts the FPGA programmable logic device;
the irradiation-resistant read-back refreshing chip monitors and refreshes the FPGA programmable logic device at intervals of n seconds, refreshes the FPGA programmable logic device after monitoring that the FPGA programmable logic device is turned over, and is used for recovering the turned FPGA programmable logic device, wherein n is a natural number.
In a specific example, the FPGA programmable logic device further includes: a broadband signal real-time generating unit and a digital quadrature modulating unit,
the method also comprises
The broadband signal real-time generating unit generates a broadband baseband signal in real time;
the digital quadrature modulation unit performs digital quadrature modulation on the wideband baseband signal to output a digital quadrature modulation signal.
The invention has the following beneficial effects:
the satellite-borne broadband waveform generating assembly provided by the invention has the advantages that the bandwidth of an output signal is not less than 900MHz, the flatness in a waveform band is less than 1dB, the linearity of an in-band phase is less than 10 degrees, the radiation resistance is strong, and the reliability is high.
Drawings
The following describes embodiments of the present invention in further detail with reference to the accompanying drawings;
FIG. 1 is a schematic diagram of a satellite-borne broadband waveform generation assembly according to one embodiment of the present application.
Fig. 2 is a flowchart of a method for broadband waveform generation by a satellite-borne broadband waveform generation component according to an embodiment of the present application.
Description of reference numerals: 1. the system comprises an anti-irradiation FLASH, 2 an anti-irradiation read-back refreshing chip, 3 an above-ground injection interface, 4 an FPGA programmable logic unit, 5 an anti-irradiation interface, 6 a real-time broadband signal generating unit, 7 a digital quadrature modulation unit and 8 a high-speed DAC
Detailed Description
In order to more clearly illustrate the invention, the invention is further described below with reference to preferred embodiments and the accompanying drawings. Similar parts in the figures are denoted by the same reference numerals. It is to be understood by persons skilled in the art that the following detailed description is illustrative and not restrictive, and is not to be taken as limiting the scope of the invention.
First embodiment
As shown in fig. 1, in one embodiment of the present invention, a satellite-borne wideband waveform generation assembly is disclosed, the assembly comprising: anti-irradiation FLASH_1. An irradiation-resistant read-back refreshing chip 2 and an FPGA programmable logic device 4.
Wherein, in a specific example, the irradiation resistant FLASH_The data interface of the 1 is connected with the data interface of the irradiation-resistant read-back refreshing chip 2; the configuration interface of the irradiation-resistant read-back refreshing chip 2 is connected with the configuration interface of the FPGA programmable logic device 4; so that the irradiation-resistant read-back refreshing chip 2 can be used as irradiation-resistant FLASH_1, acquiring a program configuration file of the FPGA programmable logic device 4, and starting the FPGA programmable logic device 4; the irradiation-resistant read-back refreshing chip 2 monitors and refreshes the FPGA programmable logic device 4 every n seconds, refreshes the FPGA programmable logic device 4 after monitoring that the FPGA programmable logic device 4 is turned over, and is used for recovering the turned FPGA programmable logic device 4, wherein n is a natural number. The anti-radiation read-back refreshing chip has high self reliability, strong anti-radiation capability and low power consumption. Wherein, the bandwidth of the 'broadband' in the satellite-borne broadband waveform generating component is not less than 900 MHz.
In one particular example, the waveform of the "wideband" has an in-band flatness of less than 1dB and an in-band phase linearity of less than 10 degrees.
In a specific example, the assembly further comprises an above-ground injection interface 3, wherein the above-ground injection interface 3 is connected with an injection interface of the irradiation-resistant read-back refresh chip 2; is used for connecting the ground monitoring station with the anti-radiation read-back refreshing chip 2 so as to lead the ground monitoring station to carry out anti-radiation FLASH treatment_1 for reading and writing.
In a specific example, the FPGA programmable logic device 4 further includes: the broadband signal real-time generating unit 6 and the digital quadrature modulating unit 7, wherein the output end of the broadband signal real-time generating unit 6 is connected with the input end of the digital quadrature modulating unit 7; the broadband signal real-time generating unit 6 is used for generating a broadband baseband signal in real time; the digital quadrature modulation unit 7 is configured to perform digital quadrature modulation on the wideband baseband signal to output a digital quadrature modulated signal.
In a specific example, the assembly further comprises an anti-radiation interface 5, and an input control signal of the assembly is connected with an input end of the anti-radiation interface; the radiation-resistant interface 5 is connected with the input end of the broadband signal real-time generation unit 6, so that the broadband signal real-time generation unit 6 generates the broadband baseband signal in real time according to the control signal.
In a specific example, the module further comprises a high-speed DAC8, an input clock signal of the module is connected to a clock input terminal of the high-speed DAC8 for receiving the input clock signal of the module, and a data input terminal of the high-speed DAC8 is connected to an output terminal of the digital quadrature modulation unit 7 for receiving the digital quadrature modulation signal to output the width waveform signal.
The high-speed DAC is a high-speed digital-to-analog converter, and the high-speed (more than or equal to 30MSPS) DAC comprises broadband radio frequency, intermediate frequency signal processing and general baseband category.
In a specific example, n is: n is more than or equal to 1 second and less than or equal to 30 seconds.
In a specific example, the natural number n is 5, the irradiation-resistant read-back refresh chip 2 monitors and refreshes the FPGA programmable logic device 4 at intervals of 5 seconds, and refreshes the FPGA programmable logic device after monitoring that the FPGA programmable logic device is turned over, so as to restore the turned FPGA programmable logic device.
The satellite-borne broadband waveform generating assembly provided by the invention has the advantages that the bandwidth of an output signal is not less than 900MHz, the flatness in a waveform band is less than 1dB, the linearity of an in-band phase is less than 10 degrees, the radiation resistance is strong, and the reliability is high.
Second embodiment
As shown in fig. 2, one embodiment of the present invention discloses a method of wideband waveform generation,
the method comprises the following steps: the anti-irradiation read-back refreshing chip 2 secondary anti-irradiation FLASH_1, acquiring a program configuration file of the FPGA programmable logic device 4, and starting the FPGA programmable logic device 4;
the irradiation-resistant read-back refreshing chip 2 monitors and refreshes the FPGA programmable logic device 4 every n seconds, refreshes the FPGA programmable logic device 4 after monitoring that the FPGA programmable logic device 4 is turned over, and is used for recovering the turned FPGA programmable logic device 4, wherein n is a natural number.
In a specific example, the FPGA programmable logic device 4 further includes: a wideband signal real-time generation unit 6 and a digital quadrature modulation unit 7.
The method further comprises the following steps:
the broadband signal real-time generating unit 6 generates a broadband baseband signal in real time;
the digital quadrature modulation unit 7 performs digital quadrature modulation on the wideband baseband signal to output a digital quadrature modulated signal.
The invention provides a method for generating broadband waveforms, which adopts an anti-irradiation read-back refreshing chip and an anti-irradiation FLASH, and uses a broadband signal real-time generation and digital quadrature modulation technology by matching with an FPGA programmable logic device, so that the bandwidth of an output signal is not less than 900MHz, the in-band flatness of the waveforms is less than 1dB, and the in-band phase linearity is less than 10 degrees, thereby ensuring the performance of a satellite-borne broadband waveform generating assembly and improving the reliability and the anti-irradiation capability of the assembly.
In the description of the present invention, it should be noted that, in the description of the present invention, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention, and it will be obvious to those skilled in the art that other variations and modifications can be made on the basis of the above description, and all embodiments cannot be exhaustive, and all obvious variations and modifications belonging to the technical scheme of the present invention are within the protection scope of the present invention.

Claims (9)

1. An on-board broadband waveform generating assembly, comprising:
an anti-irradiation FLASH (1), an anti-irradiation read-back refreshing chip (2) and an FPGA programmable logic device (4),
the irradiation-resistant read-back refreshing chip (2) acquires a program configuration file of the FPGA programmable logic device (4) from the irradiation-resistant FLASH (1), and starts the FPGA programmable logic device (4);
the irradiation-resistant read-back refreshing chip (2) monitors and refreshes the FPGA programmable logic device (4) every n seconds, refreshes the FPGA programmable logic device (4) after monitoring that the FPGA programmable logic device (4) is turned over, and is used for recovering the turned FPGA programmable logic device (4), wherein n is a natural number.
2. The on-board broadband waveform generating assembly of claim 1,
the assembly further comprises an above-ground injection interface (3) which is used for connecting the ground monitoring station with the anti-irradiation read-back refreshing chip (2) so that the ground monitoring station can read and write the anti-irradiation FLASH (1) connected with the anti-irradiation read-back refreshing chip (2).
3. The on-board broadband waveform generating assembly of claim 1,
the FPGA programmable logic device (4) further comprises: the device comprises a broadband signal real-time generating unit (6) and a digital quadrature modulation unit (7), wherein the broadband signal real-time generating unit (6) is used for generating a broadband baseband signal in real time; the digital quadrature modulation unit (7) is configured to perform digital quadrature modulation on the wideband baseband signal to output a digital quadrature modulated signal.
4. The on-board broadband waveform generating assembly of claim 3,
the assembly further comprises an anti-radiation interface (5) for receiving an input control signal of the assembly, so that the broadband signal real-time generation unit (6) generates the broadband baseband signal in real time according to the control signal.
5. The on-board broadband waveform generating assembly of claim 3,
the assembly further comprises a high-speed DAC (8) for receiving an input clock signal of the assembly, receiving the digital quadrature modulated signal and thereby outputting the width waveform signal.
6. The on-board broadband waveform generating assembly according to any one of claims 1 to 5,
the n is: n is more than or equal to 1 second and less than or equal to 30 seconds.
7. The on-board broadband waveform generating assembly of claim 6,
the n is 5 seconds.
8. A method of wideband waveform generation using the assembly of any of claims 1-7,
the irradiation-resistant read-back refreshing chip (2) acquires a program configuration file of the FPGA programmable logic device (4) from the irradiation-resistant FLASH (1), and starts the FPGA programmable logic device (4);
the irradiation-resistant read-back refreshing chip (2) monitors and refreshes the FPGA programmable logic device (4) every n seconds, refreshes the FPGA programmable logic device (4) after monitoring that the FPGA programmable logic device (4) is turned over, and is used for recovering the turned FPGA programmable logic device (4), wherein n is a natural number.
9. The method of claim 8,
the FPGA programmable logic device (4) further comprises: a broadband signal real-time generating unit (6) and a digital quadrature modulation unit (7),
the method also comprises
The broadband signal real-time generating unit (6) generates a broadband baseband signal in real time;
the digital quadrature modulation unit (7) performs digital quadrature modulation on the wideband baseband signal to output a digital quadrature modulation signal.
CN202010836052.8A 2020-08-19 2020-08-19 Satellite-borne broadband waveform generation assembly and method Pending CN112073113A (en)

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CN106557346A (en) * 2016-11-24 2017-04-05 中国科学院国家空间科学中心 A kind of primary particle inversion resistant star-carried data processing system and method
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