CN112020764B - Method for evaluating semiconductor wafer and method for manufacturing semiconductor wafer - Google Patents
Method for evaluating semiconductor wafer and method for manufacturing semiconductor wafer Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 209
- 238000000034 method Methods 0.000 title claims abstract description 56
- 238000004519 manufacturing process Methods 0.000 title claims description 115
- 230000002093 peripheral effect Effects 0.000 claims abstract description 29
- 230000004069 differentiation Effects 0.000 claims abstract description 14
- 235000012431 wafers Nutrition 0.000 claims description 250
- 238000011156 evaluation Methods 0.000 claims description 92
- 238000005498 polishing Methods 0.000 claims description 18
- 238000002360 preparation method Methods 0.000 claims description 16
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
- 229910052710 silicon Inorganic materials 0.000 description 15
- 239000010703 silicon Substances 0.000 description 15
- 239000000523 sample Substances 0.000 description 12
- 239000013078 crystal Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 238000007689 inspection Methods 0.000 description 5
- 230000001066 destructive effect Effects 0.000 description 4
- 238000005070 sampling Methods 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 2
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- 239000006061 abrasive grain Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/24—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/24—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
- G01B11/255—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures for measuring radius of curvature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B2210/00—Aspects not specifically covered by any group under G01B, e.g. of wheel alignment, caliper-like sensors
- G01B2210/56—Measuring geometric parameters of semiconductor structures, e.g. profile, critical dimensions or trench depth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02021—Edge treatment, chamfering
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Condensed Matter Physics & Semiconductors (AREA)
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Abstract
The invention provides a method for evaluating a semiconductor wafer, which comprises the following steps: producing a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction; and performing a second differentiation of the profile curve, wherein the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfer formed on an outer peripheral edge portion of the wafer, the profile curve includes a curve portion, the curve portion indicates that an X-axis value corresponds to a horizontal direction position coordinate, a Y-axis value corresponds to a vertical direction position coordinate, and a cross-sectional profile of a region from the outer peripheral edge portion side portion of the main surface of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion is estimated, and the method further includes evaluating a shape of a boundary portion between the main surface and the chamfer adjacent to the main surface based on an index determined based on the second differentiation curve obtained by the second differentiation.
Description
Technical Field
The present invention relates to a method for evaluating a semiconductor wafer and a method for manufacturing a semiconductor wafer.
Background
In recent years, a semiconductor wafer has been evaluated for the shape of the peripheral edge portion of the wafer (for example, refer to patent document 1).
Prior art literature
Patent literature
Patent document 1: japanese patent laid-open publication 2016-130738
Technical problem to be solved by the invention
Semiconductor wafers are generally manufactured by performing various processes on wafers cut from an ingot. Since the outer peripheral edge portion of the wafer cut from the ingot has a corner portion when the wafer is left as it is, cracks or chipping are likely to occur. Therefore, the chamfer surface is generally formed by chamfering the peripheral edge portion of at least one of the front surface (front surface) side and the back surface (back surface) side of the semiconductor wafer, which are the device formation surface sides. Regarding this chamfer, patent document 1 proposes the following: an image is obtained so that the chamfer is displayed in white, and the width of the chamfer is calculated from the width of the image (see paragraphs 0060 to 0062 of patent document 1). Hereinafter, unless otherwise indicated, the "front surface" of a semiconductor wafer refers to either one or both of the front surface and the back surface.
In the surface of the semiconductor wafer, the main surface on the front side is a plane on which devices are formed, and the plane on the back side is a main surface on the back side. The chamfer surface formed at the peripheral edge portion of the wafer has a surface shape inclined with respect to the adjacent main surface. Therefore, if the cross-sectional shape of the semiconductor wafer in the thickness direction is observed, the shape greatly changes at the boundary portion between the main surface and the chamfer surface adjacent to the main surface. The shape of the boundary portion between the principal surface and the chamfer surface can be used as an index for predicting the occurrence easiness of chipping and flaw in the manufacturing process of the semiconductor device. For example, in a manufacturing process of a semiconductor device, by appropriately setting the shape of the boundary portion between the wafer surface (for example, the back surface) and the chamfer surface in accordance with the shape of the wafer support for supporting the wafer at the time of heat treatment, chipping or flaw of the boundary portion due to contact is less likely to occur, and therefore the occurrence rate of dislocation (slip) or dust due to chipping or flaw can be reduced.
However, the method described in patent document 1 is a method for obtaining the width dimension of the chamfer, and in the method described in patent document 1, the shape of the boundary portion between the chamfer and the main surface cannot be evaluated.
Disclosure of Invention
Accordingly, an object of the present invention is to provide a novel method for evaluating the shape of the boundary portion between the chamfer surface and the main surface of a semiconductor wafer.
One aspect of the present invention relates to a method for evaluating a semiconductor wafer (hereinafter, also simply referred to as "evaluation method") comprising:
producing a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction; and
performing secondary differentiation on the profile curve;
the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfer formed on the peripheral edge portion of the wafer,
the profile curve includes a curve portion indicating a cross-sectional profile of a region from an outer peripheral edge portion side portion of a main surface on one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion, the curve portion having an X-axis value corresponding to a horizontal direction position coordinate and a Y-axis value corresponding to a vertical direction position coordinate,
the above-mentioned evaluation method of the semiconductor wafer further comprises: based on an index determined from a quadratic differential curve obtained by the quadratic differential, the shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated.
In one mode, the evaluation method may include:
determining the value of the X axis at two points on the curve which are the same as the value of the Y axis in the peak area of the secondary differential curve obtained by the secondary differential;
determining a region between two points where the value of the X axis is the determined value as a circle fitting region in the curve portion of the contour curve before the second differentiation;
fitting a circle to the contour shape of the circle fitting region to produce a circle; and
the size of the circle produced was used as the index.
The present inventors have repeatedly conducted intensive studies, and as a result, have newly found that: the shape of the boundary portion between the chamfer surface and the main surface is flatter with respect to the size of the circle, and the size of the circle is larger; the steeper the shape of the boundary portion between the chamfer and the main surface, the smaller the size of the circle. Therefore, the degree of smoothness/steepness of the shape of the boundary portion between the main surface and the chamfer surface can be evaluated based on the size of the circle.
In one aspect, the evaluation method may include calculating the dimensions of the circles at a plurality of different locations of the semiconductor wafer to be evaluated, and evaluating the shape of the boundary portion using, as an index, representative values of the dimensions of the circles calculated at the plurality of different locations.
In one embodiment, the representative value may be an average value of the sizes of the plurality of circles.
In one mode, the evaluation method may include: the value of the X axis at two points having the same value of the Y axis on the curve located in the peak region of the quadratic differential curve obtained by the quadratic differential is determined, and the distance between the determined two points in the X axis direction is used as the index. The present inventors have repeatedly conducted intensive studies, and as a result, have newly found that: the more gentle the shape of the boundary portion between the chamfer surface and the main surface is, the larger the value of the distance is; the steeper the shape of the boundary portion between the chamfer surface and the main surface, the smaller the value of the distance. Therefore, the smoothness/steepness of the shape of the boundary portion between the main surface and the chamfer surface can be evaluated based on the value of the distance.
In one mode, the value of the Y axis that determines the value of the X axis of the two points may be: the value of the Y axis is set to 0% at the position where the value of the Y axis is 0%, and the value of the Y axis at the position where the depth or height of the peak is 40 to 80% is set to 100% at the peak depth or peak height of the peak region.
In one aspect, the evaluation method may include creating the contour curve using positional coordinate information obtained by microscopic observation of the semiconductor wafer to be evaluated from above the one surface side.
In one embodiment, the evaluation method may include performing the microscopic observation by a laser microscope.
Another aspect of the present invention relates to a method for manufacturing a semiconductor wafer, comprising:
manufacturing an alternative semiconductor wafer as a product factory;
evaluating the alternative semiconductor wafer by the evaluation method; and
and delivering the semiconductor wafer judged as a qualified product as a preparation for shipping the semiconductor wafer as a product.
Another aspect of the present invention relates to a method for manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
withdrawing at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method; and
semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafers judged as the qualified product as a result of the above-described evaluation are delivered for preparation for shipment as product semiconductor wafers.
Another aspect of the present invention relates to a method for manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method;
Determining a manufacturing condition, to which a change is applied to the test manufacturing condition, as an actual manufacturing condition or determining the test manufacturing condition as an actual manufacturing condition based on a result of the evaluation; and
the semiconductor wafer is manufactured under the above-determined actual manufacturing conditions.
In one embodiment, the modified manufacturing conditions are at least one of polishing conditions and chamfering conditions for the surface of the semiconductor wafer.
ADVANTAGEOUS EFFECTS OF INVENTION
According to one aspect of the present invention, a novel method for evaluating the shape of a boundary portion between a chamfer surface and a main surface of a semiconductor wafer can be provided.
Drawings
Fig. 1 is an example of a contour curve including a curve portion showing a cross-sectional contour of a region from an outer peripheral edge portion side portion of a main surface on a front surface side of a semiconductor wafer to the outer peripheral edge portion.
Fig. 2 is a quadratic differential curve produced by differentiating the contour curve shown in fig. 1 twice.
Fig. 3 is an explanatory diagram of a step of determining a circle-fitting region.
Fig. 4 is an explanatory diagram of a step of determining a circle-fitting region.
Fig. 5 shows an example of a circle formed on the contour curve shown in fig. 1.
Fig. 6 shows a graph plotting the diameter (arithmetic average) of circles obtained for various semiconductor wafers in the examples against the reference value.
Fig. 7 is a graph plotting the radius of a circle obtained for various semiconductor wafers in the example against the value of the distance in the X-axis direction between two points on the curve located in the peak region of the quadratic differential curve, where the value of the Y-axis is the same.
Fig. 8 shows a binarized image (an image obtained by performing binarization processing after amplifying by only 10 times in the wafer thickness direction) obtained by an evaluation method for obtaining a reference value.
Fig. 9 shows an example of the evaluation result of the evaluation method for obtaining the reference value.
Detailed Description
[ method for evaluating semiconductor wafer ]
One aspect of the present invention relates to a method for evaluating a semiconductor wafer, including: producing a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction; performing a second differentiation on the profile curve; the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfer formed on an outer peripheral edge portion of the wafer, the contour curve including a curve portion indicating a cross-sectional contour of a region from the outer peripheral edge portion side portion of the main surface on one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion, the contour curve indicating that a value of an X-axis corresponds to a horizontal direction position coordinate and a value of a Y-axis corresponds to a vertical direction position coordinate, the method further comprising: based on an index determined from a quadratic differential curve obtained by the quadratic differential, the shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated.
The evaluation method is described in further detail below.
< semiconductor wafer to be evaluated >
The semiconductor wafer to be evaluated by the above-described evaluation method may be one in which a chamfer is formed by chamfering the peripheral edge portion of the wafer. The semiconductor wafer to be evaluated may be various semiconductor wafers generally used as a semiconductor substrate. For example, various silicon wafers can be used as specific examples of the semiconductor wafer. The silicon wafer may be, for example, a silicon single crystal wafer which is cut from a silicon single crystal ingot and then subjected to various processes such as chamfering. As a specific example of the silicon single crystal wafer, there is a polished wafer having a polished surface on its surface by polishing. The silicon wafer may be any of various silicon wafers such as an epitaxial wafer having an epitaxial layer on a silicon single crystal wafer, and an annealed wafer having a modified layer formed on a silicon single crystal wafer by an annealing process.
Hereinafter, each step of the evaluation method will be described with reference to the drawings. However, the embodiment shown in the drawings is an example, and the evaluation method is not limited to the embodiment shown in the drawings.
< preparation of Profile Curve >
The evaluation method includes creating a profile curve (also referred to as "cross-sectional profile" in general) representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction. The profile curve is a profile curve including a curve portion in which a value of an X-axis (horizontal axis) corresponds to a horizontal direction position coordinate, a value of a Y-axis (vertical axis) corresponds to a vertical direction position coordinate, and a cross-sectional profile of a region from an outer peripheral edge portion side portion of a main surface on one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion. Fig. 1 shows an example of such a contour curve. Fig. 1 is a contour curve including a curve portion showing a cross-sectional contour of a region from an outer peripheral edge portion side portion of a main surface on a front surface side of a semiconductor wafer to the outer peripheral edge portion. The units of the values on the X-axis and the units of the values on the Y-axis are both μm (micrometers). The X-axis value corresponds to the position coordinates of each position on the cross-sectional profile in the thickness direction of the semiconductor wafer in the horizontal direction, that is, in the direction parallel to the main surface, and the Y-axis value corresponds to the position coordinates of each position on the cross-sectional profile in the thickness direction of the semiconductor wafer in the vertical direction, that is, in the thickness direction. In fig. 1, noise appears in a region having an X-axis value of about 230 or more, but this region corresponds to a region separated from the boundary portion in the cross-sectional profile, and does not affect the boundary portion shape evaluation.
The profile curve can be produced using various evaluation apparatuses capable of producing a profile curve representing a cross-sectional profile of a boundary portion including the shape of the semiconductor wafer to be evaluated. In one embodiment, the profile curve can be produced by a so-called non-destructive method without cutting out a sample from the semiconductor wafer to be evaluated, or in another embodiment, the profile curve can be produced by cutting out a sample (for example, cleaving) from the semiconductor wafer to be evaluated to expose a cross section (so-called destructive method). From the viewpoint of ease of evaluation, the contour curve is preferably produced by a non-destructive method. In addition, from the viewpoint of easiness in evaluating the shape of the boundary portion in a plurality of different portions of the semiconductor wafer to be evaluated, the contour curve is preferably produced by a non-destructive method.
In order to create a contour curve by a nondestructive method, it is preferable to use various microscopes capable of acquiring positional coordinate information of each position on a cross-sectional contour in a thickness direction of a semiconductor wafer by observing the semiconductor wafer to be evaluated from above one surface side. Examples of such a microscope include a laser microscope, a white interference microscope, and a Scanning Probe Microscope (SPM) such as a Scanning Tunneling Microscope (STM) and an Atomic Force Microscope (AFM), and from the viewpoint of resolution, a laser microscope and a white interference microscope are preferable, and a laser microscope is more preferable.
< preparation of a second differential Curve >
After the profile curve is created, a second derivative curve is created by performing a second derivative on the created profile curve. Fig. 2 is a quadratic differential curve produced by differentiating the contour curve shown in fig. 1 twice. The second differentiation can be performed by a known method such as commercially available analysis software.
If the cross-sectional shape of the semiconductor wafer in the thickness direction is observed, the shape greatly changes at the boundary portion between the main surface and the chamfer surface adjacent to the main surface. On a contour curve representing a cross-sectional contour in the thickness direction of the semiconductor wafer, an inflection point region in which a coordinate change in the Y-axis direction is large with respect to a coordinate change in the X-axis direction is a region corresponding to the boundary portion. In one embodiment of the above-described evaluation method, the degree of change in the shape of the inflection point region can be numerically calculated as the size of a circle produced as follows.
< determination of circle-fitting region >
Fig. 3 and 4 are explanatory diagrams of the step of determining the circle-fitting region.
Fig. 3 is a diagram in which ellipses and broken lines for explanation are added to the quadratic differential curve shown in fig. 2. The portion surrounded by the ellipse is the peak area. In this peak region, two points having the same value on the Y axis on the curve are two points on the curve of the peak region at the intersection with the broken line. According to the study of the present inventors, from the viewpoint of further improving the accuracy of the evaluation by the size of the circle, the value of the Y axis, which determines the value of the X axis at the above two points, is: taking the position of the Y axis value of 0 as a reference (0%), if the peak region has a valley-shaped peak shape, the peak depth is taken as 100%, if the peak region has a mountain-shaped peak shape, the peak height is taken as 100%, preferably the value of the Y axis at a position of 40 to 80% in depth or height, more preferably the value of the Y axis at a position of 50 to 70%, even more preferably the value of the Y axis at a position of 55 to 65%, and most preferably the value of the Y axis at a position of 60%. The number of peak regions existing in the quadratic differential curve may be one or two or more. When there are a plurality of peak regions on the quadratic differential curve, the peak depth at which the peak region is deepest can be set to 100% for the peak regions of a plurality of valley types. The peak heights of the peak areas of the plurality of mountain shapes may be set to be 100%. Further, the X-axis value, which is the same for two points having the same Y-axis value, may be the two points farthest from each other among the plurality of peak regions. As an example, when two peak regions (a first peak region and a second peak region) exist on the quadratic differential curve, a total of four points of two points (X1 and X2) in the first peak region and two points (X3 and X4) in the second peak region exist as the same value of the X axis as the value of the Y axis. Here, the value of X axis is X1< X2< X3< X4. In this case, X1 and X4, which are the two points farthest apart, may be employed as the values of the X axis for determining the two points where the values of the Y axis of the circle-fitting region are the same.
In one embodiment of the above-described evaluation method, the shape of the boundary portion may be evaluated using the distance between the two points in the X-axis direction determined by the above-described method as an index without performing the circle fitting. For example, the distance may be a distance in the X-axis direction between two points of intersection with a broken line on a curve of a peak region surrounded by an ellipse in fig. 3. In the above aspect, the value of the Y axis that determines the value of the X axis of the two points is: taking the position of the Y axis value of 0 as a reference (0%), if the peak region has a valley-shaped peak shape, the peak depth is taken as 100%, if the peak region has a mountain-shaped peak shape, the peak height is taken as 100%, preferably the value of the Y axis at a position of 40 to 80% in depth or height, more preferably the value of the Y axis at a position of 50 to 70%, even more preferably the value of the Y axis at a position of 55 to 65%, and most preferably the value of the Y axis at a position of 60%.
In fig. 4, the upper graph is a contour curve shown in fig. 1, the lower graph is a quadratic differential curve shown in fig. 2, and a broken line for explanation is given as shown in fig. 3. The dash-dot line in fig. 4 indicates the position where the value of the X-axis is the same in the upper and lower diagrams. Also in fig. 4, a circle fitting area by two points (points of intersection of two chain lines with the profile curve, respectively) having the same X-axis value as the two points having the same Y-axis value determined in the manner shown in fig. 3 are determined on the profile curve, is shown on the curve of the peak area of the above-described quadratic differential curve. In fig. 4, only a dot-dash line is shown for the sake of illustration, but two points having the same X-axis value as the X-axis value of the two points determined in the quadratic differential curve may be determined as long as the two points on the contour curve are determined.
< preparation of circle >
If the circle-fitting region is determined in the above manner, a circle is fitted to the contour shape (curve shape) of the circle-fitting region to produce a circle. Fitting can be performed by a known method such as commercially available analysis software. Fig. 5 shows an example of a circle formed on the contour curve shown in fig. 1. The units of the X-axis and the Y-axis of fig. 1 are μm (micrometers), so the size of a circle can be expressed in units of μm (micrometers).
< evaluation of shape of boundary portion >
In one embodiment, the shape evaluation of the boundary portion can be performed based on the size of the circle. Specifically, the smaller the size of the circle is, the steeper the shape of the boundary portion can be determined; the larger the size of the circle is, the more gentle the shape of the boundary portion can be determined. The shape of the boundary portion can be evaluated using the size of the circle in the above-described manner, and since the evaluation can be objectively performed based on the numerical value, it is preferable from the viewpoint of reliability of the evaluation. Further, from the viewpoint of easy comparison with the past evaluation results, it is also preferable that the evaluation can be performed based on a numerical value such as the size of a circle.
The size of the circle may be, for example, a diameter or a radius of the circle in a certain portion of the semiconductor wafer to be evaluated. Alternatively, the evaluation method may include obtaining the dimensions of the circles at a plurality of different portions of the semiconductor wafer to be evaluated. The shape of the boundary portion can be evaluated using, as an index, representative values of the sizes of the circles obtained at the different positions. For example, the representative value may be an average value (for example, arithmetic average), a minimum value, a maximum value, or the like of diameters or radii of a plurality of circles.
In one embodiment, the shape of the boundary portion may be evaluated using the distance in the X-axis direction between the two points determined in the above manner as an index without performing the circle fitting. More specifically, the smaller the value of the distance, the steeper the shape of the boundary portion can be determined, and the larger the value of the distance, the flatter the shape of the boundary portion can be determined. The shape of the boundary portion can be evaluated using the distance value in the above manner, and can be objectively evaluated based on the numerical value, so that it is preferable from the viewpoint of reliability of the evaluation. It is also preferable that the evaluation can be performed based on the numerical values in the above-described manner, from the viewpoint of easy comparison with the past evaluation results.
The distance value may be, for example, a value obtained in the above-described manner at a certain portion of the semiconductor wafer to be evaluated. Alternatively, the evaluation method may include obtaining the distances at a plurality of different portions of the semiconductor wafer to be evaluated. The shape of the boundary portion can be evaluated using, as an index, the representative value of the distance values thus obtained in the above-described manner in a plurality of different locations. For example, the representative value may be an average value (for example, arithmetic average), a minimum value, a maximum value, or the like of the values of the plurality of distances.
As described above, according to the above-described evaluation method, the shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface can be evaluated on the wafer surface (front surface or back surface) of the semiconductor wafer.
[ method for manufacturing semiconductor wafer ]
A method for manufacturing a semiconductor wafer (first manufacturing method) according to an embodiment of the present invention includes:
manufacturing an alternative semiconductor wafer as a product factory;
evaluating the alternative semiconductor wafer by the evaluation method; and
and delivering the semiconductor wafer judged as a qualified product as a preparation for shipping the semiconductor wafer as a product.
A method for manufacturing a semiconductor wafer according to another aspect of the present invention (second manufacturing method) includes:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
withdrawing at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method; the method comprises the steps of,
semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafers judged as the qualified product as a result of the above-described evaluation are delivered for preparation for shipment as product semiconductor wafers.
A method for manufacturing a semiconductor wafer according to another aspect of the present invention (third manufacturing method) includes:
Manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method;
determining a manufacturing condition, to which a change is applied to the test manufacturing condition, as an actual manufacturing condition or determining the test manufacturing condition as an actual manufacturing condition based on a result of the evaluation; and
the semiconductor wafer is manufactured under the above-determined actual manufacturing conditions.
The first manufacturing method is an evaluation performed by the above-described evaluation method as a so-called pre-factory inspection. In the second manufacturing method, semiconductor wafers of the same lot as those determined to be acceptable as a result of so-called sampling inspection are delivered for preparation for shipment as product semiconductor wafers. In the third manufacturing method, the semiconductor wafer manufactured under the test manufacturing conditions is evaluated, and the actual manufacturing conditions are determined based on the evaluation result. In any of the first, second, and third manufacturing methods, the evaluation of the semiconductor wafer is performed by the evaluation method according to one embodiment of the present invention described above.
< first manufacturing method >
In the first manufacturing method, manufacturing of a semiconductor wafer lot as an alternative to product shipment can be performed in the same manner as in a general manufacturing method of semiconductor wafers. For example, a polished wafer, which is one embodiment of a silicon wafer, can be manufactured by a manufacturing process including: a silicon wafer is cut from a silicon single crystal ingot grown by the czochralski method (CZ method) or the like (sliced), chamfering, rough polishing (e.g., polishing), etching, mirror polishing (finish polishing), the above-mentioned processing steps, or cleaning performed after the processing steps. Further, the annealed wafer can be manufactured by performing an annealing treatment on the polished wafer manufactured in the above-described manner. The epitaxial wafer can be manufactured by vapor-phase growth (epitaxial growth) of an epitaxial layer on the surface of the polished wafer manufactured in the above-described manner.
The shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated in the manufactured semiconductor wafer by the evaluation method according to one embodiment of the present invention. Details of the evaluation method are as described above. And the result of the evaluation determines that the semiconductor wafer of the qualified product is delivered for preparation for shipment as a product semiconductor wafer. The criterion for determining whether the semiconductor wafer is a qualified product may be determined based on the quality required for the semiconductor wafer. For example, in one embodiment, a certain value or more (i.e., a threshold value or more) of the required circle size or the distance between the two points in the X-axis direction can be used as a criterion for determining that the product is a good product. As the size of the circle or the value of the distance, a representative value (for example, an average value (for example, arithmetic average), a minimum value, a maximum value, or the like) of the sizes of a plurality of circles or the values of a plurality of distances obtained by evaluation in different portions of the same semiconductor wafer can be used. The same applies to the second manufacturing method and the third manufacturing method. Examples of preparations for shipping the semiconductor wafer as a product include packaging. Thus, according to the first manufacturing method, the semiconductor wafer having the shape of the boundary portion between the principal surface and the chamfer surface, which is the desired shape of the product semiconductor wafer, can be stably supplied to the market.
< second production method >
The production of the semiconductor wafer lot in the second production method may be performed in the same manner as in the general production method of semiconductor wafers, for example, as described in the first production method. The total number of semiconductor wafers included in the semiconductor wafer lot is not particularly limited. The number of semiconductor wafers to be extracted from the manufactured semiconductor wafer lot and subjected to so-called sampling inspection is at least one, but may be two or more, and the number thereof is not particularly limited.
The shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated by the evaluation method according to one embodiment of the present invention. Details of the evaluation method are as described above. Then, the semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafers judged as the qualified product as a result of the evaluation are delivered for preparation for shipment as product semiconductor wafers. The criterion for determining whether the semiconductor wafer is a qualified product may be determined based on the quality required for the semiconductor wafer. For example, in one embodiment, a certain value or more (i.e., a threshold value or more) of the required circle size or the distance between the two points in the X-axis direction can be used as a criterion for determining that the product is a good product. The preparation for shipping the semiconductor wafer as a product is, for example, as described above for the first manufacturing method. According to the second manufacturing method, a semiconductor wafer having a shape of a boundary portion between the principal surface and the chamfer surface, which is a desired shape of a product semiconductor wafer, can be stably supplied to the market. Further, since the evaluation method according to one aspect of the present invention can perform nondestructive evaluation, in one aspect of the second manufacturing method, if the semiconductor wafers that are extracted from the semiconductor wafer lot and delivered for evaluation are judged as good as a result of the evaluation, the semiconductor wafers can be delivered for preparation for shipment as product semiconductor wafers, and then shipped as product semiconductor wafers after the preparation.
< third production method >
As the third manufacturing method, various conditions in various steps for manufacturing a semiconductor wafer can be cited as test manufacturing conditions and actual manufacturing conditions. The various steps for manufacturing the semiconductor wafer are as described in the first manufacturing method. The "actual manufacturing conditions" refer to the manufacturing conditions of the product semiconductor wafer.
In the third manufacturing method, as a pre-stage for determining actual manufacturing conditions, test manufacturing conditions are set, and the semiconductor wafer for evaluation is manufactured under the test manufacturing conditions. The shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated in the manufactured semiconductor wafer by the evaluation method according to one embodiment of the present invention. Details of the evaluation method are as described above. The number of the evaluation semiconductor wafers is not particularly limited, and may be at least one or two or more. If the shape of the boundary portion of the semiconductor wafer for evaluation is the desired shape of the product semiconductor wafer as a result of the evaluation, the product semiconductor wafer is manufactured using the test manufacturing conditions as actual manufacturing conditions and shipped, whereby the product semiconductor wafer whose boundary portion has the desired shape can be stably supplied to the market. On the other hand, when the shape of the boundary portion of the semiconductor wafer for evaluation is different from the desired shape of the semiconductor wafer for production as a result of the evaluation, the manufacturing condition to which the test manufacturing condition is changed is determined as the actual manufacturing condition. The manufacturing conditions to be changed are preferably manufacturing conditions that take into consideration the influence on the shape of the boundary portion. Examples of such production conditions include polishing conditions for the front surface (front surface and/or back surface) of a semiconductor wafer. Specific examples of the polishing conditions include rough polishing conditions and mirror polishing conditions, and more specifically, the type of polishing liquid, the abrasive grain concentration of the polishing liquid, the type of polishing pad (e.g., hardness, etc.), and the like. Further, examples of the manufacturing conditions include chamfering conditions, specifically, machining conditions such as grinding and polishing in chamfering, and more specifically, the type of polishing belt used for chamfering. The manufacturing conditions, in which the test manufacturing conditions are changed as described above, are determined as actual manufacturing conditions, and the product semiconductor wafer is manufactured under the actual manufacturing conditions and shipped, whereby the product semiconductor wafer having the shape of the boundary portion in the desired shape can be stably supplied to the market. In addition, the evaluation semiconductor wafer may be newly manufactured under the manufacturing conditions in which the test manufacturing conditions are changed, and the evaluation method according to one embodiment of the present invention may be repeated one or more times to determine whether the manufacturing conditions are actual manufacturing conditions or further change.
In the third manufacturing method described above, the method of determining whether the shape of the boundary portion of the semiconductor wafer for evaluation is the desired shape of the product semiconductor wafer may be referred to the description related to the determination of the pass of the first manufacturing method and the second manufacturing method.
Other details of the first, second, and third manufacturing methods can also be applied to known techniques related to the manufacturing method of the semiconductor wafer.
Examples (example)
The present invention will be further described below based on examples. However, the present invention is not limited to the embodiments shown in the examples.
1. Evaluation of semiconductor wafer
(1) Contour curve making
Four kinds of semiconductor wafers (silicon single crystal wafers (polished wafers) having a surface of (100) faces with a diameter of 300 mm) were prepared, in which polishing conditions and chamfering conditions of the wafer surfaces were different. These semiconductor wafers were observed microscopically from the front side using a laser microscope (VK-X200 manufactured by kenshi corporation), and profile curves including curve portions showing the cross-sectional profiles of the regions from the peripheral edge portion side portion to the main surface side portion of the main surface on the front side were obtained at respective positions turned 45 °, 90 °, 135 °, 180 °, 225 °, 270 °, 315 ° left-hand.
(2) Determination of circle fitting area and circle production
And performing secondary differentiation on the profile curve by using analysis software to obtain a secondary differentiation curve. In the peak region (valley shape) of the obtained quadratic differential curve, the X-axis value of two points having the same Y-axis value at the position of 60% depth is determined with the position of 0 in the Y-axis value being 0% and the peak depth being 100%.
Two points having the value of the X axis thus determined are determined on the contour curve, and the area between the two points is determined as a circle fitting area.
Next, a circle is formed by fitting the circle to the contour shape (curve shape) of the circle fitting region thus determined, and the diameter of the formed circle is obtained. For the four semiconductor wafers (hereinafter referred to as "wafer 1", "wafer 2", "wafer 3" and "wafer 4"), table 1 shows the arithmetic average of the diameters of the circles obtained at the respective positions.
TABLE 1
2. Description of evaluation method for acquiring reference value
The size of the circle obtained by the evaluation method according to one aspect of the present invention is a value that can be an index of the shape of the boundary portion, and can be confirmed, for example, as follows: the reference value obtained by the following evaluation method shows a good correlation with the size of the circle obtained by the evaluation method according to one embodiment of the present invention.
First, a cross-sectional image including a boundary portion to be evaluated is obtained for a semiconductor wafer. The cross-sectional image can be obtained by, for example, photographing a cross section exposed by cleaving the semiconductor wafer at the cleavage plane with a microscope.
An enlarged image in which the acquired sectional image is enlarged only in the thickness direction of the wafer is produced. Since the shape of the boundary portion can be emphasized with respect to the main surface (so-called horizontal plane) in the outline of the cross-sectional shape by enlarging only in the wafer thickness direction, the smoothness/steepness of the boundary portion can be evaluated with high accuracy by using the enlarged image as compared with using the non-enlarged cross-sectional image. Further, since the outline of the cross-sectional shape can be displayed more clearly by performing binarization processing on the enlarged image, the smoothness/steepness of the boundary portion can be evaluated more accurately.
In the binarized image thus obtained, the contour of the wafer cross-sectional shape is generally curved at the boundary between the principal surface and the chamfer. Therefore, on the contour, a circle having a circular arc shape similar to or identical to the shape of the curve is fitted to the shape of the curve of the boundary portion between the main surface and the chamfer surface. The larger the size, for example, the diameter or radius, of the circle (curvature circle) thus obtained, the more gentle the shape of the boundary portion can be determined, and the smaller the size of the circle can be determined as the steeper the shape of the boundary portion. As an example, fig. 9 shows the binarized image obtained by the above method (an image obtained by performing binarization processing after amplifying only 10 times in the wafer thickness direction) for two different semiconductor wafers. Fig. 9 also shows a circle having an arc substantially conforming to the shape of the curve of the boundary portion. The values shown in the circles are the diameters of the circles. In fig. 9, if the cross-sectional shapes of the sample 1 and the sample 2 are compared, the shape of the boundary portion of the sample 2 is gentle compared with the shape of the boundary portion of the sample 1. Regarding the size of the circle, if the comparison is made between the sample 1 and the sample 2, the diameter of the circle obtained for the sample 2 is larger than that of the circle obtained for the sample 1. As described above, the size of the circle obtained by the evaluation method for obtaining the reference value is associated with the shape of the boundary portion.
3. Acquisition of reference values
The four semiconductor wafers evaluated in the above 1 were cleaved on the (110) plane, respectively, to prepare cross-section observation samples.
The brightness and contrast of the produced cross-section observation sample were adjusted by using a differential interference microscope, and a cross-sectional image (imaging magnification: 500 times) including the boundary portion evaluated in the above 1 was obtained.
The obtained sectional image was taken into image processing software (software name Photoshop CS5 manufactured by Adobe corporation), and binarized only after being amplified 10 times in the wafer thickness direction.
A binarized image capturing software (presentation software (PowerPoint) manufactured by microsoft corporation) obtained by performing the binarization processing described above uses a graphic drawing tool of the same software to draw a circle having a shape of a curve of a boundary portion substantially matching a shape of an arc on a contour of a cross-sectional shape. The shape of the curve is roughly matched with the shape of the circular arc by visual judgment. Fig. 8 shows a binarized image (an image obtained by performing binarization processing after amplifying only 10 times in the wafer thickness direction) obtained by the above method. Fig. 8 also shows a circle having an arc substantially conforming to the shape of the curve of the boundary portion. In fig. 8, the numerical values shown in circles are diameters (units: arbitrary units) of circles, and these values are used as reference values.
4. Evaluation results
Fig. 6 shows graphs in which the diameters (arithmetic mean) of the circles obtained in the above 1 are plotted against the reference values obtained in the above 3, respectively, for the above four semiconductor wafers. Fig. 6 also shows an approximate straight line obtained by the least square method for the four drawing points. Square R of correlation coefficient of approximate straight line 2 Exceeding 0.99 shows very good correlation. From the results, it was revealed that the size of the circle obtained in 1 above can be an index for shape evaluation of the boundary portion. Based on the evaluation of the numerical value based on the size of the circle, for example, by determining a threshold value (the size of the circle) that can be determined as a good product based on past experience, it is possible to easily determine the good product.
The dimensions of the circles obtained in the above manner can be used for inspection before shipment, sampling inspection from lots, and determination of actual manufacturing conditions of semiconductor wafers as described above.
5. Study of circle fitting region
(1) Contour curve making
An epitaxial wafer having a diameter of 300mm was prepared, and a profile curve including a curved portion showing a cross-sectional profile of a region from an outer peripheral edge portion side portion to the outer peripheral edge portion of the main surface on the front side was obtained by microscopic observation of the side opposite to the notched portion from the front side using a laser microscope (VK-X200 manufactured by kenji corporation).
The above operation was performed 10 times.
(2) Determination of circle fitting area and circle production
The profile curves obtained by the 10 operations are subjected to a second differentiation using analysis software to obtain second differentiation curves. In the peak region (valley shape) of the obtained quadratic differential curve, the position where the Y axis value is 0%, the peak depth is 100%, the values of the X axes of two points having the same value in the Y axis at the positions of 40%, 50%, 60%, 70%, 80% are determined, and the region between these two points is fitted as a circle fitting region. Table 2 shows the radius of the circle thus produced.
TABLE 2
As described above, the Y-axis value that determines the X-axis values of the two points is: the Y-axis value is set to 0% at a position where the Y-axis value is 0%, and the peak depth or peak height of the peak region is set to 100%, and the depth or height is preferably set to 40 to 80%. The smaller the standard deviation value obtained in the above manner, the more preferable from the viewpoint of improving the evaluation accuracy of the circle size, and therefore, as can be seen from the standard deviation values shown in table 2, the value of the Y axis, which determines the value of the X axis at the above two points, is: the Y-axis value is set to 0% at a position where the Y-axis value is 0%, and the peak depth or peak height of the peak region is set to 100%, and the depth or height is more preferably 50 to 70%, further preferably about 60% (e.g., 55 to 65%), and still further preferably 60%.
Fig. 7 is a graph of: a plurality of semiconductor wafers (silicon single crystal wafers (polished wafers) having a surface of (100) mm in diameter) and different from each other in polishing conditions and chamfering conditions on the wafer surface are shown as a relationship between the radius of a circle obtained in the same manner as described above and the value of the distance in the X-axis direction between two points on the curve of the peak region of the quadratic differential curve determined for producing the circle by circle fitting. Here, in the peak region (valley shape) of the obtained quadratic differential curve, the position where the Y axis has a value of 0 is set to 0%, the peak depth is set to 100%, and the values of the X axes at two points where the Y axis has the same value at the position of 60% depth are determined. Fig. 7 also shows an approximate straight line obtained by the least square method for each drawing point. Square R of correlation coefficient of approximate straight line 2 And more than 0.7 shows good correlation. As described above, the size of the circle can be an index for evaluating the shape of the boundary portion. Since the size of the circle and the value of the distance show good correlation, it can be confirmed that the value of the distance can also be used as a finger for shape evaluation of the boundary portionAnd (5) marking.
Industrial applicability
The present invention is useful in the field of manufacturing various semiconductor wafers such as silicon wafers.
Claims (11)
1. A method for evaluating a semiconductor wafer, comprising:
producing a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction; and
performing secondary differentiation on the profile curve;
the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfer formed on the peripheral edge portion of the wafer,
the profile curve includes a curve portion representing: the value of the X axis corresponds to the horizontal direction position coordinate, the value of the Y axis corresponds to the vertical direction position coordinate, and the cross-sectional profile of the region from the outer peripheral edge portion side portion of the main surface on the one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion;
the method for evaluating a semiconductor wafer further includes evaluating a shape of a boundary portion between the principal surface and a chamfer surface adjacent to the principal surface based on an index determined from a quadratic differential curve obtained by the quadratic differential;
the method for evaluating the semiconductor wafer comprises the following steps:
determining the X-axis values of two points with the same Y-axis value on the curve of the peak area of the secondary differential curve obtained by the secondary differential;
Determining, as a circle fitting region, a region between two points where the value of the X-axis is the determined value in the curve portion of the profile curve before the second differentiation;
fitting a circle with the outline shape of the circle fitting area to manufacture a circle; and
the size of the manufactured circle is used as the index.
2. The method for evaluating a semiconductor wafer according to claim 1, wherein,
comprises the steps of obtaining the dimensions of the circle in a plurality of different parts of the semiconductor wafer to be evaluated,
the shape of the boundary portion between the principal surface and the chamfer surface adjacent to the principal surface is evaluated using, as an index, representative values of the dimensions of a plurality of circles obtained at the plurality of different positions.
3. The method for evaluating a semiconductor wafer according to claim 2, wherein the representative value is an average value of sizes of the plurality of circles.
4. A method for evaluating a semiconductor wafer, comprising:
producing a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction; and
performing secondary differentiation on the profile curve;
the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfer formed on the peripheral edge portion of the wafer,
The profile curve includes a curve portion representing: the value of the X axis corresponds to the horizontal direction position coordinate, the value of the Y axis corresponds to the vertical direction position coordinate, and the cross-sectional profile of the region from the outer peripheral edge portion side portion of the main surface on the one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion;
the method for evaluating a semiconductor wafer further includes evaluating a shape of a boundary portion between the principal surface and a chamfer surface adjacent to the principal surface based on an index determined from a quadratic differential curve obtained by the quadratic differential;
the method for evaluating a semiconductor wafer includes determining the value of the X axis at two points having the same value of the Y axis on a curve of the peak area of a quadratic differential curve obtained by the quadratic differential, and using the distance between the determined two points in the X axis direction as the index.
5. The method for evaluating a semiconductor wafer according to any one of claims 1 to 4, wherein the value of the Y axis that determines the value of the X axis of the two points is: the value of the Y axis is set to 0% at the position where the value of the Y axis is 0%, and the value of the Y axis at the position where the depth or height of the peak is 40 to 80% is set to 100% at the peak depth or peak height of the peak region.
6. The method according to any one of claims 1 to 4, comprising creating the contour curve using positional coordinate information obtained by microscopic observation of the semiconductor wafer to be evaluated from above the one surface side.
7. The method for evaluating a semiconductor wafer according to claim 6, comprising performing the microscopic observation by a laser microscope.
8. A method of manufacturing a semiconductor wafer, comprising:
manufacturing an alternative semiconductor wafer as a product factory;
evaluating the alternative semiconductor wafer by the evaluation method according to any one of claims 1 to 7; and
and delivering the semiconductor wafer judged as a qualified product as a preparation for shipping the semiconductor wafer as a product.
9. A method of manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
withdrawing at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method according to any one of claims 1 to 7; and
Semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafers judged as the qualified product as a result of the evaluation are delivered for preparation for shipment as product semiconductor wafers.
10. A method of manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method according to any one of claims 1 to 7;
determining, based on the result of the evaluation, a manufacturing condition to which a change is applied to the test manufacturing condition as an actual manufacturing condition or the test manufacturing condition as an actual manufacturing condition; the method comprises the steps of,
and manufacturing the semiconductor wafer under the determined actual manufacturing conditions.
11. The method of manufacturing a semiconductor wafer according to claim 10, wherein the changed manufacturing conditions are at least one of polishing conditions and chamfering conditions for the surface of the semiconductor wafer.
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