CN112019198A - Fully-controlled semiconductor device packaging structure based on integrated commutation - Google Patents
Fully-controlled semiconductor device packaging structure based on integrated commutation Download PDFInfo
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- CN112019198A CN112019198A CN202010684007.5A CN202010684007A CN112019198A CN 112019198 A CN112019198 A CN 112019198A CN 202010684007 A CN202010684007 A CN 202010684007A CN 112019198 A CN112019198 A CN 112019198A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 91
- 238000004806 packaging method and process Methods 0.000 title claims abstract description 12
- 230000007704 transition Effects 0.000 claims abstract description 46
- 239000003990 capacitor Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 9
- 239000000758 substrate Substances 0.000 claims description 9
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 6
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 229910045601 alloy Inorganic materials 0.000 claims description 3
- 239000000956 alloy Substances 0.000 claims description 3
- 230000000903 blocking effect Effects 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 239000010949 copper Substances 0.000 claims description 3
- 238000007599 discharging Methods 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052741 iridium Inorganic materials 0.000 claims description 3
- GKOZUEZYRPOHIO-UHFFFAOYSA-N iridium atom Chemical compound [Ir] GKOZUEZYRPOHIO-UHFFFAOYSA-N 0.000 claims description 3
- 230000010355 oscillation Effects 0.000 claims description 3
- 229910052763 palladium Inorganic materials 0.000 claims description 3
- 229910052697 platinum Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 239000010409 thin film Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 4
- 238000002788 crimping Methods 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/28—Modifications for introducing a time delay before switching
- H03K17/292—Modifications for introducing a time delay before switching in thyristor, unijunction transistor or programmable unijunction transistor switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/72—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices having more than two PN junctions; having more than three electrodes; having more than one electrode connected to the same conductivity region
- H03K17/735—Switching arrangements with several input- or output-terminals, e.g. multiplexers, distributors
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Abstract
The present disclosure discloses a fully-controlled semiconductor device package structure based on integrated commutation, including: the device comprises a fully-controlled semiconductor device and a tube shell for packaging the fully-controlled semiconductor device; the fully-controlled semiconductor device comprises a first chip assembly, a second chip assembly, a third chip assembly, a first transition layer, a second transition layer, a third transition layer and a fourth transition layer; the cathode terminal of the first chip component is connected to the anode of the fully-controlled semiconductor device through the first transition layer; the anode terminal of the first chip assembly is connected to the cathode terminal of the second chip assembly through the second transition layer; the anode terminal of the second chip assembly is connected to the anode terminal of the third chip assembly through the third transition layer; the cathode terminal of the third chip assembly is connected to the cathode of the fully-controlled semiconductor device through the fourth transition layer; the first transition layer and the third transition layer are connected through a conductive plate.
Description
Technical Field
The disclosure belongs to the technical field of electrical equipment, and particularly relates to a fully-controlled semiconductor device packaging structure based on integrated commutation.
Background
With the development of high-voltage direct-current transmission and direct-current power grid technologies, research on power electronic devices under the application of high-capacity system disconnection becomes more and more important. However, in the development of the current high-power semiconductor power electronic device, the high-voltage high-power industrial commutation application is mostly carried out. In the current scheme of the direct current circuit breaker, a power device is directly applied as a high-current switching-on/off device, so that the direct current circuit breaker not only has strict requirements on the ultimate working performance and reliability of the device, but also brings great burden to the cost of the whole circuit breaker equipment.
Disclosure of Invention
Aiming at the defects in the prior art, the present disclosure aims to provide a fully-controlled semiconductor device package structure based on integrated commutation, which has the advantages of high integration level, small volume, small stray parameter and capability of saving a large amount of structural member cost.
In order to achieve the above purpose, the present disclosure provides the following technical solutions:
a fully controlled semiconductor device package structure, comprising: the device comprises a fully-controlled semiconductor device and a tube shell for packaging the fully-controlled semiconductor device; wherein,
the fully-controlled semiconductor device comprises a first chip assembly, a second chip assembly, a third chip assembly, a first transition layer, a second transition layer, a third transition layer and a fourth transition layer;
the cathode terminal of the first chip component is connected to the anode of the fully-controlled semiconductor device through the first transition layer;
the anode terminal of the first chip assembly is connected to the cathode terminal of the second chip assembly through the second transition layer;
the anode terminal of the second chip assembly is connected to the anode terminal of the third chip assembly through the third transition layer;
the cathode terminal of the third chip assembly is connected to the cathode of the fully-controlled semiconductor device through the fourth transition layer;
the first transition layer and the third transition layer are connected through a conductive plate.
Preferably, the packaging structure further comprises a capacitor, a controller and a current sensor which are arranged outside the tube shell; one end of the capacitor is connected to the second transition layer through the first conducting plate, and the other end of the capacitor is connected to the fourth transition layer through the second conducting plate; the controller comprises a thyristor drive and an integrated converter thyristor drive, the input end of the thyristor drive is connected to the first gate output end of the fully-controlled semiconductor device, and the output end of the thyristor drive is connected to the gate of the thyristor chip through a first gate external connection wire; the input end of the integrated commutation thyristor drive is connected to the second gate electrode output end of the full-control semiconductor device, and the output end of the integrated commutation thyristor drive is connected to the gate electrode of the integrated commutation thyristor chip through a second gate electrode outer connecting line; one end of the current sensor is connected to the integrated converter thyristor chip, and the other end of the current sensor is connected with any one of the thyristor chip, the diode chip and the capacitor.
Preferably, the first chip assembly includes a plurality of thyristor chips, each thyristor chip is pasted on the package substrate in parallel, a cathode of each thyristor chip is connected to an anode of the fully-controlled semiconductor device, and an anode of each thyristor chip is connected to the capacitor.
Preferably, the second chip assembly includes a plurality of diode chips, each diode chip is adhered to the package substrate in parallel, an anode of each diode chip is connected to an anode of the fully-controlled semiconductor device, and a cathode of each diode chip is connected to the capacitor.
Preferably, the third chip assembly includes a plurality of integrated converter thyristor chips, each integrated converter thyristor chip is pasted on the package substrate in parallel, a cathode of each integrated converter thyristor chip is connected to the current sensor, and an anode of each integrated converter thyristor chip is connected to an anode of the fully-controlled semiconductor device.
Preferably, the anode and the cathode of the fully-controlled semiconductor device are both metal conductive electrodes, and the metal conductive electrodes include any one of the following materials and combinations thereof: gold, silver, copper, platinum, palladium, iridium, and alloys thereof.
Preferably, the first gate external connection line and the second gate external connection line are both conductive structures, including but not limited to any one or a combination of more of a conductive plate, a conductive sheet and a bus bar.
Preferably, the capacitor includes any one of: thin film capacitors, organic dielectric capacitors, inorganic dielectric capacitors, electrolytic capacitors, electrothermal capacitors, and air dielectric capacitors.
The present disclosure also provides a method for controlling a fully-controlled semiconductor device package structure to receive a turn-on signal, comprising the following steps:
step 1: applying a positive bias voltage between the anode and the cathode of the fully-controlled semiconductor device to enable the fully-controlled semiconductor device to be in a forward blocking state;
step 2: the first gate electrode and the second gate electrode of the fully-controlled semiconductor device are respectively driven and controlled by the thyristor to be conducted by the thyristor chip and driven and controlled by the integrated commutation thyristor to be conducted, the fully-controlled semiconductor device starts to conduct current, and the capacitor discharges through the thyristor chip and the integrated commutation thyristor chip;
and step 3: the current sensor monitors the current flowing through the fully-controlled semiconductor device, when the current reaches a set threshold value, the integrated converter thyristor drives the integrated converter thyristor chip to automatically control the integrated converter thyristor chip to be turned off, and at the moment, the current flows through the diode chip to charge the capacitor;
and 4, step 4: after waiting for a period of time delay, the integrated commutation thyristor drives and automatically controls the conduction of the integrated commutation thyristor chip, at the moment, the fully-controlled semiconductor device enters a conduction state, and the action is only carried out once in the whole conduction process; when the current does not exceed a set threshold value, the drive does not act, and the fully-controlled semiconductor device enters a conducting state.
The present disclosure also provides a method for controlling a fully-controlled semiconductor device package structure to receive a turn-off signal, including the steps of:
step 1: when the fully-controlled semiconductor device is in a current conducting state;
step 2: and controlling the conduction of the thyristor chip by driving the first gate of the fully-controlled semiconductor device through the thyristor, starting discharging the capacitor through the thyristor chip and the integrated commutation thyristor chip at the moment, and controlling the turn-off of the integrated commutation thyristor chip by driving the second gate of the fully-controlled semiconductor device through the integrated commutation thyristor after delaying and waiting for 0.75 times of oscillation period to finish the turn-off of the packaging structure of the fully-controlled semiconductor device.
Compared with the prior art, the beneficial effect that this disclosure brought does: the integrated chip and the chip drive are assembled, so that the integrated circuit has the characteristics of high integration level, small volume, small stray parameters, saving of a large amount of structural part cost and the like, and the current resonance generated by the capacitor realizes the auxiliary turn-off of the current, thereby improving the turn-off capability.
Drawings
Fig. 1 is a schematic structural diagram of a fully-controlled semiconductor device package structure based on integrated commutation according to an embodiment of the present disclosure;
fig. 2 is a schematic structural diagram of a fully-controlled semiconductor device package structure based on integrated commutation according to another embodiment of the present disclosure;
fig. 3 is a schematic structural diagram of a fully-controlled semiconductor device package structure based on integrated commutation according to another embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a fully-controlled semiconductor device package structure based on integrated commutation according to another embodiment of the present disclosure.
Detailed Description
Specific embodiments of the present disclosure will be described in detail below with reference to fig. 1 to 4. While specific embodiments of the disclosure are shown in the drawings, it should be understood that the disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
It should be noted that certain terms are used throughout the description and claims to refer to particular components. As one skilled in the art will appreciate, various names may be used to refer to a component. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. The description which follows is a preferred embodiment of the invention, but is made for the purpose of illustrating the general principles of the invention and not for the purpose of limiting the scope of the invention. The scope of the present disclosure is to be determined by the terms of the appended claims.
To facilitate an understanding of the embodiments of the present disclosure, the following detailed description is to be considered in conjunction with the accompanying drawings, and the drawings are not to be construed as limiting the embodiments of the present disclosure.
In one embodiment, as shown in fig. 1, a fully-controlled semiconductor device package structure based on integrated commutation includes: the device comprises a fully-controlled semiconductor device and a tube shell for packaging the fully-controlled semiconductor device; wherein,
the fully-controlled semiconductor device comprises a first chip assembly, a second chip assembly, a third chip assembly, a current sensor, a first transition layer, a second transition layer, a third transition layer and a fourth transition layer;
the cathode terminal of the first chip component is connected to the anode of the fully-controlled semiconductor device through the first transition layer;
the anode terminal of the first chip assembly is connected to the cathode terminal of the second chip assembly through the second transition layer;
the anode terminal of the second chip assembly is connected to the anode terminal of the third chip assembly through the third transition layer;
the cathode terminal of the third chip assembly is connected to the cathode of the fully-controlled semiconductor device through the fourth transition layer;
the first transition layer and the third transition layer are connected through a conductive plate.
In this embodiment, through assembling integrated chip and chip drive, have that the integrated level is high, small, stray parameter is little, and save characteristics such as a large amount of structure cost, realize the supplementary shutoff to the electric current through the current resonance that the electric capacity produced to improve and turn-off the ability.
In another embodiment, the package structure further comprises a capacitor, a controller and a current sensor which are arranged outside the tube shell; one end of the capacitor is connected to the second transition layer through the first conducting plate, and the other end of the capacitor is connected to the fourth transition layer through the second conducting plate; the controller comprises a thyristor drive and an integrated converter thyristor drive, the input end of the thyristor drive is connected to the first gate output end of the fully-controlled semiconductor device, and the output end of the thyristor drive is connected to the gate of the thyristor chip through a first gate external connection wire; the input end of the integrated commutation thyristor drive is connected to the second gate electrode output end of the full-control semiconductor device, and the output end of the integrated commutation thyristor drive is connected to the gate electrode of the integrated commutation thyristor chip through a second gate electrode outer connecting line; one end of the current sensor is connected to the integrated converter thyristor chip, and the other end of the current sensor is connected with any one of the thyristor chip, the diode chip and the capacitor.
In this embodiment, the current sensor is arranged as shown in fig. 2 to 4, and in fig. 2, one end of the current sensor is connected to the cathode of the integrated converter thyristor chip, and the other end of the current sensor is connected to the cathode of the semiconductor device together with one end of the capacitor. In fig. 3, one end of the current sensor is connected to the anode of the integrated converter thyristor chip, and the other end is connected to the anode of the diode chip. In fig. 4, one end of the current sensor is connected to the anode of the diode chip and the other end is connected to the cathode of the thyristor chip.
In another embodiment, the first gate external connection and the second gate external connection are both conductive structures, including but not limited to any one or more of a conductive plate, a conductive sheet and a bus bar.
In another embodiment, the capacitor includes any one of: thin film capacitors, organic dielectric capacitors, inorganic dielectric capacitors, electrolytic capacitors, electrothermal capacitors, and air dielectric capacitors.
In another embodiment, the current sensor includes, but is not limited to, any one or combination of any plurality of a hall current sensor, a TMR sensor, an AMR sensor, a GMR sensor, a fiber optic current sensor.
In another embodiment, the first chip assembly includes a plurality of thyristor chips, each thyristor chip is pasted on the package substrate in parallel, the electrical connection is realized by a wire bonding technology or a crimping interconnection technology, a cathode of each thyristor chip is connected to an anode of the fully-controlled semiconductor device, and an anode of each thyristor chip is connected to the capacitor.
In another embodiment, the second chip assembly includes a plurality of diode chips, each diode chip is adhered to the package substrate in parallel, the electrical connection is realized by a wire bonding technology or a pressure welding interconnection technology, an anode of each diode chip is connected to an anode of the fully-controlled semiconductor device, and a cathode of each diode chip is connected to the capacitor.
In this embodiment, the diode chip includes, but is not limited to, any one of or a combination of any more of a power diode chip and a schottky diode chip.
In another embodiment, the third chip assembly includes a plurality of integrated converter thyristor chips, each integrated converter thyristor chip is pasted on the package substrate in parallel, the electrical connection is realized by a wire bonding technology or a crimping interconnection technology, a cathode of each integrated converter thyristor chip is connected to the current sensor, and an anode of each integrated converter thyristor chip is connected to an anode of the fully-controlled semiconductor device.
In another embodiment, the anode and the cathode of the fully-controlled semiconductor device are both metal conductive electrodes, and any one or combination of the following is included: gold, silver, copper, platinum, palladium, iridium, and alloys thereof.
In another embodiment, the present disclosure further provides a method for controlling a fully-controlled semiconductor device package structure to receive a turn-on signal, including the following steps:
step 1: applying a positive bias voltage between the anode and the cathode of the fully-controlled semiconductor device to enable the fully-controlled semiconductor device to be in a forward blocking state;
step 2: the first gate electrode and the second gate electrode of the fully-controlled semiconductor device are respectively driven and controlled by the thyristor to be conducted by the thyristor chip and driven and controlled by the integrated commutation thyristor to be conducted, the fully-controlled semiconductor device starts to conduct current, and the capacitor discharges through the thyristor chip and the integrated commutation thyristor chip;
and step 3: the current sensor monitors the current flowing through the fully-controlled semiconductor device, when the current reaches a set threshold value, the integrated converter thyristor drives the integrated converter thyristor chip to automatically control the integrated converter thyristor chip to be turned off, and at the moment, the current flows through the diode chip to charge the capacitor;
and 4, step 4: after waiting for a period of time delay, the integrated commutation thyristor drives and automatically controls the conduction of the integrated commutation thyristor chip, at the moment, the fully-controlled semiconductor device enters a conduction state, and the action is only carried out once in the whole conduction process; when the current does not exceed a set threshold value, the drive does not act, and the fully-controlled semiconductor device enters a conducting state.
In another embodiment, the present disclosure further provides a method for controlling a fully-controlled semiconductor device package structure to receive a shutdown signal, including the following steps:
step 1: when the fully-controlled semiconductor device is in a current conducting state;
step 2: and controlling the conduction of the thyristor chip by driving the first gate of the fully-controlled semiconductor device through the thyristor, starting discharging the capacitor through the thyristor chip and the integrated commutation thyristor chip at the moment, and controlling the turn-off of the integrated commutation thyristor chip by driving the second gate of the fully-controlled semiconductor device through the integrated commutation thyristor after delaying and waiting for 0.75 times of oscillation period to finish the turn-off of the packaging structure of the fully-controlled semiconductor device.
The foregoing describes the general principles of the present application in conjunction with specific embodiments, however, it is noted that the advantages, effects, etc. mentioned in the present application are merely examples and are not limiting, and they should not be considered essential to the various embodiments of the present application. Furthermore, the foregoing disclosure of specific details is for the purpose of illustration and description and is not intended to be limiting, since the foregoing disclosure is not intended to be exhaustive or to limit the disclosure to the precise details disclosed.
Claims (10)
1. A fully-controlled semiconductor device packaging structure based on integrated commutation comprises: the device comprises a fully-controlled semiconductor device and a tube shell for packaging the fully-controlled semiconductor device; wherein,
the fully-controlled semiconductor device comprises a first chip assembly, a second chip assembly, a third chip assembly, a first transition layer, a second transition layer, a third transition layer and a fourth transition layer;
the cathode terminal of the first chip component is connected to the anode of the fully-controlled semiconductor device through the first transition layer;
the anode terminal of the first chip assembly is connected to the cathode terminal of the second chip assembly through the second transition layer;
the anode terminal of the second chip assembly is connected to the anode terminal of the third chip assembly through the third transition layer;
the cathode terminal of the third chip assembly is connected to the cathode of the fully-controlled semiconductor device through the fourth transition layer;
the first transition layer and the third transition layer are connected through a conductive plate.
2. The package structure of claim 1, wherein preferably, the package structure further comprises a capacitor, a controller and a current sensor disposed outside the package; one end of the capacitor is connected to the second transition layer through the first conducting plate, and the other end of the capacitor is connected to the fourth transition layer through the second conducting plate; the controller comprises a thyristor drive and an integrated converter thyristor drive, the input end of the thyristor drive is connected to the first gate output end of the fully-controlled semiconductor device, and the output end of the thyristor drive is connected to the gate of the thyristor chip through a first gate external connection wire; the input end of the integrated commutation thyristor drive is connected to the second gate electrode output end of the full-control semiconductor device, and the output end of the integrated commutation thyristor drive is connected to the gate electrode of the integrated commutation thyristor chip through a second gate electrode outer connecting line; one end of the current sensor is connected to the integrated converter thyristor chip, and the other end of the current sensor is connected with any one of the thyristor chip, the diode chip and the capacitor.
3. The package structure of claim 2, wherein the first chip assembly comprises a plurality of thyristor chips, each thyristor chip is pasted on the package substrate in parallel, a cathode of each thyristor chip is connected to an anode of the fully-controlled semiconductor device, and an anode of each thyristor chip is connected to the capacitor.
4. The package structure of claim 2, wherein the second chip assembly comprises a plurality of diode chips, each diode chip is attached in parallel to the package substrate, an anode of each diode chip is connected to an anode of the fully-controlled semiconductor device, and a cathode of each diode chip is connected to the capacitor.
5. The package structure of claim 2, wherein the third chip assembly comprises a plurality of integrated converter thyristor chips, each integrated converter thyristor chip is affixed to the package substrate in parallel, a cathode of each integrated converter thyristor chip is connected to the current sensor, and an anode of each integrated converter thyristor chip is connected to an anode of the fully-controlled semiconductor device.
6. The package structure of claim 1, wherein the anode and the cathode of the fully-controlled semiconductor device are both metal conductive electrodes, including any one of and combinations of: gold, silver, copper, platinum, palladium, iridium, and alloys thereof.
7. The package structure of claim 2, wherein the first gate external connection and the second gate external connection are each a conductive structure including, but not limited to, any one or combination of a conductive plate, a conductive sheet, and a bus bar.
8. The package structure of claim 2, wherein the capacitor comprises any one of: thin film capacitors, organic dielectric capacitors, inorganic dielectric capacitors, electrolytic capacitors, electrothermal capacitors, and air dielectric capacitors.
9. A control method for receiving a turn-on signal by the fully controlled semiconductor device package structure of claim 2, comprising the steps of:
step 1: applying a positive bias voltage between the anode and the cathode of the fully-controlled semiconductor device to enable the fully-controlled semiconductor device to be in a forward blocking state;
step 2: the first gate electrode and the second gate electrode of the fully-controlled semiconductor device are respectively driven and controlled by the thyristor to be conducted by the thyristor chip and driven and controlled by the integrated commutation thyristor to be conducted, the fully-controlled semiconductor device starts to conduct current, and the capacitor discharges through the thyristor chip and the integrated commutation thyristor chip;
and step 3: the current sensor monitors the current flowing through the fully-controlled semiconductor device, when the current reaches a set threshold value, the integrated converter thyristor drives the integrated converter thyristor chip to automatically control the integrated converter thyristor chip to be turned off, and at the moment, the current flows through the diode chip to charge the capacitor;
and 4, step 4: after waiting for a period of time delay, the integrated commutation thyristor drives and automatically controls the conduction of the integrated commutation thyristor chip, at the moment, the fully-controlled semiconductor device enters a conduction state, and the action is only carried out once in the whole conduction process; when the current does not exceed a set threshold value, the drive does not act, and the fully-controlled semiconductor device enters a conducting state.
10. A control method for receiving a turn-off signal by the fully controlled semiconductor device package structure according to claim 2, comprising the steps of:
step 1: when the fully-controlled semiconductor device is in a current conducting state;
step 2: and controlling the conduction of the thyristor chip by driving the first gate of the fully-controlled semiconductor device through the thyristor, starting discharging the capacitor through the thyristor chip and the integrated commutation thyristor chip at the moment, and controlling the turn-off of the integrated commutation thyristor chip by driving the second gate of the fully-controlled semiconductor device through the integrated commutation thyristor after delaying and waiting for 0.75 times of oscillation period to finish the turn-off of the packaging structure of the fully-controlled semiconductor device.
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Citations (3)
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JP2013106489A (en) * | 2011-11-16 | 2013-05-30 | Nissan Motor Co Ltd | Abnormality detection device |
WO2015149579A1 (en) * | 2014-04-04 | 2015-10-08 | 广州市金矢电子有限公司 | Current monitoring type electronic arc-extinguishing apparatus |
US20200020682A1 (en) * | 2018-07-10 | 2020-01-16 | Sanken Electric Co., Ltd. | Semiconductor Device and Method for Forming the Semiconductor Device |
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JP2013106489A (en) * | 2011-11-16 | 2013-05-30 | Nissan Motor Co Ltd | Abnormality detection device |
WO2015149579A1 (en) * | 2014-04-04 | 2015-10-08 | 广州市金矢电子有限公司 | Current monitoring type electronic arc-extinguishing apparatus |
US20200020682A1 (en) * | 2018-07-10 | 2020-01-16 | Sanken Electric Co., Ltd. | Semiconductor Device and Method for Forming the Semiconductor Device |
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