CN112019079A - Three-level pulse width modulation method and related equipment - Google Patents
Three-level pulse width modulation method and related equipment Download PDFInfo
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- CN112019079A CN112019079A CN201910458279.0A CN201910458279A CN112019079A CN 112019079 A CN112019079 A CN 112019079A CN 201910458279 A CN201910458279 A CN 201910458279A CN 112019079 A CN112019079 A CN 112019079A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
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Abstract
The application discloses a magnetic suspension coil control system and a three-level pulse width modulation method, a device, a controller and a computer readable storage medium thereof, wherein the three-level pulse width modulation method is applied to a half-bridge topology circuit and comprises the following steps: determining an equivalent output duty ratio corresponding to the average output voltage set value; determining an output duration reference parameter; determining a corresponding target duty ratio and a corresponding target phase shift angle based on the equivalent output duty ratio and the output duration reference parameter; outputting a first control signal with the duty ratio of the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle. The method and the device can effectively reduce current ripples and increase current bandwidth based on the matched dynamic modulation of the duty ratio and the phase shift angle.
Description
Technical Field
The present application relates to the field of electrical control technologies, and in particular, to a magnetic levitation coil control system, a three-level pulse width modulation method and apparatus thereof, a controller, and a computer-readable storage medium.
Background
The magnetic suspension control is to indirectly control the magnitude of the magnetic field attraction by controlling the current of a magnetic suspension coil by utilizing the principle that the magnetic field generates the attraction when passing through different medium surfaces, so that a controlled object is suspended at a fixed position. Generally, a magnetic suspension bearing generally adopts a current difference control method of an upper coil and a lower coil to realize the control of electromagnetic force in positive and negative directions, so that for a single magnetic suspension coil, the current direction does not need to be changed, and only unipolar current control is realized.
Generally, a half-bridge topology circuit is mostly adopted as a control circuit of the magnetic levitation coil current, and the circuit structure thereof can be referred to in fig. 1 specifically. As shown in fig. 1, the half-bridge topology circuit includes a dc power supply, a first switch transistor T1, a second switch transistor T2, a first diode D1, a second diode D2, a third diode D3 and a fourth diode D4; the anode of the dc power supply is connected to the first end of the first switch transistor T1, the cathode of the first diode D1, and the cathode of the third diode D3, respectively; the cathode of the direct current power supply is respectively connected with the anode of the second diode D2, the first end of the second switch tube T2 and the anode of the fourth diode D4; a second end of the first switching tube T1, an anode of the first diode D1, and a cathode of the second diode D2 are all connected to each other and serve as a first driving output end; an anode of the third diode D3, a second terminal of the second switch transistor T2, and a cathode of the fourth diode D4 are all connected to each other and serve as a second driving output terminal. In the magnetic suspension coil control system, a magnetic suspension coil is used as a load, and two ends of the magnetic suspension coil are respectively connected with a first driving output end and a second driving output end of a half-bridge topology circuit.
The half-bridge topology circuit can adopt a corresponding three-level pulse width modulation mode to control a controllable switch tube in the half-bridge topology circuit. The three-level modulation mode enables the voltage at two ends of the magnetic suspension coil to have three voltage states of positive bus voltage, zero voltage and negative bus voltage. However, most of the conventional three-level modulation methods adopt a modulation mode with fixed phase difference and dynamically changed duty ratio, so that the current ripple of the magnetic suspension coil is large and the current bandwidth is small.
In view of the above, it is an important need for those skilled in the art to provide a solution to the above technical problems.
Disclosure of Invention
An object of the present application is to provide a magnetic levitation coil control system, a three-level pulse width modulation method, apparatus, controller and computer readable storage medium thereof, so as to effectively reduce current ripple and increase current bandwidth.
In order to solve the above technical problem, in a first aspect, the present application discloses a three-level pulse width modulation method applied to a half-bridge topology circuit, including:
determining an equivalent output duty ratio corresponding to the average output voltage set value;
determining an output duration reference parameter;
determining a corresponding target duty ratio and a corresponding target phase shift angle based on the equivalent output duty ratio and the output duration reference parameter;
outputting a first control signal with the duty ratio of the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle.
Optionally, before the determining the equivalent output duty cycle corresponding to the average output voltage set value, the method further includes:
and carrying out amplitude limiting processing on the average output voltage set value based on the direct current voltage value of the direct current power supply in the half-bridge topology circuit.
Optionally, the performing the amplitude limiting process on the average output voltage set value includes:
carrying out amplitude limiting processing on the average output voltage set value u according to a preset amplitude limiting processing formula; the preset amplitude limiting processing formula is as follows:
and U is the direct-current voltage value of the direct-current power supply.
Optionally, the determining an equivalent output duty cycle corresponding to the average output voltage set value includes:
calculating the equivalent output duty ratio D according to a preset duty ratio calculation formula; the preset duty ratio calculation formula is as follows:
wherein U is the direct current voltage value of the direct current power supply; u is the average output voltage set point.
Optionally, the determining a corresponding target duty cycle and a corresponding target phase shift angle based on the equivalent output duty cycle and the output duration reference parameter includes:
calculating a corresponding target duty ratio d and a corresponding target phase shift angle theta according to a preset target parameter calculation formula; the preset target parameter calculation formula comprises:
Wherein D is the equivalent output duty cycle; d' is the output duration reference parameter.
Optionally, the determining the output duration reference parameter includes:
the output time length reference parameter is determined as d' ═ θ.
In a second aspect, the present application further discloses a three-level pulse width modulation apparatus applied to a half-bridge topology circuit, including:
the first determining module is used for determining an equivalent output duty ratio corresponding to the average output voltage set value;
the second determining module is used for determining an output duration reference parameter;
the third determining module is used for determining a corresponding target duty cycle and a corresponding target phase shifting angle based on the equivalent output duty cycle and the output duration reference parameter;
the output module is used for outputting a first control signal with the duty ratio being the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle.
In a third aspect, the present application further discloses a three-level pwm controller, comprising:
a storage unit for storing a computer program;
a processing unit for executing the computer program to implement the steps of any of the three-level pulse width modulation methods as described above.
In a fourth aspect, the present application further discloses a magnetic levitation coil control system, which includes a half-bridge topology circuit and the three-level pwm controller as described above, where the first driving output and the second driving output of the half-bridge topology circuit are respectively used for being connected to two ends of the magnetic levitation coil.
In a fifth aspect, the present application further discloses a computer readable storage medium having stored thereon a computer program for implementing the steps of any one of the three-level pulse width modulation methods as described above when executed by a processor.
The three-level pulse width modulation method provided by the application is applied to a half-bridge topology circuit, and comprises the following steps: determining an equivalent output duty ratio corresponding to the average output voltage set value; determining an output duration reference parameter; determining a corresponding target duty ratio and a corresponding target phase shift angle based on the equivalent output duty ratio and the output duration reference parameter; outputting a first control signal with the duty ratio of the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle.
Therefore, when the three-level pulse width modulation is carried out on the half-bridge topology circuit, not only is the duty ratio dynamic modulation carried out on the first control signal of the first switch tube and the second control signal of the second switch tube, but also the phase shift angle of the first control signal and the second control signal is dynamically modulated, and based on the coordination regulation and control of the duty ratio and the phase shift angle, the time of dynamically inserting a zero voltage state between the positive bus voltage state and the negative bus voltage state of the load voltage is reasonably controlled, so that the current ripple is effectively reduced, the current amplitude fluctuation is restrained, the current bandwidth is increased, the output characteristic of the load current is further improved, and the output stability and accuracy are improved. The magnetic suspension coil control system, the three-level pulse width modulation device, the controller and the computer-readable storage medium have the advantages.
Drawings
In order to more clearly illustrate the technical solutions in the prior art and the embodiments of the present application, the drawings that are needed to be used in the description of the prior art and the embodiments of the present application will be briefly described below. Of course, the following description of the drawings related to the embodiments of the present application is only a part of the embodiments of the present application, and it will be obvious to those skilled in the art that other drawings can be obtained from the provided drawings without any creative effort, and the obtained other drawings also belong to the protection scope of the present application.
Fig. 1 is a block diagram of a half-bridge topology circuit disclosed in an embodiment of the present application;
FIG. 2 is a flow chart of a three-level pulse width modulation method disclosed in an embodiment of the present application;
FIG. 3 is a timing diagram illustrating the turn-on of a switch tube according to an embodiment of the present disclosure;
fig. 4 is a schematic diagram of a current path in a phase i of a half-bridge topology circuit disclosed in an embodiment of the present application;
fig. 5 is a schematic diagram of a current path in stage ii of a half-bridge topology circuit disclosed in an embodiment of the present application;
fig. 6 is a schematic diagram of a current path in phase iii of a half-bridge topology circuit disclosed in an embodiment of the present application;
fig. 7 is a schematic diagram of a current path in a stage iv of a half-bridge topology circuit disclosed in an embodiment of the present application;
fig. 8 is a graph of an output voltage waveform in a modulation mode disclosed in the embodiment of the present application;
fig. 9 is a graph of an output voltage waveform in another modulation mode disclosed in the embodiment of the present application;
fig. 10 is a block diagram of a three-level pulse width modulation apparatus according to an embodiment of the present application.
Detailed Description
The core of the application is to provide a magnetic levitation coil control system, a three-level pulse width modulation method, a device, a controller and a computer readable storage medium thereof, so as to effectively reduce current ripple and increase current bandwidth.
In order to more clearly and completely describe the technical solutions in the embodiments of the present application, the technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 2, an embodiment of the present application discloses a three-level pulse width modulation method, which is applied to a half-bridge topology circuit, and mainly includes:
s11: and determining the equivalent output duty ratio D corresponding to the average output voltage set value u.
S12: the output duration reference parameter d' is determined.
S13: and determining a corresponding target duty ratio D and a corresponding target phase shift angle theta based on the equivalent output duty ratio D and the output duration reference parameter D'.
S14: outputting a first control signal with the target duty ratio d to a control end of a first switching tube T1 in the half-bridge topology circuit; outputting a second control signal with the target duty ratio d to a control end of a second switching tube T2 in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is a target phase shift angle theta.
The specific circuit structure of the half-bridge topology circuit can refer to fig. 1.
It should be noted that the three-level pulse width modulation method provided in the embodiment of the present application specifically adopts a modulation method in which a phase shift angle or a phase difference and a duty ratio are dynamically changed together. And in particular the magnitude modulation of the phase shift angle and the duty cycle are both based on the average output voltage set point u given by the system.
The first switch tube T1 and the second switch tube T2 in the half-bridge topology circuit shown in fig. 1 are controlled objects in the three-level pulse width modulation process. The on-off control signal of the first switch tube T1 is a first control signal, and the on-off control signal of the second switch tube T2 is a second control signal. Generally, in the three-level pulse width modulation mode, the first control signal and the second control signal have the same frequency and duty ratio and different phases. The key to three-level pulse width modulation is to determine a target duty cycle d and a target phase shift angle theta of appropriate magnitude for the first and second control signals.
Referring to fig. 3, an embodiment of the present application discloses a switching tube turn-on timing diagram. Wherein u isoutIs the output voltage between the first drive output terminal and the second drive output terminal.
One modulation period T can be divided into four stages i, ii, iii and iv according to the on-off states of the first switch transistor T1 and the second switch transistor T2. The currents in these four phases will be analyzed below.
(1) Stage I
Referring to fig. 4, fig. 4 is a schematic diagram of a current path in a phase i of a half-bridge topology circuit disclosed in an embodiment of the present application.
In the phase I, the first switch tube T1 is turned on, the second switch tube T2 is turned off, and the duration of the phase is θ T, which depends on the magnitude of the phase shift angle. The current forms a closed loop path through the first switch tube T1, the load and the third diode D3, and the output voltage u of the half-bridge topology circuitoutI.e. the voltage across the load is zero.
It is easy to understand that in the magnetic levitation coil control system, the load is a magnetic levitation coil, and considering the internal resistance of the magnetic levitation coil, the load can be equivalent to the series resistance R and the series inductance L.
If the load current is at the initial moment of stage I, specifically I1In stage i, the expression of the load current is specifically:
(2) stage II
Referring to fig. 5, fig. 5 is a schematic diagram of a current path in phase ii of a half-bridge topology circuit disclosed in an embodiment of the present application.
In phase II, the first switch tube T1 is turned on, the second switch tube T2 is also turned on, and the duration of the phase is (d-theta) T, which depends on the phase shift angle and the duty ratio. The current forms a closed loop path through the direct current power supply, the first switch tube T1, the load and the second switch tube T2, and the output voltage u of the half-bridge topology circuitoutNamely, the voltage at the two ends of the load is the positive bus voltage of the direct current power supply.
If the load current is specified as I at the initial moment of phase II2In stage ii, the expression of the load current is specifically:
(3) stage III
Referring to fig. 6, fig. 6 is a schematic diagram of a current path of a half-bridge topology circuit in phase iii according to an embodiment of the present application.
In the phase iii, the first switch transistor T1 is turned off, the second switch transistor T2 is turned on, and the duration of the phase is θ T, which depends on the magnitude of the phase shift angle. The current passes through the load, the second switch tube T2 and the second diode D2 to form a closed loop path, and the output voltage u of the half-bridge topology circuitoutI.e. the voltage across the load is zero.
If the load current is specified as I at the initial moment of stage III3In stage iii, the expression of the load current is specifically:
(4) stage IV
Referring to fig. 7, fig. 7 is a schematic diagram of a current path in an iv phase of a half-bridge topology circuit disclosed in an embodiment of the present application.
In the phase iv, the first switch tube T1 is turned off, the second switch tube T2 is also turned off, and the duration of the phase is (1-d- θ) T, depending on the phase shift angle and the duty cycle. The current forms a closed loop path through the load, the third diode D3, the direct current power supply and the second diode D2, and the output voltage u of the half-bridge topology circuitoutNamely, the voltage at the two ends of the load is the negative bus voltage of the direct current power supply.
If the load current is specified as I at the initial moment of the IV phase4In the stage iv, the expression of the load current is specifically:
as can be seen from the above analysis, the change slopes of the load current, i.e., the magnetic levitation coil current, in each stage are different, so that the duration of the different stages also affects the current ripple and the current bandwidth of the load current, and the phase shift angle and the duty ratio both affect the duration of each stage. Based on this, the three-level pulse width modulation method provided in the embodiment of the present application not only dynamically modulates the duty ratios of the first control signal and the second control signal, but also dynamically modulates the phase shift angles of the first control signal and the second control signal, so that the output characteristics of the load current can be effectively improved, the current ripple is reduced, the current bandwidth is increased, and the output control accuracy is further improved.
Specifically, after the average output voltage set value u is given, the corresponding equivalent output duty ratio D can be calculated and obtained. It should be noted that the equivalent output duty cycle D refers to the output voltage u of the half-bridge topology circuitoutEquivalent duty cycle within one modulation period. Then, the output voltage u shown in FIG. 2outThe average value after the cancellation of the positive and negative waveforms should be equal to the equivalent output duty cycle D.
Because the embodiment of the application dynamically modulates the duty ratio and the phase shift angle at the same time, namely two variables exist, an additional parameter, namely the output duration reference parameter D ', is provided in the embodiment of the application, so that the two variables of the target duty ratio D and the target phase shift angle theta are determined by combining and utilizing the output duration reference parameter D' and the equivalent output duty ratio D.
It should be noted that the output time length reference parameter d' is still used for determining the target duty cycle d and the target phase shift angle θ, which essentially adds a limiting condition to the magnitudes of the phase shift angle and the duty cycle.
After the target values of the duty ratio and the phase shift angle, i.e., the target duty ratio d and the target phase shift angle θ, are determined, a corresponding first control signal is output to control the on/off of the first switching tube T1, and a second control signal is output to control the on/off of the second switching tube T2. The duty ratios of the first control signal and the second control signal are both target duty ratios d, and the phase delay angle of the second control signal relative to the first control signal is a target phase shift angle theta.
The three-level pulse width modulation method provided by the embodiment is applied to a half-bridge topology circuit, and comprises the following steps: determining an equivalent output duty ratio D corresponding to an average output voltage set value u; determining an output duration reference parameter d'; determining a corresponding target duty ratio D and a corresponding target phase shift angle theta based on the equivalent output duty ratio D and the output duration reference parameter D'; outputting a first control signal with the target duty ratio d to a control end of a first switching tube T1 in the half-bridge topology circuit; outputting a second control signal with the target duty ratio d to a control end of a second switching tube T2 in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is a target phase shift angle theta.
Therefore, when the three-level pulse width modulation is carried out on the half-bridge topology circuit, not only the duty ratio dynamic modulation is carried out on the first control signal of the first switch tube T1 and the second control signal of the second switch tube T2, but also the dynamic modulation is carried out on the phase shift angle of the first control signal and the second control signal, and based on the matched regulation and control of the duty ratio and the phase shift angle, the time of dynamically inserting a zero voltage state between the positive bus voltage state and the negative bus voltage state of the load voltage is reasonably controlled, so that the current ripple is effectively reduced, the current amplitude fluctuation is restrained, the current bandwidth is increased, the output characteristic of the load current is further improved, and the output stability and accuracy are improved.
On the basis of the above, as a specific implementation manner, the three-level pulse width modulation method provided in the embodiment of the present application further includes, before determining the equivalent output duty ratio D corresponding to the average output voltage set value u:
and carrying out amplitude limiting processing on the average output voltage set value U based on the direct current voltage value U of the direct current power supply.
Further, the limiting process performed on the average output voltage set value u may specifically include:
carrying out amplitude limiting processing on the average output voltage set value u according to a preset amplitude limiting processing formula; the preset amplitude limiting processing formula is as follows:
wherein, U is the DC voltage value of the DC power supply.
It is easy to understand that when u is less than 0, the pairCorresponding to the output voltage u in FIG. 2outThe negative waveform area of (2) is greater than the positive waveform area; u is greater than 0, corresponding to the output voltage u in FIG. 2outIs larger than the negative waveform area.
On the basis of the above, as a specific implementation manner, the embodiment of the present application further discloses a specific implementation manner of determining an equivalent output duty ratio D corresponding to the average output voltage set value u:
calculating an equivalent output duty ratio D according to a preset duty ratio calculation formula; the preset duty ratio calculation formula is as follows:
wherein, U is the DC voltage value of the DC power supply; u is the average output voltage set point.
On the basis of the above, as a specific implementation manner, the embodiment of the present application further discloses a specific implementation manner for determining a corresponding target duty ratio D and a corresponding target phase shift angle θ based on the equivalent output duty ratio D and the output duration reference parameter D':
calculating a corresponding target duty ratio d and a corresponding target phase shift angle theta according to a preset target parameter calculation formula; the preset target parameter calculation formula comprises:
Wherein D is the equivalent output duty ratio D; d' is an output duration reference parameter.
In particular, in order to make the output voltage uoutThe actual equivalent duty cycle reaches the equivalent output duty cycle D obtained by calculation, and the embodiment specifically utilizes the output duration reference parameter D' to determine the target phase shift angle:
1) average output voltage set value u >0
As mentioned above, the output voltage u should be made at this timeoutIs larger than the negative waveform area, i.e., the duration (d-theta) T of the phase II is larger than the duration (1-d-theta) T of the phase IV, so that:
this gives:
of course, it is easily understood that the output time length reference parameter d' is a real number larger than zero.
2) Average output voltage set value u <0
As mentioned above, the output voltage u should be made at this timeoutIs smaller than the negative waveform area, i.e., the duration (d-theta) T of the phase II is smaller than the duration (1-d-theta) T of the phase IV, so that:
this gives:
it follows that, after the output time period reference parameter d' is determined, both for the above case 1) and the above case 2), the corresponding target duty ratio d and the target phase shift angle θ can be determined.
On the basis of the above content, as a specific implementation manner, the embodiment of the present application further discloses a specific implementation manner for determining the output duration reference parameter d':
the output time length reference parameter is determined as d' ═ θ.
In this embodiment, the output duration reference parameter d' is specifically set to be as large as the target phase shift angle θ. Then for case 1) above, substituting d ═ θ yields:
at this time, referring to fig. 8, fig. 8 is a graph of an output voltage waveform in a modulation scheme disclosed in the embodiment of the present application when the average output voltage set value u > 0.
Then for case 2) above, substituting d ═ θ yields:
in this case, referring to fig. 9, fig. 9 is a graph of an output voltage waveform in a modulation scheme disclosed in the embodiment of the present application when the average output voltage set value u < 0.
Of course, those skilled in the art may set the output time length reference parameter d ' to other sizes, for example, d ' may be specifically set to 0.5 θ or d ' to 1.2 θ, and the like, which is not limited in the present application.
Referring to fig. 9, an embodiment of the present application discloses a three-level pulse width modulation apparatus, which is applied to a half-bridge topology circuit, and mainly includes:
a first determining module 100, configured to determine an equivalent output duty ratio D corresponding to an average output voltage set value u;
a second determining module 200, configured to determine an output duration reference parameter d';
the third determining module 300 is configured to determine a corresponding target duty cycle D and a corresponding target phase shift angle θ based on the equivalent output duty cycle D and the output duration reference parameter D';
the output module 400 is configured to output a first control signal with a target duty cycle d to a control terminal of a first switching transistor T1 in the half-bridge topology circuit; and outputting a second control signal with the duty ratio of the target duty ratio d to a control end of a second switching tube T2 in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is a target phase shift angle theta.
For the details of the three-level pwm apparatus, reference may be made to the foregoing detailed description of the three-level pwm method, and details thereof are not repeated here.
Further, the embodiment of the present application also discloses a three-level pulse width modulation controller, including:
a storage unit for storing a computer program;
a processing unit for executing the computer program to implement the steps of any of the three-level pulse width modulation methods as described above.
Further, the embodiment of the present application also discloses a magnetic levitation coil control system, which includes a half-bridge topology circuit and the three-level pwm controller, where the first driving output end and the second driving output end of the half-bridge topology circuit are respectively used for being connected to two ends of a magnetic levitation coil.
Further, the present application discloses a computer readable storage medium, in which a computer program is stored, and the computer program is used for implementing the steps of any one of the three-level pulse width modulation methods described above when being executed by a processor.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. For the equipment disclosed by the embodiment, the description is relatively simple because the equipment corresponds to the method disclosed by the embodiment, and the relevant parts can be referred to the method part for description.
It is further noted that, throughout this document, relational terms such as "first" and "second" are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The technical solutions provided by the present application are described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principle of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall into the protection scope of the present application.
Claims (10)
1. A three-level pulse width modulation method is applied to a half-bridge topology circuit, and comprises the following steps:
determining an equivalent output duty ratio corresponding to the average output voltage set value;
determining an output duration reference parameter;
determining a corresponding target duty ratio and a corresponding target phase shift angle based on the equivalent output duty ratio and the output duration reference parameter;
outputting a first control signal with the duty ratio of the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle.
2. The method of claim 1, further comprising, prior to said determining an equivalent output duty cycle corresponding to an average output voltage set point:
and carrying out amplitude limiting processing on the average output voltage set value based on the direct current voltage value of the direct current power supply in the half-bridge topology circuit.
3. The method of claim 2, wherein said clipping the average output voltage set point comprises:
carrying out amplitude limiting processing on the average output voltage set value u according to a preset amplitude limiting processing formula; the preset amplitude limiting processing formula is as follows:
and U is the direct-current voltage value of the direct-current power supply.
4. The method of claim 1, wherein said determining an equivalent output duty cycle corresponding to an average output voltage set point comprises:
calculating the equivalent output duty ratio D according to a preset duty ratio calculation formula; the preset duty ratio calculation formula is as follows:
wherein U is the direct current voltage value of the direct current power supply; u is the average output voltage set point.
5. The three-level pulse width modulation method of claim 4, wherein determining the corresponding target duty cycle and target phase shift angle based on the equivalent output duty cycle and the output duration reference parameter comprises:
calculating a corresponding target duty ratio d and a corresponding target phase shift angle theta according to a preset target parameter calculation formula; the preset target parameter calculation formula comprises:
Wherein D is the equivalent output duty cycle; d' is the output duration reference parameter.
6. The three-level pulse width modulation method according to claim 5, wherein the determining the output duration reference parameter comprises:
the output time length reference parameter is determined as d' ═ θ.
7. A three-level pulse width modulation device applied to a half-bridge topology circuit comprises:
the first determining module is used for determining an equivalent output duty ratio corresponding to the average output voltage set value;
the second determining module is used for determining an output duration reference parameter;
the third determining module is used for determining a corresponding target duty cycle and a corresponding target phase shifting angle based on the equivalent output duty cycle and the output duration reference parameter;
the output module is used for outputting a first control signal with the duty ratio being the target duty ratio to a control end of a first switching tube in the half-bridge topology circuit; outputting a second control signal with the duty ratio of the target duty ratio to a control end of a second switching tube in the half-bridge topology circuit; the phase delay angle of the second control signal relative to the first control signal is the target phase shift angle.
8. A three-level pulse width modulation controller, comprising:
a storage unit for storing a computer program;
processing unit for executing the computer program for carrying out the steps of the three-level pulse width modulation method according to any one of claims 1 to 6.
9. A magnetic levitation coil control system comprising a half-bridge topology circuit and the three-level pwm controller of claim 8, wherein the first and second drive outputs of the half-bridge topology circuit are adapted to be connected to two ends of a magnetic levitation coil.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the three-level pulse width modulation method according to one of claims 1 to 6.
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