CN112003613A - Dual-core parallel transconductance linearized low-phase noise voltage-controlled oscillator - Google Patents
Dual-core parallel transconductance linearized low-phase noise voltage-controlled oscillator Download PDFInfo
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- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
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Abstract
The invention discloses a dual-core parallel transconductance linearized low-phase noise voltage-controlled oscillator, which comprises two single-core voltage-controlled oscillators with the same structure; the method is characterized in that: the two single-core transconductance linear voltage-controlled oscillators are connected in parallel; each single-core voltage-controlled oscillator comprises two differential resonance tubes, a plurality of switch capacitor circuits capable of being adjusted in a numerical control mode and a continuous tuning circuit, and the first single-core voltage-controlled oscillator comprises a first differential resonance tube and a second differential resonance tube; the second single-core voltage-controlled oscillator comprises a third differential resonator tube and a fourth differential resonator tube; the grid electrode of any one differential resonator tube of the single-core voltage-controlled oscillator is connected to the drain electrode of the other differential resonator tube through a capacitor, meanwhile, the grid electrodes of the second differential resonator tube and the fourth differential resonator tube are connected to the grid electrodes of the first differential resonator tube and the third differential resonator tube through a first differential inductor, and are grounded in a common mode through the first differential inductor; the invention can be applied to a high-performance phase-locked loop system.
Description
Technical Field
The invention relates to a voltage-controlled oscillator, in particular to a dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator.
Background
The phase-locked loop can be used for providing local oscillation signals for a radio frequency receiving and transmitting system or providing clock signals for a data converter and a digital circuit, and the signal quality of the local oscillation signals or the clock signals has direct influence on key indexes in the radio frequency system and the high-speed high-precision data converter. When the phase-locked loop works in a narrow loop bandwidth mode, the far-end phase noise characteristic of the LC type voltage-controlled oscillator directly determines the closed-loop noise characteristic. With the rapid development of information technology, higher performance requirements are put on a phase-locked loop, and particularly, higher phase noise performance requirements are put on a voltage-controlled oscillator in the phase-locked loop.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides a dual-core parallel transconductance linearized low-phase noise voltage-controlled oscillator.
The technical scheme of the invention is as follows: a dual-core parallel transconductance linearization low-phase noise voltage-controlled oscillator comprises two single-core voltage-controlled oscillators with the same structure; the method is characterized in that: the two single-core transconductance linear voltage-controlled oscillators are connected in parallel;
each single-core voltage-controlled oscillator comprises two differential resonance tubes, a plurality of switch capacitor circuits capable of being adjusted in a numerical control mode and a continuous tuning circuit, and the first single-core voltage-controlled oscillator comprises a first differential resonance tube and a second differential resonance tube; the second single-core voltage-controlled oscillator comprises a third differential resonator tube and a fourth differential resonator tube;
the grid electrode of any one differential resonator tube of the single-core voltage-controlled oscillator is connected to the drain electrode of the other differential resonator tube through a capacitor, meanwhile, the grid electrodes of the second differential resonator tube and the fourth differential resonator tube are connected to the grid electrodes of the first differential resonator tube and the third differential resonator tube through a first differential inductor, and are grounded in a common mode through the first differential inductor; the drain electrode of the fourth differential resonator tube and the drain electrode of the second differential resonator tube are connected with the drain electrode of the first differential resonator tube and the drain electrode of the third differential resonator tube through a second differential inductor;
and a plurality of third switched capacitor circuits and third continuous tuning circuits which can be adjusted in a numerical control manner are connected in parallel at two ends of the first differential inductor.
According to the preferred scheme of the dual-core parallel transconductance linearization low-phase noise voltage-controlled oscillator, a plurality of first switched capacitor circuits and first continuous tuning circuits which can be adjusted in a numerical control mode are connected in parallel between the grids of the first differential resonance tube and the second differential resonance tube; and a plurality of second switch capacitor circuits and second continuous tuning circuits which can be adjusted in a numerical control manner are connected in parallel between the grids of the third and fourth differential resonant tubes.
The invention connects the VCO resonant cavities of two single-core voltage-controlled oscillators with the same structure in parallel, thereby realizing the optimization of the integral phase noise of the oscillator. In the parallel connection process, a common inductor design idea and an overall circuit architecture are adopted, only two differential inductors are needed, namely, one differential inductor is shared when the grids of the resonant tubes are connected in parallel; when the drains of the resonant tubes are connected in parallel, the other differential inductor is shared, and the layout area is effectively reduced. The transconductance of the PMOS resonant tube of the single-core voltage-controlled oscillator is linearized, and the optimization of the near-end phase noise of the device is realized.
According to the preferable scheme of the dual-core parallel transconductance linearization low-phase noise voltage-controlled oscillator, the first MOS tube controls the connection and disconnection of the first differential resonance tube and the second differential resonance tube, and the second MOS tube controls the connection and disconnection of the third differential resonance tube and the fourth differential resonance tube.
According to the preferred scheme of the dual-core parallel transconductance linearization low-phase noise voltage-controlled oscillator, the first MOS tube and the second MOS tube are PMOS tubes; and the grid electrodes of the first MOS tube and the second MOS tube are interconnected, and the interconnection node is used for simultaneously controlling the on-off of the two single-core voltage-controlled oscillators.
The dual-core parallel transconductance linearized low-phase noise voltage-controlled oscillator has the beneficial effects that: the invention realizes the optimization of the near-end phase noise of the device; the dual-core parallel connection mode provided by the invention realizes the optimization of the integral phase noise of the VCO; the invention provides a common inductor connection mode, which effectively reduces the chip area occupied by the rear end layout; the dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator provided by the invention has excellent phase noise performance and can be applied to a high-performance phase-locked loop system.
Drawings
Fig. 1 is a schematic block diagram of a dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator circuit according to the present invention.
Fig. 2 is a switched capacitor implementation.
Fig. 3 is a continuous tuning circuit implementation.
FIG. 4 is a graph of simulation effect of phase noise of a dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator at an oscillation frequency of 3 GHz.
Detailed Description
Referring to fig. 1 to 3, a dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator includes two single-core voltage-controlled oscillators with the same structure; the two single-core transconductance linear voltage-controlled oscillators are connected in parallel;
each single-core voltage-controlled oscillator comprises two differential resonance tubes, a plurality of switch capacitor circuits capable of being adjusted in a numerical control mode and a continuous tuning circuit, and the first single-core voltage-controlled oscillator comprises a first differential resonance tube and a second differential resonance tube; the second single-core voltage-controlled oscillator comprises a third differential resonator tube and a fourth differential resonator tube;
the grid electrode of any one differential resonator tube of the single-core voltage-controlled oscillator is connected to the drain electrode of the other differential resonator tube through a capacitor, meanwhile, the grid electrodes of the second differential resonator tube PM4 and the fourth differential resonator tube PM6 are connected to the grid electrodes of the first differential resonator tube PM3 and the third differential resonator tube PM5 through a first differential inductor L1 and are grounded in a common mode through a first differential inductor L1; the common inductance of the resonance end is realized. The drain of the fourth differential resonator tube PM6 and the drain of the second differential resonator tube PM4 are both connected to the drain of the first differential resonator tube PM3 and the drain of the third differential resonator tube PM5 through a second differential inductor L2; and the output end sharing inductor is realized. The center tap of the second differential inductor L2 is connected to ground.
Two ends of the first differential inductor L1 are connected in parallel with a plurality of third switched capacitor circuits and third continuous tuning circuits which can be adjusted in a numerical control mode.
A plurality of first switch capacitor circuits and first continuous tuning circuits which can be adjusted in a numerical control manner are connected in parallel between the grids of the first differential resonator tube and the second differential resonator tube; and a plurality of second switch capacitor circuits and second continuous tuning circuits which can be adjusted in a numerical control manner are connected in parallel between the grids of the third and fourth differential resonant tubes.
The first MOS transistor PM1 controls the on and off of the first and second differential resonator transistors, and the second MOS transistor PM2 controls the on and off of the third and fourth differential resonator transistors. In a specific embodiment, a gate of a PM1 transistor and a gate of a PM2 transistor are interconnected, a control port is named as PD, and the PD can realize simultaneous on-off control of two single-core voltage-controlled oscillators; besides, the grid of the PM3 tube and the grid of the PM4 tube are respectively connected with the grid of the PM5 tube and the grid of the PM6 tube in parallel, and the drain of the PM3 tube and the drain of the PM4 tube are respectively connected with the drain of the PM5 tube and the drain of the PM6 tube in parallel. The PM1 tube and the PM2 tube respectively supply power to the two single-core voltage-controlled oscillators, and the source electrode of the PM1 tube and the source electrode of the PM2 tube are connected with a power supply VCC
The first MOS tube and the second MOS tube are PMOS tubes; and the grid electrodes of the first MOS tube and the second MOS tube are interconnected, and the interconnection node is used for connecting the two voltage-controlled oscillators. The source electrode of the PM1 tube and the source electrode of the PM2 tube are connected with a power supply VCC, the grid electrode of the PM1 tube is connected with the grid electrode of the PM2 tube, the connection line is named as PD, and the drain electrode of the PM1 tube is connected with the source electrodes of the PM3 tube and the PM4 tube and used for supplying power to the PM3 tube and the PM4 tube of the resonance tube; the drain electrode of the PM2 tube is connected with the source electrodes of the PM5 tube and the PM6 tube and is used for supplying power to the PM5 tube and the PM6 tube.
The voltage-controlled oscillator provided by the invention has two connection methods applying the common inductor, and by adopting the connection method, the chip area occupied by the circuit in the rear-end layout is effectively reduced. The method specifically comprises the following steps: the grid electrode of the first differential resonator tube PM3 is connected with the grid electrode of the third differential resonator tube PM5, the connecting line is TANKB, the grid electrode of the second differential resonator tube PM4 is connected with the grid electrode of the fourth differential resonator tube PM6, the connecting line is TANKB, and the connecting line TANKA and the connecting line TANKB are respectively connected with the two ends of the differential inductor L1, so that the common inductor of the resonance ends is realized; the drain of the first differential resonator tube PM3 is connected to the drain of the third differential resonator tube PM5, the connection line is OUTP, the drain of the second differential resonator tube PM4 is connected to the drain of the fourth differential resonator tube PM6, the connection line is OUTN, and the connection line OUTP and the connection line OUTN are respectively connected to two ends of the differential inductor L2, so that the output end common inductor is realized.
In a specific embodiment, the gate of one of the resonator tubes PM3 in the first single-core voltage-controlled oscillator is connected to one end of the capacitor C2, one end of the first continuous tuning circuit, one ends of the four switch capacitors, and one end of the differential inductor L1; the grid electrode of the other resonance tube PM4 is connected with one end of a capacitor C1, the other end of the first continuous tuning circuit, the other ends of the four switch capacitors and the other end of a differential inductor L1; the other end of the capacitor C2 is connected with the drain of the PM4 and one end of the inductor L2; the other end of the capacitor C1 is connected to the drain of the PM3 and the other end of the inductor L2. The grid of the PM3 tube and the grid of the PM4 tube are respectively connected with the grid of the PM5 tube and the grid of the PM6 tube in parallel, and the drain of the PM3 tube and the drain of the PM4 tube are respectively connected with the drain of the PM5 tube and the drain of the PM6 tube in parallel; in consideration of fully utilizing the layout area, a continuous tuning circuit and four switched capacitor circuits are connected across two ends of the grid parallel differential circuit.
The grid electrode of the PM3 tube is connected with one end of a capacitor C2, the connection name is TANKB, the other end of the capacitor C2 is connected with the drain electrode of the PM4 tube, and the connection name is OUTN; the grid of the PM4 tube is connected with one end of a capacitor C1, the connection name is TANKA, the other end of the capacitor C1 is connected with the drain of the PM3, and the connection name is OUTP; the grid electrode of the PM5 tube is connected with one end of a capacitor C4, the connection name is TANKB, the other end of the capacitor C4 is connected with the drain electrode of the PM6 tube, and the connection name is OUTN; the gate of the PM6 transistor is connected to one end of a capacitor C3, which is called TANKA, and the other end of the capacitor C3 is connected to the drain of the PM5, which is called OUTP.
A first continuous tuning circuit and four switch capacitors are connected between two connecting lines of TANKA and TANKB of the first single-core voltage-controlled oscillator in a spanning mode, wherein the first continuous tuning circuit is composed of capacitors C5 and C6, variable capacitance diodes CV1 and CV2 and resistors R1 and R2 and is used for achieving continuous tuning of frequency; the four switch capacitors are controlled by control signals CS <1>, CS <2>, CS <3>, and CS <4>, respectively, the size of the capacitor controlled by CS <1> is C, the size of the capacitor controlled by CS <2> is C, the size of the capacitor controlled by CS <3> is 3C, and the size of the capacitor controlled by CS <4> is 5C.
A second continuous tuning circuit and four switching capacitors are connected between two connecting lines of TANKA and TANKB of the second single-core voltage-controlled oscillator in a spanning mode, wherein the second continuous tuning circuit is composed of capacitors C9 and C10, variable capacitance diodes CV5 and CV6 and resistors R5 and R6 and is used for achieving continuous tuning of frequency; the four switch capacitors are controlled by control signals CS <1>, CS <2>, CS <3>, and CS <4>, respectively, the size of the capacitor controlled by CS <1> is C, the size of the capacitor controlled by CS <2> is C, the size of the capacitor controlled by CS <3> is 3C, and the size of the capacitor controlled by CS <4> is 5C.
In consideration of effective utilization of chip area, a third continuous tuning circuit and four switched capacitors are connected between TANKA and TANKB of the two single-core voltage-controlled oscillators, wherein the third continuous tuning circuit is composed of capacitors C7 and C8, variable capacitance diodes CV3 and CV4 and resistors R3 and R4 and is used for realizing continuous tuning of frequency; the four switched capacitors are controlled by control signals CS <0>, CS <2>, CS <3>, and CS <4>, respectively, the size of the capacitor controlled by CS <0> is C, the size of the capacitor controlled by CS <2> is 2C, the size of the capacitor controlled by CS <3> is 2C, and the size of the capacitor controlled by CS <4> is 6C.
In summary, the total capacitance of CS <0> control is C, the total capacitance of CS <1> control is 2C, the total capacitance of CS <2> control is 4C, the total capacitance of CS <3> control is 8C, and the total capacitance of CS <4> control is 16C.
The connecting wires TANK and TANKB are respectively connected with two ends of the differential inductor L1 to form a resonant cavity; the connection lines OUTP and OUTN are respectively connected to two ends of the differential inductor L2 for forming a load and an output.
Referring to fig. 2, for the detailed circuit of the switched capacitor, the PM11 transistor, the PM12 transistor, the NM1 transistor, and the NM2 transistor are used to realize whether to select the capacitor or not in combination with the input terminal control signal CS. The source of the PM11 tube is connected with the source of the PM12 tube by a power supply VCC, the grid of the PM11 tube is connected with the grid of the NM1 tube by a CS connection line, the drain of the PM11 tube is connected with the drain of the NM1 tube and is simultaneously connected with the grids of the PM12 tube and the NM2 tube and one end of a resistor R11, and the source of the NM1 tube is connected with the ground. The drain of the PM12 tube is connected with the drain of the NM2 tube, one end of the resistor R2_1 and one end of the resistor R2_2, and the source of the NM2 tube is connected with the ground. The other end of the resistor R11 is connected with the grid of the NM0 tube, the R2_1 is connected with the drain of the NM0 tube and one end of the capacitor C0_1, and the R2_2 is connected with the source of the NM0 tube and one end of the capacitor C0_ 2. The other end of the capacitor C0_1 is a connection line TANKA, and the other end of the capacitor C0_2 is a connection line TANKB.
Referring to fig. 3, a continuous tuning circuit is used to achieve continuous frequency tuning of the VCO. The first, second, and third continuous tuning circuits involved in the present invention have the same structure, and the first continuous tuning circuit is used herein to specifically describe the internal connection relationship. One end of a varactor diode CV1 and CV2 are connected, the connection line is named as VTUNE, the other end of the varactor diode CV1 is connected to one end of a capacitor C5 and a resistor R1, the other end of the varactor diode CV2 is connected to one end of a capacitor C6 and a resistor R2, the other ends of the resistor R1 and the resistor R2 are grounded, the other end of the capacitor C5 is a connection line TANKA, and the other end of the capacitor C6 is a connection line TANKB.
FIG. 4 is a graph of simulation effect of phase noise of 3GHz oscillation frequency obtained by using the inventive voltage-controlled oscillator circuit, which shows that phase noise better than-120 dBc/Hz is realized at frequency offset of 100kHz, and the phase noise has very low phase noise characteristic.
The above implementation results show that: the dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator circuit disclosed by the invention has excellent phase noise performance. The method can be applied to a high-performance radio frequency phase-locked loop system.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims (4)
1. A dual-core parallel transconductance linearization low-phase noise voltage-controlled oscillator comprises two single-core voltage-controlled oscillators with the same structure; the method is characterized in that: the two single-core voltage-controlled oscillators are connected in parallel;
each single-core voltage-controlled oscillator comprises two differential resonance tubes, a plurality of switched capacitor circuits which can be adjusted in a numerical control mode and a continuous tuning circuit, and the first single-core voltage-controlled oscillator comprises a first differential resonance tube (PM 3) and a second differential resonance tube (PM 4); the second single-core voltage-controlled oscillator comprises a third differential resonator tube and a fourth differential resonator tube (PM5 and PM 6);
the grid electrode of any one differential resonator tube of the single-core voltage-controlled oscillator is connected to the drain electrode of the other differential resonator tube through a capacitor, meanwhile, the grid electrodes of the second differential resonator tube and the fourth differential resonator tube (PM4 and PM6) are connected to the grid electrodes of the first differential resonator tube and the third differential resonator tube (PM3 and PM5) through a first differential inductor (L1) and are grounded in a common mode through a first differential inductor (L1); the drain electrode of the fourth differential resonator tube (PM6) and the drain electrode of the second differential resonator tube (PM4) are connected with the drain electrode of the first differential resonator tube and the drain electrode of the third differential resonator tube through a second differential inductor (L2);
and two ends of the first differential inductor (L1) are connected in parallel with a plurality of third switched capacitor circuits and third continuous tuning circuits which can be adjusted in a numerical control mode.
2. The dual-core parallel transconductance linearized low-phase-noise voltage controlled oscillator according to claim 1, wherein: a first continuous tuning circuit and a plurality of first switch capacitor circuits which can be adjusted in a numerical control manner are connected in parallel between the grids of the first and second differential resonance tubes; and a plurality of second switch capacitor circuits which can be adjusted in a numerical control mode are connected in parallel between the grids of the third differential resonant tube and the fourth differential resonant tube.
3. The dual-core parallel transconductance linearized low-phase-noise voltage-controlled oscillator according to claim 1 or 2, characterized in that: the first MOS tube (PM1) controls the on and off of the first and second differential resonant tubes, and the second MOS tube (PM2) controls the on and off of the third and fourth differential resonant tubes.
4. The dual-core parallel transconductance linearized low-phase-noise voltage controlled oscillator according to claim 3, wherein: the first MOS tube and the second MOS tube are PMOS tubes; and the grid electrodes of the first MOS tube and the second MOS tube are interconnected, and the interconnection node is used for simultaneously controlling the on-off of the two single-core voltage-controlled oscillators.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114978042A (en) * | 2022-05-10 | 2022-08-30 | 上海韬润半导体有限公司 | Switched capacitor circuit, voltage controlled oscillator and method of forming a switched capacitor circuit |
| CN117097263A (en) * | 2023-09-01 | 2023-11-21 | 香港中文大学（深圳） | Dual-mode single-core oscillator |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103997337A (en) * | 2014-05-30 | 2014-08-20 | 北京大学 | Low-power-consumption low-phase noise inductance capacitance voltage-controlled oscillator |
| US20140327487A1 (en) * | 2011-12-06 | 2014-11-06 | St-Ericsson Sa | Oscillator Having Dual Topology |
| CN104796139A (en) * | 2015-04-22 | 2015-07-22 | 西安电子科技大学 | Quick frequency stabilization voltage-controlled oscillator |
| CN111342774A (en) * | 2018-12-19 | 2020-06-26 | 天津大学青岛海洋技术研究院 | Dual-core voltage-controlled oscillator based on C-type oscillator topology |
| US10749468B1 (en) * | 2019-05-21 | 2020-08-18 | Qualcomm Incorporated | Layout for voltage-controlled oscillator (VCO) |
-
2020
- 2020-09-02 CN CN202010909113.9A patent/CN112003613B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140327487A1 (en) * | 2011-12-06 | 2014-11-06 | St-Ericsson Sa | Oscillator Having Dual Topology |
| CN103997337A (en) * | 2014-05-30 | 2014-08-20 | 北京大学 | Low-power-consumption low-phase noise inductance capacitance voltage-controlled oscillator |
| CN104796139A (en) * | 2015-04-22 | 2015-07-22 | 西安电子科技大学 | Quick frequency stabilization voltage-controlled oscillator |
| CN111342774A (en) * | 2018-12-19 | 2020-06-26 | 天津大学青岛海洋技术研究院 | Dual-core voltage-controlled oscillator based on C-type oscillator topology |
| US10749468B1 (en) * | 2019-05-21 | 2020-08-18 | Qualcomm Incorporated | Layout for voltage-controlled oscillator (VCO) |
Non-Patent Citations (3)
| Title |
|---|
| MENG TING HSU；ET., AL.: "Design of 5GHz CMOS LC VCO wtih dual tuning circuit", MICROWAVE AND OPTICAL TECHNOLOGY LETTERS * |
| 张陶: "一种跨导线性化低相噪压控振荡器", 微电子学 * |
| 李英男;: "低相噪、低功耗连续调谐双核压控振荡器", 南京大学学报(自然科学), no. 02 * |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114978042A (en) * | 2022-05-10 | 2022-08-30 | 上海韬润半导体有限公司 | Switched capacitor circuit, voltage controlled oscillator and method of forming a switched capacitor circuit |
| WO2023216289A1 (en) * | 2022-05-10 | 2023-11-16 | 上海韬润半导体有限公司 | Switched-capacitor circuit, voltage-controlled oscillator, and method for forming switched-capacitor circuit |
| CN117097263A (en) * | 2023-09-01 | 2023-11-21 | 香港中文大学（深圳） | Dual-mode single-core oscillator |
| CN117097263B (en) * | 2023-09-01 | 2024-04-26 | 香港中文大学（深圳） | Dual-mode single-core oscillator |
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