CN112003609A - Construction method of self-adaptive frequency-locked loop based on quadrature phasor - Google Patents

Construction method of self-adaptive frequency-locked loop based on quadrature phasor Download PDF

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CN112003609A
CN112003609A CN202010838346.4A CN202010838346A CN112003609A CN 112003609 A CN112003609 A CN 112003609A CN 202010838346 A CN202010838346 A CN 202010838346A CN 112003609 A CN112003609 A CN 112003609A
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phasor
frequency
signal
self
pass filter
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CN112003609B (en
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杨淑英
房佳禹
谢震
刘芳
张兴
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Hefei University of Technology
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop

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Abstract

The invention discloses a method for constructing a self-adaptive frequency-locking loop based on quadrature phasor, belonging to the field of signal processing. According to a group of orthogonal phasors of a three-phase system, a direct-current component possibly caused by sampling errors or digital operation errors is removed through high-pass filtering, and a reference model, an adjustable model and a frequency self-adaptive rate are constructed according to a self-adaptive principle. The self-adaptive frequency locking loop provided by the invention has a simple structure and is easy to realize in engineering.

Description

Construction method of self-adaptive frequency-locked loop based on quadrature phasor
Technical Field
The invention relates to the field of signal processing, in particular to a method for constructing an adaptive frequency-locked loop based on quadrature phasor.
Background
Three-phase systems are widely found in the power industry, such as synchronous machines, power grids, etc. The frequency is an important parameter of the three-phase system, and the acquisition of the frequency of the three-phase system has important significance in many application occasions.
In the academic paper aiming at the frequency acquisition of the three-phase system, the acquisition method is mainly divided into a statistical thought-based method represented by a Kalman filter method and a frequency-locked loop method represented by a frequency-locked loop of a synchronous coordinate system. The statistical-idea-based method represented by the kalman filter method generally requires a large amount of calculation and is difficult to implement by engineering.
An article entitled "phase locking technique based on a novel three-phase frequency-locked loop" (zhongbingy, li hua, liyalin, liujun peak. electric power system and its automated bulletin, 2019,31(03): 76-82.). The method proposed in this paper is of the "three-phase synchronous phase-locked loop" type. This type of scheme requires a large amount of computation by transforming the input signal into a synchronous coordinate system using trigonometric function operation. In addition, when the frequency of the input signal jumps, the output frequency estimation value of the input signal still contains overshoot.
The title is an article of a synchronization method of a three-phase grid-connected inverter when a grid voltage parameter jumps (Kingshenh, Zhangguang, Xuancheng philosophy, Zhou Jian, Shanghai university of traffic, 2017,51(05): 585-. The method proposed in this document belongs to a scheme of the "filter-gradient descent" type. The scheme provided by the article can not process direct current components possibly caused by sampling errors and the like in input signals
In summary, the following problems still exist in the prior art for obtaining the frequency of the three-phase system:
1. the existing three-phase system frequency locking loop structure is complex, the calculated amount is large, and when the frequency of an input signal jumps, the output estimated value of the frequency of the input signal contains overshoot;
2. the existing three-phase system frequency locking loop is difficult to process direct current components caused by sampling errors and other factors in input signals.
Disclosure of Invention
The technical problem to be solved by the invention is to ensure the response speed of the frequency estimation value of the input signal output by the frequency-locked loop and reduce the overshoot on the premise of reducing the calculation amount of the frequency-locked loop, and to inhibit the influence of the direct-current component caused by sampling errors and other factors in the input signal on the frequency estimation value of the input signal.
The invention aims to realize the method, and provides a method for constructing an adaptive frequency-locking loop based on orthogonal phasor, wherein the adaptive frequency-locking loop is suitable for a three-phase system;
for any group of phasor signals under a three-phase static coordinate system in a three-phase system, firstly obtaining a group of orthogonal phasor signals under a two-phase static coordinate system through coordinate transformation, then removing direct-current components caused by sampling errors or digital operation errors by using a high-pass filter, and then constructing a reference model, an adjustable model and a frequency self-adaptive frequency by using the filtered orthogonal phasor signals to complete the construction of a self-adaptive frequency locking ring;
the method comprises the following specific steps:
step 1, obtaining any group of phasor signals u under a three-phase static coordinate system in a three-phase system through samplinga,ub,ucObtaining a group of orthogonal phasor signals under a two-phase static coordinate system through coordinate transformation and respectively recording the orthogonal phasor signals as leading phasor signals uα1And lagging phasor signal uβ1The coordinate transformation formula is as follows:
Figure BDA0002640506350000021
step 2, adopting a high-pass filter to carry out high-pass filtering on the leading phasor signal u obtained in the step 1α1And lagging phasor signal uβ1Respectively filtering to obtain filtered leading phasor signals uαAnd a filtered lag phasor signal uβ；
The cut-off frequency of the high-pass filter is taken as the estimated value of the frequency of the input signal of the high-pass filter, and the transfer function G of the high-pass filterfThe expression of (a) is as follows:
Figure BDA0002640506350000022
in the formula:
s is a laplace operator;
omega is the estimated value of the angular speed of the input signal of the high-pass filter;
in the present invention, an initial value ω of an estimated value ω of an angular velocity of an input signal to a high-pass filter is set as an initial value ωinitSet to any positive number;
step 3, constructing an adjustable model A presented in the form of a low-pass filter, and taking a filtered hysteresis phasor signal uβFor the input signal of the adjustable model A, the transfer function G of the adjustable model AMThe expression of (a) is as follows:
Figure BDA0002640506350000031
using the filtered leading phasor signal uαAnd a filtered lag phasor signal uβConstructing a reference model B, wherein the mathematical expression of the reference model B is as follows:
Figure BDA0002640506350000032
in the formula, OPIs the output signal of the reference model B;
step 4, calculating an error signal e of the adjustable model A relative to the reference model B, wherein the expression is as follows:
e＝GMuβ-oP
step 5, according to the error signal e of the adjustable model A relative to the reference model B and the filtered lag phasor signal uβObtaining the frequency self-adaptive rate of the frequency-locked loop
Figure BDA0002640506350000033
The expression is as follows:
Figure BDA0002640506350000034
wherein k is the adaptive rate gain;
and at this point, the construction of the self-adaptive frequency locking loop is completed.
Compared with the prior art, the invention has the beneficial effects that:
1. in the construction process of the self-adaptive frequency locking loop, trigonometric function operation is not needed, and the calculated amount is reduced;
2. in the construction process of the self-adaptive frequency locking loop, only one self-adaptive rate gain parameter needs to be adjusted, and the debugging is convenient;
3. the self-adaptive frequency-locking loop constructed by the invention can completely inhibit the influence of the direct current component in the input signal on the frequency estimation value of the output input signal;
4. the self-adaptive frequency locking loop constructed by the invention ensures the response speed of the system and simultaneously ensures that the response has no overshoot.
Drawings
FIG. 1 is a control block diagram of an adaptive frequency-locked loop constructed according to the method of the present invention;
FIG. 2 is a waveform of an estimated frequency value of an input signal output by the adaptive frequency-locking loop in Matlab simulation when a three-phase system is in frequency jitter;
fig. 3 is a waveform of an estimated value of the frequency of the input signal output by the adaptive frequency-locked loop when a dc component caused by a sampling error or a digital calculation error occurs in the input signal in Matlab simulation of the adaptive frequency-locked loop constructed in fig. 1.
Detailed Description
The technical scheme of the invention is clearly and completely described below with reference to the accompanying drawings.
The invention provides a construction method of a self-adaptive frequency-locking loop based on orthogonal phasor, and the self-adaptive frequency-locking loop is suitable for a three-phase system.
The construction method of the invention firstly obtains a group of orthogonal phasor signals under a two-phase static coordinate system for any group of phasor signals under a three-phase static coordinate system in a three-phase system through coordinate transformation, then uses a high-pass filter to remove direct-current components caused by sampling errors or digital operation errors, and then uses the filtered orthogonal phasor signals to construct a reference model, an adjustable model and a frequency self-adaptive frequency so as to complete the construction of the self-adaptive frequency locking loop.
The method comprises the following specific steps:
step 1, obtaining any group of phasor signals u under a three-phase static coordinate system in a three-phase system through samplinga,ub,ucObtaining a group of orthogonal phasor signals under a two-phase static coordinate system through coordinate transformation and respectively recording the orthogonal phasor signals as leading phasor signals uα1And lagging phasor signal uβ1The coordinate transformation formula is as follows:
Figure BDA0002640506350000041
step 2, adopting a high-pass filter to carry out high-pass filtering on the leading phasor signal u obtained in the step 1α1And lagging phasor signal uβ1Respectively filtering to obtain filtered leading phasor signals uαAnd a filtered lag phasor signal uβ。
The cut-off frequency of the high-pass filter is taken as the estimated value of the frequency of the input signal of the high-pass filter, and the transfer function G of the high-pass filterfThe expression of (a) is as follows:
Figure BDA0002640506350000051
in the formula:
s is a laplace operator;
omega is the estimated value of the angular speed of the input signal of the high-pass filter;
in the present invention, an initial value ω of an estimated value ω of an angular velocity of an input signal to a high-pass filter is set as an initial value ωinitSet to any positive number.
In the present embodiment, ωinit＝50。
Step 3, constructing an adjustable model A presented in the form of a low-pass filter, and taking a filtered hysteresis phasor signal uβFor the input signal of the adjustable model A, the transfer function G of the adjustable model AMThe expression of (a) is as follows:
Figure BDA0002640506350000052
using the filtered leading phasor signal uαAnd filtered lag phasor informationNumber uβConstructing a reference model B, wherein the mathematical expression of the reference model B is as follows:
Figure BDA0002640506350000053
in the formula, OPIs the output signal of the reference model B.
Step 4, calculating an error signal e of the adjustable model A relative to the reference model B, wherein the expression is as follows:
e＝GMuβ-oP
step 5, according to the error signal e of the adjustable model A relative to the reference model B and the filtered lag phasor signal uβObtaining the frequency self-adaptive rate of the frequency-locked loop
Figure BDA0002640506350000054
The expression is as follows:
Figure BDA0002640506350000055
where k is the adaptive rate gain.
In the present embodiment, k is 8.
And at this point, the construction of the self-adaptive frequency locking loop is completed.
Fig. 1 is a control block diagram of an adaptive frequency-locked loop constructed according to the method of the present invention. As can be seen from fig. 1, the adaptive frequency-locked loop uses a set of phasor signals u in a three-phase system obtained by samplinga、ub、ucAs an input. Firstly, u is transformed by a coordinate transformation modulea、ub、ucTransforming the three-phase static coordinate system to a two-phase static coordinate system to obtain a set of orthogonal phasor signals uα1、uβ1Wherein u isα1Is a leading phasor signal of uβ1A lagging phasor signal. Then, the high-pass filter module is used for removing the leading phasor signal uα1Lagging phasor signal uβ1Filtering to obtain a filtered leading phasor signal uαAnd after filteringLagging phasor signal uβ. And then, a frequency estimation module is used for obtaining an estimation value of the angular frequency of the input signal of the high-pass filter. And finally, calculating a three-phase system frequency estimation value f as output according to the estimation value of the angular frequency of the input signal of the high-pass filter, wherein the calculation formula of the three-phase system frequency estimation value f is as follows:
Figure BDA0002640506350000061
fig. 2 and fig. 3 show the performance of the adaptive frequency-locked loop constructed according to the present invention in Matlab simulation under different working conditions. The nominal frequency of a three-phase system to which the input signal of the self-adaptive frequency-locked loop belongs is 100Hz, the amplitude of the acquired phasor signal is 10, the self-adaptive rate gain k of the phase-locked loop is set to be 8, and the initial value omega of the estimated value omega of the angular frequency of the input signal of the high-pass filter is set to be the initial value omega of the estimated value omegainitSet to 50.
Fig. 2 shows the waveform of the estimated value of the frequency of the input signal output by the adaptive frequency-locking loop in the Matlab simulation when the frequency of the three-phase system is jittered. The self-adaptive frequency-locking loop is started at 0s, the frequency of the three-phase system jumps from 100Hz to 80Hz at 0.2s, and jumps from 80Hz to 120Hz at 0.4 s. The result shows that the frequency estimation value of the three-phase system output by the self-adaptive frequency locking loop constructed by the invention is accurate, the response is rapid, and overshoot is avoided.
Fig. 3 shows the waveform of the estimated frequency value of the input signal output by the adaptive frequency-locking loop when a dc component caused by a sampling error or a digital calculation error appears in the input signal in Matlab simulation of the adaptive frequency-locking loop built in fig. 1. The adaptive frequency-locking loop is started at 0s, and a direct-current component with the amplitude of 1 is added into an input signal of the adaptive frequency-locking loop at 0.2 s. From the results, the frequency estimation of the three-phase system output by the adaptive frequency locking loop constructed according to the invention is not influenced by the direct current component caused by sampling error or digital operation error.

Claims (1)

1. A construction method of a self-adaptive frequency-locking loop based on quadrature phasor is disclosed, wherein the self-adaptive frequency-locking loop is suitable for a three-phase system; the method is characterized in that for any set of phasor signals under a three-phase static coordinate system in a three-phase system, a set of orthogonal phasor signals under a two-phase static coordinate system is obtained through coordinate transformation, then a high-pass filter is used for removing direct-current components caused by sampling errors or digital operation errors, and then a reference model, an adjustable model and a frequency self-adaptive frequency are constructed by using the filtered orthogonal phasor signals to complete the construction of a self-adaptive frequency locking loop;
the method comprises the following specific steps:
step 1, obtaining any group of phasor signals u under a three-phase static coordinate system in a three-phase system through samplinga,ub,ucObtaining a group of orthogonal phasor signals under a two-phase static coordinate system through coordinate transformation and respectively recording the orthogonal phasor signals as leading phasor signals uα1And lagging phasor signal uβ1The coordinate transformation formula is as follows:
Figure FDA0002640506340000011
step 2, adopting a high-pass filter to carry out high-pass filtering on the leading phasor signal u obtained in the step 1α1And lagging phasor signal uβ1Respectively filtering to obtain filtered leading phasor signals uαAnd a filtered lag phasor signal uβ；
The cut-off frequency of the high-pass filter is taken as the estimated value of the frequency of the input signal of the high-pass filter, and the transfer function G of the high-pass filterfThe expression of (a) is as follows:
Figure FDA0002640506340000012
in the formula:
s is a laplace operator;
omega is the estimated value of the angular speed of the input signal of the high-pass filter;
in the present invention, an initial value ω of an estimated value ω of an angular velocity of an input signal to a high-pass filter is set as an initial value ωinitSet to any positive number;
step 3, constructing an adjustable model A presented in the form of a low-pass filter, and taking a filtered hysteresis phasor signal uβFor the input signal of the adjustable model A, the transfer function G of the adjustable model AMThe expression of (a) is as follows:
Figure FDA0002640506340000021
using the filtered leading phasor signal uαAnd a filtered lag phasor signal uβConstructing a reference model B, wherein the mathematical expression of the reference model B is as follows:
Figure FDA0002640506340000022
in the formula, OPIs the output signal of the reference model B;
step 4, calculating an error signal e of the adjustable model A relative to the reference model B, wherein the expression is as follows:
e＝GMuβ-oP
step 5, according to the error signal e of the adjustable model A relative to the reference model B and the filtered lag phasor signal uβObtaining the frequency self-adaptive rate of the frequency-locked loop
Figure FDA0002640506340000023
The expression is as follows:
Figure FDA0002640506340000024
wherein k is the adaptive rate gain;
and at this point, the construction of the self-adaptive frequency locking loop is completed.
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