CN112003471B

CN112003471B - Voltage-adjustable cross-coupling charge pump circuit, ASIC chip and microphone

Info

Publication number: CN112003471B
Application number: CN202010908751.9A
Authority: CN
Inventors: 陈章益; 张国煊
Original assignee: Goertek Microelectronics Inc
Current assignee: Goertek Microelectronics Inc
Priority date: 2020-09-01
Filing date: 2020-09-01
Publication date: 2022-03-25
Anticipated expiration: 2040-09-01
Also published as: CN112003471A

Abstract

The invention discloses a voltage-adjustable cross-coupling charge pump circuit, an ASIC chip and a microphone, wherein the circuit comprises: a voltage input terminal and a voltage output terminal; the reference voltage generator is connected with the voltage input end and is configured to generate a power supply voltage, a first reference voltage and a second reference voltage according to the system working voltage input by the voltage input end; the clock generation control circuit is connected with the reference voltage generator; the clock generation control circuit is configured to generate a clock signal and a voltage regulation control signal according to the input control signal, the second reference voltage and the first reference voltage which are connected; the cross-coupled charge pump is respectively connected with the reference voltage generator and the clock generation control circuit; the cross-coupled charge pump is configured to output a voltage value of a corresponding magnitude to the voltage output end according to the second reference voltage, the clock signal and the voltage adjustment control signal. The invention realizes the adjustability of the driving voltage of the MEMS sensor.

Description

Voltage-adjustable cross-coupling charge pump circuit, ASIC chip and microphone

Technical Field

The invention relates to the technical field of electronic circuits, in particular to a voltage-adjustable cross-coupled charge pump circuit, an ASIC chip and a microphone.

Background

The sensor design of the present MEMS microphone needs a driving voltage to activate the sensor, but the sensor chips are slightly different due to factors such as FAB process, and different driving voltages are needed to be matched, so the present MEMS sensor is usually powered by a cross-coupled charge pump, however, the circuit architecture design of the cross-coupled charge pump can only fix the voltage output, and cannot meet the requirement of providing different driving voltages for different MEMS sensors with different driving voltages.

Disclosure of Invention

The invention mainly aims to provide a voltage-adjustable cross-coupled charge pump circuit, an ASIC chip and a microphone, aiming at realizing the adjustability of driving voltage and generating the driving voltage matched with the driving voltage according to the different requirements of different MEMS sensors on the driving voltage, thereby being suitable for different MEMS sensors.

To achieve the above object, the present invention provides a voltage-tunable cross-coupled charge pump circuit, which includes:

a voltage input terminal and a voltage output terminal;

a reference voltage generator connected to the voltage input terminal; the reference voltage generator is configured to generate a supply voltage, a first reference voltage and a second reference voltage according to a system working voltage input by the voltage input end;

the clock generation control circuit is connected with the reference voltage generator; the clock generation control circuit is configured to generate a clock signal and a voltage regulation control signal according to an input control signal, the second reference voltage and the first reference voltage which are connected;

the cross coupling charge pump is respectively connected with the reference voltage generator and the clock generation control circuit; the cross-coupled charge pump is configured to output a voltage value of a corresponding magnitude to the voltage output end according to the second reference voltage, the clock signal and a voltage adjustment control signal.

Optionally, the cross-coupled charge pump comprises:

the input ends of the boosting module and the voltage regulation control switch module are respectively connected with the reference voltage generator, the output ends of the boosting module and the voltage regulation control switch module are respectively connected with the voltage output end, and the controlled ends of the boosting module and the voltage regulation control switch module are respectively connected with the control end of the clock generation control circuit; wherein the content of the first and second substances,

the boost module is configured to boost the accessed supply voltage according to the clock signal and then output the boosted supply voltage to the voltage output end;

the voltage adjustment control switch module is configured to adjust the accessed power supply voltage according to the voltage adjustment control signal and output the adjusted power supply voltage to the voltage output end.

Optionally, the boost module includes a plurality of boost units arranged in cascade;

the voltage regulation control switch module comprises a plurality of voltage regulation control switch units which are arranged in a cascade mode; wherein the content of the first and second substances,

the number of the voltage regulation control switch units corresponds to the number of the boosting modules.

Optionally, the voltage regulation control switch module includes a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube;

the first end of the first capacitor is connected with a first voltage regulation control signal output end of the clock generation control circuit, and the second end of the first capacitor is interconnected with the controlled ends of the first switch tube and the second switch tube;

the first end of the second capacitor is connected with a second voltage regulation control signal output end of the clock generation control circuit, and the second end of the second capacitor is interconnected with the controlled ends of the third switching tube and the fourth switching tube;

the input ends of the first switching tube and the third switching tube are connected with the reference voltage generator, and the output end of the first switching tube is interconnected with the input end of the second switching tube and the second end of the second capacitor; the output end of the third switching tube is interconnected with the input end of the fourth switching tube and the second end of the first capacitor;

the output end of the second switch tube and the output end of the fourth switch tube are interconnected with the voltage output end.

Optionally, the boost module includes a third capacitor, a fourth capacitor, a fifth switching tube, a sixth switching tube, a seventh switching tube, an eighth switching tube, a ninth switching tube, and a tenth switching tube;

the first end of the third capacitor is connected with the first clock signal output end of the clock generation control circuit, and the second end of the third capacitor is connected with the controlled ends of the fifth switching tube, the sixth switching tube and the seventh switching tube, and the input end of the eighth switching tube;

a first end of the fourth capacitor is connected with a second clock signal output end of the clock generation control circuit, and a second end of the fourth capacitor is interconnected with controlled ends of the eighth switching tube, the ninth switching tube and the tenth switching tube, and an input end of the fifth switching tube;

the output end of the fifth switch tube and the output end of the eighth switch tube are grounded;

the input ends of the sixth switching tube and the ninth switching tube are connected with the reference voltage generator, and the output end of the sixth switching tube is interconnected with the input end of the seventh switching tube and the second end of the third capacitor; the output end of the ninth switching tube is interconnected with the input end of the tenth switching tube and the second end of the fourth capacitor;

the output end of the seventh switching tube and the output end of the tenth switching tube are interconnected with the voltage output end.

Optionally, the clock generation control circuit includes a plurality of clock generation control units, and the number of the clock generation control units corresponds to the number of the voltage adjustment control switch modules.

Optionally, each clock generation control unit comprises a first and gate, a second and gate, a third and gate, a fourth and gate and a first inverter;

the first input end of the first AND gate, the first input end of the second AND gate and the input end of the first inverter are all connected with the input control signal;

the output end of the first inverter is connected with the first input ends of the third and gate and the fourth and gate;

second input ends of the first and third and gates are connected to the first reference voltage, and second input ends of the second and fourth and gates are connected to the second reference voltage;

and the output ends of the first AND gate, the second AND gate, the third AND gate and the fourth AND gate are respectively connected with the cross-coupled charge pump.

The invention also provides an ASIC chip comprising the voltage-tunable cross-coupled charge pump circuit as described above;

and the output end of the voltage-adjustable cross-coupled charge pump circuit is connected with the MEMS sensor.

Optionally, the ASIC chip further comprises:

the power supply manager is connected with the power supply voltage accessed from the input end of the power supply manager, and the output end of the power supply manager is connected with the voltage input end of the voltage-adjustable cross-coupled charge pump circuit; the power supply manager is configured to generate a system working voltage according to the accessed power supply voltage;

the oscillation circuit is connected with the output end of the MEMS sensor; the oscillation circuit is configured to amplify and output a detection signal output by the MEMS sensor.

The invention also provides a microphone, which comprises an MEMS sensor and the voltage-adjustable cross-coupled charge pump circuit;

alternatively, an ASIC chip as described above;

the MEMS sensor is connected with the ASIC chip.

The voltage-adjustable cross-coupling charge pump circuit is provided with a reference voltage generator to generate a power supply voltage, a first reference voltage and a second reference voltage according to a system working voltage input by a voltage input end; and generating a clock signal and a voltage adjustment control signal according to the accessed input control signal, the second reference voltage and the first reference voltage through a clock generation control circuit, and outputting the clock signal and the voltage adjustment control signal to a cross-coupled charge pump, so that the cross-coupled charge pump outputs a voltage value with a corresponding magnitude to the power supply voltage to the voltage output end according to the second reference voltage, the clock signal and the voltage adjustment control signal, and further provides a driving voltage matched with the MEMS sensor. The MEMS sensor driving circuit can generate driving voltage matched with different MEMS sensors according to different requirements on the driving voltage, so that the MEMS sensor driving circuit is suitable for different MEMS sensors. The invention solves the problem that the area, power consumption, cost and the like of a chip are increased by designing a plurality of different voltage output samples or matching other circuits according to the requirements of different driving voltages of the MEMS sensor.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.

FIG. 1 is a functional block diagram of an embodiment of a voltage tunable cross-coupled charge pump circuit according to the present invention;

FIG. 2 is a functional block diagram of one embodiment of the cross-coupled charge pump of FIG. 1;

FIG. 3 is a schematic circuit diagram of an embodiment of the cross-coupled charge pump of FIG. 1;

FIG. 4(A) is a schematic circuit diagram of another embodiment of a cross-coupled charge pump of the present invention;

FIG. 4(B) is a schematic circuit diagram of a cross-coupled charge pump according to another embodiment of the present invention;

FIG. 5(A) is a schematic circuit diagram of a cross-coupled charge pump according to yet another embodiment of the present invention;

FIG. 5(B) is a schematic circuit diagram of a cross-coupled charge pump according to another embodiment of the present invention;

FIG. 6 is a circuit diagram of an embodiment of the clock generation control circuit of FIG. 1;

fig. 7 is a functional block diagram of a microphone according to an embodiment of the invention.

The reference numbers illustrate:

the implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

It should be noted that, if directional indications (such as up, down, left, right, front, and back … …) are involved in the embodiment of the present invention, the directional indications are only used to explain the relative positional relationship between the components, the movement situation, and the like in a specific posture (as shown in the drawing), and if the specific posture is changed, the directional indications are changed accordingly.

In addition, if there is a description of "first", "second", etc. in an embodiment of the present invention, the description of "first", "second", etc. is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, technical solutions between various embodiments may be combined with each other, but must be realized by a person skilled in the art, and when the technical solutions are contradictory or cannot be realized, such a combination should not be considered to exist, and is not within the protection scope of the present invention.

The term "and/or" herein is merely an association describing an associated object, meaning that three relationships may exist, e.g., a and/or B, may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

The invention provides a voltage-adjustable cross-coupled charge pump circuit, which is integrated in an ASIC chip and can be applied to electronic equipment provided with an MEMS sensor, such as a microphone, an acceleration sensor and the like.

Based on modern intelligent home wide application, for example: the intelligent sound box can input human voice into the system by the microphone, and train a human voice identification algorithm model in an AI machine learning mode to further control household equipment such as a television, an air conditioner, a light switch and the like, so that the demand of a sensor chip is relatively greatly increased. The sensor design of the MEMS microphone requires a driving voltage to activate the sensor, but the sensor chips are slightly different due to the factor of FAB process, and different driving voltages are needed to meet the specification of the MEMS microphone. The conventional cross-coupled charge pump has the advantage of fast charging, and has the disadvantage that the circuit architecture is designed to be a fixed voltage output, and if the circuit architecture is required to generate different driving voltages, a plurality of different voltage output samples are required to be designed or other circuits (circuits) are required to be matched, such as: LDO, etc., which increases the cost of chip area, power consumption, etc.

Referring to fig. 1 to 7, in an embodiment of the present invention, the voltage tunable cross-coupled charge pump circuit 200 includes:

a voltage input terminal VDDX and a voltage output terminal VPUMP;

a reference voltage generator 10 connected to the voltage input terminal VDDX, the reference voltage generator 10 configured to generate a supply voltage, a first reference voltage Vref1 and a second reference voltage Vref2 according to a system operation voltage inputted from the voltage input terminal VDDX;

a clock generation control circuit 20 connected to the reference voltage generator 10; the clock generation control circuit 20 configured to generate a clock signal and a voltage adjustment control signal according to the input control signal Ctr1, the second reference voltage Vref2 and the first reference voltage Vref 1;

a cross-coupled charge pump 30 connected to the reference voltage generator 10 and the clock generation control circuit 20, respectively; the cross-coupled charge pump 30 is configured to output a voltage value with a corresponding magnitude to the voltage output end VPUMP according to the second reference voltage Vref2, the clock signal and a voltage adjustment control signal.

In this embodiment, the voltage input terminal VDDX may be connected to a power supply of the microphone to access the system operating voltage from the power supply. The voltage output VPUMP is connected to the MEMS sensor U1 to provide a drive voltage for the MEMS sensor U1.

The reference voltage generator 10 may be implemented by a bandgap reference voltage source, which can generate a voltage drop insensitive to temperature and voltage variation, and in this embodiment, generates two reference voltages and provides an initial voltage to the cross-coupled charge pump 30.

The input end of the clock generation control circuit 20 inputs a control signal Ctr1 to receive a control signal, and generates at least one pair of voltage regulation control signals (ClkA & ClkB) and a pair of clock signals (Clk1& Clk2) according to the received control signal and two reference voltages. The control signal may be 1 bit or N bits (N ≧ 2), and when the input control signal Ctr1 is inputted to the input terminal of the clock generation control circuit 20 and the N-bit control signal is inputted, the clock generation control circuit 20 generates N pairs of voltage adjustment control signals (ClkA1& ClkB 1-ClkAN & ClkBN). It will be appreciated that the control signals received by the clock generation control circuit 20 will be different depending on the drive voltage requirements of the MEMS, and therefore the voltage regulation control signals (ClkA & ClkB) and clock signals (Clk1& Clk2) will be different.

The cross-coupled charge pump 30 boosts the received supply voltage according to the received voltage regulation control signal (ClkA & ClkB) and the clock signal (Clk1& Clk2), and specifically, the cross-coupled charge pump can generate a voltage value with a corresponding magnitude according to the received voltage regulation control signal (ClkA & ClkB) and the clock signal (Clk1& Clk2) and output the voltage value to the MEMS sensor U1 so as to match the driving voltage of the MEMS sensor U1.

The voltage-adjustable cross-coupled charge pump circuit 200 of the present invention generates a supply voltage, a first reference voltage Vref1 and a second reference voltage Vref2 according to a system operating voltage inputted from the voltage input terminal VDDX by setting the reference voltage generator 10; and through the clock generation control circuit 20, a clock signal and a voltage adjustment control signal are generated according to the accessed input control signal Ctr1, the second reference voltage Vref2 and the first reference voltage Vref1, and the clock signal and the voltage adjustment control signal are output to the cross-coupled charge pump 30, so that the cross-coupled charge pump 30 outputs a voltage value with a corresponding magnitude to the voltage output end VPUMP according to the second reference voltage Vref2, the clock signal and the voltage adjustment control signal, and further provides a driving voltage matched with the voltage value for the MEMS sensor U1. The MEMS sensor U1 driving circuit can generate the driving voltage matched with the driving voltage according to different requirements of different MEMS sensors U1 on the driving voltage, so that the MEMS sensor U1 driving circuit is suitable for different MEMS sensors. The invention solves the problem that the area, power consumption, cost and the like of a chip are increased by designing a plurality of different voltage output samples or matching other circuits according to the requirements of different driving voltages of the MEMS sensor U1.

Referring to fig. 2, in one embodiment, the cross-coupled charge pump 30 includes:

a boost module 31 and a voltage regulation control switch module 32, wherein input terminals VIN of the boost module 31 and the voltage regulation control switch module 32 are respectively connected to the reference voltage generator 10, output terminals VOUT of the boost module 31 and the voltage regulation control switch module 32 are respectively connected to the voltage output terminal VPUMP, and controlled terminals of the boost module 31 and the voltage regulation control switch module 32 are respectively connected to a control terminal of the clock generation control circuit 20; wherein the content of the first and second substances,

the boosting module 31 is configured to boost the power supply voltage according to the clock signal and output the boosted power supply voltage to the voltage output terminal VPUMP;

the voltage regulation control switch module 32 is configured to regulate the connected supply voltage according to the voltage regulation control signal and output the regulated supply voltage to the voltage output terminal VPUMP. The boosting module 31 includes a plurality of boosting units arranged in cascade; the voltage regulation control switch module 32 includes a plurality of voltage regulation control switch units arranged in cascade; the number of the voltage adjustment control switch units corresponds to the number of the boosting modules 31.

In this embodiment, the number of the voltage boosting modules 31 and the number of the voltage adjustment control switch modules 32 may determine the number of times of voltage boosting, and the multi-stage voltage boosting modules 31 and the voltage adjustment control switch modules 32 may be provided to perform multi-stage voltage boosting on the input voltage to provide different driving voltages, and the multi-stage voltage boosting modules 31 and the voltage adjustment control switch modules 32 operate based on the clock signals (Clk1& Clk2) and the control of the N pair voltage adjustment control signals (Clk a1& ClkB 1-Clk an & ClkBN), and may determine whether each of the voltage boosting modules 31 and the voltage adjustment control switch modules 32 operates or not by the clock signals (Clk1& Clk2) and the level (high level or low level) of each of the N pair voltage adjustment control signals (Clk a1& Clk b 1-Clk an & ClkBN), thereby realizing a combination of a plurality of operating states of the voltage boosting modules 31 and the voltage adjustment control switch modules 32. When the number of the boosting modules 31 and the number of the voltage adjustment control switch modules 32 are N, the voltages boosted by the N boosting modules 31 and the voltage adjustment control switch modules 32 can be calculated according to the formula (1):

VOUT＝VIN+(N*VCLK) (1)

wherein VOUT is a driving voltage output by the output terminal of the cross-coupled charge pump 30, VIN is a supply voltage input by the output terminal of the cross-coupled charge pump 30, and VCLK is a voltage value corresponding to the clock signal (Clk1& Clk2) and the N-pair voltage regulation control signal (ClkA1& ClkB 1-ClkAN & ClkBN).

In this embodiment, each boost module 31 is connected in parallel to a voltage regulation control switch module 32, the boost module 31 operates according to a pair of received clock signals (Clk1& Clk2) to boost the incoming supply voltage, and the voltage regulation control switch module 32 operates according to 1 pair of received voltage regulation control signals (ClkA1& ClkB1) or N to the voltage regulation control signals (ClkA1& ClkB 1-ClkAN & ClkBN) to boost the incoming supply voltage. In this embodiment, depending on the clock signals (Clk1& Clk2) and the voltage regulation control signals (ClkA1& ClkB1), one of the boost module 31 and the voltage regulation control switch module 32 may be operated independently, while the other module is not operated. For example, when the voltage boost module 31 operates, the voltage regulation control switch module 32 does not operate, or when the voltage regulation control switch module 32 operates, the voltage boost module 31 does not operate. Alternatively, two of the boosting module 31 and the voltage regulation control switch module 32 operate simultaneously. When the two modules work simultaneously, the voltage boosting module 31 and the voltage regulation control switch module 32 respectively boost the power supply voltage, and then the voltages output by the two modules are superposed. Therefore, different supply voltages can be generated and output according to the clock signals (Clk1& Clk2) and the voltage regulation control signals (ClkA1& ClkB1), and the required supply voltage can be provided for the MEMS sensor U1.

Referring to fig. 3, in an embodiment, the voltage regulation control switch module 32 includes a first capacitor C1, a second capacitor C2, a first switch transistor M1, a second switch transistor M2, a third switch transistor M3, and a fourth switch transistor M4;

a first terminal of the first capacitor C1 is connected to the first voltage adjustment control signal output terminal of the clock generation control circuit 20, and a second terminal of the first capacitor C1 is interconnected with the controlled terminals of the first switch tube M1 and the second switch tube M2;

a first end of the second capacitor C2 is connected to the second voltage adjustment control signal output end of the clock generation control circuit 20, and a second end of the second capacitor C2 is interconnected with the controlled ends of the third switch tube M3 and the fourth switch tube M4;

the input ends of the first switch tube M1 and the third switch tube M3 are connected with the reference voltage generator 10, and the output end of the first switch tube M1 is interconnected with the input end of the second switch tube M2 and the second end of the second capacitor C2; an output terminal of the third switching tube M3 is interconnected with an input terminal of the fourth switching tube M4 and the second terminal of the first capacitor C1;

an output terminal of the second switching tube M2 and an output terminal of the fourth switching tube M4 are interconnected with the voltage output terminal VPUMP.

In this embodiment, the first switch tube M1 to the fourth switch tube M4 may be implemented by MOS tubes, and the MOS tubes may be implemented by thin film transistors or wafers or chip elements mounted on a substrate or a lead frame of the ASIC chip U2 according to different manufacturing processes of the ASIC chip U2. The first capacitor C1, the second capacitor C2, the first switch tube M1, the second switch tube M2, the third switch tube M3 and the fourth switch tube M4 form a switched capacitor voltage converter, and the first switch tube M1, the second switch tube M2, the third switch tube M3 and the fourth switch tube M4 can be implemented by NMOS transistors, specifically, deep trench N-Well MOS transistors.

The first switch transistor M1 and the second switch transistor M2 are controlled by the voltage regulation control signal ClkA, the third switch transistor M3 and the fourth switch transistor M4 are controlled by the voltage regulation control signal ClkB, and the voltage regulation control signal ClkA & ClkB may be a pulse voltage converted by high-low level switching. When the voltage adjustment control signal ClkA & ClkB is at a high level, the first switching tube M1, the second switching tube M2, the third switching tube M3, and the fourth switching tube M4 are turned on, and when the voltage adjustment control signal ClkA & ClkB is at a low level, the first switching tube M1, the second switching tube M2, the third switching tube M3, and the fourth switching tube M4 are turned off. When the voltage regulation control signal ClkA is at a high level, the voltage regulation control signal ClkB is at a low level, and when the voltage regulation control signal ClkA is at a low level, the voltage regulation control signal ClkB is at a high level. According to the received voltage regulation control signal (ClkA & ClkB), the first switch tube M1, the second switch tube M2, the third switch tube M3 and the fourth switch tube M4 are mutually matched and conducted in turn, so that the first capacitor C1 and the second capacitor C2 are controlled to be charged and discharged, and the connected power supply voltage is boosted.

Specifically, when the voltage adjustment control signal ClkA is at a high level (the voltage value of the voltage adjustment control signal is VDD), and the voltage adjustment control signal ClkB is at a low level, the first capacitor C1 discharges to provide twice VDD to the first switch tube M1 and the second switch tube M2, the first switch tube M1 and the second switch tube M2 are turned on, the input voltage is boosted and output through the first switch tube M1 and the second switch tube M2, and the input voltage charges the second capacitor C2 through the first switch tube M1. When the voltage adjustment control signal ClkB is at a high level and the voltage adjustment control signal ClkA is at a low level, the second capacitor C2 discharges to provide twice VDD to the third switching tube M3 and the fourth switching tube M4, the third switching tube M3 and the fourth switching tube M4 are turned on, the input voltage is boosted by the third switching tube M3 and the fourth switching tube M4 and then output, and at the same time, the input voltage charges the first capacitor C1 by the first switching tube M1. The power supply voltage can be boosted and then output through level switching of the voltage regulation control signals ClkA and ClkB.

Referring to fig. 3, in an embodiment, the boost module 31 includes a third capacitor C3, a fourth capacitor C4, a fifth switch tube M5, a sixth switch tube M6, a seventh switch tube M7, an eighth switch tube M8, a ninth switch tube M9, and a tenth switch tube M10;

a first end of the third capacitor C3 is connected to the first clock signal output end of the clock generation control circuit 20, a second end of the third capacitor C3 is interconnected to the controlled ends of the fifth switch transistor M5, the sixth switch transistor M6, the seventh switch transistor M7, and the input end of the eighth switch transistor M8;

a first end of the fourth capacitor C4 is connected to the second clock signal output end of the clock generation control circuit 20, a second end of the fourth capacitor C4 is interconnected with the controlled ends of the eighth switch transistor M8, the ninth switch transistor M9 and the tenth switch transistor M10, and the input end of the fifth switch transistor M5;

the output end of the fifth switch tube M5 and the output end of the eighth switch are grounded;

the input terminals of the sixth switching tube M6 and the ninth switching tube M9 are connected to the reference voltage generator 10, and the output terminal of the sixth switching tube M6 is interconnected with the input terminal of the seventh switching tube M7 and the second terminal of the third capacitor C3; an output terminal of the ninth switching tube M9 is interconnected with an input terminal of the tenth switching tube M10 and a second terminal of the fourth capacitor C4;

an output terminal of the seventh switching tube M7 and an output terminal of the tenth switching tube M10 are interconnected with the voltage output terminal VPUMP.

In this embodiment, the fifth switch tube M5 to the tenth switch tube M10 may be implemented by MOS transistors, and the MOS transistors may be implemented by thin film transistors or wafers or chip elements mounted on a substrate or a lead frame of the ASIC chip U2 according to different manufacturing processes of the ASIC chip U2. The third capacitor C3, the fourth capacitor C4, the fifth switch M5, the sixth switch M6, the seventh switch M7, the eighth switch M8, the ninth switch M9, and the tenth switch M10 form a cross-coupled charge pump 30 circuit, and the fifth switch M5 to the tenth switch M10 may be implemented by NMOS transistors, and specifically may be deep trench (deep N-Well) MOS transistors.

The fifth switch transistor M5, the sixth switch transistor M6, and the seventh switch transistor M7 are controlled by the clock signal Clk1, the eighth switch transistor M8, the ninth switch transistor M9, and the tenth switch transistor M10 are controlled by the clock signal Clk2, and the clock signals Clk1& Clk2 may be pulse voltages switched between high and low levels. When the clock signal Clk1& Clk2 is at a high level, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, the eighth switching transistor M8, the ninth switching transistor M9, and the tenth switching transistor M10 are turned on, and when the clock signal Clk1& Clk2 is at a low level, the fifth switching transistor M5, the sixth switching transistor M6, the seventh switching transistor M7, the eighth switching transistor M8, the ninth switching transistor M9, and the tenth switching transistor M10 are turned off. When the clock signal Clk1 is at a high level, the clock signal Clk2 is at a low level, and when the clock signal Clk1 is at a low level, the clock signal Clk2 is at a high level. According to the received clock signals (Clk1& Clk2), the fifth switch tube M5, the sixth switch tube M6, the seventh switch tube M7, the eighth switch tube M8, the ninth switch tube M9 and the tenth switch tube M10 are mutually matched and alternately conducted, so that the second capacitor C2 and the second capacitor C2 are controlled to be charged and discharged, and the connected power supply voltage is boosted.

Specifically, when the clock signal Clk1 is at a high level (the voltage value of the clock signal is VDD) and the clock signal Clk2 is at a low level, the third capacitor C3 discharges to provide twice VDD to the sixth switching tube M6, when the sixth switching tube M6 is turned on, the input voltage is output to the controlled terminals of the eighth switching tube M8 and the tenth switching tube M10 through the sixth switching tube M6, so as to control the eighth switching tube M8 and the tenth switching tube M10 to be turned on, the eighth switching tube M8 further provides the driving voltage to the tenth switching tube M10, and the input voltage charges the fourth capacitor C4 through the fifth switching tube M5, and after the eighth switching tube M8 and the tenth switching tube M10 are turned on, twice VDD is output to the power supply output terminal. When the clock signal Clk2 is at a high level and the clock signal Clk1 is at a low level, the fourth capacitor C4 discharges to provide twice VDD to the eighth switching tube M8, when the eighth switching tube M8 is turned on, the input voltage is output to the controlled terminals of the fifth switching tube M5 and the seventh switching tube M7 through the ninth switching tube M9, so as to control the fifth switching tube M5 and the seventh switching tube M7 to be turned on, the fifth switching tube M5 further provides the seventh switching tube M7 with the driving voltage, and simultaneously the input voltage charges the third capacitor C3 through the seventh switching tube M7, and after the fifth switching tube M5 and the seventh switching tube M7 are turned on, the twice VDD is output to the power output terminal. The power supply voltage can be boosted and then output through level switching of the clock signals Clk1& Clk 2.

It can be understood that, when the voltage boost module 31 is provided with N voltage boost units and the voltage regulation control switch module 32 is provided with N voltage regulation control switch units, the electronic components in the N voltage boost units and the voltage regulation control switch units are respectively numbered as first to 10 switching tubes M11 to M1N, M2 to M2N, …, M101 to M10N, and first to fourth capacitors C11 to C1N, …, and C41 to C4N.

In one embodiment, the clock generation control circuit 20 includes a plurality of clock generation control units, and the number of the clock generation control units corresponds to the number of the voltage adjustment control switch modules 32.

In the present embodiment, the clock generation control circuit 20 is provided with a plurality of clock generation control units, the number of the clock control units being set correspondingly, the plurality of clock generation control units generating a plurality of sets of clock signals Clk1& Clk2, and N pairs of voltage adjustment control signals (ClkA1& ClkB 1-ClkAN & ClkBN), each of the clock generation control units generating a pair of clock signals Clk1& Clk2, and a pair of voltage adjustment control signals ClkA & ClkB.

Referring to fig. 6, in an embodiment, each of the clock generation control units includes a first AND gate AND1, a second AND gate AND2, a third AND gate AND3, a fourth AND gate AND4, AND a first inverter NOT 1;

the first input end of the first AND gate AND1, the first input end of the second AND gate AND2 AND the input end of the first inverter NOT1 are all connected to the input control signal Ctr 1;

the output end of the first inverter NOT1 is connected to the first input ends of the third AND gate AND3 AND the fourth AND gate AND 4;

second input ends of the first AND gate AND1 AND the third AND gate AND3 are connected to the first reference voltage Vref1, AND second input ends of the second AND gate AND2 AND the fourth AND gate AND4 are connected to the second reference voltage Vref 2;

the output ends of the first AND gate AND1, the second AND gate AND2, the third AND gate AND3 AND the fourth AND gate AND4 are respectively connected to the cross-coupled charge pump 30.

In this embodiment, the levels of the input control signal Ctr1, the first reference voltage Vref1, and the second reference voltage Vref2 may be high or low, and the level of the input control signal Ctr1 accessed by each clock generation control unit may be the same or different, and may specifically be set according to the voltage to be generated, and the clock signals Clk1& Clk2 and the voltage adjustment control signals ClkA & ClkB with different levels may be generated by setting the level of each input control signal Ctr1 to be different.

Referring to fig. 4(a), 4(B), 5(a) and 5(B), the present embodiment takes 1 step-up module 31 and voltage regulation control switch module 32 as an example, and the step-up module 31 and the voltage regulation control switch module 32 generate the clock signal Clk1& Clk2 and the voltage regulation control signal ClkA & ClkB in the clock generation control circuit 20 according to the input control signal Ctr1, the first reference voltage Vref1 and the second reference voltage Vref2, and have the corresponding relationship as shown in fig. 4(a), 4(B), 5(a) and 5(B), wherein the element drawn by the dotted line in the figure indicates that the element does not work at this time, and the element drawn by the solid line indicates the element in work.

Specifically, when the input control signal Ctr1 is at a low level and the first reference voltage Vref1 and the second reference voltage Vref2 are both at a high level, the clock signals Clk1 and Clk2 generated by the clock generation control unit are both at a low level and the voltage adjustment control signals ClkA and ClkB are both at a high level.

When the input control signal Ctr1 is high and the first reference voltage Vref1 and the second reference voltage Vref2 are both high, the clock signals Clk1 and Clk2 generated by the clock generation control unit are both low, and the voltage adjustment control signals ClkA and ClkB are both low.

When the input control signal Ctr1 is at a low level, the first reference voltage Vref1 is at a high level, and the second reference voltage Vref2 is at a low level, the clock signals Clk1 and Clk2 generated by the clock generation control unit are all at a low level, the generated voltage adjustment control signal ClkA is at a high level, and the generated voltage adjustment control signal ClkB is at a low level.

Referring to fig. 4(B), when the input control signal Ctr1 is at a low level, the first reference voltage Vref1 is at a low level, and the second reference voltage Vref2 is at a high level, the clock signals Clk1 and Clk2 generated by the clock generation control unit are both at a low level, the generated voltage adjustment control signal ClkA is at a low level, and the generated voltage adjustment control signal ClkB is at a high level.

Referring to fig. 5(a), when the input control signal Ctr1 is at a high level, the first reference voltage Vref1 is at a high level, and the second reference voltage Vref2 is at a low level, the clock signal Clk1 generated by the clock generation control unit is at a high level, the clock signal Clk2 is at a low level, and the generated voltage adjustment control signals ClkA & ClkB are all at a low level.

Referring to fig. 5(B), when the input control signal Ctr1 is at a high level, the first reference voltage Vref1 is at a low level, and the second reference voltage Vref2 is at a high level, the clock signal Clk1 generated by the clock generation control unit is at a low level, the clock signal Clk2 is at a high level, and the generated voltage adjustment control signals ClkA & ClkB are all at a low level.

It can be understood that, as shown in fig. 4(a) and 4(B), in the embodiment where the input control signal Ctr1 is at a high level, any one of the first reference voltage Vref1 and the second reference voltage Vref2 is at a high level, and the other one is at a low level, the voltage adjustment control switch module 32 does not operate, and the voltage boost module 31 boosts the input voltage according to the difference between the high and low levels of the clock signals Clk1& Clk2 and outputs the boosted input voltage. Specifically, as shown in fig. 4(a) and 4(B), the broken line indicates that the element is not operating, and the solid line indicates that the element is operating.

In the embodiment where any one of the first reference voltage Vref1 and the second reference voltage Vref2 is at a high level and the other is at a low level when the input control signal Ctr1 is at a low level, the voltage boost module 31 does not operate, and the voltage regulation control switch module 32 boosts the input voltage according to the high and low levels of the voltage regulation control signals ClkA & ClkB and outputs the boosted input voltage. Specifically, as shown in fig. 5(a) and 5(B), the broken line indicates that the element is not operating, and the solid line indicates that the element is operating.

The invention also proposes an ASIC chip U2, the ASIC chip U2 comprising the voltage tunable cross-coupled charge pump circuit 200 as described above;

referring to fig. 7, the output of the voltage tunable cross-coupled charge pump circuit 200 is connected to a MEMS sensor U1.

The ASIC chip U2 includes B and the voltage tunable cross-coupled charge pump circuit 200 as described above. The detailed structure of the voltage-adjustable cross-coupled charge pump circuit 200 can refer to the above embodiments, and is not described herein again; it can be understood that, since the voltage-tunable cross-coupled charge pump circuit 200 is used in the ASIC chip U2 of the present invention, the embodiment of the ASIC chip U2 of the present invention includes all technical solutions of all embodiments of the voltage-tunable cross-coupled charge pump circuit 200, and the achieved technical effects are also completely the same, and are not described herein again.

Referring to fig. 7, in one embodiment, the ASIC chip U2 further includes:

a power manager 100, a power voltage being connected to an input of the power manager 100, an output of the power manager 100 being connected to a voltage input VDDX of the voltage adjustable cross-coupled charge pump circuit 200; the power supply manager 100 is configured to generate a system operating voltage according to the power supply voltage;

an oscillation circuit 300 connected to an output terminal of the MEMS sensor U1; the oscillation circuit 300 is configured to amplify and output a detection signal output by the MEMS sensor U1.

In this embodiment, the power manager 100 may process the accessed power to generate a driving voltage for driving the internal circuit of the ASIC chip U2 to operate, and generate the power voltage as a post-system operating voltage to output to the voltage-adjustable cross-coupled charge pump circuit 200, so that the voltage-adjustable cross-coupled charge pump circuit 200 converts the system operating voltage into a driving voltage of the MEMS sensor U1.

The invention also provides a microphone.

Referring to fig. 7, the microphone includes a MEMS sensor U1 and the voltage tunable cross-coupled charge pump circuit 200 described above;

alternatively, an ASIC chip U2 as described above;

the MEMS sensor U1 is connected with the ASIC chip U2.

The microphone includes a MEMS sensor and a voltage tunable cross-coupled charge pump circuit as described above. The detailed structure of the voltage-adjustable cross-coupled charge pump circuit can refer to the above embodiments, and is not described herein again; it can be understood that, because the voltage-tunable cross-coupled charge pump circuit is used in the microphone of the present invention, the embodiment of the microphone of the present invention includes all technical solutions of all embodiments of the voltage-tunable cross-coupled charge pump circuit, and the achieved technical effects are also completely the same, and are not described herein again.

In this embodiment, according to the driving voltage (BIAS voltage) output by the ASIC chip U2, when the MEMS sensor U1 receives external air pressure or receives the action of other external force, the variable capacitance value inside the MEMS changes accordingly, and finally, after being converted into a voltage signal, the voltage signal passes through the pin VINP of the ASIC chip U210, and after entering the ASIC chip U2 to perform air pressure data calculation, amplification, analog-to-digital conversion, and the like, the voltage signal is processed into a digital signal, and then the ASIC chip U2 may transmit the digital signal to the main controller MCU of the electronic device through the I2C or SPI interface, and the MCU performs corresponding air pressure value display or other control according to the obtained data.

The above description is only an alternative embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications and equivalents of the present invention, which are made by the contents of the present specification and the accompanying drawings, or directly/indirectly applied to other related technical fields, are included in the scope of the present invention.

Claims

1. A voltage tunable cross-coupled charge pump circuit, the voltage tunable cross-coupled charge pump circuit comprising:

a voltage input terminal and a voltage output terminal;

2. The voltage tunable cross-coupled charge pump circuit of claim 1, wherein the cross-coupled charge pump comprises:

3. The voltage tunable cross-coupled charge pump circuit of claim 2, wherein the boost module comprises a plurality of boost units arranged in cascade;

4. The voltage-tunable cross-coupled charge pump circuit of claim 2, wherein the voltage-tuning control switch module comprises a first capacitor, a second capacitor, a first switch tube, a second switch tube, a third switch tube, and a fourth switch tube;

5. The voltage-tunable cross-coupled charge pump circuit of claim 2, wherein the boost module comprises a third capacitor, a fourth capacitor, a fifth switch tube, a sixth switch tube, a seventh switch tube, an eighth switch tube, a ninth switch tube and a tenth switch tube;

6. The voltage tunable cross-coupled charge pump circuit of any of claims 2 to 5, wherein the clock generation control circuit comprises a number of clock generation control units, the number of clock generation control units corresponding to the number of voltage tuning control switch modules.

7. The voltage tunable cross-coupled charge pump circuit of claim 6, wherein each of the clock generation control units comprises a first AND gate, a second AND gate, a third AND gate, a fourth AND gate, and a first inverter;

8. An ASIC chip, characterized in that it comprises a voltage tunable cross-coupled charge pump circuit according to any of claims 1 to 7;

9. The ASIC chip of claim 8, wherein the ASIC chip further comprises:

10. A microphone comprising a MEMS sensor and a voltage tunable cross-coupled charge pump circuit as claimed in any one of claims 1 to 7;

or, comprising an ASIC chip according to claim 8 or 9; wherein the content of the first and second substances,

the MEMS sensor is connected with the ASIC chip.