CN112002778A - Silicon heterojunction solar cell and manufacturing method thereof - Google Patents

Silicon heterojunction solar cell and manufacturing method thereof Download PDF

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CN112002778A
CN112002778A CN202010718701.4A CN202010718701A CN112002778A CN 112002778 A CN112002778 A CN 112002778A CN 202010718701 A CN202010718701 A CN 202010718701A CN 112002778 A CN112002778 A CN 112002778A
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徐琛
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Longi Green Energy Technology Co Ltd
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Abstract

The invention discloses a silicon heterojunction solar cell and a manufacturing method thereof, relating to the technical field of solar cells and aiming at utilizing an intrinsic amorphous silicon germanium layer to inhibit the epitaxial growth of a silicon substrate interface and utilizing the intrinsic amorphous silicon layer to improve the passivation effect of the silicon substrate interface. The silicon heterojunction solar cell comprises: an N-type silicon substrate; an intrinsic amorphous silicon germanium layer formed on one side of the N-type silicon substrate; a first intrinsic amorphous silicon layer formed on the intrinsic amorphous silicon germanium layer; and a P-type doped amorphous silicon layer formed on the first intrinsic amorphous silicon layer. The manufacturing method of the silicon heterojunction solar cell provided by the invention is used for manufacturing the silicon heterojunction solar cell.

Description

Silicon heterojunction solar cell and manufacturing method thereof
Technical Field
The invention relates to the technical field of solar cells, in particular to a silicon heterojunction solar cell and a manufacturing method thereof.
Background
The silicon heterojunction solar cell is a solar cell which is formed by adding an intrinsic hydrogenated amorphous silicon layer between a P-type amorphous silicon layer, an N-type amorphous silicon layer and a crystalline silicon substrate, wherein the intrinsic hydrogenated amorphous silicon layer is used for passivating a doped silicon substrate. However, the intrinsic amorphous silicon layer deposited on the crystalline silicon substrate is prone to epitaxial growth, affects passivation effect, causes low open-circuit voltage, and further causes low efficiency of the silicon heterojunction solar cell. And because the epitaxial layer formed on the side of the silicon substrate facing the P-type amorphous silicon layer is in the built-in electric field, the influence of the epitaxial layer on the silicon heterojunction solar cell is large.
Currently, the main methods for inhibiting the epitaxial growth of an intrinsic amorphous silicon layer are: an ultrathin intrinsic silicon oxide layer is deposited on the interface of the crystalline silicon substrate on one side of the P-type amorphous silicon layer, and then an intrinsic amorphous silicon layer is deposited. And the oxygen doping in the intrinsic silicon oxide layer is utilized to inhibit the epitaxial growth of the intrinsic amorphous silicon film, so that the defect number of the interface is reduced, and a better passivation effect is realized.
But with the addition of the intrinsic silicon oxide layer, the valence band mismatch between the crystalline silicon substrate and the P-type amorphous silicon layer is caused. Mismatch of the valence band can cause a large potential barrier to the holes, so that transport of the holes is influenced, the silicon heterojunction solar cell has large series resistance and low filling factor, and the efficiency of the silicon heterojunction solar cell is influenced.
Disclosure of Invention
The invention aims to provide a silicon heterojunction solar cell and a manufacturing method thereof, which are used for inhibiting epitaxial growth of a silicon substrate interface by utilizing an intrinsic amorphous silicon germanium layer and improving passivation effect of the silicon substrate interface by utilizing the intrinsic amorphous silicon layer.
In a first aspect, the present invention provides a silicon heterojunction solar cell, comprising:
an N-type silicon substrate;
an intrinsic amorphous silicon germanium layer formed on one side of the N-type silicon substrate;
a first intrinsic amorphous silicon layer formed on the intrinsic amorphous silicon germanium layer;
and a P-type doped amorphous silicon layer formed on the first intrinsic amorphous silicon layer.
Under the condition of adopting the technical scheme, an intrinsic amorphous silicon-germanium layer is formed on the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate. The germanium element in the intrinsic amorphous silicon germanium layer can obviously inhibit the epitaxial growth of the silicon substrate, so that the open-circuit voltage is improved, and the performance of the silicon heterojunction solar cell is improved. Meanwhile, the intrinsic amorphous silicon germanium layer has a lower band gap width, and can reduce the valence band compensation of the interface of the crystalline silicon substrate facing to one side of the P-type doped amorphous silicon layer, so that the hole transport is increased, and the filling factor of the silicon heterojunction cell is improved. And then, forming a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon-germanium layer, and passivating the dangling bonds on the interface of the silicon substrate by utilizing the first intrinsic amorphous silicon layer, so that the defect of higher defect state density of the intrinsic amorphous silicon-germanium layer can be made up for, and the passivation effect of the interface of the silicon substrate is improved, so that the passivation effect of the interface of the silicon substrate meets the requirement. Based on the scheme, the intrinsic amorphous silicon germanium layer and the intrinsic amorphous silicon layer are sequentially deposited on the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate, so that the epitaxial growth of the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate can be effectively inhibited, and the valence band compensation of the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate is reduced. Meanwhile, the passivation effect of the interface of one side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate is not influenced, and the efficiency of the cell can be obviously improved.
In one possible implementation, the intrinsic amorphous silicon-germanium layer has a germanium element content of 0.5 atomic% to 50 atomic% and the intrinsic amorphous silicon-germanium layer has a hydrogen element content of 5 atomic% to 26 atomic%.
Under the condition of adopting the technical scheme, the germanium element in the intrinsic amorphous silicon-germanium layer is used for inhibiting the epitaxial growth of the silicon substrate interface. When the intrinsic amorphous silicon-germanium layer is formed on the interface of the silicon substrate, the interface of the silicon substrate can be epitaxially grown by setting the atomic number percentage of the germanium element in the intrinsic amorphous silicon-germanium layer, and at this time, the atomic number percentage of the germanium element in the intrinsic amorphous silicon-germanium layer is 0.5% -50%. The hydrogen element in the intrinsic amorphous silicon-germanium layer is used for passivating the dangling bonds on the interface of the blunt silicon substrate, and at the moment, the atomic number percentage of the hydrogen element in the intrinsic amorphous silicon-germanium layer can be set to be 5% -26%.
In one possible implementation, the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer is (0.025-0.5): 1.
under the condition of adopting the scheme, the intrinsic amorphous silicon germanium layer is used for inhibiting the epitaxial growth of the silicon substrate interface, so that the open-circuit voltage of the silicon heterojunction cell is improved. However, due to the influence of germanium element, the intrinsic amorphous silicon germanium layer can increase the defect state density of the intrinsic amorphous silicon germanium layer, and the passivation effect of the silicon substrate interface is influenced, so that the first intrinsic amorphous silicon layer is formed on the intrinsic amorphous silicon germanium layer and used for improving the passivation effect of the silicon substrate interface. At this time, if the thickness of the intrinsic amorphous silicon germanium layer is thick, the passivation effect of the first intrinsic amorphous silicon layer on the silicon substrate interface may be affected. For the above reasons, when the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer is (0.025-0.5): 1, the first intrinsic amorphous silicon layer has a better passivation effect on the silicon substrate interface.
In one possible implementation, the thickness of the intrinsic amorphous silicon germanium layer is 0.5nm to 2.5nm, and the thickness of the first intrinsic amorphous silicon layer is 2nm to 20 nm.
Under the condition of adopting the scheme, when the thickness of the intrinsic amorphous silicon germanium layer is 0.5nm-2.5nm and the thickness of the first intrinsic amorphous silicon layer is 2nm-20nm, the open-circuit voltage of the silicon heterojunction cell and the passivation effect of the silicon substrate interface can be improved, so that the efficiency of the silicon heterojunction cell is improved.
In one possible implementation manner, the silicon heterojunction solar cell further comprises a first conductive film and a first electrode which are sequentially formed on the P-type doped amorphous silicon layer; and a second intrinsic amorphous silicon layer, an N-type doped amorphous silicon layer, a second conductive film and a second electrode sequentially formed on the other side of the silicon substrate.
Under the condition of adopting the scheme, the complete silicon heterojunction battery can be obtained, and the silicon heterojunction battery has larger open-circuit voltage and higher battery efficiency.
In a second aspect, the present invention provides a method for manufacturing a silicon heterojunction solar cell, including: providing an N-type silicon substrate; forming an intrinsic amorphous silicon germanium layer on the N-type silicon substrate; forming a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon germanium layer; and forming a P-type doped amorphous silicon layer on the first intrinsic amorphous silicon layer.
Under the condition of adopting the technical scheme, an intrinsic amorphous silicon-germanium layer is formed on the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate. The germanium element in the intrinsic amorphous silicon germanium layer can obviously inhibit the epitaxial growth of the silicon substrate, so that the open-circuit voltage is improved, and the performance of the silicon heterojunction solar cell is improved. Meanwhile, the intrinsic amorphous silicon germanium layer has a lower band gap width, and can reduce the valence band compensation of the interface of the crystalline silicon substrate facing to one side of the P-type doped amorphous silicon layer, so that the hole transport is increased, and the filling factor of the silicon heterojunction cell is improved. But the germanium element in the intrinsic amorphous silicon-germanium layer can cause the defect state density of the intrinsic amorphous silicon-germanium layer to increase, and the passivation effect of a crystalline silicon interface is poor. Therefore, according to the technical scheme, the first intrinsic amorphous silicon layer is formed on the intrinsic amorphous silicon germanium layer, and the dangling bonds on the interface of the silicon substrate are passivated continuously by utilizing the first intrinsic amorphous silicon layer, so that the passivation effect of the interface of the silicon substrate is improved, and the passivation effect of the interface of the silicon substrate meets the requirement. Therefore, the intrinsic amorphous silicon germanium layer and the intrinsic amorphous silicon layer are sequentially deposited on the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate, epitaxial growth of the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate can be effectively inhibited, and valence band compensation of the interface of the side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate is reduced. Meanwhile, the passivation effect of the interface of one side, facing the P-type doped amorphous silicon layer, of the N-type silicon substrate is not influenced, and the efficiency of the cell can be obviously improved.
In one possible implementation, forming an intrinsic amorphous silicon germanium layer on an N-type silicon substrate includes: and depositing an intrinsic amorphous silicon-germanium layer on one surface of the N-type silicon substrate by using a chemical vapor deposition process by taking silane and germane as reaction gases.
Under the condition of adopting the technical scheme, the intrinsic amorphous silicon-germanium layer can be uniformly deposited on the silicon substrate by utilizing a chemical vapor deposition process. The intrinsic amorphous silicon-germanium layer meeting the requirements can be obtained by taking silane and germane as reaction gases and controlling the flow of the silane and the germane so as to improve the open-circuit voltage and the filling factor of the silicon heterojunction cell.
In one possible implementation, the flow ratio of germane to silane in the reaction gas of silane and germane is (0.1-1): 1.
under the condition of adopting the technical scheme, when the flow ratio of germane to silane is (0.1-1): 1, the intrinsic amorphous silicon germanium layer deposited on one surface of the silicon substrate by using the chemical vapor deposition process can obviously inhibit the epitaxial growth of the silicon substrate interface, thereby improving the open-circuit voltage and further improving the performance of the silicon heterojunction solar cell.
In one possible implementation, forming a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon germanium layer includes: and depositing a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon-germanium layer by using a chemical vapor deposition process by using hydrogen and silane as reaction gases.
Under the condition of adopting the technical scheme, when silane is used as reaction gas, the first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon-germanium layer, and the first intrinsic amorphous silicon layer contains Si-H2When the group is used, the passivation effect on the surface of the silicon substrate can be better met. When hydrogen is used as reaction gas, a first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon germanium layer, and the Si-H group content in the first intrinsic amorphous silicon layer is higher. Under the condition that the first intrinsic amorphous silicon layer has Si-H groups, the film layer structure of the first intrinsic amorphous silicon layer is compact and has a low defect state, and carrier recombination can be reduced, so that the first intrinsic amorphous silicon layer has good electrical properties. Therefore, hydrogen and silane are used as reaction gases, and the first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon germanium layer by using a chemical vapor deposition process, so that the first intrinsic amorphous silicon layer not only can achieve the passivation effect on the silicon substrate, but also has better electrical properties.
In one possible implementation, the hydrogen and the silane are in a reaction gas, and the flow ratio of the hydrogen to the silane is (10-20): 1.
under the condition of adopting the technical scheme, the first intrinsic amorphous silicon layer deposited by utilizing the chemical vapor deposition process on the intrinsic amorphous silicon germanium layer has a better passivation effect, and can meet the passivation effect on the silicon substrate interface so as to improve the efficiency of the battery.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
fig. 1 shows a structure diagram of a silicon heterojunction solar cell provided by an embodiment of the invention;
fig. 2 to fig. 5 are schematic diagrams illustrating states of various stages of a method for manufacturing a silicon heterojunction solar cell according to an embodiment of the invention;
FIG. 6 shows a structure diagram of a control silicon heterojunction solar cell provided in an embodiment of the invention;
fig. 7 is a series resistance comparison chart of silicon heterojunction cells fabricated in the reference group, example one, and example two in the embodiment of the present invention;
fig. 8 is a comparison graph of fill factors of silicon heterojunction cells fabricated in the reference group, example one, and example two in an embodiment of the present invention;
fig. 9 is a graph comparing the efficiencies of the silicon heterojunction cells fabricated in the reference group, example one, and example two in the example of the present invention.
Detailed Description
Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. It should be understood that the description is illustrative only and is not intended to limit the scope of the present disclosure. Moreover, in the following description, descriptions of well-known structures and techniques are omitted so as to not unnecessarily obscure the concepts of the present disclosure.
Various structural schematics according to embodiments of the present disclosure are shown in the figures. The figures are not drawn to scale, wherein certain details are exaggerated and possibly omitted for clarity of presentation. The shapes of various regions, layers, and relative sizes and positional relationships therebetween shown in the drawings are merely exemplary, and deviations may occur in practice due to manufacturing tolerances or technical limitations, and a person skilled in the art may additionally design regions/layers having different shapes, sizes, relative positions, as actually required.
In the context of the present disclosure, when a layer/element is referred to as being "on" another layer/element, it can be directly on the other layer/element or intervening layers/elements may be present. In addition, if a layer/element is "on" another layer/element in one orientation, then that layer/element may be "under" the other layer/element when the orientation is reversed.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise. The meaning of "a number" is one or more unless specifically limited otherwise.
The silicon heterojunction solar cell is a solar cell which is formed by adding an intrinsic hydrogenated amorphous silicon layer between a P-type amorphous silicon layer, an N-type amorphous silicon layer and a crystalline silicon substrate, wherein the intrinsic hydrogenated amorphous silicon layer is used for passivating a doped silicon substrate. However, the intrinsic amorphous silicon layer deposited on the crystalline silicon substrate is prone to epitaxial growth, affects passivation effect, causes low open-circuit voltage, and further causes low efficiency of the silicon heterojunction solar cell. And because the epitaxial layer formed on the side of the silicon substrate facing the P-type amorphous silicon layer is in the built-in electric field, the influence of the epitaxial layer on the silicon heterojunction solar cell is large.
Currently, the main methods for inhibiting the epitaxial growth of an intrinsic amorphous silicon layer are: an ultrathin intrinsic silicon oxide layer is deposited on the interface of the crystalline silicon substrate on one side of the P-type amorphous silicon layer, and then an intrinsic amorphous silicon layer is deposited. And the epitaxial growth of the silicon substrate interface is inhibited by using the oxygen doping in the intrinsic silicon oxide layer, so that the defect number of the interface is reduced, and a better passivation effect is realized.
The band gap of the typical amorphous silicon is 1.7eV, but the doping of oxygen element causes the band gap to increase, which is caused by the valence band downward shift. In this case, a large mismatch between the valence bands of the silicon substrate and the intrinsic silicon oxide layer is caused, and the valence band offset of the silicon substrate and the intrinsic silicon oxide layer varies from 0.4eV to 1.2eV as the oxygen content increases.
The mismatch of the valence band can cause a larger potential barrier to the holes, and further influences the transport of the holes, so that the defect can be reduced by inserting an ultrathin intrinsic silicon oxide layer at the silicon substrate, and the silicon substrate has high open-circuit voltage. But the silicon heterojunction solar cell has larger series resistance and lower filling factor, and the efficiency of the silicon heterojunction solar cell is improved.
Based on this, fig. 1 shows a schematic structural diagram of a silicon heterojunction solar cell in an embodiment of the present invention. Referring to fig. 1, the silicon heterojunction cell includes: an N-type silicon substrate 10. The N-type silicon substrate 10 is doped with an N-type impurity element. The N-type impurity element includes group VA elements such as: phosphorus, arsenic, antimony, and the like.
Referring to fig. 1, the silicon heterojunction cell further comprises: an intrinsic amorphous silicon germanium layer 201 is formed on one side of the N-type silicon substrate. According to the above analysis, since the side of the silicon substrate 10 facing the P-type amorphous silicon layer is in the built-in electric field, if an epitaxial layer is generated on the interface of the silicon substrate on the side, the silicon heterojunction solar cell is greatly affected. Therefore, the surface of the N-type silicon substrate 10 is the surface of the N-type silicon substrate 10 facing the P-type amorphous silicon layer.
Referring to fig. 1, an intrinsic amorphous silicon germanium layer 201 is formed at an interface of a side of an N-type silicon substrate 1 facing a P-type doped amorphous silicon layer. Because the intrinsic amorphous silicon germanium layer 201 contains germanium element, the germanium element can obviously inhibit epitaxial growth of the interface of the silicon substrate, thereby improving open-circuit voltage and further improving the performance of the silicon heterojunction solar cell. Meanwhile, the intrinsic amorphous silicon germanium layer 201 has a lower band gap width, and can reduce the valence band compensation of the interface of the crystalline silicon substrate 10 facing to one side of the P-type doped amorphous silicon layer, so that the hole transport is increased, and the filling factor of the silicon heterojunction cell is improved.
Referring to fig. 1, the silicon heterojunction cell further comprises: a first intrinsic amorphous silicon layer 202 formed on the intrinsic amorphous silicon germanium layer 201. In the silicon heterojunction cell, if the intrinsic amorphous silicon-germanium layer is adopted, the intrinsic amorphous silicon-germanium layer has high defect state density, which causes the interface passivation effect of the silicon substrate to be poor. Therefore, the first intrinsic amorphous silicon layer is formed on the intrinsic amorphous silicon germanium layer, and the dangling bonds of the crystalline silicon interface are passivated continuously by utilizing the first intrinsic amorphous silicon layer, so that the passivation effect of the silicon substrate interface is improved, and the passivation effect of the silicon substrate interface meets the requirement.
Referring to fig. 1, to sum up, the intrinsic amorphous silicon germanium layer and the first intrinsic amorphous silicon layer are sequentially deposited on the interface of the N-type silicon substrate on the side facing the P-type doped amorphous silicon layer of the silicon heterojunction cell, so that the epitaxial growth of the interface of the N-type silicon substrate on the side facing the P-type doped amorphous silicon layer can be effectively inhibited, the valence band compensation of the interface of the N-type silicon substrate on the side facing the P-type doped amorphous silicon layer can be reduced, the passivation effect on the interface of the N-type silicon substrate on the side facing the P-type doped amorphous silicon layer is not affected, and the cell efficiency can be obviously.
Referring to fig. 1, in order to realize the complete structure of the silicon heterojunction solar cell, the silicon heterojunction solar cell further includes a P-type doped amorphous silicon layer 40 formed on the first intrinsic amorphous silicon layer 202, a first conductive film 601 and a first electrode 701 sequentially formed on the P-type doped amorphous silicon layer 40, and a second intrinsic amorphous silicon layer 30, an N-type doped amorphous silicon layer 50, a second conductive film 602, and a second electrode 702 sequentially formed on the other side of the silicon substrate 10.
It is understood that the germanium element in the intrinsic amorphous silicon germanium layer serves to suppress epitaxial growth at the silicon substrate interface. In order to enable the germanium element in the intrinsic amorphous silicon-germanium layer to obviously inhibit the epitaxial growth of the silicon substrate interface, the atomic number percentage of the germanium element in the intrinsic amorphous silicon-germanium layer can be set to be 0.5% -50%. The hydrogen element in the intrinsic amorphous silicon-germanium layer is used for passivating the dangling bond on the interface of the blunt silicon substrate, and at the moment, the atomic number percentage of the hydrogen element in the intrinsic amorphous silicon-germanium layer can be set to be 5% -26% according to the performance of the intrinsic amorphous silicon-germanium layer.
As a specific example, the intrinsic amorphous silicon germanium layer has a germanium element of 3 atomic percent and a hydrogen element of 20 atomic percent.
As another specific example, the intrinsic amorphous silicon germanium layer has a germanium element atomic percentage of 40% and a hydrogen element atomic percentage of 5%.
According to the above description, the germanium element in the intrinsic amorphous silicon germanium layer is used to suppress the epitaxial growth of the silicon substrate interface, thereby increasing the open circuit voltage of the silicon heterojunction cell. However, due to the influence of germanium element, the intrinsic amorphous silicon germanium layer can increase the defect state density of the intrinsic amorphous silicon germanium layer itself, and influence the passivation effect of the silicon substrate interface, so that the first intrinsic amorphous silicon layer can be formed on the intrinsic amorphous silicon germanium layer to improve the passivation effect of the silicon substrate interface. At this time, if the thickness of the intrinsic amorphous silicon germanium layer is thick, the passivation effect of the first intrinsic amorphous silicon layer on the silicon substrate interface may be affected. For the above reasons, the intrinsic amorphous silicon germanium layer may be configured to be thin, so that the first intrinsic amorphous silicon layer may have a better passivation effect on the silicon substrate interface. At this time, it may be achieved by setting a ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer.
The following are exemplary: the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer is (0.025-0.5): 1. specifically, the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer may also be 0.03: 1. Alternatively, the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer may be 0.35: 1. It will be appreciated that the following may be preferred according to particular needs, for example: the intrinsic amorphous silicon-germanium layer is used for improving the effect of the open-circuit voltage of the silicon heterojunction cell and the passivation effect of the first intrinsic amorphous silicon layer on the N-type silicon substrate, so that the ratio of the thickness of the intrinsic amorphous silicon-germanium layer to the thickness of the first intrinsic amorphous silicon layer is set.
In order to better improve the open-circuit voltage of the silicon heterojunction cell and also better improve the passivation effect of the silicon substrate, the thickness of the intrinsic amorphous silicon germanium layer can be set to be 0.5nm-2.5nm, and the thickness of the first intrinsic amorphous silicon layer can be set to be 2nm-20 nm. Under the condition, the silicon heterojunction battery has higher efficiency.
The embodiment of the invention also discloses a manufacturing method of the silicon heterojunction solar cell, which comprises the following steps:
referring to fig. 2, an N-type silicon substrate 10 is provided. It is understood that the N-type silicon substrate 10 is doped with an N-type impurity element. The N-type impurity element includes group VA elements such as: phosphorus, arsenic, antimony, and the like.
For example, the manufacturing steps of the N-type silicon substrate may be: providing a monocrystalline silicon substrate, wherein the monocrystalline silicon substrate is an N-type double-side polished Czochralski monocrystalline silicon wafer, the thickness of the monocrystalline silicon substrate is 180-300 mu m, the resistivity of the monocrystalline silicon substrate is 0.1-2 omega-cm, and the minority carrier lifetime of the monocrystalline silicon substrate is more than 200 mu s. And then, carrying out monocrystalline silicon substrate texturing by using alkali liquor and a texturing additive. And cleaning the surface of the silicon wafer by adopting a cleaning method to remove surface pollution impurities. And removing the surface oxide layer by using a 1% hydrofluoric acid solution to finally obtain the N-type silicon substrate. The cleaning method may be an RCA standard cleaning method.
Referring to fig. 3, an intrinsic amorphous silicon germanium layer 201 is formed on an N-type silicon substrate 10. The intrinsic amorphous silicon germanium layer 201 is used to boost the open circuit voltage and fill factor of the silicon heterojunction cell.
Specifically, referring to fig. 3, the formation of the intrinsic amorphous sige layer 201 on the N-type silicon substrate 10 may be: and depositing an intrinsic amorphous silicon-germanium layer on one surface of the N-type silicon substrate by using a chemical vapor deposition process by taking silane and germane as reaction gases. Among them, the Chemical Vapor Deposition process can be implemented using a PECVD (Plasma Enhanced Chemical Vapor Deposition) apparatus or a HWCVD (hot wire Chemical Vapor Deposition) apparatus. The chemical vapor deposition process may uniformly deposit an intrinsic amorphous silicon germanium layer on a silicon substrate. The intrinsic amorphous silicon-germanium layer meeting the requirement can be obtained by taking the silane and the germane as reaction gases and controlling the reaction amount of the silane and the germane, so that the open-circuit voltage and the filling factor of the silicon heterojunction cell are improved.
Illustratively, in the reaction gas of silane and germane, the flow ratio of germane to silane is (0.1-1): 1. at the moment, the intrinsic amorphous silicon germanium layer deposited on one surface of the silicon substrate by using the chemical vapor deposition process can obviously inhibit the epitaxial growth of the interface of the silicon substrate, so that the open-circuit voltage is improved, and the performance of the silicon heterojunction solar cell is further improved.
Referring to fig. 4, a first intrinsic amorphous silicon layer 202 is formed on the intrinsic amorphous silicon germanium layer 201. The first intrinsic region 202 is used for performing a passivation process on the silicon substrate 10 to obtain a satisfactory silicon substrate 10.
Illustratively, forming the first intrinsic amorphous silicon layer 202 on the intrinsic amorphous silicon germanium layer 201 includes: a first intrinsic amorphous silicon layer 202 is deposited on the intrinsic amorphous silicon germanium layer 201 using a chemical vapor deposition process with hydrogen and silane as reaction gases. The chemical vapor deposition process is substantially the same as the chemical vapor deposition process used for depositing the intrinsic amorphous silicon germanium layer on one side of the N-type silicon substrate, and is not described herein again.
When silane is used as reaction gas, a first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon germanium layer, wherein the first intrinsic amorphous silicon layer contains Si-H2When the group is used, the passivation effect on the surface of the silicon substrate can be better met. When hydrogen is used as reaction gas, a first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon germanium layer, and the Si-H group content in the first intrinsic amorphous silicon layer is higher. Under the condition that the first intrinsic amorphous silicon layer has Si-H groups, the film layer structure of the first intrinsic amorphous silicon layer is compact and has a low defect state, and carrier recombination can be reduced, so that the first intrinsic amorphous silicon layer has good electrical properties. Therefore, hydrogen and silane are used as reaction gases, and the first intrinsic amorphous silicon layer is deposited on the intrinsic amorphous silicon germanium layer by using a chemical vapor deposition process, so that the first intrinsic amorphous silicon layer not only can achieve the passivation effect on the silicon substrate, but also has better electrical properties.
It is understood that other reactive gases may be used to fabricate the first intrinsic amorphous silicon layer 202. At this time, the atomic number percentage of the hydrogen element in the first intrinsic amorphous silicon layer 202 may be close to 0%. The invention is not limited in this regard as long as the first intrinsic amorphous silicon layer 202 can passivate the N-type silicon substrate.
Furthermore, the first intrinsic amorphous silicon layer may be a single layer or a stacked layer. When the first intrinsic amorphous silicon layer has a stacked structure, the atomic number percentage of hydrogen in one layer may be 0%.
Referring to fig. 5, after the first intrinsic amorphous silicon layer 202 is formed, a P-type doped amorphous silicon layer 40 is formed on the first intrinsic amorphous silicon layer 202. Illustratively, the thickness of the P-type doped amorphous silicon layer may be 5nm to 20 nm.
Referring to fig. 5, a first conductive film 601 and a first electrode 701 are sequentially formed on the P-type doped amorphous silicon layer 40; a second intrinsic amorphous silicon layer 30, an N-type doped amorphous silicon layer 50, a second conductive film 602, and a second electrode 702 sequentially formed on the other side of the silicon substrate 10, resulting in the silicon heterojunction cell as described in fig. 5.
Illustratively, the thickness of the second intrinsic amorphous silicon layer 30 may be 5nm to 20 nm. The thickness of the N-type doped amorphous silicon layer 50 may be 5nm to 20 nm. The first conductive film 601 and the second conductive film may be TCO (transparent conductive film). The thickness of the first conductive film 601 and the second conductive film is 70nm to 100 nm.
The invention is further illustrated by the following examples.
Example 1
The manufacturing method of the silicon heterojunction solar cell comprises the following steps:
1) and (3) performing surface texturing and cleaning on the N-type crystal silicon wafer (N-c-Si) to form a pyramid structure and remove surface pollution impurities to obtain the N-type silicon substrate. Wherein the monocrystalline silicon substrate adopted by the N-type crystal silicon wafer is an N-type double-side polished Czochralski monocrystalline silicon wafer, the thickness is 180 mu m, the resistivity is 0.3 omega-cm, and the minority carrier lifetime is 1000 mu s. And (3) using a mixed solution of 2 mass percent NaOH and IPA to perform silicon wafer texturing, wherein the temperature is 83 ℃. And then, cleaning the surface of the silicon wafer by adopting an RCA standard cleaning method to remove surface pollution impurities. Next, the surface oxide layer was removed with a 1% hydrofluoric acid solution.
2) Depositing a 1nm intrinsic amorphous silicon germanium (i-a-SiGe: H) layer on one side of an N-type silicon substrate by a PECVD method, wherein the reaction gas is SiH4、GeH4And H2In which GeH4And SiH4The flow ratio of (1) to (H)2And SiH4The flow ratio of (2) is 10, and the power density of a power supply of the PECVD equipment is 300W/cm2The pressure was 50Pa, and the substrate temperature was 200 ℃.
Then on the intrinsic amorphous silicon germanium layerThen a 10nm intrinsic amorphous silicon (i-a-Si: H) layer is deposited by PECVD. The reaction gas is H2And SiH4，H2And SiH4The flow ratio of (2) is 15, and the power density of a power supply of the PECVD equipment is 120W/cm2The pressure was 90Pa, and the substrate temperature was 200 ℃. i-a-SiGe and i-a-Si together form an intrinsic passivation layer, and then a 10nm p-type doped amorphous silicon layer (p-a-Si: H) is deposited, wherein the reaction gas is SiH4、B2H6And H2In which H is2And SiH4Has a flow ratio of 4, B2H6And SiH4The flow ratio of (2) was 0.04. The power density of the power supply of the PECVD equipment is 150W/cm2The pressure was 60Pa, and the substrate temperature was 200 ℃.
3) On the other side of the N-type silicon substrate, a 9nm intrinsic amorphous silicon layer is deposited by PECVD with SiH as reaction gas4And H2In which H is2And SiH4The flow ratio of (2) is 3/1. The power density of the power supply of the PECVD equipment is 170W/cm2The pressure was 70Pa, and the substrate temperature was 200 ℃. Then depositing a 10nm N-type doped amorphous silicon layer on the substrate, wherein the reaction gas is SiH4、H2And pH3，H2And SiH4The flow ratio of (A) to (B) is 5, PH3And SiH4The flow ratio of (2) was 0.02. The power density of the power supply is 150W/cm2The pressure was 80Pa, and the substrate temperature was 200 ℃.
4) And depositing a 75nm ITO (indium tin oxide) transparent conductive film on the N-type doped amorphous silicon layer and the P-type doped amorphous silicon layer by adopting a PVD (Physical vapor deposition) method. Wherein, the mass percent of the indium element in the ITO is 90 percent, and the mass percent of the tin element is 10 percent. Ar and O are filled into the PVD equipment2，O2The flow ratio of Ar to Ar was 0.025, the pressure was 0.5Pa, and the substrate temperature was room temperature.
5) And finally, forming a silver electrode on the transparent conductive film by utilizing screen printing.
Example 2
The manufacturing method of the silicon heterojunction solar cell comprises the following steps:
1) and (3) performing surface texturing and cleaning on the N-type crystal silicon wafer (N-c-Si) to form a pyramid structure and remove surface pollution impurities to obtain the N-type silicon substrate. Wherein the monocrystalline silicon substrate adopted by the N-type crystal silicon wafer is an N-type double-side polished Czochralski monocrystalline silicon wafer, the thickness is 180 mu 8, the resistivity is 0.3, and the minority carrier lifetime is 1000 mu s. And (3) using a mixed solution of 2 mass percent NaOH and IPA to perform silicon wafer texturing, wherein the temperature is 83 ℃. And then, cleaning the surface of the silicon wafer by adopting an RCA standard cleaning method to remove surface pollution impurities. Next, the surface oxide layer was removed with a hydrofluoric acid solution of 1% by mass.
2) Depositing a 5nm intrinsic amorphous silicon germanium (i-a-SiGe: H) layer on one side of an N-type silicon substrate by HWCVD method, wherein the reaction gas is SiH4、GeH4And H2In which GeH4And SiH4Has a flow rate ratio of 0.7, H2And SiH4The flow ratio of (A) was 10, the filament temperature was 2200 ℃, the pressure was 40Pa, and the substrate temperature was 200 ℃.
And then depositing a 10nm intrinsic amorphous silicon (i-a-Si: H) layer on the intrinsic amorphous silicon germanium layer by PECVD. The reaction gas is H2And SiH4，H2And SiH4The flow ratio of (2) is 15, and the power density of a power supply of the PECVD equipment is 120W/cm2The pressure was 90Pa, and the substrate temperature was 200 ℃. i-a-SiGe and i-a-Si together form an intrinsic passivation layer, and then a 10nm p-type doped amorphous silicon layer (p-a-Si: H) is deposited, wherein the reaction gas is SiH4、B2H6And H2In which H is2And SiH4Has a flow ratio of 4, B2H6And SiH4The flow ratio of (2) was 0.04. The power density of the power supply of the PECVD equipment is 150W/cm2The pressure was 60Pa, and the substrate temperature was 200 ℃.
3) On the other side of the N-type silicon substrate, a 9nm intrinsic amorphous silicon layer is deposited by PECVD with SiH as reaction gas4And H2In which H is2And SiH4Is 3/1. The power density of the power supply of the PECVD equipment is 170W/cm2The pressure was 70Pa, and the substrate temperature was 200 ℃. Then depositing a 10nm N-type doped amorphous silicon layer on the substrate, wherein the reaction gas is SiH4、H2And pH3，H2And SiH4The flow ratio of (A) to (B) is 5, PH3And SiH4The flow ratio of (2) was 0.02. The power density of the power supply is 150W/cm2The pressure was 80Pa, and the substrate temperature was 200 ℃.
4) And depositing a 75nm ITO (indium tin oxide) transparent conductive film on the N-type doped amorphous silicon layer and the P-type doped amorphous silicon layer by adopting a PVD (Physical vapor deposition) method. Wherein, the mass percent of the indium element in the ITO is 90 percent, and the mass percent of the tin element is 10 percent. Ar and O are filled into the PVD equipment2，O2The flow ratio of Ar to Ar was 0.025, the pressure was 0.5Pa, and the substrate temperature was room temperature.
5) And finally, forming a silver electrode on the transparent conductive film by utilizing screen printing.
Comparative example 1
Referring to fig. 6, the method for manufacturing the silicon heterojunction solar cell includes:
1) and (3) performing surface texturing and cleaning on the N-type crystal silicon wafer (N-c-Si) to form a pyramid structure and remove surface pollution impurities to obtain the N-type silicon substrate 1. Wherein the monocrystalline silicon substrate adopted by the N-type crystal silicon wafer is an N-type double-side polished Czochralski monocrystalline silicon wafer, the thickness is 180 mu m, the resistivity is 0.3 omega-cm, and the minority carrier lifetime is 1000 mu s. And (3) using a mixed solution of 2 mass percent NaOH and IPA to perform silicon wafer texturing, wherein the temperature is 83 ℃. And then, cleaning the surface of the silicon wafer by adopting an RCA standard cleaning method to remove surface pollution impurities. Next, the surface oxide layer was removed with a 1% hydrofluoric acid solution.
2) Depositing a 1nm i-a-SiOx-H film 2 on one side of an N-type silicon substrate by a PECVD method, wherein the reaction gas is SiH4、CO2And H2In which CO is2And SiH4Has a flow ratio of 0.2, H2SiH of4The flow ratio was 10. The power density of a power supply of the PECVD equipment is 200W/cm2The pressure is 50Pa, and the substrate temperature is 200 ℃; depositing a 10nm i-a-Si: H film 31 on the substrate by PECVD, wherein H2And SiH4The flow ratio of (2) is 15. The power density of a power supply of the PECVD equipment is 120W/cm2A pressure of 90Pa and a substrate temperature ofAt 200 ℃. The i-a-SiOx H/i-a-Si H jointly form an intrinsic passivation layer. Then, a 10nm p-type amorphous silicon doped layer 41(p-a-Si: H) is deposited by a PECVD process, and the reaction gas is SiH4、B2H6And H2In which H is2And SiH4Has a flow ratio of 4, B2H6And SiH4The flow ratio of (2) was 0.04. The power density of the power supply of the PECVD equipment is 150W/cm2The pressure was 60Pa, and the substrate temperature was 200 ℃.
3) On the other side of the N-type silicon substrate, a 9nm i-a-Si H layer 32 is deposited by PECVD process with SiH as reaction gas4And H2In which H is2And SiH4Is 3/1. The power density of the power supply of the PECVD equipment is 170W/cm2The pressure was 70Pa, and the substrate temperature was 200 ℃. Then, a 10nm N-type a-Si/H doped layer 42 is deposited on the i-a-Si/H layer 32 with SiH as the reactant gas4、H2And pH3，H2And SiH4The flow ratio of (A) to (B) is 5, PH3And SiH4The flow ratio of (2) was 0.02. The power density of the power supply of the PECVD equipment is 150W/cm2The pressure was 80Pa, and the substrate temperature was 200 ℃.
4) And depositing the ITO transparent conductive film 5 with the thickness of 75nm on the N-type a-Si/H doped layer 42 and the P-type a-Si/H doped layer 41 by adopting a PVD method. The mass percent of indium element in the ITO is 90%, and the mass percent of tin element is 10%. Ar and O are filled in the PVD equipment2，O2The flow ratio of Ar to Ar is 0.025, the pressure is 0.5Pa, and the substrate temperature is room temperature.
5) And finally, forming a metal electrode 6 on the ITO transparent conductive film by utilizing screen printing.
Fig. 7 is a comparison graph of the string resistance of the silicon heterojunction cells fabricated in comparative example 1, example 1 and example 2.
Fig. 8 is a comparison graph of fill factors of silicon heterojunction cells fabricated in comparative example 1, and example 2.
Fig. 9 is a graph comparing the efficiencies of the silicon heterojunction cells fabricated in comparative example 1, example 1 and example 2.
Referring to fig. 7 to 9, compared to comparative example 1, the silicon heterojunction cells manufactured by examples 1 and 2 according to the present invention have lower series resistance and higher fill factor, and the cell efficiency is higher.
In the foregoing description of embodiments, the particular features, structures, materials, or characteristics may be combined in any suitable manner in any one or more embodiments or examples.
The above description is only for the specific embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention, and all the changes or substitutions should be covered within the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the appended claims.

Claims (10)

1. A silicon heterojunction solar cell, comprising:
an N-type silicon substrate;
an intrinsic amorphous silicon germanium layer formed on one side of the N-type silicon substrate;
a first intrinsic amorphous silicon layer formed on the intrinsic amorphous silicon germanium layer;
and a P-type doped amorphous silicon layer formed on the first intrinsic amorphous silicon layer.
2. The silicon heterojunction solar cell of claim 1, wherein the atomic number percentage of germanium element in the intrinsic amorphous silicon germanium layer is 0.5% -50%, and the atomic number percentage of hydrogen element in the intrinsic amorphous silicon germanium layer is 5% -26%.
3. The silicon heterojunction solar cell of claim 1, wherein the ratio of the thickness of the intrinsic amorphous silicon germanium layer to the thickness of the first intrinsic amorphous silicon layer is (0.025-0.5): 1.
4. the silicon heterojunction solar cell of claim 1, wherein the thickness of the intrinsic amorphous silicon germanium layer is 0.5nm to 2.5nm, and the thickness of the first intrinsic amorphous silicon layer is 2nm to 20 nm.
5. The silicon heterojunction solar cell of claim 1, further comprising: a first conductive film and a first electrode sequentially formed on the P-type doped amorphous silicon layer;
and the second intrinsic amorphous silicon layer, the N-type doped amorphous silicon layer, the second conductive film and the second electrode are sequentially formed on the other surface of the silicon substrate.
6. A method for manufacturing a silicon heterojunction solar cell is characterized by comprising the following steps:
providing an N-type silicon substrate;
forming an intrinsic amorphous silicon germanium layer on the N-type silicon substrate;
forming a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon germanium layer;
and forming a P-type doped amorphous silicon layer on the first intrinsic amorphous silicon layer.
7. The method as claimed in claim 6, wherein the forming an intrinsic amorphous SiGe layer on the silicon substrate comprises:
and depositing an intrinsic amorphous silicon-germanium layer on one surface of the N-type silicon substrate by using a chemical vapor deposition process by taking silane and germane as reaction gases.
8. The method for manufacturing the silicon heterojunction solar cell as claimed in claim 7, wherein the flow ratio of germane to silane in the reaction gas of silane and germane is (0.1-1): 1.
9. the method as claimed in claim 6, wherein the forming the first intrinsic amorphous silicon layer on the intrinsic amorphous silicon germanium layer comprises:
and depositing a first intrinsic amorphous silicon layer on the intrinsic amorphous silicon-germanium layer by using a chemical vapor deposition process by taking hydrogen and silane as reaction gases.
10. The method for manufacturing the silicon heterojunction solar cell according to claim 9, wherein the hydrogen and the silane are reaction gases, and the flow ratio of the hydrogen to the silane is (10-20): 1.
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