CN111952177A - HEMT device and manufacturing method thereof - Google Patents
HEMT device and manufacturing method thereof Download PDFInfo
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- CN111952177A CN111952177A CN202010846206.1A CN202010846206A CN111952177A CN 111952177 A CN111952177 A CN 111952177A CN 202010846206 A CN202010846206 A CN 202010846206A CN 111952177 A CN111952177 A CN 111952177A
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- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41775—Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
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Abstract
An HEMT device and a manufacturing method thereof are provided, wherein the manufacturing method comprises the following steps: forming a medium mask on the epitaxial wafer; forming photoresist for defining a gate foot window of a gate electrode on the dielectric mask; removing the dielectric mask in the gate foot window; forming a gate foot and a metal mask of a gate electrode; forming photoresist with an exposed area on the metal mask, and defining a non-exposed area as a source drain channel area; removing the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source drain channel region; taking the rest metal mask as a gate cap of the gate electrode to finish the preparation of the gate electrode; carrying out regrowth to respectively form a regrowth source region and a regrowth drain region; and depositing metal to finish the preparation of the HEMT device. In the manufacturing method, the regrowth masks of the source region and the drain region are combined, and the gate electrode with extremely small size, which is difficult to achieve by the traditional T gate process, can be realized through single-layer glue electron beam exposure or step exposure, so that the process is simple and controllable.
Description
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a HEMT device and a manufacturing method thereof.
Background
The 5G communication has a higher transmission data amount and a faster transmission rate than the 4G communication. This undoubtedly brings unprecedented technical challenges to the rf front-end, especially at the transmitting end, mainly including high power efficiency and linearity, high output power, large bandwidth, etc. A High Electron Mobility Transistor (HEMT) is a heterojunction field effect transistor, has the advantages of high carrier speed and large breakdown electric field, and is widely used in a power amplifier in a wireless communication system. Particularly, the third generation semiconductor material represented by GaN (gallium nitride) is the leading edge of research of the current semiconductor science and technology, and the electronic device has the advantages of strong breakdown field, high cut-off frequency, large power density, high thermal conductivity and the like, and is the first choice in the fields of high-frequency high-power and microwave communication in the future. The frequency of the GaN HEMT reported in a laboratory at present reaches 580GHz, but the GaN HEMT is only the level of laboratory research and does not enter the product popularization stage. The high manufacturing cost, the poor process stability and the low product yield are still the main factors limiting the commercial use of the product.
In the field of radio frequency applications, frequency performance is an important indicator of device applications. Reducing the size of the device and the length of the gate is the main method for reducing the source-drain resistance and improving the frequency of the device. Currently, electron beam exposure of multilayer glue is a main technical scheme for realizing T-shaped grids. But generally limited by the sensitivity of the electron beam glue and the exposure precision, the T-shaped gate has difficulty in realizing a gate foot within 50 nm. For T-gates smaller than 50nm, typically only a sidewall process can be used. However, both the electron beam exposure T-gate process and the sidewall T-gate process are complex, have poor stability, and the electron beam exposure scanning speed is limited, which is not suitable for mass production of HEMT devices. On the other hand, in addition to shortening the gate length, shortening the gate-source pitch and the gate-drain pitch as much as possible is a main factor in reducing the channel resistance and also in improving the frequency characteristics of the device. In the prior art, the source-drain spacing of the HEMT device is larger, usually more than 1 micron, due to the limitation of photoetching alignment precision, so that the channel series resistance of the HEMT device is larger, and the frequency performance of the device is reduced. Besides, the reduction of the ohmic contact resistance of the source and drain electrodes is the third main measure for increasing the frequency of the device. High temperature annealing is typically used in conventional processes to form alloy ohmic contacts. However, high temperature annealing has the problem of uneven contact, and metal is easy to overflow in the high temperature annealing, thereby reducing the reliability and yield of the device. Regrowing low-resistance source-drain region materials is the main technical route for reducing ohmic contact resistivity of the high-frequency HEMT device at present. However, the ohmic electrode is limited by the photolithography alignment precision in the fabrication process, and a larger alignment distance exists between the metal electrode and the regrown source and drain material, which increases the distance between the source and drain channels, increases the device channel resistance, and is not favorable for increasing the device frequency. It is reported that after the photolithography precision is improved in the HRL laboratory in the united states, the distance between the ohmic electrode and the regrown source-drain material still reaches 800 nm, which is much larger than the channel distance between the regrown source region and the regrown drain region.
Disclosure of Invention
In view of the above, the present invention is directed to a HEMT device and a method for fabricating the same, which is designed to solve at least one of the above-mentioned problems.
In order to achieve the purpose, the technical scheme of the invention comprises the following steps:
as an aspect of the present invention, a method for manufacturing a HEMT device is provided, in which an epitaxial wafer is used as a substrate, the epitaxial wafer sequentially includes a barrier layer and a channel layer from top to bottom, and the method includes the following steps:
step 1: forming a dielectric mask on the epitaxial wafer;
step 2: forming photoresist with an exposed area on the dielectric mask by utilizing a photoetching technology, and defining the exposed area as a gate foot window of a gate electrode;
and step 3: removing the dielectric mask in the gate foot window to expose the epitaxial wafer, and removing the photoresist;
and 4, step 4: forming a gate foot of a gate electrode in an exposed area of the epitaxial wafer and forming a metal mask on the dielectric mask;
and 5: forming photoresist with an exposed area on the metal mask by utilizing a photoetching technology, and defining a non-exposed area as a source drain channel area;
step 6: removing the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source drain channel region, and removing the photoresist; taking the rest metal mask as a gate cap of the gate electrode to finish the preparation of the gate electrode;
and 7: carrying out regrowth, and respectively forming a regrowth source region and a regrowth drain region in the region except the source-drain channel region of the channel layer;
and 8: and depositing metal, and respectively forming a source electrode and a drain electrode on the regrowth source region and the regrowth drain region to finish the preparation of the HEMT device.
As another aspect of the invention, the HEMT device prepared by the above preparation method is further provided, and the HEMT device comprises a gate electrode, wherein the gate electrode comprises a gate foot and a gate cap, and the width of the gate foot is 10-200 nm; the width of the gate cap is 200-2000 nm.
Based on the technical scheme, compared with the prior art, the invention has at least one or one part of the following beneficial effects:
according to the manufacturing method of the HEMT device, the gate electrode is manufactured and formed simultaneously when the growth masks of the low-resistance regrowth source region and the regrowth drain region are manufactured, the dielectric mask and the metal mask are used as regrowth double-layer masks, in addition, when the regrowth masks are manufactured, the gate foot windows are manufactured on the dielectric mask of the first layer through photoetching, and then the metal mask of the second layer of electric conduction is manufactured on the gate foot windows, so that the electric conduction gate electrode is formed;
one of the advantages is that when the grid feet with the extremely small size are manufactured on the dielectric mask of the first layer, the single-layer electron beam glue can be adopted for carrying out electron beam exposure on the thin lines, and compared with the method that after other device structures such as a source electrode and a drain electrode are formed, the T-shaped grid is manufactured through the multi-layer glue process, the electron beam exposure on the smooth plane is obviously simpler and more stable in process, good in repeatability and capable of achieving the extremely small size which is difficult to realize by the T-shaped grid;
the second advantage is that after the conductive second layer metal mask is formed, a large-size gate cap can be obtained through contact lithography or step lithography, and on the other hand, the thickness of the gate cap in the traditional T gate process is limited by the thickness of the electron beam glue and can only reach three hundred nanometers, while the thicker gate cap can be obtained very easily through the thickness of the second layer mask in the invention, so that the resistance of the device can be reduced remarkably;
the third advantage is that the asymmetric gate can be obtained by adjusting the photoetching alignment on the metal mask of the second layer, thereby meeting the requirements of device performance; meanwhile, the number of grid feet can be etched on the dielectric mask of the first layer to realize a pi-shaped grid or even a grid with multiple grid feet;
the fourth advantage is that when the gate feet are formed on the first layer of the dielectric mask by photoetching, V-shaped gate feet with a certain angle can be realized by regulating and controlling the transverse and longitudinal speeds of the etched dielectric mask, so that the extremely small-size gate feet which are difficult to realize by electron beam exposure can be realized by large-size photoetching;
the fifth advantage is that when the selective regeneration of the low-resistance source region and the drain region is usually carried out, the longitudinal growth rate is faster than the transverse growth rate, so that the regrown source region and the regrown drain region are in a regular trapezoid shape, and by utilizing the characteristic and shielding by utilizing the gate electrode, the self-alignment of the source electrode and the drain electrode can be realized, the distance between the source electrode and the drain electrode is shortened to the maximum extent, and the resistance of the device is reduced;
the method has the advantages that when the grating foot is etched on the dielectric mask, stepping photoetching can be adopted to manufacture large-size epitaxial wafer devices in large batch, so that the manufacturing efficiency of the HEMT device is greatly improved, and the cost is reduced;
the method can be applied to HEMT devices made of various materials, including GaAs-based HEMTs, InP-based HEMTs, GaN-based HEMTs and the like.
Drawings
Fig. 1 is a flowchart of a method for manufacturing an HEMT device according to a first embodiment of the present invention;
fig. 2a is a schematic structural cross-sectional view of an epitaxial wafer according to a first embodiment of the invention;
FIG. 2b is a schematic cross-sectional view of a structure with a dielectric mask formed thereon according to a first embodiment of the present invention;
FIG. 2c is a cross-sectional view of a structure of a window with a photoresist formed thereon according to a first embodiment of the present invention;
FIG. 2d is a schematic cross-sectional view of a structure with a dielectric mask window formed thereon according to a first embodiment of the present invention;
FIG. 2e is a schematic cross-sectional view of a structure with a metal mask formed according to a first embodiment of the present invention;
fig. 2f is a schematic structural cross-sectional view of a source-drain channel region formed in the first embodiment of the present invention;
fig. 2g is a schematic cross-sectional view illustrating a structure of exposing a channel layer according to a first embodiment of the present invention;
FIGS. 2h-1, 2h-2 and 2h-3 are schematic cross-sectional views of three different structures forming a regrown source region and a regrown drain region, respectively, in accordance with a first embodiment of the present invention;
FIGS. 2i-1, 2i-2, and 2i-3 are schematic cross-sectional views of three different structures without the dielectric mask according to the first embodiment of the present invention;
fig. 2j-1, 2j-2, and 2j-3 are schematic cross-sectional views of three different structures of a HEMT device for forming a "T" type gate electrode according to the first embodiment of the present invention;
fig. 3a is a schematic structural cross-sectional view of a source-drain channel region formed in the second embodiment of the present invention;
fig. 3b-1, 3b-2, and 3b-3 are schematic cross-sectional views of three different structures of a HEMT device forming a "gate" in accordance with a second embodiment of the present invention;
FIG. 4a is a schematic cross-sectional view of a structure in which two windows of photoresist are formed according to a third embodiment of the present invention;
FIG. 4b is a schematic cross-sectional view of a third embodiment of the present invention showing a structure in which two dielectric mask windows are formed;
fig. 4c-1, 4c-2, and 4c-3 are schematic cross-sectional views of three different structures of a HEMT device forming a "pi" type gate electrode according to a third embodiment of the present invention, respectively;
FIG. 5a is a schematic cross-sectional view of a structure in which a V-shaped dielectric mask window is formed according to a fourth embodiment of the present invention;
fig. 5b-1, 5b-2, and 5b-3 are schematic cross-sectional views of three different structures of a HEMT device forming a V-shaped gate electrode according to a fourth embodiment of the present invention.
In the above figures, the reference numerals have the following meanings:
1. a channel layer; 2. a barrier layer; 3. a dielectric mask; 301. a dielectric mask window; 302. a dielectric mask window; 401. photoresist; 4011. a window; 4012. a window; 402. a source drain channel region; 5. a metal mask; 601. a regrowth source region; 602. growing a drain region again; 701. a source electrode; 702. and a drain electrode.
Detailed Description
The invention provides a manufacturing method of an HEMT device, which aims to solve the following problems: (1) in high frequency HEMT devices, the T-gate process is a difficult point. The current T-shaped gate process usually adopts a double-layer photoresist or three-layer photoresist electron beam exposure process, is limited by the precision of the photoresist and the equipment precision, and is difficult to be smaller than 50nm at present. For T-gates smaller than 50nm, typically only a sidewall process can be used. However, both the electron beam exposure T-gate process and the sidewall T-gate process are complex, have poor stability, and the electron beam exposure scanning speed is limited, which is not suitable for mass production of HEMT devices. (2) The method is limited by the photoetching precision, and the source-drain channel distance is difficult to shorten to the size of hundreds of nanometers, so that the on-resistance of the device is large, and the continuous improvement of the frequency of the device is limited. (3) In the manufacturing of the ohmic electrode, the photoetching alignment precision is limited, and a larger alignment distance exists between the metal electrode and the regrown source and drain material, so that the source and drain channel distance is increased, the device channel resistance is increased, and the improvement of the device frequency is limited.
In order that the objects, technical solutions and advantages of the present invention will become more apparent, the present invention will be further described in detail with reference to the accompanying drawings in conjunction with the following specific embodiments.
A manufacturing method of an HEMT device takes an epitaxial wafer as a substrate, the epitaxial wafer sequentially comprises a barrier layer and a channel layer from top to bottom, and the manufacturing method comprises the following steps:
step 1: forming a medium mask on the epitaxial wafer;
step 2: forming photoresist with an exposed area on the dielectric mask by utilizing a photoetching technology, and defining the exposed area as a gate foot window of the gate electrode;
and step 3: removing the dielectric mask in the gate foot window to expose the epitaxial wafer, and removing the photoresist;
and 4, step 4: forming a gate foot of a gate electrode in an exposed area of the epitaxial wafer and forming a metal mask on the dielectric mask;
and 5: forming photoresist with an exposed area on the metal mask by utilizing a photoetching technology, and defining a non-exposed area as a source drain channel area;
step 6: removing the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source drain channel region, and removing the photoresist; taking the rest metal mask as a gate cap of the gate electrode to finish the preparation of the gate electrode;
and 7: carrying out regrowth, and respectively forming a regrowth source region and a regrowth drain region in the region except the source-drain channel region of the channel layer;
and 8: and depositing metal, and respectively forming a source electrode and a drain electrode on the regrowth source region and the regrowth drain region to finish the preparation of the HEMT device.
In the embodiment of the invention, the material of the epitaxial wafer of the HEMT device can be a GaN-based material, a GaAs-based material or an InP-based material.
In the embodiment of the present invention, in step 1, the material of the dielectric mask includes SiN or SiO2；
In the embodiment of the invention, the thickness of the dielectric mask is 50 nm-500 nm;
in an embodiment of the invention, the forming method of the dielectric mask comprises a method of vapor deposition, evaporation or atomic layer deposition.
In an embodiment of the present invention, in step 2, the lithography technique includes electron beam exposure, contact lithography, or step lithography;
in an embodiment of the invention, the gate-foot window comprises one or more.
In the embodiment of the invention, in step 3, the method for removing the dielectric mask includes dry plasma etching, wet etching or reactive ion etching.
In the embodiment of the invention, in the step 4, the thickness of the metal mask is 50nm to 500 nm;
in an embodiment of the invention, the material of the metal mask includes one or more of a group material, a nitride of the group material, an alloy of the group material, and a stack formed by alternately growing a plurality of materials in the group material, wherein the group material includes tungsten, molybdenum, tantalum, titanium, and chromium;
in the embodiment of the invention, the metal mask and the gate foot are formed by adopting a magnetron sputtering method, an electron beam deposition method, a chemical vapor deposition method or an atomic layer deposition method.
In the embodiment of the invention, in step 5, the width of the photoresist with the source and drain channel regions comprises 0.3 μm to 3 μm, thereby defining the channel length, i.e. the source and drain spacing Lds；
In embodiments of the invention, the lithography technique comprises electron beam exposure, step lithography or contact lithography.
In the embodiment of the invention, in step 6, the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source-drain channel region are removed step by step;
in the embodiment of the invention, in the first step, a metal mask and a medium mask are removed by wet etching or dry etching;
in an embodiment of the invention, the second step uses dry etching to remove the barrier layer and a portion of the channel layer.
In an embodiment of the present invention, in step 7, the regrowth method includes a metal organic compound chemical vapor deposition method, a molecular beam epitaxy method, or a hydride vapor phase epitaxy method;
wherein the regrowth comprises a lateral growth and a vertical growth, wherein the vertical growth rate is greater than the lateral growth rate;
wherein the regrown source region and the regrown drain region comprise an n-type layer doped with Si and/or Ge donor impurities;
in an embodiment of the present invention, the n-type layers of the regrown source region and the regrown drain region are low-resistance n-type layers with a donor impurity doping concentration of 1 x 1017/cm3～1*1020/cm3。
In the embodiment of the invention, after the step 7 and before the step 8, the step of removing the dielectric mask is further included, and the method for removing the dielectric mask comprises side wall wet etching.
In an embodiment of the present invention, in step 8, the specific operation of depositing the metal includes: depositing metal in the regrowth source region and the regrowth drain region in a self-alignment manner by taking the gate cap as a mask to respectively form a source electrode and a drain electrode;
wherein, the source electrode and the drain electrode are both in a regular trapezoid shape;
the source electrode and the drain electrode comprise a laminated layer formed by alternately growing a plurality of materials of Ti, TiN, Al and Au.
As another aspect of the present invention, there is also provided a HEMT device prepared by the above-mentioned method, the HEMT device comprising a gate electrode, the gate electrode comprising a gate foot and a gate cap, the gate foot having a width of 10nm to 200 nm; the width of the gate cap is 200 nm-2000 nm.
In the embodiment of the invention, the number of the grid feet comprises 1 or more;
the grid is a symmetrical grid structure or an asymmetrical grid structure;
the shape of the grid foot includes a rectangle or a V shape.
The technical solution of the present invention is further described below with reference to specific examples, but it should be noted that the following examples are only for illustrating the technical solution of the present invention, but the present invention is not limited thereto.
Example one
The invention discloses a manufacturing method of an HEMT device. Fig. 1 shows a flowchart of a method for manufacturing a HEMT device according to a first embodiment of the present invention. As shown in fig. 1, the method for manufacturing a HEMT device provided by the present invention includes the following steps:
step S1: manufacturing a dielectric mask 3 on the barrier layer 2 of the HEMT epitaxial structure;
step S2: coating photoresist 401 on the dielectric mask 3 and defining a window 4011 by a photoetching method;
step S3: using photoresist as a mask to remove the dielectric mask 3 in the window 4011 to form a dielectric mask window 301, and then removing the photoresist;
step S4: manufacturing a metal mask 5 on the patterned dielectric mask 3;
step S5: coating photoresist on the metal mask 5 and defining a non-exposed region source drain channel region 402 by a photoetching method, wherein the window 301 is completely covered by the source drain channel region 402;
step S6: respectively removing the metal mask 5 and the dielectric mask 3 outside the source-drain channel region 402, the barrier layer 2 and part of the channel layer 1 in the HEMT epitaxial structure by using the photoresist as a mask, and then removing the photoresist;
step S7: putting the HEMT epitaxial wafer with the mask pattern into growth equipment again for regrowth of materials of a source region and a drain region, and obtaining a regrowth source region 601 and a regrowth drain region 602;
step S8: after the regrowth is finished, removing the dielectric mask 3 to form an independent metal gate electrode;
step S9: the source electrode 701 and the drain electrode 702 are formed by depositing metal while shielding the metal gate electrode.
Fig. 2a to 2j are schematic structural cross-sectional views corresponding to steps of a method for manufacturing a HEMT device according to an embodiment of the present invention.
As shown in fig. 2a, a HEMT epitaxial wafer is provided, the epitaxial wafer surface being a barrier layer 2, and underneath it a channel layer 1. The material of the HEMT epitaxial wafer can be GaN-based material, GaAs-based material or InP-based material.
As shown in fig. 2b, a dielectric mask 3 is formed on the barrier layer 2 of the HEMT epitaxial wafer, and the material of the dielectric mask 3 may be, but is not limited to, SiN and SiO2The thickness is 50 nm-500 nm, and the manufacturing method can be vapor deposition, evaporation and atomic layer deposition. Preference is given here to SiO deposited by plasma chemical vapor deposition2As a dielectric mask 3.
As shown in fig. 2c, a photoresist 401 is coated on the dielectric mask 3, and a window 4011 without photoresist is formed by a photolithography method of exposure and development. The photoetching method can be electron beam exposure, contact photoetching and step photoetching, the size of the window 4011 is 10 nm-1 μm, and the method is determined according to the requirement of device performance on the gate length.
As shown in fig. 2d, the photoresist 401 is used as a mask to remove the dielectric mask 3 in the window 4011 to form a dielectric mask window 301, and then the photoresist 401 is removed. The method for removing the dielectric mask 3 can adopt a dry plasma etching method, a wet etching method, a reactive ion etching method and the like. The method of plasma dry etching is preferably selected here.
As shown in fig. 2e, a metal mask 5 is formed on the dielectric mask 3 on which the dielectric mask window 301 is formed, to a thickness of 50nm to 500 nm. The metal mask 5 is required to be a conductor of a refractory material, and the material comprises one or more of a group material, a nitride of the group material, an alloy of the group material, and a lamination formed by alternately growing a plurality of materials in the group material, wherein the group material comprises tungsten, molybdenum, tantalum, titanium and chromium; the manufacturing method can be a magnetron sputtering method, an electron beam deposition method, a chemical vapor deposition method or an atomic layer deposition method.
As shown in fig. 2f, a photoresist is coated on the metal mask 5 and a source/drain channel region 402 with the photoresist is formed by a photolithography method of exposure and development, wherein the width is 0.3 μm to 3 μm, and the width is used for defining a source/drain spacing Lds; the lithography method may be contact lithography, or step lithography, or electron beam exposure. The source and drain channel regions 402 need to completely cover the window 4011.
Using the photoresist of the source-drain channel region 402 as a mask, sequentially removing the metal mask 5 and the dielectric mask 3, wherein the removing method can be wet etching or dry etching; then, the barrier layer 2 and a part of the channel layer 1 are removed by using a dry etching method to form a structure as shown in fig. 2g, and then the photoresist is removed.
The epitaxial wafer with the mask exposing the channel layer 1 is put into a growth apparatus to be regrown to form a regrown source region 601 and a regrown drain region 602 which are highly conductive. Wherein the regrown source region 601 and the regrown drain region 602 have donor doping particles which may be, but not limited to, donor impurities such as Si, Ge, etc. The growth method of the regrown source region 601 and the regrown drain region 602 may be Metal Organic Chemical Vapor Deposition (MOCVD), or Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE). The regrown source region 601 and the regrown drain region 602 must be such that the regrown material is in full contact with the sidewall of the channel layer 1, which may be less thick than the metal mask 5, as shown in figures 2h-1, 2 h-2; or may be higher than the metal mask 5 as shown in fig. 2 h-3. This is because, in general, III-V material epitaxy has a vertical growth rate higher than a lateral growth rate, so that the regrown source region 601 and the regrown drain region 602 have a cross section in a regular trapezoid shape, and therefore, even if the thickness of the regrown source region 601 and the regrown drain region 602 is higher than that of the second layer mask 5, contact with the dielectric mask 3 and the metal mask 5 is not caused.
As shown in fig. 2i-1, 2i-2 and 2i-3, after the regrown source region 601 and the regrown drain region 602 are formed, the dielectric mask 3 is removed by wet etching. This is because the sidewalls of the regrown source region 601 and the regrown drain region 602 are in a regular trapezoid shape, so that the dielectric mask 3 is covered with the metal mask 5, but the sidewalls thereof are exposed to the outside, so that the wet etching solution can remove the dielectric mask 3 through the sidewalls. The reason for removing the dielectric mask 3 is that the dielectric mask brings higher gate capacitance, which affects the frequency performance of the HEMT device. On the other hand, for some low frequency devices, the dielectric mask 3 may not be removed.
As shown in fig. 2j-1, 2j-2, and 2j-3, a self-aligned metal deposition is performed on the source and drain regions using the gate metal as a mask to form a source electrode 701 and a drain electrode 702; the deposited metal may be, but is not limited to, a stack of materials such as Ti, TiN, Al, Au, etc.
According to the method for manufacturing the HEMT device, the gate electrode is formed when the growth mask of the regrown source and drain with low resistance is manufactured. In the invention, a dielectric mask and a conductive metal mask are used as a double-layer mask for regrowth of the source and the drain. And when a growth mask is manufactured, a gate foot window is manufactured on the medium mask of the first layer through photoetching, and then a metal mask of a second layer which is conductive is manufactured on the gate foot window to form a gate electrode which is conductive. One of the greatest advantages of this is that when the gate feet with extremely small size are made on the dielectric mask of the first layer, a single layer of electron beam glue can be used for electron beam exposure of fine lines. Compared with the T-shaped gate manufactured by a multi-layer glue process after other device structures such as source and drain electrodes are formed, the electron beam exposure fine line process on a smooth plane is obviously simpler and more stable, the repeatability is good, and the minimum size which is difficult to realize by the T-shaped gate can be achieved. The second advantage of the method for manufacturing an HEMT device provided in the first embodiment of the present invention is that after a conductive metal mask is formed, a large-sized gate cap can be obtained by contact lithography or step lithography, and on the other hand, the thickness of the gate cap in the conventional T-gate process is limited by the thickness of the electron beam resist, and can only reach three hundred nanometers. In the first embodiment of the invention, a thicker gate cap can be obtained very easily through the thickness of the metal mask of the second layer, and the resistance of the device can be reduced remarkably. The method for manufacturing the HEMT device has the third advantage that when the selective regeneration of the low-resistance source region and the low-resistance drain region is usually carried out, the longitudinal growth rate is higher than the transverse growth rate, so that the regrown source region and the regrown drain region are in a regular trapezoid shape. By utilizing the characteristics and utilizing the gate electrode for shielding, the self-alignment of the source and drain electrodes can be realized, the distance between the source and drain electrodes is shortened to the greatest extent, and the resistance of a device is reduced. The method for manufacturing the HEMT device provided by the embodiment of the invention has the fourth advantage that when the gate feet are photoetched on the dielectric mask, the device manufacturing of large-size epitaxial wafers can be carried out in large batch by adopting step photoetching, so that the manufacturing efficiency of the HEMT device is greatly improved, and the cost is reduced.
Example two
The second embodiment of the present invention provides a method for manufacturing a HEMT device, and the difference between the second embodiment of the present invention and the first embodiment of the present invention in the manufacturing method is step S5. In the second embodiment of the invention, a metal mask 5 is coated with photoresist and a source drain channel region 402 with the photoresist is formed by a photoetching method of exposure and development, wherein the width of the source drain channel region is 0.3-3 mu m; the lithography method may be contact lithography, or step lithography, or electron beam exposure. The source/drain channel region 402 should completely cover the window 4011, but the window 4011 may be located on one side of the source/drain channel region 402, as shown in fig. 3a, to form a "gate" electrode. The cross-sectional view of the HEMT device finally formed in embodiment two of the present invention is shown in fig. 3b-1, 3b-2 and 3 b-3.
In a conventional method for manufacturing an HEMT device, a multi-layer electron beam resist is usually used for exposure to manufacture a 'shaped gate' or a multi-step photoetching method is used for manufacturing the 'shaped gate', so that the requirements on exposure process parameters are extremely accurate, the process is complex, the repeatability is poor, and the yield of the device is low. On the other hand, the electron beam exposure process is limited by the exposure time, and the device on the large-size epitaxial wafer cannot be manufactured in a large scale, so that the manufacturing cost of the device is high, and the mass production cannot be realized. The method for manufacturing the HEMT device provided by the second embodiment of the present invention can obtain the "type gate electrode" with a specific size through common contact lithography or step lithography, and has the advantages of simple and stable process and good repeatability.
EXAMPLE III
A third embodiment of the present invention provides a method for manufacturing a HEMT device, where the third embodiment of the present invention is different from the first embodiment of the present invention in that two windows, a window 4011 and a window 4012, are formed in step S2 of the third embodiment of the present invention by a photolithography method, as shown in fig. 4 a. Correspondingly, in step S3 of the third embodiment of the present invention, the photoresist is used as a mask, the dielectric mask 3 in the window 4011 and the dielectric mask 3 in the window 4012 are removed, and there are two formed dielectric mask windows, which are respectively the dielectric mask window 301 and the dielectric mask window 302, as shown in fig. 4 b. The benefit of such a treatment is the formation of a "pi" type gate, as shown in FIGS. 4c-1, 4c-2 and 4 c-3.
Example four
A fourth embodiment of the present invention provides a method for manufacturing a HEMT device, where a difference between the fourth embodiment of the present invention and the first embodiment of the present invention is that in step S3 of the fourth embodiment of the present invention, when the dielectric mask 3 in the window region is removed by using the photoresist as a mask, through process optimization, the lateral removal rate is slower than the longitudinal removal rate when the dielectric mask 3 is removed, so that a slope is formed on the sidewall of the dielectric mask window 301, and the cross section of the window is in a "V" shape, as shown in fig. 5 a. The processing has the advantages that a window with a larger size is formed through contact lithography or step lithography, and then the opening of the dielectric mask on the barrier layer 2 of the HEMT epitaxial structure can realize the size within dozens of nanometers or even ten nanometers by controlling the condition parameters of the removing process of the dielectric mask 3 and the like, so that the size which is difficult to realize through conventional electron beam exposure is reached. Fig. 5b-1, 5b-2 and 5b-3 are cross-sectional views of the finally formed V-shaped gate device according to the method for manufacturing the HEMT device according to the fourth embodiment of the present invention.
The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are only exemplary embodiments of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (10)
1. A manufacturing method of an HEMT device is characterized in that an epitaxial wafer is used as a substrate, and the epitaxial wafer sequentially comprises a barrier layer and a channel layer from top to bottom, and comprises the following steps:
step 1: forming a dielectric mask on the epitaxial wafer;
step 2: forming photoresist with an exposed area on the dielectric mask by utilizing a photoetching technology, and defining the exposed area as a gate foot window of a gate electrode;
and step 3: removing the dielectric mask in the gate foot window to expose the epitaxial wafer, and removing the photoresist;
and 4, step 4: forming a gate foot of a gate electrode in an exposed area of the epitaxial wafer and forming a metal mask on the dielectric mask;
and 5: forming photoresist with an exposed area on the metal mask by utilizing a photoetching technology, and defining a non-exposed area as a source drain channel area;
step 6: removing the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source drain channel region, and removing the photoresist; taking the rest metal mask as a gate cap of the gate electrode to finish the preparation of the gate electrode;
and 7: carrying out regrowth, and respectively forming a regrowth source region and a regrowth drain region in the region except the source-drain channel region of the channel layer;
and 8: and depositing metal, and respectively forming a source electrode and a drain electrode on the regrowth source region and the regrowth drain region to finish the preparation of the HEMT device.
2. The method according to claim 1, wherein in step 1, the dielectric mask comprises SiN or SiO2；
Wherein the thickness of the medium mask is 50 nm-500 nm;
the forming method of the dielectric mask comprises a vapor deposition method, an evaporation method or an atomic layer deposition method;
in the step 2, the lithography technology comprises electron beam exposure, contact lithography or step lithography;
wherein the grating foot window comprises one or more.
3. The method according to claim 1, wherein in the step 3, the dielectric mask is removed by dry plasma etching, wet etching or reactive ion etching.
4. The method according to claim 1, wherein in the step 4, the thickness of the metal mask is 50nm to 500 nm;
the material of the metal mask comprises one or more of a group material, a nitride of the group material, an alloy of the group material and a lamination formed by alternately growing a plurality of materials in the group material, wherein the group material comprises tungsten, molybdenum, tantalum, titanium and chromium;
the metal mask and the gate foot are formed by a magnetron sputtering method, an electron beam deposition method, a chemical vapor deposition method or an atomic layer deposition method.
5. The manufacturing method according to claim 1, wherein in the step 5, the width of the photoresist having the source and drain channel regions includes 0.3 μm to 3 μm;
wherein the lithography technique comprises electron beam exposure, step lithography or contact lithography;
in the step 6, the metal mask, the dielectric mask, the barrier layer and part of the channel layer outside the source-drain channel region are removed step by step;
removing a metal mask and a dielectric mask by wet etching or dry etching in the first step;
and in the second step, the barrier layer and part of the channel layer are removed by adopting dry etching.
6. The method of claim 1, wherein in step 7, the regrowth comprises a metal organic chemical vapor deposition method or a molecular beam epitaxy method;
wherein the regrowth comprises a lateral growth and a vertical growth, wherein the vertical growth rate is greater than the lateral growth rate;
wherein the regrown source region and the regrown drain region comprise an n-type layer doped with Si and/or Ge donor impurities.
7. The method of claim 1, further comprising a step of removing the dielectric mask after step 7 and before step 8, wherein the step of removing the dielectric mask comprises a sidewall wet etch.
8. The method of claim 1, wherein the step 8 of depositing metal comprises: depositing metal in the regrowth source region and the regrowth drain region in a self-alignment manner by taking the gate cap as a mask to respectively form a source electrode and a drain electrode;
wherein the source electrode and the drain electrode are both in a regular trapezoid shape;
the source electrode and the drain electrode comprise a laminated layer formed by alternately growing a plurality of materials of Ti, TiN, Al and Au.
9. A HEMT device fabricated by the fabrication method according to any one of claims 1 to 8, wherein said HEMT device comprises a gate electrode, said gate electrode comprising a gate foot and a gate cap, said gate foot having a width of 10nm to 200 nm; the width of the gate cap is 200 nm-2000 nm.
10. The HEMT device of claim 9, wherein said number of gate legs comprises 1 or more;
the grid is a symmetrical grid structure or an asymmetrical grid structure;
the shape of the grid foot comprises a rectangle or a V shape.
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