CN111934683B - Digital frequency correction method and system for temperature control RTC - Google Patents
Digital frequency correction method and system for temperature control RTC Download PDFInfo
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Abstract
The invention relates to a frequency correction method and discloses a digital frequency correction method and a digital frequency correction system for a temperature control RTC. Determining a calibration period length according to the correction accuracy requirement; calculating a theoretical frequency division coefficient according to the target frequency and the reference frequency; measuring and calculating original frequency error values and corresponding frequency correction code values at all temperature points, generating and storing a temperature-frequency correction code table; in actual operation, a frequency correction code value and a positive and negative state thereof are searched according to a temperature value index, so that the original frequency is divided by a correction frequency division coefficient obtained by increasing 1 or decreasing 1 on the basis of a theoretical frequency division coefficient in a specific time period to obtain a corrected frequency; the invention obtains different correction frequency division coefficients in two time periods by searching a temperature-frequency correction code table and combining a digital logic control circuit; the whole correction process is simple, the digital logic control circuit occupies less resources, the digital logic control circuit is easy to realize in the chip, and the chip cost is saved.
Description
Technical Field
The present invention relates to a frequency calibration method, and more particularly, to a digital frequency calibration method and system for a temperature controlled RTC.
Background
Currently, more and more embedded applications use a real-time clock RTC, for example, smart meter applications require RTC error less than 5 minutes/year, which equates to about 5 ppm. The most typical RTC clock signal is implemented by using a 32.768KHz tuning fork crystal oscillator to implement an oscillator circuit. However, the frequency deviation of the crystal oscillator in the range of-40 to 85 degrees is approximately in a quadratic curve shape, the maximum error of the crystal oscillator in a high-temperature section and a low-temperature section can reach about 150ppm, and the error is about 1.3 hours per year, so that the requirement of application precision of a smart meter and the like can not be met. Therefore, temperature compensation and correction of such RTC clock signals are required, and correction is preferably implemented inside the RTC chip to save MCU resources of the whole embedded product.
For the temperature compensation technology of the RTC clock chip with the built-in crystal oscillator, the following two types of prior art schemes mainly exist: the first method may be called "analog circuit correction method": firstly, measuring the internal temperature of a chip (which is very close to the environmental temperature of a crystal oscillator), and searching a built-in two-dimensional table of correction parameters by adopting a successive approximation method and the like according to the temperature value to obtain an adjusting Code (Trim Code). The code value is used to change the control voltage at a certain position of the crystal oscillation circuit or the crystal oscillation load capacitance so as to correct the output frequency to the target frequency. The method for changing the frequency by adjusting the parameter value of one or more devices in the crystal oscillator circuit is generally relatively complex in circuit and difficult to realize high precision, and particularly when the load capacitance of the crystal oscillator is adjusted to be close to the minimum value, the sensitivity of the frequency to the change of the capacitance value is sharply increased, the controllable precision is reduced, the crystal oscillator circuit is possibly unstable, and the anti-interference capability is obviously reduced.
The second method may be called "digital frequency correction method": the method can overcome most of inherent defects of an analog circuit correction method, does not need to adjust internal voltage or load capacitance of a crystal oscillator, avoids the stability problem of circuits and frequency, and enhances the anti-interference capability of the oscillator circuit. Such "digital frequency correction" is usually performed by looking up the TrimCode from a built-in "temperature-correction TrimCode" table at different temperatures to change the division factor or increase/decrease the number of pulse counts of a part of the original clock, so that the corrected frequency signal is accurate within one calibration period (e.g. within 1 second, 10 seconds, 30 seconds, etc.), but it is not necessary to ensure accuracy within a single clock period of each corrected frequency. There are many types of digital frequency correction methods, but most of the process descriptions and circuit implementations are complex, and especially when the control logic algorithm is implemented inside a chip, the control logic algorithm needs to occupy more hardware resources and area cost.
For example, the patent titles: successive approximation type temperature frequency correction method and device, application number: cn200810043842.x, application date: the invention patent application of 2008-10-15 describes an "analog circuit correction method": and calculating to obtain a frequency calibration word by adopting a successive approximation method according to the temperature value, and outputting the frequency calibration word to a frequency locking synthesis unit similar to a voltage-controlled oscillator to realize frequency calibration. However, the frequency-locked synthesis unit of the voltage-controlled oscillator is much more complex than a frequency divider circuit, and has larger power consumption and area.
For example, the patent titles: a frequency calibration method and device, storage medium, application number: cn201910550847.x, application date: 2019-06-24 describes an analog frequency correction method: and calculating a frequency compensation value according to the temperature value and a corresponding frequency compensation formula, converting the frequency compensation value into a corresponding analog voltage, and adding the analog voltage to a frequency control device of the crystal oscillator.
For example, the patent titles: a fast optimizing automatic frequency calibration circuit, application No.: CN201320284194.3, application date: 2013-05-23 describes an analog frequency correction method: the method has the advantages that the speed of the correction system is improved, but the method only aims at the correction method of the whole system and is not a calibration method integrated in a chip.
For example, the patent titles: a clock frequency calibration method of an internal clock source of a chip applies for the following numbers: CN201910546192.9, application date: 2019-06-21 describes an analog frequency correction method: the chip internal frequency is output and compared with the external standard frequency, and the adjusting code value is adjusted gradually to approximate the standard frequency. The method does not relate to the correction of the temperature drift error of the internal frequency of the chip.
For example, the patent titles: improved frequency correction method and apparatus, application No.: CN201110377740.3, application date: 2011-11-24 describes a digital frequency correction method: the method also utilizes the frequency division coefficient, but because the method needs special processing aiming at the remainder of the frequency division coefficient, the control and adjustment process is more complicated, and a plurality of digital circuit units are needed when the method is realized in a chip.
In the prior art, the design of frequency correction by an analog frequency correction method is complex, and particularly when a control logic algorithm is realized in a chip, the analog frequency correction method occupies more hardware resources and has high area cost. The existing digital frequency correction method is complex.
Disclosure of Invention
The invention provides a digital frequency correction method and system of a temperature control RTC (real time clock), aiming at the defects that in the prior art, the design is complex when the frequency is corrected by an analog method, and particularly when a control logic algorithm is realized in a chip, the occupied hardware resource is more and the area cost is high.
A digital frequency correction method of temperature control RTC comprises the following steps,
acquiring a correction period Tcor, and calculating the correction period Tcor according to correction precision;
in formula 1, Fosc is an original frequency, and Egoal is a frequency correction precision requirement;
obtaining a theoretical frequency division coefficient DivCode, and calculating the theoretical frequency division coefficient according to the target frequency and the reference frequency;
in formula 2, Fref is a reference frequency, Fgoal is a target frequency;
acquiring frequency correction codes, fitting a temperature drift characteristic expression formula 3 of an original frequency error according to errors Err of an original frequency Fosc and a reference frequency Fref measured at a plurality of temperature points, calculating the frequency correction codes corresponding to the original frequency error values at all the temperature points, and storing the frequency correction codes as a temperature-frequency correction code table;
in formula 3, Temp is a corresponding temperature value, c is a constant, Ki is a fitting coefficient, i is an integer greater than or equal to 1, and N is an integer greater than or equal to 2, and is determined according to the temperature frequency characteristic of the type oscillator;
acquiring a correction frequency division coefficient, and acquiring the correction frequency division coefficient according to the frequency correction code and the theoretical frequency division coefficient;
and acquiring corrected frequency, and according to the frequency correction code, using the correction frequency division coefficient in a period T1 of each correction period, and using the theoretical frequency division coefficient in the rest period to perform frequency division processing on the original frequency signal to acquire the corrected frequency.
Preferably, the correction division coefficient is obtained by adding 1 to or subtracting 1 from the theoretical division coefficient depending on the sign of the frequency correction code.
Preferably, the digital frequency correction control algorithm is specifically to obtain the correction code value Nx according to the temperature-frequency correction code table,
when Nx >0, it indicates that the original frequency is too fast, and it is necessary to divide the original frequency Fosc by using DivCode +1 as a correction division coefficient in the previous Nx fvoal clock period T1 and by using DivCode as a correction division coefficient in the remaining time Tcor-T1 during the process of acquiring the target frequency fvoal within one correction period Tcor, where:
T1＝(DivCode+1)×Nx/Fosc；
when Nx <0, it indicates that the original frequency is slow, and it is necessary to divide the original frequency Fosc by using DivCode-1 as a correction division coefficient in the previous (-Nx) Fgoal clock period T1 and by using DivCode as a correction division coefficient in the remaining time Tcor-T1 during the process of acquiring the target frequency Fgoal in one correction period Tcor, where:
T1＝(DivCode-1)×(-Nx)/Fosc；
when Nx is 0, the original frequency Fosc is divided by directly adopting a theoretical frequency division coefficient DivCode as a correction frequency division coefficient without correction.
Preferably, the temperature-frequency correction code table is placed in the storage unit in the form of a two-dimensional table, the first column is a temperature value, the second column is a frequency correction value at a corresponding temperature point calculated according to a fitting formula, and the corresponding frequency correction code can be directly found by indexing through a real-time temperature measurement value.
Preferably, the step length of the temperature-frequency correction code table is 0.1-1 degree, different step length settings are carried out, and the storage space occupied by the temperature-frequency correction code table is different. Smaller temperature steps may also be used in the top and bottom temperature ranges to improve frequency correction accuracy over this range.
A digital frequency correction system of temperature control RTC comprises a crystal oscillator circuit unit, a frequency divider circuit unit, a temperature measurement circuit unit, a storage unit, and a frequency correction control logic circuit unit,
the input end of the crystal oscillator circuit unit is connected with a crystal oscillator, the output end of the crystal oscillator circuit unit is connected with a frequency divider circuit unit, the input end of the frequency divider circuit unit is connected with the output end of the frequency correction control logic circuit unit, and the output end of the frequency divider circuit unit outputs a correction frequency Fout;
the input end of the frequency correction control logic circuit unit is connected with the output end of the temperature measuring circuit unit, and the other input end of the frequency correction control logic circuit unit is connected with the output end of the storage unit;
the frequency correction control logic circuit unit outputs the time parameter and the correction frequency division coefficient to the frequency division circuit unit.
Preferably, the crystal oscillator is connected to a load capacitor.
Due to the adoption of the technical scheme, the invention has the remarkable technical effects that: according to the invention, a temperature-frequency correction code table is inquired according to a temperature value to obtain a frequency correction code, in a period of time in a correction period, the original frequency is divided by increasing 1 or decreasing 1 on the basis of a theoretical frequency division coefficient to obtain a correction frequency division coefficient, and in the rest periods of time in the correction period, the original frequency signal is still divided by the theoretical frequency division coefficient to obtain and output a corrected frequency; according to the scheme of the application, the temperature-frequency correction code table is directly searched, and different correction frequency division coefficients in two time periods are obtained through calculation by combining a digital logic control circuit; the whole correction process is simple, the digital logic control circuit occupies less resources, the digital logic control circuit is easy to realize in the chip, and the chip cost is saved.
Drawings
FIG. 1 is a flow chart of example 1 of the present invention.
Fig. 2 is a two-dimensional representation of the temperature-frequency correction code of the present invention.
Fig. 3 is a composition diagram of embodiment 2 of the present invention.
Fig. 4 is a schematic diagram of the correction adjustment process of embodiment 3 of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Example 1
A digital frequency correction method of temperature control RTC comprises the following steps,
acquiring a correction period Tcor, and calculating the correction period Tcor according to correction precision;
in formula 1, Fosc is an original frequency, and Egoal is a frequency correction precision requirement;
obtaining a theoretical frequency division coefficient DivCode, and calculating the theoretical frequency division coefficient according to the target frequency and the reference frequency;
in formula 2, Fref is a reference frequency, Fgoal is a target frequency;
acquiring frequency correction codes, fitting a temperature drift characteristic expression formula 3 of an original frequency error according to errors Err of an original frequency Fosc and a reference frequency Fref measured at a plurality of temperature points, calculating the frequency correction codes corresponding to the original frequency error values at all the temperature points, and storing the frequency correction codes as a temperature-frequency correction code table;
in formula 3, Temp is a corresponding temperature value, c is a constant, Ki is a fitting coefficient, i is an integer greater than or equal to 1, and N is an integer greater than or equal to 2, and is determined according to the temperature frequency characteristic of the type oscillator;
acquiring a correction frequency division coefficient, and acquiring the correction frequency division coefficient according to the frequency correction code and the theoretical frequency division coefficient;
and acquiring corrected frequency, and according to the frequency correction code, using the correction frequency division coefficient in a period T1 of each correction period, and using the theoretical frequency division coefficient in the rest period to perform frequency division processing on the original frequency signal to acquire the corrected frequency.
And adding 1 or subtracting 1 from the theoretical frequency division coefficient according to the positive and negative of the frequency correction code to obtain a correction frequency division coefficient.
The digital frequency correction control algorithm specifically comprises obtaining a correction code value Nx according to a temperature-frequency correction code table,
when Nx >0, it indicates that the original frequency is too fast, and it is necessary to divide the original frequency Fosc by using DivCode +1 as a correction division coefficient in the previous Nx fvoal clock period T1 and by using DivCode as a correction division coefficient in the remaining time Tcor-T1 during the process of acquiring the target frequency fvoal within one correction period Tcor, where:
T1＝(DivCode+1)×Nx/Fosc；
when Nx <0, it indicates that the original frequency is slow, and it is necessary to divide the original frequency Fosc by using DivCode-1 as a correction division coefficient in the previous (-Nx) Fgoal clock period T1 and by using DivCode as a correction division coefficient in the remaining time Tcor-T1 during the process of acquiring the target frequency Fgoal in one correction period Tcor, where:
T1＝(DivCode-1)×(-Nx)/Fosc；
when Nx is 0, the original frequency Fosc is divided by directly adopting a theoretical frequency division coefficient DivCode as a correction frequency division coefficient without correction.
The temperature-frequency correction code table is placed in the storage unit in a two-dimensional table form, and the corresponding frequency correction code can be directly obtained through indexing by the temperature measurement value.
The temperature step length of the temperature-frequency correction code table is 1 ℃, different step length settings are carried out, and the storage space occupied by the temperature-frequency correction code table is different.
Example 2
On the basis of embodiment 1, the present embodiment realizes a digital frequency correction system of a temperature controlled RTC based on a digital frequency correction method of the temperature controlled RTC, which includes a crystal oscillation circuit unit, a frequency divider circuit unit, a temperature measurement circuit unit, a storage unit and a frequency correction control logic circuit unit;
the input end of the crystal oscillation circuit unit is connected with a crystal oscillator, the output end of the crystal oscillation circuit unit is connected with the frequency divider circuit unit, the input end of the frequency divider circuit unit is connected with the output end of the frequency correction control logic circuit unit, and the output end of the frequency divider circuit unit outputs a correction frequency Fout;
the input end of the frequency correction control logic circuit unit is connected with the output end of the temperature measuring circuit unit, and the other input end of the frequency correction control logic circuit unit is connected with the output end of the storage unit;
the frequency correction control logic circuit unit outputs the time parameter and the correction frequency division coefficient to the frequency division circuit unit.
The crystal oscillator is connected with a load capacitor.
Example 3
On the basis of the above embodiment, in this embodiment, calculation configuration is performed based on a chip which is formed by composite packaging of a BT-cut 32768Hz tuning fork crystal oscillator and an SoC chip, digital frequency correction is realized, the corrected frequency Fout is output as 1024Hz, and the average error egeal is less than or equal to 2 ppm.
From this, the length of a calibration cycle can be deduced: t ═ 1/Fosc)/egeal ═ 1/32768)/2ppm ═ 15.26 seconds, and the actual value is 16 seconds; the theoretical division factor DivCode-Fref/fgeal-32768/1024-32.
In the actual calibration stage, the composite packaged chip is firstly placed in a high-low temperature box, the Fosc values of the original frequency under at least 3 temperature points are obtained, according to a second-order frequency error temperature characteristic formula 5 specific to a 32768Hz tuning fork crystal oscillator,
in formula 5, K1 and K2 are fitting coefficients, Temp is a temperature value, and c is a constant;
and fitting to obtain the crystal oscillator frequency Fosc error temperature characteristic expression, so that the original frequency values and the correction code values Nx at other temperature points can be calculated. As an example, the Fosc at the-30 degree temperature point estimated by equation 5 is 32764.07Hz, while the frequency correction code (rounded) corresponding to the-30 degree temperature point is also estimated;
Nx＝16*(32764.07-32768)＝-62.88≈-63
thus, the digital frequency calibration control logic determines that Nx is-63 <0, and then uses 31 (i.e., DivCode-1) as the correction division factor for the first 63 clock cycles of the output frequency Fout, and divides by the theoretical division factor of 32 for the remaining time, i.e., the 64 th cycle to 16384 th cycle of the output frequency Fout. The final realization is that the average error Egoal of the output frequency Fout is less than or equal to 2ppm in each correction period T-16 seconds.
For the case of correcting the division coefficient to be odd 31, the frequency division circuit can be implemented by adopting two design methods: the first method is to divide the first half cycle by 15 and the second half cycle by 16; the second method is to change the edge trigger condition once after the 15 th cycle of the original frequency Fosc, i.e.: and the frequency is inverted to the next half period of the output frequency Fout at the 15.5 th period, and the frequency division is continued by restoring the original edge triggering condition from the 16 th period of Fosc.
A detailed calibration process diagram of the embodiment is shown in fig. 4.
In this embodiment, the process flow of the correction code solving method and the digital frequency calibration control logic at other temperature points with the original frequency Fosc > Fref, that is, Nx >0, is similar to the process of the above embodiment 3, and can be easily derived by those skilled in the art, and will not be described herein again.
Claims (3)
1. A digital frequency correction method of temperature control RTC is characterized by comprising the following steps,
acquiring a correction period Tcor, and calculating the correction period Tcor according to correction precision;
in formula 1, Fosc is an original frequency, and Egoal is a frequency correction precision requirement;
obtaining a theoretical frequency division coefficient DivCode, and calculating the theoretical frequency division coefficient according to the target frequency and the reference frequency;
in formula 2, Fref is a reference frequency, Fgoal is a target frequency;
acquiring a frequency correction code, and fitting a temperature drift characteristic expression formula 3 of an original frequency error according to errors Err of an original frequency Fosc and a reference frequency Fref measured at a plurality of temperature points, so as to calculate a frequency correction code formula 4 corresponding to the original frequency error value Err at all temperature points and store the frequency correction code formula 4 as a temperature-frequency correction code table;
in formula 3, Temp is the corresponding temperature value; c is a constant, Ki is a fitting coefficient, and i is an integer greater than or equal to 1; n is an integer greater than or equal to 2 and is determined according to the temperature frequency characteristic of the type oscillator;
in formula 4, Tcor is the correction period;
acquiring a correction frequency division coefficient, and acquiring the correction frequency division coefficient according to the frequency correction code and the theoretical frequency division coefficient;
according to the positive and negative of the frequency correction code, adding 1 or subtracting 1 to the theoretical frequency division coefficient to obtain the correction frequency division coefficient,
acquiring a correction code value Nx according to the temperature-frequency correction code table;
when Nx >0, in the process of obtaining the target frequency Fgoal in one correction period Tcor, dividing the original frequency Fosc by using DivCode +1 as a correction frequency division coefficient in the previous Nx Fgoal clock periods T1, and using DivCode as a correction frequency division coefficient in the rest time Tcor-T1, wherein:
T1＝(DivCode+1)×Nx/Fosc；
when Nx <0, in obtaining the target frequency Fgoal within one correction period Tcor, dividing the original frequency Fosc by using DivCode-1 as a correction division coefficient for the previous (-Nx) Fgoal clock period T1, and using DivCode as a correction division coefficient for the remaining time Tcor-T1, wherein:
T1＝(DivCode-1)×(-Nx)/Fosc；
when Nx is 0, the corrected frequency is obtained by directly dividing the original frequency Fosc by using the theoretical frequency division coefficient DivCode as the correction frequency division coefficient without correction, the correction frequency division coefficient is used in a period of time T1 of each correction period according to the frequency correction code, and the corrected frequency is obtained by dividing the original frequency signal by using the theoretical frequency division coefficient in the rest of the time.
2. The digital frequency calibration method for temperature controlled RTC of claim 1, wherein the temperature-frequency calibration code table is placed in the storage unit in the form of two-dimensional table, and the corresponding frequency calibration code can be directly searched by the temperature measurement value.
3. A digital frequency correction system of temperature controlled RTC, comprising a crystal oscillator circuit unit, a frequency divider circuit unit, a temperature measuring circuit unit, a storage unit, characterized in that, the system realized by the digital frequency correction method of temperature controlled RTC according to claim 1 or 2, further comprises a frequency correction control logic circuit unit,
the input end of the crystal oscillator circuit unit is connected with a crystal oscillator, the output end of the crystal oscillator circuit unit is connected with a frequency divider circuit unit, the input end of the frequency divider circuit unit is connected with the output end of the frequency correction control logic circuit unit, and the output end of the frequency divider circuit unit outputs a correction frequency Fout;
the input end of the frequency correction control logic circuit unit is connected with the output end of the temperature measuring circuit unit, and the other input end of the frequency correction control logic circuit unit is connected with the output end of the storage unit;
the frequency correction control logic circuit unit outputs the time parameter and the correction frequency division coefficient to the frequency divider circuit unit.
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