CN111923747A

CN111923747A - Control method and system

Info

Publication number: CN111923747A
Application number: CN201910395392.9A
Authority: CN
Inventors: 杜宝海; 傅焱辉; 刘昌鑑; 李前邓
Original assignee: Contemporary Amperex Technology Co Ltd
Current assignee: Contemporary Amperex Technology Co Ltd
Priority date: 2019-05-13
Filing date: 2019-05-13
Publication date: 2020-11-13
Anticipated expiration: 2039-05-13
Also published as: CN111923747B

Abstract

The embodiment of the invention relates to the technical field of control, and discloses a control method and a control system. The control method is applied to at least one first processor of a control system, and the control system also comprises at least one second processor and a power module respectively connected with the first processor and the second processor; the control method comprises the following steps: after being awakened by the power module receiving the awakening signal, executing a preset task; judging whether the second processor needs to be awakened or not in the process of executing the task; and when the second processor is judged to need to be awakened, controlling the power supply module to supply power to the second processor. In the invention, after the first processor is awakened, whether the second processor is awakened can be determined according to needs, so that the second processor can be awakened only when needed, and the power consumption of the control system is reduced.

Description

Control method and system

Technical Field

The embodiment of the invention relates to the technical field of control, in particular to a control method and a control system.

Background

With the development of battery technology, the electric automobile replacing fuel automobile has become the development trend of automobile industry. Two batteries are generally arranged in an electric automobile, wherein one high-voltage battery supplies power for high-power equipment such as a motor, the other low-voltage battery supplies power for a controller, and the controller can be a whole automobile controller, a battery management system and the like. At present, a plurality of controllers are generally arranged in an electric automobile, and the plurality of controllers generally comprise a main processor and at least one coprocessor, and the main processor and the at least one coprocessor are simultaneously awakened and cooperatively work in operation.

The inventor finds that the prior art has at least the following problems: when the electric automobile runs, the low-voltage battery needs to supply power to the main processor and the coprocessor at the same time, so that the power consumption of the low-voltage battery is increased, the low-voltage battery is easy to lose power, and the electric automobile is difficult to start or cannot start.

Disclosure of Invention

The embodiment of the invention aims to provide a control method and a control system, after a first processor is awakened, whether a second processor is awakened or not can be determined according to needs, so that the second processor can be awakened only when needed, and the power consumption of the control system is reduced.

In order to solve the above technical problem, an embodiment of the present invention provides a control method, which is applied to at least one first processor of a control system, where the control system further includes at least one second processor and a power module respectively connected to the first processor and the second processor; the method comprises the following steps: after being awakened by the power module receiving the awakening signal, executing a preset task; judging whether the second processor needs to be awakened or not in the process of executing the task; and when the second processor is judged to need to be awakened, controlling the power supply module to supply power to the second processor.

An embodiment of the present invention provides a control system including: the system comprises at least one first processor, at least one second processor and a power module respectively connected with the first processor and the second processor; the power supply module is used for waking up the first processor when receiving the wake-up signal; the first processor is used for executing the control method.

Compared with the prior art, the embodiment of the invention has the advantages that the power supply module can wake up the first processor when receiving the wake-up signal, the first processor executes the preset task after being woken up, whether the second processor needs to be woken up or not is judged during the task execution period, and the power supply module is controlled to supply power to the second processor when the second processor needs to be woken up; the second processor can be awakened only when needed, and the problem that the second processor is awakened together with the first processor when no task needs to be processed in the prior art to cause overhigh power consumption can be avoided, so that the power consumption of the control system can be reduced.

In addition, the control system also comprises a wake-up circuit respectively connected with the power module and the first processor; the wake-up signal is sent out by the wake-up circuit when the timing time set by the first processor is reached. The embodiment provides a specific implementation manner for waking up the first processor through the wake-up circuit arranged in the control system.

In addition, the control system also comprises a wake-up circuit respectively connected with the power supply module and the second processor; the wake-up signal is sent out by the wake-up circuit when the timing time set by the second processor is reached. The embodiment provides another specific implementation manner of waking up the first processor through the wake-up circuit arranged in the control system.

In addition, the wake-up signal is sent by an external circuit connected with the power supply module, the number of the external circuits is multiple, and the control system further comprises at least one functional module connected with the power supply module; the method further comprises the following steps: after the power module receiving the wake-up signal wakes up, the external circuit outputting the wake-up signal is determined according to the collected output signals of the plurality of external circuits, and the power module is controlled to supply power to the functional module according to the external circuit outputting the wake-up signal. In this embodiment, the wake-up signal received by the power module is sent by the external circuit connected to the power module, the number of the external circuits is multiple, and when the first processor is awakened by the power module receiving the wake-up signal, the first processor collects output signals of the multiple external circuits, so that which external circuit outputs the wake-up signal can be determined, and the power module is controlled to supply power to the functional module according to the external circuit outputting the wake-up signal.

In addition, in the process of executing the task, judging whether the second processor needs to be awakened or not comprises the following steps: in the process of executing the task, acquiring an evaluation value representing the working state of the first processor; and if the evaluation value is larger than a first preset threshold value, judging that the second processor needs to be awakened to execute the task. This embodiment provides a specific implementation for determining whether the second processor needs to be woken up.

In addition, in the process of executing the task, whether the second processor needs to be awakened is judged, specifically: in the process of executing the task, judging whether the task needs to be executed by the second processor; and if the task needs to be executed by the second processor, judging that the second processor needs to be awakened. This embodiment provides another specific implementation for determining whether the second processor needs to be woken up.

In addition, before controlling the power module to supply power to the second processor, the method further includes: judging whether the second processor is in a dormant state or not; and if the second processor is in a dormant state, entering a step of controlling the power supply module to supply power to the second processor. In this embodiment, before waking up the second processor, it is determined whether the second processor is in the sleep state, so that the first processor can be prevented from repeatedly waking up the second processor, that is, the resource of the first processor is prevented from being wasted.

Additionally, determining whether the second processor is in a sleep state includes: sending a verification message to the second processor; and if the reply message returned by the second processor is not received, judging that the second processor is in a dormant state. The present embodiment provides a specific implementation manner of determining whether the second processor is in the sleep state.

Additionally, determining whether the second processor is in a sleep state includes: collecting power supply voltage input to a second processor by a power supply module; and if the input voltage is matched with the second preset threshold value, determining that the second processor is in a dormant state. This embodiment provides another specific implementation manner of determining whether the second processor is in the sleep state.

In addition, the task is set by the second processor. This embodiment provides a specific implementation of setting the task of the first processor.

In addition, the evaluation value is a load factor or a temperature.

In addition, the control system is a battery management system.

The first processor is a coprocessor, and the second processor is a main processor. In this embodiment, the first processor is set as a coprocessor, the power module preferentially wakes up the coprocessor in the control system, and the power consumption of the coprocessor is low, so that the power consumption of the entire control system is as low as possible.

Drawings

One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.

Fig. 1 is a schematic diagram of a control system to which a control method according to a first embodiment of the present invention is applied;

fig. 2 is a detailed flowchart of a control method according to a first embodiment of the present invention;

fig. 3 is a schematic diagram of a control system to which the control method according to the first embodiment of the present invention is applied, in which a wake-up signal is issued by an external circuit connected to a power supply module;

FIG. 4 is a schematic diagram of a control system to which a control method according to a second embodiment of the present invention is applied, wherein a wake-up signal is sent by a wake-up circuit in the control system when a timing set by a first processor is reached;

FIG. 5 is a schematic diagram of a control system to which a control method according to a second embodiment of the present invention is applied, wherein a wake-up signal is issued by a wake-up circuit in the control system when a timing set by a second processor is reached;

FIG. 6 is a diagram of a control system applied to a control method according to a second embodiment of the present invention, in which a wake-up circuit is connected to both a first processor and a second processor;

fig. 7 is a schematic diagram of a control system to which a control method according to a third embodiment of the invention is applied;

fig. 8 is a detailed flowchart of a control method according to a third embodiment of the invention;

FIG. 9 is a flowchart illustrating a control method for determining whether to wake up a second processor in a first manner according to a fourth embodiment of the present invention;

FIG. 10 is a flowchart illustrating a control method for determining whether to wake up a second processor in a second manner according to a fourth embodiment of the present invention;

fig. 11 is a detailed flowchart of a control method according to a fifth embodiment of the invention;

fig. 12 is a schematic diagram of a control system according to a sixth embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. However, it will be appreciated by those of ordinary skill in the art that numerous technical details are set forth in order to provide a better understanding of the present application in various embodiments of the present invention. However, the technical solution claimed in the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.

Referring to fig. 1, the control system includes at least one first processor 1, at least one second processor 2, and a power module 3 respectively connected to the first processor 1 and the second processor 2. In the present embodiment and the following embodiments, the number of the first processors 1 is 1, and the number of the second processors 2 is 1.

A specific flow of the control method of the present embodiment is shown in fig. 2.

And 101, after being awakened by the power module receiving the awakening signal, executing a preset task.

Specifically, the power module 3 supplies power to the first processor 1 after receiving the wake-up signal to wake up the first processor 1, and the first processor 1 starts to work after being woken up to execute a preset task.

In this embodiment, referring to fig. 3, the wake-up signal is sent by an external circuit 4 connected to the power module 3, that is, the wake-up signal is an external wake-up signal sent by the external circuit 4 outside the control system, where the external circuit 4 is, for example, a relay, a switch, or the like.

Step 102, in the process of executing the task, judging whether the second processor needs to be awakened. If yes, go to step 103; otherwise, the process is ended directly.

Specifically, the first processor 1 continuously detects whether the second processor 2 needs to be awakened to perform cooperative work during the process of executing the preset task and before the preset task is not executed, and if so, the step 103 is performed; if not, the result shows that the first processor 1 does not need to wake up the second processor 2 to cooperatively work when executing the task, and the process is finished directly.

And 103, controlling the power supply module to supply power to the second processor.

Specifically, the first processor 1 controls the power module 3 to supply power to the second processor 2 to wake up the second processor 2, and the second processor 2 is woken up and then cooperates with the first processor 1.

In this embodiment, the first processor 1 may be a coprocessor, and the second processor 2 may be a main processor, so that when the power module 3 receives a wake-up signal, the coprocessor in the control system is preferentially woken up, and the power consumption of the coprocessor is low, so that the power consumption of the entire control system is as low as possible.

Compared with the prior art, the power module can wake up the first processor when receiving the wake-up signal, the first processor executes the preset task after being woken up, whether the second processor needs to be woken up or not is judged during the task execution period, and when the second processor needs to be woken up, the power module is controlled to supply power to the second processor; the second processor can be awakened only when needed, and the problem that the second processor is awakened together with the first processor when no task needs to be processed in the prior art to cause overhigh power consumption can be avoided, so that the power consumption of the control system can be reduced.

A second embodiment of the invention relates to a control method. The second embodiment is substantially the same as the first embodiment, and mainly differs therefrom in that: in this embodiment, the wake-up signal is sent by a wake-up circuit in the control system.

In this embodiment, the control system further includes a wake-up circuit 5, and the wake-up signal is an internal wake-up signal sent by the wake-up circuit 5 in the control system.

In an example, as shown in fig. 4, the wake-up circuit 5 is respectively connected to the power module 3 and the first processor 1, and a specific flow of the control method is shown in fig. 2, which is not described herein again, but mainly differs therefrom in that: the wake-up signal is sent out by the wake-up circuit 5 when the timing time set by the first processor 1 is reached; specifically, the first processor 1 sets a timing time of the wake-up circuit 5, the wake-up circuit 5 sends a wake-up signal (internal wake-up signal) to the power module 3 after reaching the timing time, the power module 3 supplies power to the first processor 1 after receiving the internal wake-up signal, wakes up the first processor 1, and the first processor 1 executes a preset task after being woken up. For example, the current task of the first processor 1 is to acquire a certain data again after a preset time interval, the first processor 1 sets the timing time of the wake-up circuit 5 to be the current time plus the preset time interval, so that the wake-up circuit 5 sends an internal wake-up signal to the power module 3 when the timing time is reached, then the power module 3 supplies power to the first processor 1 to wake up the first processor 1, and the first processor 1 acquires the data again after being woken up.

In an example, as shown in fig. 5, the wake-up circuit 5 is respectively connected to the power module 3 and the second processor 2, and a specific flow of the control method is shown in fig. 2, which is not described herein again, but mainly differs therefrom in that: the wake-up signal is sent out by the wake-up circuit 5 when the timing time set by the second processor 2 is reached; specifically, the second processor 2 sets a timing time of the wake-up circuit 5, the wake-up circuit 5 sends a wake-up signal (internal wake-up signal) to the power module 3 after reaching the timing time, the power module 3 wakes up the first processor 1 after receiving the internal wake-up signal, and the first processor 1 executes a preset task. The preset task executed by the first processor 1 may be set by the second processor 2, for example, the task may be to wake up the second processor 2 through the power module 3, and at this time, the first processor 1 may also be in communication connection with the second processor 2; specifically, after the second processor 2 fails to execute a certain task, the timing time of the wake-up circuit 5 is set, the task of the first processor 1 is set to wake up the second processor 2 after being woken up, when the timing time set by the second processor 2 is reached, the wake-up circuit 5 sends an internal wake-up signal to the power module 3, then the power module 3 supplies power to the first processor 1 to wake up the first processor 1, after the first processor 1 is woken up, the power module 3 is controlled to supply power to the second processor 2, and the second processor 2 executes the task which has failed to be executed last time again.

It should be noted that, in the embodiment, referring to fig. 6, the wake-up circuit 5 may be connected to the first processor 1 and the second processor 2 at the same time.

It should be noted that, in this embodiment, the power module 3 in the control system may receive a wake-up signal (internal wake-up signal) sent by a wake-up circuit in the control system and a wake-up signal (external wake-up signal) sent by an external circuit outside the control system at the same time.

In this embodiment, the wake-up circuit in the control system generates a wake-up signal, as opposed to the first embodiment.

A third embodiment of the invention relates to a control method. The third embodiment is a refinement on the basis of the first embodiment, and the main refinements are as follows: the present embodiment provides a specific implementation manner in which the first processor 1 controls the power module 3 to supply power to the functional module according to the external wake-up signal.

In this embodiment, as shown in fig. 7, the control system further includes at least one functional module 6 (a plurality of external circuits 4 are taken as an example) connected to the power module 3, the number of the external circuits 4 connected to the power module 3 is multiple, the multiple external circuits 4 are connected to the same pin of the power module 3, and the functional module 5 is, for example, an external device connected to the power module 3.

The specific flow of the control method in this embodiment is shown in fig. 8.

Step 202 to step 204 are substantially the same as step 101 to step 103, and are not described herein again, the main difference is that step 201 is added, which is specifically as follows:

step 201, after being awakened by the power module receiving the awakening signal, determining the external circuit outputting the awakening signal according to the acquired output signals of the plurality of external circuits, and controlling the power module to supply power to the functional module according to the external circuit outputting the awakening signal.

Specifically, a plurality of external circuits 4 are connected to the same pin of power module 3, when power module 3 receives at least one wake-up signal through the pin, power module 3 supplies power to first processor 1, wake-up first processor 1, first processor 1 is awakened, collect the output signal of the pin of power module 3 input to a plurality of external circuits 4, thereby external circuits 4 in power module 3 can be determined to output the wake-up signal, external circuits 4 correspond to functional modules 6, functional modules 6 which need to be woken up are determined according to external circuits 4 which output the wake-up signal, power module 3 is controlled to supply power to functional modules 6 which need to be woken up, wherein the wake-up signal output by one external circuit 4 corresponds to one functional module 6, or the wake-up signal output by a plurality of external circuits 4 corresponds to one functional module 6. The power module 3 includes a plurality of power supply units 31, each power supply unit 31 corresponds to one functional module 6, so that the first processor 1 controls the power supply unit 31 in the power module 3 to supply power to the corresponding functional module 6. The first processor 1 and the second processor 2 may also monitor output signals of different functional modules 6, respectively, to determine whether each functional module 6 works normally, so that when a certain functional module 6 fails to work normally, and when a task is executed next time, the power supply module 3 is controlled to supply power to the functional module 6 which fails to work normally again, that is, the functional module 6 is awakened again.

Compared with the first embodiment, the wake-up signal received by the power module is sent by the external circuit connected to the power module, the number of the external circuits is multiple, and when the first processor is awakened by the power module receiving the wake-up signal, the first processor collects the wake-up signals output to the power module by the multiple external circuits, so that which external circuit outputs the wake-up signal can be determined, and the power module is controlled to supply power to the functional module.

A fourth embodiment of the invention relates to a control method. The fourth embodiment is a refinement of the first embodiment, and the main refinements are as follows: this embodiment provides a specific implementation of determining whether the second processor needs to be woken up.

In the present embodiment, there are two ways to determine whether the second processor needs to be awakened, specifically as follows;

in the first mode, a specific flow of the control method is shown in fig. 9.

The

steps

301 and 303 are substantially the same as the

steps

101 and 103, and the main difference is that the step 302 includes the following sub-steps:

sub-step 3021, in the course of executing the task, obtains an evaluation value characterizing the operating state of the processor.

Specifically, the first processor 1 acquires an evaluation value representing the operating state of the first processor 1 during the execution of the task and before the preset task is not completed, the evaluation value being, for example, a load factor or a temperature of the first processor 1.

And a sub-step 3022 of determining whether the evaluation value is greater than a first preset threshold. If yes, go to step 303; if not, the process is ended directly.

Specifically, the first processor 1 determines whether the evaluated value is greater than a first predetermined threshold, and if the evaluated value is greater than the first predetermined threshold, the evaluated value is taken as the load factor of the first processor 1, it means that the first processor 1 is fully loaded and has low working efficiency, and the second processor 2 needs to be awakened to execute the current task, step 303 is entered, the power module 3 is controlled to supply power to the second processor 2, to wake up the second processor 2, after the second processor 2 is woken up, the first processor 1 and the second processor 2 negotiate about the task to be executed, send the unfinished part of the preset task to the second processor 2 (at this time, the first processor 1 and the second processor 2 are connected in communication), the second processor 2 executes the unfinished part of the preset task, therefore, the problem that the execution efficiency of the task is influenced due to overhigh load of the first processor 1, and the task execution fails or the task execution time is increased is avoided; if not, the current load of the first processor 1 is normal, and the unfinished task can be continuously executed.

It should be noted that, in this embodiment, the load rate and the temperature of the first processor 1 may be collected at the same time, and when the load rate or the temperature is greater than the corresponding preset threshold, it is indicated that the second processor 2 needs to be awakened to execute the current task

In the second embodiment, a specific flow of the control method is shown in fig. 10.

The main difference between

steps

401 and 403 and

steps

101 and 103 is that step 402 specifically includes:

step 402, in the process of executing the task, determining whether the task needs to be executed by the second processor. If yes, go to step 403; if not, the process is ended directly.

Specifically, in the process of executing the task, the first processor 1 determines whether the preset task needs to be executed by the second processor 2, that is, determines whether a function or processed data that needs to be woken up by the second processor 2 exists in the preset task, determines that the second processor 2 needs to be woken up if the function or processed data that needs to be processed by the second processor 2 exists, and proceeds to step 403, controls the power module 3 to supply power to the second processor 2 to wake up the second processor 2, wakes up the corresponding function or processes the corresponding data after the second processor 2 is woken up, and the function or processed data that needs to be woken up by the second processor 2 may be sent to the second processor 2 by the first processor 1 or be preset in the second processor 2; when the task is executed, if the task does not need to be executed by the second processor, it indicates that the preset task does not have a function or processed data that needs to be awakened by the second processor 2, and the first processor 1 alone completes the execution of the preset task.

In this embodiment, the first mode and the second mode may be combined to further improve the wake-up mechanism of the second processor 2.

This embodiment provides a specific implementation for determining whether the second processor needs to be woken up, compared to the first embodiment. The present embodiment can be further refined based on the second or third embodiment, and can achieve a uniform technical effect.

A fifth embodiment of the present invention relates to a control method. The fifth embodiment is an improvement on the fourth embodiment, and the main improvements are as follows: a determination is added as to whether the second processor is in a sleep state.

Fig. 11 shows a specific flow of the control method according to the present embodiment.

The

steps

501, 502, and 504 are substantially the same as the steps 101 to 103, and the main difference is that a step 503 is added, which is specifically as follows:

in step 503, it is determined whether the second processor is in a sleep state. If yes, go to step 504; if not, the process is ended directly.

Specifically, when the first processor 1 determines that the second processor 2 needs to be woken up, it indicates that the evaluation value of the first processor 1 is greater than a preset first threshold or that a function or processed data that needs to be woken up by the second processor 2 exists in a preset task executed by the first processor 1, determines whether the second processor 2 is in a sleep state, and if it is determined that the second processor 2 is in the sleep state, the process proceeds to step 504 to wake up the second processor 2 through the power module 3.

In this embodiment, the ways for the first processor 1 to determine whether the second processor 2 is in the sleep state include the following two ways:

in the first mode, the first processor 1 sends a verification message to the second processor 2, when receiving the verification message, the second processor 2 returns a reply message to the first processor 1 if the second processor is in a working state, and when receiving the reply message returned by the second processor 2, the first processor 1 indicates that the second processor 2 is in the working state, and can directly negotiate with the second processor 2 about a task to be completed; otherwise, it means that the second processor 2 is in a sleep state, and after the second processor 2 needs to be awakened through the power module 3, the task to be completed is negotiated with the second processor 2.

In the second mode, the first processor 1 acquires the power supply voltage input to the second processor 2 by the power module 3, judges whether the power supply voltage is matched with a second preset threshold value, and judges that the power supply voltage is matched with the second preset threshold value when the absolute value of the difference value between the power supply voltage and the second preset threshold value is within a preset value, so that the second processor 2 is in a working state and can directly negotiate with the second processor 2 about a task to be completed; otherwise, it means that the second processor 2 is in a sleep state, and after the second processor 2 needs to be awakened through the power module 3, the task to be completed is negotiated with the second processor 2.

Compared with the fourth embodiment, the present embodiment determines whether the second processor is in the sleep state before waking up the second processor, so as to avoid that the first processor repeatedly wakes up the second processor, that is, avoid wasting the resources of the first processor.

Referring to fig. 12, the control system includes at least one first processor 1, at least one second processor 2, and a power module 3 respectively connected to the first processor 1 and the second processor 2, wherein the control system may be a battery management system of an electric vehicle. In addition, the first processor 1 and the second processor 2 may also be communicatively connected to perform data interaction.

The power module 3 is configured to wake up the first processor 1 when receiving the wake-up signal.

The first processor 1 is used for executing the control method in any one of the first to fifth embodiments.

As can be understood by those skilled in the art, the control system further includes components such as an external power supply 7 and a power protection module 8, after the external power supply 7 outputs a voltage to the power module 3, the power module 3 can generate different regulated voltages according to the voltage output by the external power supply 7, and each regulated voltage corresponds to a working voltage of different components, so that each component can work normally; the power protection module 8 comprises one or any plurality of the following circuits connected in series: the circuit comprises a filter circuit, an anti-reverse circuit, a clamping circuit and an ESD protection circuit; the filter circuit is used for filtering alternating current components in external voltage output by the external power supply 7 and keeping direct current components in the external voltage as much as possible, the anti-reverse circuit can be a diode and can prevent the external power supply 7 from damaging the power supply module 3 when reversely connected, the clamp circuit is used for outputting the external power supply to the external voltage clamp of the power supply module 3 and is located at preset voltage, and the ESD protection circuit can effectively prevent large ESD from impacting the power supply module 3.

In one example, the first processor 1 may be a coprocessor, and the second processor 2 may be a main processor, so that the power module 3 preferentially wakes up the coprocessor in the control system when receiving the wake-up signal, and the power consumption of the coprocessor is low, so that the power consumption of the whole control system is as low as possible.

Since the first to fifth embodiments correspond to the present embodiment, the present embodiment can be implemented in cooperation with the first to fifth embodiments. The related technical details mentioned in the first to fifth embodiments are still valid in this embodiment, and the technical effects achieved in the first to fifth embodiments can also be achieved in this embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related-art details mentioned in the present embodiment can also be applied to the first to fifth embodiments.

It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples for carrying out the invention, and that various changes in form and details may be made therein without departing from the spirit and scope of the invention in practice.

Claims

1. A control method is characterized in that the control method is applied to at least one first processor of a control system, the control system further comprises at least one second processor and power modules respectively connected with the first processor and the second processor; the method comprises the following steps:

after being awakened by the power supply module which receives the awakening signal, executing a preset task;

judging whether the second processor needs to be awakened or not in the process of executing the task;

and when the second processor is judged to need to be awakened, controlling the power supply module to supply power to the second processor.

2. The control method of claim 1, wherein the control system further comprises a wake-up circuit connected to the power module and the first processor, respectively; the wake-up signal is sent out by the wake-up circuit when the timing time set by the first processor is reached.

3. The control method according to claim 1, wherein the control system further comprises a wake-up circuit respectively connected to the power module and the second processor; the wake-up signal is sent out by the wake-up circuit when the timing time set by the second processor is reached.

4. The control method according to claim 1, wherein the wake-up signal is sent by an external circuit connected to the power supply module, the number of the external circuits is plural, and the control system further comprises at least one functional module connected to the power supply module; the method further comprises the following steps:

after the power module receiving the wake-up signal wakes up, the external circuit outputting the wake-up signal is determined according to the collected output signals of the plurality of external circuits, and the power module is controlled to supply power to the functional module according to the external circuit outputting the wake-up signal.

5. The control method according to claim 1, wherein the determining whether the second processor needs to be woken up during the task execution comprises:

acquiring an evaluation value representing the working state of the first processor in the process of executing the task;

and if the evaluation value is larger than a first preset threshold value, judging that the second processor needs to be awakened to execute the task.

6. The control method according to claim 1, wherein the determining whether the second processor needs to be awakened during the process of executing the task specifically includes:

in the process of executing the task, judging whether the task needs to be executed by the second processor; and if the task needs to be executed by the second processor, judging that the second processor needs to be awakened.

7. The method of claim 1, further comprising, prior to said waking up the second processor by the power module:

judging whether the second processor is in a dormant state or not;

and if the second processor is in a dormant state, entering the step of awakening the second processor through the power module.

8. The method of claim 7, wherein the determining whether the second processor is in a sleep state comprises:

sending a verification message to the second processor;

and if the reply message returned by the second processor is not received, judging that the second processor is in a dormant state.

9. The method of claim 7, wherein the determining whether the second processor is in a sleep state comprises:

collecting the power supply voltage input to the second processor by the power supply module;

and when the input voltage is matched with a second preset threshold value, determining that the second processor is in a dormant state.

10. The control method according to claim 3, wherein the task is set by the second processor.

11. The control method according to claim 5, wherein the evaluation value is a load factor or a temperature.

12. A control system, comprising: the system comprises at least one first processor, at least one second processor and a power module which is respectively connected with the first processor and the second processor;

the power supply module is used for waking up the first processor when receiving a wake-up signal;

the first processor is configured to execute the control method of any one of claims 1 to 11.

13. The control system of claim 12, wherein the control system is a battery management system.

14. The control system of claim 12, wherein the first processor is a co-processor and the second processor is a main processor.