CN111881640A - Electrically programmable fuse system and programming method and reading method thereof - Google Patents
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- G06F30/30—Circuit design
- G06F30/34—Circuit design for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
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- G06F30/392—Floor-planning or layout, e.g. partitioning or placement
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- G—PHYSICS
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Abstract
The invention provides an electrically programmable fuse system, a programming method and a reading method thereof. The storage module comprises a plurality of storage units and a plurality of first comparators, wherein the storage units are arranged in an array form. The reference module comprises a plurality of reference units which are linearly arranged and a second comparator. In the invention, each row of storage units is connected with one reference unit to form a reference module, and the circuit design of the reference module is the same as that of each row of storage units, so that the layout area can be saved in typesetting, and the unified operation is easy in the process of making the layout. In addition, when the data of each row of the storage units are read, the reference current value of the reference module is only needed to be read once to serve as a unified comparison value of the storage current values, so that the read power consumption is low, the consistency of the reference current values can be ensured, and the read reliability is improved.
Description
Technical Field
The invention relates to the technical field of integrated circuit manufacturing, in particular to an electrically programmable fuse system and a programming method and a reading method thereof.
Background
Electrically Programmable fuse (e-fuse) technology is a technology developed by utilizing the electro-migration (EM) characteristic. The initial resistance of the electric fuse is small, and when a large current passes through the electric fuse, the electric fuse is blown, and the resistance value is multiplied and is in a high resistance state. The blown fuse remains permanently in the off state, while the unblown fuse remains in the on state, i.e., the low resistance state. Thus, the memory cell array formed by the electrical fuse is a one-time programming device that is programmed by the blowing of the electrical fuse to obtain the corresponding logic value.
However, in order to meet the requirement of expanding the storage capacity, the existing electrically programmable fuse array increases the storage unit to expand the capacity, and simultaneously, the problems of overlarge layout area and increased overall power consumption occur, which not only affects the reliability of reading the storage data, but also is not beneficial to the development of miniaturization of the device.
Therefore, a new electrically programmable fuse system is needed to solve the problems of large layout area and high power consumption in read operation, thereby improving the performance of the device.
Disclosure of Invention
The invention aims to provide an electrically programmable fuse system, a programming method and a reading method thereof, which aim to solve the problems of large occupied layout area and high power consumption of reading operation.
In order to solve the technical problem, the invention provides an electrically programmable fuse system, which comprises a storage module and a reference module; the storage module comprises a plurality of storage units and a plurality of first comparators, wherein the storage units are arranged in an array form; the reference module comprises a plurality of reference units which are linearly arranged and a second comparator; wherein the content of the first and second substances,
each memory cell in the same row is connected with the same reference cell through a word line, and each memory cell in the same column is connected with the same first comparator through a bit line; the plurality of reference cells are connected to the second comparator through a bit line.
Optionally, in the electrically programmable fuse system, each of the memory cells and each of the reference cells includes an electrical fuse and a control pipe.
Optionally, in the electrically programmable fuse system, one end of the electrical fuse is connected to the drain of the control pipe, and the other end of the electrical fuse is connected to the bit line.
Optionally, in the electrically programmable fuse system, the gates of the control tubes in the memory cells in the same row and the gates of the control tubes of the reference cells connected to the row are both connected to the word line connected to the memory cells in the row.
Optionally, in the electrically programmable fuse system, the sources of the control transistors in the memory cell and the reference cell are both grounded.
Optionally, in the electrically programmable fuse system, the second comparator is connected to each of the first comparators.
Optionally, in the electrically programmable fuse system, the number of the first comparators is equal to the number of columns of the memory module; the number of reference cells is equal to the number of rows of the memory module.
Based on the same inventive concept, the invention also provides a programming method of the electrically programmable fuse system, which comprises the following steps: and the bit line connected with the memory cell to be programmed is accessed with a first voltage signal, and the word line connected with the memory cell to be programmed is accessed with a second voltage signal, so that the programming of the single memory cell is completed.
Optionally, in the programming method of the electrically programmable fuse system, the first voltage signal is a constant voltage, and the second voltage signal is a pulse voltage.
Based on the same inventive concept, the invention also provides a reading method of the electrically programmable fuse system, which comprises the following steps:
a word line connected with a row of memory cells to be read is accessed to a third voltage signal to conduct each memory cell and the reference cell in the row connected with the word line;
the first comparator connected with each memory cell of the row acquires a corresponding memory current value, and the second comparator connected with the reference cell acquires a reference current value;
and all the first comparators compare the magnitude of the respective storage current value with the reference current value and convert the storage current value into a logic value to be output so as to finish the reading of the storage units in the row.
In summary, the present invention provides an electrically programmable fuse system, a programming method and a reading method thereof, wherein the electrically programmable fuse system includes a memory module and a reference module. The storage module comprises a plurality of storage units and a plurality of first comparators, wherein the storage units are arranged in an array form. The reference module comprises a plurality of reference units which are linearly arranged and a second comparator. Each memory cell in the same row is connected with the same reference cell through a word line, and each memory cell in the same column is connected with the same first comparator through a bit line. The plurality of reference cells are connected to the second comparator through a bit line. In the invention, each row of storage units is connected with one reference unit to form a reference module, and the circuit design of the reference module is the same as that of each row of storage units, so that the layout area can be saved in typesetting, and the unified operation is easy in the process of making the layout. In addition, when the data of each row of the storage units are read, the reference current value of the reference module is only needed to be read once to serve as a unified comparison value of the storage current values, so that the read power consumption is low, the consistency of the reference current values can be ensured, and the read reliability is improved.
Drawings
FIG. 1 is a schematic diagram of an SA module of an electrically programmable fuse system according to the present application;
FIG. 2 is a schematic diagram of an electrically programmable fuse system of the present application;
FIG. 3 is a schematic diagram of an electrically programmable fuse system according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an electrically programmable fuse system with two reference blocks according to an embodiment of the present invention;
wherein the reference numbers indicate:
10-a storage module; 20-a reference module;
100-a memory cell; 101-electrical fuses within memory cells; 102-control tubes within the storage unit;
200-a reference cell; 201 — electrical fuses within reference cells; 202-control tube within reference cell;
300-a comparator; 301-a first comparator; 302-second comparator.
Detailed Description
In an electrically programmable fuse system, as shown in fig. 1 and 2, a memory cell 100 is connected to a Sense Amplifier (SA) module, which includes a reference cell 200 and a comparator 300. The comparator 300 is configured to compare the storage current value provided by the memory cell 100 with the reference current value provided by the reference cell 200, and determine the resistance state of the electrical fuse 101 in the memory cell 100 according to the comparison of the current values. When the electrical fuse 101 is in a high resistance state, i.e. the resistance of the electrical fuse 101 in the memory cell 100 is greater than the resistance of the electrical fuse 201 in the reference cell 200, a logic value "1" is output from the output DO of the amplifier 300; when the resistance of the electrical fuse 101 in the memory cell 100 is lower than that of the electrical fuse 201 in the reference cell 200 when the electrical fuse 101 is in the low resistance state, a logic value "0" is output from the output DO of the amplifier 300. In addition, the reference unit 200 is not only used for providing a reference current, but also used for controlling the operation timing of the comparator 300, thereby reducing the power consumption in the non-operation stage.
However, since each column of the memory cells 100 is connected to one SA module, and each SA module includes one reference cell 200 and one comparator 300, the layout area is enlarged as the capacity of the electrically programmable fuse system is enlarged. In addition, when reading a logic value, each reference cell 200 provides a respective reference current, which not only causes the reference value to be non-uniform and affects the reliability of reading, but also increases the power consumption during reading.
Therefore, the present embodiment provides an electrically programmable fuse system, and a programming method and a reading method thereof, so as to solve the problems of large layout area, high power consumption and low accuracy of the reading operation.
The electrically programmable fuse system and the programming method and the reading method thereof according to the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention. Further, the structures illustrated in the drawings are often part of actual structures. In particular, the drawings may have different emphasis points and may sometimes be scaled differently.
Referring to fig. 3, the electrically programmable fuse system includes a memory block 10 and a reference block 20. The memory module comprises a plurality of memory units 100 and a plurality of first comparators 301, wherein the memory units 100 are arranged in an array. The reference module 20 includes a plurality of reference cells 200 arranged in a linear manner and a second comparator 302. Each memory cell 100 in the same row is connected to the same reference cell 200 through a word line, and each memory cell 100 in the same column is connected to the same first comparator 301 through a bit line; the plurality of reference cells 200 are connected to the second comparator 302 via a bit line.
Further, as shown in fig. 3, each memory cell 100 in the first row is connected to the same reference cell 200 via a word line WL 1. Each memory cell 100 in the second row is connected to the same reference cell 200 by a word line WL 2. Each memory cell 100 in the mth row is connected to the same reference cell 200 by a word line WLm. Each memory cell 100 of the first column is connected to the same first comparator 301 through a bit line BL 1. Each of the memory cells 100 in the second column is connected to the same first comparator 301 through a bit line BL 2. Each memory cell 100 in the nth column is connected to the same first comparator 301 through a bit line BLn. m of the reference cells 200 are connected to the second comparator 302 through a bit line BL ref.
Wherein the memory cell 100 includes an electrical fuse 101 and a control pipe 102, and the reference cells 200 each include an electrical fuse 201 and a control pipe 202. Optionally, the control tube 102 is an NMOS tube. Therefore, compared with the prior art, the electrically programmable fuse system provided by the present embodiment removes the reference cell 200 in the original SA module, and separately sets a reference module 20, and the reference module 20 provides the reference value in a unified manner. The reference module 20 is composed of a plurality of reference cells 200, and its internal structure is the same as that of the memory cells 100 of each column, so it is convenient in the manufacturing process. Therefore, by arranging the reference module 20, the area of the whole layout is saved structurally; functionally, the consistency of the reference current is ensured, and the power consumption in the reading operation process is reduced.
With continued reference to fig. 3, one end of the electrical fuse 101 in the memory cell 100 is connected to the drain of the control pipe 102, and the other end of the electrical fuse 101 is connected to the bit line of the column of the memory cell 100. The gates of the control transistors 102 in each memory cell 100 in the same row are connected to the word line in the row. One end of the electrical fuse 201 in the reference cell 200 is connected to the drain of the control pipe 202, and the other end of the electrical fuse 201 is connected to the bit line BL ref of the column of the reference cell 200. The gate of the control transistor 202 is connected to the word line of the row of the reference cell 200.
Specifically, word line WL1 of the first row connects the gates of all memory cells 100 of the row and one reference cell 200 of the row. The word line WL2 of the second row connects the gates of all the memory cells 100 of the row and one of the reference cells 200 of the row. The word line WLm of the mth row connects the gates of all the memory cells 100 of the row and one of the reference cells 200 of the row. One end of the electrical fuse 101 of a first column is connected to form a bit line BL1, and the bit line BL1 is connected to the first comparator 301 of the column. One end of each of the electric fuses 101 of the first column is connected to a bit line BL1, and the bit line BL1 is connected to the first comparator 301 of the column. One end of each of the electrical fuses 101 in the second column is connected to a bit line BL2, and the bit line BL2 is connected to the first comparator 301 in the column. One end of each of the electric fuses 101 in the nth column is connected to a bit line BLn, and the bit line BL2 is connected to the first comparator 301 in the column. One end of the e-fuse 201 in each of the m reference cells 200 is connected to a bit line BL ref, which is connected to the second comparator 302.
Further, the sources of the control transistors 102 in the memory cell 100 and the reference cell 200 are both grounded, and the second comparator 302 is connected to each of the first comparators 301 in turn.
The electrically programmable fuse system provided in the present embodiment does not limit the number of reference blocks 10. Referring to fig. 4, in the memory module of the 16 × 32 array, in order to prevent the variation of the reference value of each row caused by process variation and voltage drop (IR drop), a reference module 20 is added outside the leftmost and rightmost rows of the memory module 10, and each reference module 20 can provide a reference value for the row of 16-way memory cells 100.
In order to verify the technical effect of the electrically programmable fuse system provided by the present embodiment, the applicant formed a 16 × 32 array of 512-bit electrically programmable fuse systems in a conventional design manner of the electrically programmable fuse system and in a design manner of the electrically programmable fuse system provided by the present embodiment, respectively, and made comparative simulations. The simulation environment is HL28HKC process, the CORE (VDD) voltage is 0.9V, and the same decoding circuit, word line driving circuit and bit line driving circuit are adopted for the two. In the read mode, the simulated current value of the electrically programmable fuse system provided by the present embodiment is reduced by 31%. From the layout area, although the electrically programmable fuse system provided in this embodiment increases the area of the reference block 20, the layout area of the reference cells 200 in each SA block is reduced (32 in total), so that the overall layout area is reduced by 15%. Therefore, the electrically programmable fuse system provided by the embodiment can significantly reduce the layout area, and reduce the power consumption of the read operation,
based on the same inventive concept, the present embodiment further provides a programming method of an electrically programmable fuse system, including: the bit line connected to the memory cell 100 to be programmed is connected to a first voltage signal, and the word line connected to the memory cell 100 to be programmed is connected to a second voltage signal, so as to complete the programming of a single memory cell 100. For example, when the memory cell in row 2 and column 4 is selected for programming, the bit line BL4 in column 4 is connected to a first voltage signal, and the word line WL2 in row 2 is connected to a second voltage signal, so that the electrical fuse 101 is blown or turned on by turning on the control pipe 102. When blown, the electrical fuse 101 changes from a low resistance state to a high resistance state; when turned on, the electrical fuse 101 remains in a low resistance state, thereby enabling programming of the individual memory cells.
Further, the first voltage signal is a constant voltage, and the second voltage signal is a pulse voltage. Specifically, the first voltage signal is a programming voltage, and the second voltage signal is a working voltage. The first voltage signal and the second voltage signal have different selected values under different process conditions, for example, a programming voltage of 1.8V and an operating voltage of 0.9V on a 28nm process platform; on a 40nm process platform, the programming voltage is 2.5V, and the working voltage is 1.1V. Preferably, in this embodiment, the first voltage signal is 1.8V, and the second voltage signal is 0-0.9V.
Based on the same inventive concept, the present embodiment further provides a reading method of an electrically programmable fuse system, including: the word line connected to the memory cell 100 to be read is connected to a third voltage signal to turn on each of the memory cells 100 and the reference cell 200 in the same row connected to the word line.
The first comparator 301 connected to each memory cell 100 in the same row obtains a corresponding stored current value, the two comparators 302 connected to the reference cells 200 obtain a reference current value, and the first comparator 301 connected to each memory cell 100 in the row compares the stored current value with the reference current value and converts the values into logic values to be output, so as to complete the reading of the memory cells in the row. Further, the value of the third voltage signal is greater than or equal to the turn-on voltage of the control tube 102. When the electrical fuse 101 of the memory cell 100 is blown, i.e. in a high-resistance state, the logic value output by the first comparator 301 is "1"; when the electrical fuse 101 of the memory cell 100 is not blown and is in a conducting state, i.e. a low resistance state, the logic value output by the first comparator 301 is "0".
In summary, the present invention provides an electrically programmable fuse system, a programming method and a reading method thereof, in which the electrically programmable fuse system connects a reference cell 200 to each row of memory cells 100 to form a reference block 20, and the circuit design of the reference block 20 is the same as that of each column of memory cells 100, so that not only the layout area can be saved in the layout, but also the uniform operation is easy in the layout process. In addition, when reading the data of each row of the memory cells 100, only the reference current value of the reference module 20 needs to be read once as the uniform comparison value of the stored current values, so that not only is the read power consumption low, but also the consistency of the reference current values can be ensured, so as to improve the read reliability.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. An electrically programmable fuse system, comprising a memory block and a reference block; the storage module comprises a plurality of storage units and a plurality of first comparators, wherein the storage units are arranged in an array form; the reference module comprises a plurality of reference units which are linearly arranged and a second comparator; wherein the content of the first and second substances,
each memory cell in the same row is connected with the same reference cell through a word line, and each memory cell in the same column is connected with the same first comparator through a bit line; the plurality of reference cells are connected to the second comparator through a bit line.
2. The electrically programmable fuse system of claim 1, wherein each of the memory cells and each of the reference cells comprises an electrical fuse and a control pipe.
3. The electrically programmable fuse system of claim 2, wherein one end of the electrical fuse is connected to the drain of the control pipe and the other end of the electrical fuse is connected to the bit line.
4. An electrically programmable fuse system according to claim 2, characterized in that the gates of the control transistors in the memory cells of the same row and the gates of the control transistors of the reference cells connected to the row are connected to the word line connected to the memory cells of the row.
5. The electrically programmable fuse system of claim 2, wherein the sources of the control transistors in the memory cell and the reference cell are both grounded.
6. The electrically programmable fuse system of claim 1, wherein the second comparator is connected to each of the first comparators.
7. The electrically programmable fuse system of claim 1, wherein the number of first comparators is equal to the number of columns of the memory module; the number of reference cells is equal to the number of rows of the memory module.
8. A programming method of an electrically programmable fuse system, characterized in that the electrically programmable fuse system of any one of claims 1 to 7 is used, and the programming method of the electrically programmable fuse system comprises: and the bit line connected with the memory cell to be programmed is accessed with a first voltage signal, and the word line connected with the memory cell to be programmed is accessed with a second voltage signal, so that the programming of the single memory cell is completed.
9. The method of programming an electrically programmable fuse system of claim 8, wherein the first voltage signal is a constant voltage and the second voltage signal is a pulsed voltage.
10. A method for reading an electrically programmable fuse system, wherein the electrically programmable fuse system according to any one of claims 1 to 7 is used, and the method for reading the electrically programmable fuse system comprises:
a word line connected with a row of memory cells to be read is accessed to a third voltage signal to conduct each memory cell and the reference cell in the row connected with the word line;
the first comparator connected with each memory cell of the row acquires a corresponding memory current value, and the second comparator connected with the reference cell acquires a reference current value;
and all the first comparators compare the magnitude of the respective storage current value with the reference current value and convert the storage current value into a logic value to be output so as to finish the reading of the storage units in the row.
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