CN111835304B - Transconductance operational amplifier for analog front end of sensor - Google Patents
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Abstract
The invention relates to a transconductance operational amplifier for an analog front end of a sensor, which is characterized by comprising the following components: the load current mirror output module is connected with the input shunt module and the input shunt module in sequence, wherein the floating ground voltage source module is of an overturning voltage follower structure; the input shunt module generates small-signal current according to the input differential voltage signal and shunts the small-signal current, wherein the current with a larger proportion is led into a grounding terminal, and the current with a smaller proportion is input into the load current mirror output module; the load current mirror output module generates corresponding mirror output current according to the input current with smaller proportion. The transconductance operational amplifier reduces the equivalent transconductance of the input differential tube to the original value through the input shunt module and the load current mirror output module
Under proper direct current bias, when N and M are large enough, the transconductance value of the amplifier can be reduced to nS level, and the linearity is high while low transconductance is realized.
Description
Technical Field
The invention belongs to the technical field of design of an analog front end of a sensor, and particularly relates to a transconductance operational amplifier for the analog front end of the sensor.
Background
Currently, the integrated circuit used in the medical field receives more and more attention and research, and wearable devices capable of monitoring physiological signals in real time are one of the most potential development directions. The front-end processing circuit of the sensor determines the quality of the acquired signal and the final monitoring result to some extent. The use of a filter for removing interference signals other than the target signal is an important loop in the analog front-end circuit.
In common physiological signals, the frequency of a photoplethysmographic signal is 0.6 to 16Hz, the frequency of respiration is 0.1 to 10Hz, the frequency of an electrocardiosignal is about 0.01 to 250Hz, and the frequency of a heart sound signal is 5 to 2kHz. It can be seen that the physiological signal frequency is in the low frequency range. To achieve a lower cut-off frequency, conventional filters require larger passive devices (mainly resistors and capacitors), which are costly to implement in an integrated circuit.
At present, various schemes are tried to realize a fully integrated low-cut-off frequency filter, and the application of a Gm-C filter to medium and high frequencies is mature, but for processing low-frequency physiological signals, although some research results exist, a stable amplifier structure and a mature design method are lacked, and further exploration is still needed. For a Gm-C filter, the key part determining its cut-off frequency is Gm/C, where Gm is the equivalent transconductance value of the amplifier.
Therefore, it is necessary to provide a Gm-C filter with very low transconductance and high linearity to achieve a low cut-off frequency.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a transconductance operational amplifier for an analog front end of a sensor. The technical problem to be solved by the invention is realized by the following technical scheme:
the invention provides a transconductance operational amplifier for an analog front end of a sensor, which comprises: the floating ground voltage source module, the input shunt module and the load current mirror output module are connected in sequence, wherein,
the floating ground voltage source module is of an overturning voltage follower structure and is used for providing a constant voltage difference between an input tube grid of the input shunt module and a pair tube source electrode thereof;
the input shunt module generates a small signal current according to an input differential voltage signal and shunts the small signal current, wherein a larger proportion of the current is led into a ground terminal, and a smaller proportion of the current is input to the load current mirror output module;
the load current mirror output module generates corresponding mirror image output current according to the input current with the smaller proportion;
wherein the current of smaller proportion is the current of small signal
The mirror output current is ^ of the small-signal current>
M represents the ratio of the width-length ratio of two MOS tubes in the input shunt module, N represents the ratio of the width-length ratio of two MOS tubes in the load current mirror output module, M, N is an integer greater than or equal to 1, and the value of M, N is selected according to the required transconductance value of the transconductance operational amplifier.
In one embodiment of the invention, the input tube grid and the pair tube source of the input shunt module are cross-coupled through the floating ground voltage source module.
In one embodiment of the present invention, the floating ground voltage source module includes: a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor and a current source,
the first MOS tube and the second MOS tube are both PMOS tubes, and the third MOS tube and the fourth MOS tube are both NMOS tubes;
the source electrode of the first MOS tube and the source electrode of the second MOS tube are both connected with analog voltage;
the drain electrode of the first MOS tube is connected with the source electrode of the third MOS tube, and the grid electrode of the first MOS tube is connected with the drain electrode of the third MOS tube;
the drain electrode of the second MOS tube is connected with the source electrode of the fourth MOS tube, and the grid electrode of the second MOS tube is connected with the drain electrode of the fourth MOS tube;
the drain electrodes of the third MOS tube and the fourth MOS tube are connected with the first end of the current source, and the second end of the current source is connected with the grounding end;
and the drain electrode of the first MOS tube, the drain electrode of the second MOS tube, the grid electrode of the third MOS tube and the grid electrode of the fourth MOS tube are used as differential voltage signal output ends of the floating ground voltage source module.
In one embodiment of the present invention, the input shunting module includes a fifth MOS transistor, a sixth MOS transistor, a seventh MOS transistor, and an eighth MOS transistor, wherein,
the fifth MOS transistor, the sixth MOS transistor, the seventh MOS transistor and the eighth MOS transistor are all PMOS transistors, and the ratio of the width-to-length ratio of the fifth MOS transistor to the sixth MOS transistor and the ratio of the width-to-length ratio of the eighth MOS transistor to the seventh MOS transistor are all M;
the source electrode of the fifth MOS tube and the source electrode of the sixth MOS tube are both connected with the drain electrode of the first MOS tube, and the grid electrode of the fifth MOS tube and the grid electrode of the sixth MOS tube are both connected with the grid electrode of the fourth MOS tube;
the source electrode of the seventh MOS tube and the source electrode of the eighth MOS tube are both connected with the drain electrode of the second MOS tube, and the grid electrode of the seventh MOS tube and the grid electrode of the eighth MOS tube are both connected with the grid electrode of the third MOS tube;
the drain electrodes of the fifth MOS tube and the eighth MOS tube are both connected with the grounding terminal;
and the drain electrodes of the sixth MOS tube and the seventh MOS tube are used as the current output ends of the input shunt module with smaller proportion.
In one embodiment of the present invention, the load current mirror output module includes a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a twelfth MOS transistor, a thirteenth MOS transistor and a fourteenth MOS transistor, wherein,
the ninth MOS transistor, the tenth MOS transistor, the eleventh MOS transistor and the twelfth MOS transistor are NMOS transistors, and the thirteenth MOS transistor and the fourteenth MOS transistor are PMOS transistors;
the ratio of the width to the length of the tenth MOS transistor to the width to the length of the ninth MOS transistor and the ratio of the width to the length of the eleventh MOS transistor to the width to the length of the twelfth MOS transistor are both N;
the sources of the ninth MOS transistor, the tenth MOS transistor, the eleventh MOS transistor and the twelfth MOS transistor are all connected to the ground terminal;
the drain electrode of the ninth MOS tube is connected with the drain electrode of the thirteenth MOS tube, and the grid electrode of the ninth MOS tube is connected with the grid electrode of the tenth MOS tube;
the drain electrode of the tenth MOS tube is respectively connected with the grid electrode of the tenth MOS tube and the drain electrode of the sixth MOS tube;
the drain electrode of the eleventh MOS tube is respectively connected with the grid electrode of the eleventh MOS tube and the drain electrode of the seventh MOS tube;
the drain electrode of the twelfth MOS tube is connected with the drain electrode of the fourteenth MOS tube, and the grid electrode of the twelfth MOS tube is connected with the grid electrode of the eleventh MOS tube;
the source electrodes of the thirteenth MOS tube and the fourteenth MOS tube are both connected with analog voltage, and the grid electrodes of the thirteenth MOS tube and the fourteenth MOS tube are both connected with common-mode feedback voltage.
Compared with the prior art, the invention has the beneficial effects that:
1. according to the transconductance operational amplifier for the analog front end of the sensor, the grid electrode of the input tube of the input shunt module and the source electrode of the pair tube of the input shunt module are in cross coupling through the floating voltage source module, so that the linearity of the transmission characteristic is greatly improved and the linear input range is expanded compared with that of a traditional source-coupled differential pair;
2. the transconductance operational amplifier for the analog front end of the sensor reduces the equivalent transconductance of the input differential tube to the original value through the input shunt module and the load current mirror output module
Under proper direct current bias, when N and M are large enough, the transconductance value of the amplifier can be reduced to nS level, and the linearity is high while low transconductance is realized.
The foregoing description is only an overview of the technical solutions of the present invention, and in order to make the technical means of the present invention more clearly understood, the present invention may be implemented in accordance with the content of the description, and in order to make the above and other objects, features, and advantages of the present invention more clearly understood, the following preferred embodiments are described in detail with reference to the accompanying drawings.
Drawings
Fig. 1 is a schematic block diagram of a transconductance operational amplifier for an analog front end of a sensor according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a floating ground voltage source module according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a transconductance operational amplifier for an analog front end of a sensor according to an embodiment of the present invention.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, a transconductance operational amplifier for an analog front end of a sensor according to the present invention is described in detail below with reference to the accompanying drawings and the detailed description.
The foregoing and other technical matters, features and effects of the present invention will be apparent from the following detailed description of the embodiments, which is to be read in connection with the accompanying drawings. The technical means and effects of the present invention adopted to achieve the predetermined purpose can be more deeply and specifically understood through the description of the specific embodiments, however, the attached drawings are provided for reference and description only and are not used for limiting the technical scheme of the present invention.
Example one
Referring to fig. 1, fig. 1 is a block diagram of a transconductance operational amplifier for an analog front end of a sensor according to an embodiment of the present invention. As shown in the figure, the transconductance operational amplifier for the sensor analog front end of the embodiment includes: the device comprises a floating ground voltage source module 1, an input shunt module 2 and a load current mirror output module 3 which are connected in sequence. The floating ground voltage source module 1 is an inverted voltage follower structure and is used for providing a constant voltage difference between an input tube grid of the input shunt module 2 and a pair of tube source electrodes thereof; the input shunt module 2 generates a small-signal current according to the input differential voltage signal and shunts the small-signal current, wherein a larger proportion of the current is led into a ground terminal, and a smaller proportion of the current is input into the load current mirror output module 3; the load current mirror output module 3 generates a corresponding mirror output current according to the input current with a smaller proportion.
In which the current of smaller proportion is small-signal current
With mirror output current being small signal current
M represents the ratio of the width-length ratio of two MOS tubes in the input shunt module 2, N represents the ratio of the width-length ratio of two MOS tubes in the load current mirror output module 3, M, N is an integer greater than or equal to 1, and the value of M, N is selected according to the required transconductance value of the transconductance operational amplifier.
In this embodiment, the input tube gates and the pair tube sources of the input shunt module 2 are cross-coupled through the floating ground voltage source module 1, so that the linearity of the transmission characteristic is greatly improved and the linear input range is expanded compared with the conventional source-coupled differential pair.
The floating ground voltage source module 1 adopts an inverted voltage follower structure, ignores short channel effect and body effect, can provide stable voltage difference and ultralow output impedance, can normally work under very low power supply voltage compared with the traditional source follower, and is more suitable for circuits powered by low voltage.
In the transconductance operational amplifier for the analog front end of the sensor of the embodiment, the equivalent transconductance of the input differential tube is reduced to 1/(N (M + 1)) through the input shunt module 2 and the load current mirror output module 3, and under a proper direct current bias, when N and M are sufficiently large, the order of the transconductance value of the amplifier can be reduced to nS level, and high linearity is achieved while low transconductance is achieved.
Referring to fig. 2 and fig. 3 in combination, fig. 2 is a schematic structural diagram of a floating ground voltage source module according to an embodiment of the present invention, and fig. 3 is a schematic structural diagram of a transconductance operational amplifier for a sensor analog front end according to an embodiment of the present invention. As shown in the figure, the floating ground voltage source module 1 of the present embodiment includes: first MOS pipe M1, second MOS pipe M2, third MOS pipe M3, fourth MOS pipe M4 and current source I B . The first MOS transistor M1 and the second MOS transistor M2 are both PMOS transistors, and the third MOS transistor M3 and the fourth MOS transistor M4 are both NMOS transistors.
The source electrode of the first MOS tube M1 and the source electrode of the second MOS tube M2 are both connected with an analog voltage AVDD; the drain electrode of the first MOS tube M1 is connected with the source electrode of the third MOS tube M3, and the grid electrode of the first MOS tube M1 is connected with the drain electrode of the third MOS tube M3; the drain electrode of the second MOS tube M2 is connected with the source electrode of the fourth MOS tube M4, and the grid electrode of the second MOS tube M2 is connected with the drain electrode of the fourth MOS tube M4; the drain electrodes of the third MOS tube M3 and the fourth MOS tube M4 are both connected with a current source I B A first terminal of (1), a current source I B The second end of (b) is connected to ground AGND; the drain electrode of the first MOS transistor M1, the drain electrode of the second MOS transistor M2, the gate electrode of the third MOS transistor M3, and the gate electrode of the fourth MOS transistor M4 serve as differential voltage signal output ends of the floating voltage power module 1.
Further, the input shunting module 2 includes a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, and an eighth MOS transistor M8. The fifth MOS transistor M5, the sixth MOS transistor M6, the seventh MOS transistor M7 and the eighth MOS transistor M8 are PMOS transistors, and the ratio of the width-to-length ratio of the fifth MOS transistor M5 to the sixth MOS transistor M6 and the ratio of the width-to-length ratio of the eighth MOS transistor M8 to the seventh MOS transistor M7 are M.
The source electrode of the fifth MOS transistor M5 and the source electrode of the sixth MOS transistor M6 are both connected with the drain electrode of the first MOS transistor M1, and the grid electrode of the fifth MOS transistor M5 and the grid electrode of the sixth MOS transistor M6 are both connected with the grid electrode of the fourth MOS transistor M4; a source electrode of the seventh MOS transistor M7 and a source electrode of the eighth MOS transistor M8 are both connected to the drain electrode of the second MOS transistor M2, and a gate electrode of the seventh MOS transistor M7 and a gate electrode of the eighth MOS transistor M8 are both connected to the gate electrode of the third MOS transistor M3; drains of the fifth MOS transistor M5 and the eighth MOS transistor M8 are both connected to the ground terminal AGND; the drains of the sixth MOS transistor M6 and the seventh MOS transistor M7 are used as the current output terminals of the input shunt module 2 with a smaller proportion.
Further, the load current mirror output module 3 includes a ninth MOS transistor M9, a tenth MOS transistor M10, an eleventh MOS transistor M11, a twelfth MOS transistor M12, a thirteenth MOS transistor M13, and a fourteenth MOS transistor M14. The ninth MOS transistor M9, the tenth MOS transistor M10, the eleventh MOS transistor M11, and the twelfth MOS transistor M12 are all NMOS transistors, and the thirteenth MOS transistor M13 and the fourteenth MOS transistor M14 are all PMOS transistors. The ratio of the width to length ratio of the tenth MOS transistor M10 to the ninth MOS transistor M9, and the ratio of the width to length ratio of the eleventh MOS transistor M11 to the twelfth MOS transistor M12 are both N. The ninth MOS transistor M9 and the tenth MOS transistor M10, and the eleventh MOS transistor M11 and the twelfth MOS transistor M12 respectively constitute a current mirror structure, and the thirteenth MOS transistor M13 and the fourteenth MOS transistor M14 respectively serve as loads of the current mirror structure.
The source electrodes of the ninth MOS transistor M9, the tenth MOS transistor M10, the eleventh MOS transistor M11 and the twelfth MOS transistor M12 are all connected to the ground terminal AGND; the drain electrode of the ninth MOS transistor M9 is connected to the drain electrode of the thirteenth MOS transistor M13, and the gate electrode is connected to the gate electrode of the tenth MOS transistor M10; the drain electrode of the tenth MOS transistor M10 is connected to the gate electrode thereof and the drain electrode of the sixth MOS transistor M6, respectively; the drain electrode of the eleventh MOS tube M11 is respectively connected with the grid electrode thereof and the drain electrode of the seventh MOS tube M7; the drain electrode of the twelfth MOS tube M12 is connected with the drain electrode of the fourteenth MOS tube M14, and the grid electrode of the twelfth MOS tube M12 is connected with the grid electrode of the eleventh MOS tube M11; the sources of the thirteenth MOS transistor M13 and the fourteenth MOS transistor M14 are both connected to the analog voltage AVDD, and the gates are both connected to the common-mode feedback voltage CMFB.
In this embodiment, the common mode feedback voltage CMFB is provided by a common mode feedback circuit, and the common mode feedback circuit detects an output common mode level and compares the output common mode level with a reference voltage to generate a common mode feedback voltage CMFB signal, so as to control the output common mode level of the transconductance operational amplifier and improve the common mode rejection ratio of the amplifier.
It should be noted that all the MOS transistors in the circuit structure of the transconductance operational amplifier of this embodiment are in the saturation region. The transconductance operational amplifier of this embodiment may adjust the ratio M of the width-to-length ratios of the two MOS transistors in the input shunt module 2 and the ratio N of the width-to-length ratios of the two MOS transistors in the load current mirror output module 3 according to a desired transconductance value. In this embodiment, when M =10n =10, the equivalent transconductance value of the transconductance operational amplifier is in the order of nS.
Specifically, the principle of implementing the low transconductance and high linearity of the transconductance operational amplifier for the analog front end of the sensor according to the embodiment of the present invention is specifically described as follows:
as shown in fig. 3, the input differential voltage signal is connected to VIN and VIP ports of the input shunting module 2, and taking the signal input to VIN port as an example, the generated small signal current is shunted by the fifth MOS transistor M5 and the sixth MOS transistor M6 in a ratio M of width-to-length ratio of the fifth MOS transistor M5 to the sixth MOS transistor M6, a large ratio current is conducted to the ground, and a small ratio current I is conducted O1 Input to negativeAnd the input end of the current-carrying mirror output module 3. Since the equivalent transconductance is the ratio of the output current to the input voltage, the equivalent transconductance is reduced from the equivalent transconductance before the shunting
The load current mirror output module 3 generates corresponding mirror current I according to the input current O2 Generating a mirror current I O2 Determined by the ratio N of the width-to-length ratios of the tenth MOS transistor M10 to the ninth MOS transistor M9,
at this point, the equivalent transconductance drops to>
When N and M are taken large enough, the order of magnitude of the transconductance value of the transconductance operational amplifier can be reduced to nS order.
The grid electrodes of the input tubes of the input shunt module 2 and the source stages of the input tubes of the input shunt module are cross-coupled through the floating ground voltage source module 1, and the voltage generated by the floating ground voltage source module 1 is Ve + Vt.
The sixth MOS transistor M6 and the seventh MOS transistor M7 are matched and work in a saturation region, and then the current I flowing through the sixth MOS transistor M6 1 And source-gate voltage V of sixth MOS transistor M6 sg1 A current I flowing through the seventh MOS transistor M7 2 Source grid voltage V of seventh MOS tube M7 sg2 Respectively is as follows:
I 1 ＝β(V sg1 +V t ) 2 (formula 1);
I 2 ＝β(V sg2 +V t ) 2 (formula 2);
V sg1 ＝V e +V t +V id (formula 3);
V sg2 ＝V e +V t -V id (formula 4);
wherein, beta represents the current gain factor of the MOS tube, V id Representing the input differential signal.
From the above formula, one can obtain:
I 1 ＝β(V e +V id ) 2 (formula 5);
I 2 ＝β(V e -V id ) 2 (formula 6);
I d ＝4βV e V id (formula 7);
wherein, I d The differential current generated by the sixth MOS transistor M6 and the seventh MOS transistor M7 is shown.
In the conventional method of improving the linearity of the transconductance operational amplifier by using the source degeneration structure,
where κ represents the subthreshold slope factor, ξ represents the width-to-length ratio of the input tube to the transistor used for source degeneration, I b Indicating the DC bias current, V, of the MOS transistor T Indicating thermal voltage, V Δ Representing the effect of substrate bias effects on the threshold voltage.
From equation 7, the output current of the input shunt module 2 is a linear function of the input voltage, the transconductance g m ＝4V e Compared with the traditional source level degradation mode, the cross-coupled floating ground voltage source module 1 is introduced, the linearity of the transconductance operational amplifier is greatly improved, and the THD parameter value of the output signal obtained through simulation is reduced by more than one time.
As shown in fig. 2, the floating ground voltage source module 1 is an inverted voltage follower structure, and its specific principle is as follows:
compared with the traditional CMOS source follower structure, the structure reduces the circuit complexity and is suitable for a circuit with low-voltage power supply. The output impedance R of the voltage source 0 Comprises the following steps:
wherein, g m3 Represents the transconductance value, g, of the first MOS transistor M1 m4 Represents the transconductance value, g, of the third MOS transistor M3 mb4 Represents the back gate transconductance r of the third MOS transistor M3 o4 Is the output resistance of the third MOS transistor M3.
As can be seen from equation 9, the output impedance R is 0 Is much smaller than the output impedance of the source follower, so the structure is closer to an ideal floating ground voltage source.
When the input voltage changes, the gate-source voltage of the third MOS transistor M3 and the fourth MOS transistor M4 is kept constant. The sixth MOS transistor M6, the seventh MOS transistor M7, the third MOS transistor M3 and the fourth MOS transistor M4 are matched, then,
linear input range of
By regulating current source I B The value of (c) can adjust the transconductance value of the transconductance operational amplifier and the size of the linear input range.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Furthermore, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that an article or device that comprises a list of elements does not include only those elements but may include other elements not expressly listed. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of additional like elements in an article or apparatus that comprises the element. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (5)
1. A transconductance operational amplifier for an analog front end of a sensor, comprising: a floating ground voltage source module (1), an input shunt module (2) and a load current mirror output module (3) which are connected in sequence, wherein,
the floating ground voltage source module (1) is of an overturning voltage follower structure and is used for providing a constant voltage difference between an input tube grid and a pair tube source electrode of the input shunt module (2);
the input shunt module (2) generates a small signal current according to the input differential voltage signal and shunts the small signal current, wherein a larger proportion of the current is led into a ground terminal, and a smaller proportion of the current is input into the load current mirror output module (3);
the load current mirror output module (3) generates corresponding mirror output current according to the input current with the smaller proportion;
wherein the current of smaller proportion is the current of small signal
The mirror output current is ^ or greater than the small-signal current>
M represents the ratio of the width-length ratio of the two MOS tubes in the input shunt module (2), N represents the ratio of the width-length ratio of the two MOS tubes in the load current mirror output module (3), M, N is an integer greater than or equal to 1, and the value of M, N is selected according to the required transconductance value of the transconductance operational amplifier.
2. The transconductance operational amplifier for a sensor analog front end according to claim 1, characterized in that the input tube gates of the input shunt module (2) and their pair tube sources are cross-coupled by the floating voltage source module (1).
3. The transconductance operational amplifier for a sensor analog front end according to claim 1, characterized in that said floating ground voltage source module (1) comprises: first MOS tube (M1), second MOS tube (M2), third MOS tube (M3), fourth MOS tube (M4) and current source (I) B ) Wherein, in the step (A),
the first MOS transistor (M1) and the second MOS transistor (M2) are both PMOS transistors, and the third MOS transistor (M3) and the fourth MOS transistor (M4) are both NMOS transistors;
the source electrode of the first MOS tube (M1) and the source electrode of the second MOS tube (M2) are both connected with an Analog Voltage (AVDD);
the drain electrode of the first MOS tube (M1) is connected with the source electrode of the third MOS tube (M3), and the grid electrode of the first MOS tube is connected with the drain electrode of the third MOS tube (M3);
the drain electrode of the second MOS tube (M2) is connected with the source electrode of the fourth MOS tube (M4), and the grid electrode of the second MOS tube is connected with the drain electrode of the fourth MOS tube (M4);
the drain electrodes of the third MOS tube (M3) and the fourth MOS tube (M4) are connected with the current source (I) B ) The first terminal of (a), the current source (I) B ) Is connected to ground (AGND);
the drain electrode of the first MOS tube (M1), the drain electrode of the second MOS tube (M2), the grid electrode of the third MOS tube (M3) and the grid electrode of the fourth MOS tube (M4) are used as differential voltage signal output ends of the floating ground voltage source module (1).
4. The operational transconductance amplifier for an analog front end of a sensor according to claim 3, characterized in that said input shunting module (2) comprises a fifth MOS transistor (M5), a sixth MOS transistor (M6), a seventh MOS transistor (M7) and an eighth MOS transistor (M8), wherein,
the fifth MOS transistor (M5), the sixth MOS transistor (M6), the seventh MOS transistor (M7) and the eighth MOS transistor (M8) are all PMOS transistors, and the ratio of the width-to-length ratio of the fifth MOS transistor (M5) to the sixth MOS transistor (M6) and the ratio of the width-to-length ratio of the eighth MOS transistor (M8) to the seventh MOS transistor (M7) are both M;
the source electrode of the fifth MOS transistor (M5) and the source electrode of the sixth MOS transistor (M6) are both connected with the drain electrode of the first MOS transistor (M1), and the grid electrode of the fifth MOS transistor (M5) and the grid electrode of the sixth MOS transistor (M6) are both connected with the grid electrode of the fourth MOS transistor (M4);
the source electrode of the seventh MOS transistor (M7) and the source electrode of the eighth MOS transistor (M8) are both connected with the drain electrode of the second MOS transistor (M2), and the grid electrode of the seventh MOS transistor (M7) and the grid electrode of the eighth MOS transistor (M8) are both connected with the grid electrode of the third MOS transistor (M3);
the drains of the fifth MOS transistor (M5) and the eighth MOS transistor (M8) are both connected to the ground terminal (AGND);
the drain electrodes of the sixth MOS tube (M6) and the seventh MOS tube (M7) are used as the current output ends of the input shunt module (2) with smaller proportion.
5. The operational transconductance amplifier for a sensor analog front end according to claim 4, wherein the load current mirror output module (3) comprises a ninth MOS transistor (M9), a tenth MOS transistor (M10), an eleventh MOS transistor (M11), a twelfth MOS transistor (M12), a thirteenth MOS transistor (M13) and a fourteenth MOS transistor (M14),
the ninth MOS transistor (M9), the tenth MOS transistor (M10), the eleventh MOS transistor (M11) and the twelfth MOS transistor (M12) are NMOS transistors, and the thirteenth MOS transistor (M13) and the fourteenth MOS transistor (M14) are PMOS transistors;
the ratio of the width to length ratio of the tenth MOS transistor (M10) to the ninth MOS transistor (M9) and the ratio of the width to length ratio of the eleventh MOS transistor (M11) to the twelfth MOS transistor (M12) are both N;
the sources of the ninth MOS transistor (M9), the tenth MOS transistor (M10), the eleventh MOS transistor (M11) and the twelfth MOS transistor (M12) are all connected with the ground terminal (AGND);
the drain electrode of the ninth MOS tube (M9) is connected with the drain electrode of the thirteenth MOS tube (M13), and the grid electrode of the ninth MOS tube is connected with the grid electrode of the tenth MOS tube (M10);
the drain electrode of the tenth MOS tube (M10) is respectively connected with the grid electrode thereof and the drain electrode of the sixth MOS tube (M6);
the drain electrode of the eleventh MOS transistor (M11) is respectively connected with the grid electrode of the eleventh MOS transistor and the drain electrode of the seventh MOS transistor (M7);
the drain electrode of the twelfth MOS tube (M12) is connected with the drain electrode of the fourteenth MOS tube (M14), and the grid electrode of the twelfth MOS tube is connected with the grid electrode of the eleventh MOS tube (M11);
the source electrodes of the thirteenth MOS tube (M13) and the fourteenth MOS tube (M14) are both connected with an Analog Voltage (AVDD), and the grid electrodes are both connected with a common mode feedback voltage (CMFB).
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