CN111833931B - Magnetic random access memory and preparation method thereof - Google Patents

Magnetic random access memory and preparation method thereof Download PDF

Info

Publication number
CN111833931B
CN111833931B CN201910323534.0A CN201910323534A CN111833931B CN 111833931 B CN111833931 B CN 111833931B CN 201910323534 A CN201910323534 A CN 201910323534A CN 111833931 B CN111833931 B CN 111833931B
Authority
CN
China
Prior art keywords
tunnel junction
magnetic tunnel
junction structure
bit line
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201910323534.0A
Other languages
Chinese (zh)
Other versions
CN111833931A (en
Inventor
曹明霞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Industrial Utechnology Research Institute
Original Assignee
Shanghai Industrial Utechnology Research Institute
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Industrial Utechnology Research Institute filed Critical Shanghai Industrial Utechnology Research Institute
Priority to CN201910323534.0A priority Critical patent/CN111833931B/en
Publication of CN111833931A publication Critical patent/CN111833931A/en
Application granted granted Critical
Publication of CN111833931B publication Critical patent/CN111833931B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/165Auxiliary circuits
    • G11C11/1653Address circuits or decoders
    • G11C11/1655Bit-line or column circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)

Abstract

The invention provides a magnetic random access memory and a preparation method thereof, wherein the preparation method comprises the following steps: a magnetic tunnel junction structure; a word line connected with a top of the magnetic tunnel junction structure; a read bit line in contact with a bottom of the magnetic tunnel junction structure; a write bit line on a second side of the magnetic tunnel junction structure having a spacing from both the read bit line and the word line; the U-shaped metamagnet connecting structure comprises a bottom edge part and a side wall part; the bottom edge part is positioned below the reading bit line and transversely crosses the reading bit line along a first direction; the top of the sidewall portion on the first side of the magnetic tunnel junction structure is connected to a word line, the top of the sidewall portion on the second side of the magnetic tunnel junction structure is connected to a write bit line, and the bottom of the sidewall portion is connected to a bottom edge. According to the invention, the U-shaped variable magnet connecting structure is arranged, and the magnetic field generated by the current flowing through the U-shaped variable magnet connecting structure assists the overturning of the magnetic tunnel junction structure, so that the current required by the overturning of the magnetic tunnel junction structure is reduced, and the required write-in current is further reduced.

Description

Magnetic random access memory and preparation method thereof
Technical Field
The invention belongs to the technical field of semiconductor storage structures, and particularly relates to a magnetic random access memory and a preparation method thereof.
Background
Existing magnetic random access memories include several Magnetic Tunnel Junction Structures (MTJs) as memory cells, in which the magnetic state of a free ferromagnetic layer may depend on the magnetic field induced by the current of the word and bit lines connected thereto. The current required by the inversion of the magnetic tunnel junction structure of the existing magnetic random access memory is large, so that the problem of large required writing current is caused; if the current required by the turning of the magnetic tunnel junction structure is reduced, the size of the magnetic tunnel junction structure needs to be made larger, so that the requirement of miniaturization development of a device is not facilitated.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a magnetic random access memory and a method for manufacturing the same, which are used to solve the problems of the prior art that the current required for flipping the magnetic tunnel junction structure is large, which results in a large required write current, and the current required for flipping the magnetic tunnel junction structure needs to be reduced, which is unfavorable for the miniaturization of the device.
To achieve the above and other related objects, the present invention provides a magnetic random access memory, comprising:
a magnetic tunnel junction structure comprising opposing first and second sides;
a word line connected to a top of the magnetic tunnel junction structure and extending in a first direction perpendicular to a height direction of the magnetic tunnel junction structure;
a read bit line contacting a bottom of the magnetic tunnel junction structure and extending in a second direction, the second direction being perpendicular to both the height direction of the magnetic tunnel junction structure and the first direction;
a write bit line on a second side of the magnetic tunnel junction structure having a spacing from both the read bit line and the word line; the write bit line extends in the second direction;
the U-shaped metamagnet connecting structure comprises a bottom edge part and a side wall part; the bottom edge portion is located below the read bit line, and the bottom edge portion crosses the read bit line along the first direction; the sidewall portions are respectively located on a first side and a second side of the magnetic tunnel junction structure, a top of the sidewall portion located on the first side of the magnetic tunnel junction structure is connected with the word line, a top of the sidewall portion located on the second side of the magnetic tunnel junction structure is connected with the write bit line, and bottoms of the sidewall portions located on the first side and the second side of the magnetic tunnel junction structure are connected with the bottom edge.
Optionally, the number of the magnetic tunnel junction structures is multiple, and the multiple magnetic tunnel junction structures are arranged at intervals in multiple rows and multiple columns along the first direction and the second direction;
the number of the word lines is multiple, and each word line sequentially connects the magnetic tunnel junction structures arranged at intervals along the first direction in series;
the number of the read bit lines is multiple, and each row of the magnetic tunnel junction structures arranged at intervals along the second direction are sequentially connected in series by each read bit line;
the number of the U-shaped variogram connecting structures is multiple, and each U-shaped variogram connecting structure and each magnetic tunnel junction structure are arranged in a one-to-one correspondence manner;
the number of the write bit lines is multiple, the write bit lines and the read bit lines are alternately arranged along the first direction in sequence, and the write bit lines are respectively located on the same side of the magnetic tunnel junction structures arranged along the second direction in rows at intervals.
Optionally, the magnetic random access memory further includes an insulating protection layer, where the insulating protection layer is filled between adjacent word lines, between adjacent U-shaped varactor connection structures, between adjacent magnetic tunnel junction structures, between the read bit line and the write bit line, between the write bit line and the word line, and between the bottom edge portion and the read bit line.
Optionally, the bottom edge portion has a spacing from a bottom of the read bit line.
Optionally, the sidewall portion is in contact with a sidewall of the magnetic tunnel junction structure.
Optionally, the magnetic tunnel junction structure comprises:
a pinned ferromagnetic layer;
an antiferromagnetic layer located on a surface of the pinned ferromagnetic layer;
a free ferromagnetic layer on a side of the pinned ferromagnetic layer away from the antiferromagnetic layer;
an insulating tunnel barrier layer between the pinned ferromagnetic layer and the free ferromagnetic layer.
The invention also provides a preparation method of the magnetic random access memory, which comprises the following steps:
providing a substrate;
forming a bottom edge part of a U-shaped metamagnet connecting structure on the upper surface of the substrate, wherein the bottom edge part extends along a first direction;
forming an insulating medium layer on the upper surface of the substrate and the surface of the bottom edge part, wherein the insulating medium layer covers the upper surface of the substrate and the surface of the bottom edge part;
forming a reading bit line on the upper surface of the insulating medium layer, wherein the reading bit line extends along the second direction, and the second direction is perpendicular to the first direction; the reading bit line crosses the bottom edge part;
forming a magnetic tunnel junction structure on the read bit line corresponding to the upper surface of the bottom edge portion, the magnetic tunnel junction structure including a first side and a second side opposite to each other;
forming an insulating protective layer on the upper surface of the insulating medium layer, wherein the insulating protective layer covers the upper surface of the insulating medium layer and the magnetic tunnel junction structure, and the upper surface of the insulating protective layer is flush with the upper surface of the magnetic tunnel junction structure;
forming a through hole and a groove in the insulating protective layer and the insulating medium layer, wherein the through hole is respectively positioned at the first side and the second side of the magnetic tunnel junction structure and penetrates through the insulating protective layer and the insulating medium layer along the thickness direction of the insulating protective layer and the insulating medium layer to expose the bottom edge part; the groove is located on the second side of the magnetic tunnel junction structure and communicated with the top of the through hole located on the second side of the magnetic tunnel junction structure;
forming a side wall part and a write bit line of the U-shaped metamagnet connecting structure in the through hole, wherein the bottom of the side wall part is connected with the bottom edge part; the write bit line extends along the second direction, the write bit line is connected with the top of the sidewall part at the second side of the magnetic tunnel junction structure;
and forming a word line on the upper surface of the insulating protection layer, wherein the word line extends along the first direction, the word line is connected with the upper surface of the magnetic tunnel junction structure and the upper surface of the side wall part positioned at the first side of the magnetic tunnel junction structure, and the word line and the writing bit line have a distance.
Optionally, forming a magnetic tunnel junction structure on the read bit line corresponding to the upper surface of the bottom edge portion includes the following steps:
and sequentially forming an antiferromagnetic layer, a pinned ferromagnetic layer, an insulating tunnel barrier layer and a free ferromagnetic layer which are sequentially attached from bottom to top on the upper surface of the read bit line corresponding to the bottom edge part.
As described above, the magnetic random access memory and the method for manufacturing the same of the present invention have the following advantages:
according to the magnetic random access memory, the U-shaped variodel connecting structure is arranged, and a magnetic field generated by current flowing through the U-shaped variodel connecting structure assists the magnetic tunnel junction structure to turn over, so that current required by the magnetic tunnel junction structure to turn over is reduced, and required write-in current is further reduced; meanwhile, the side wall parts of the U-shaped variable magnet connecting structure are positioned at two opposite sides of the magnetic tunnel junction structure, and a double equidirectional magnetic field can be generated on the magnetic tunnel junction structure by passing current once in the U-shaped variable magnet connecting structure, so that the current required by the overturning of the magnetic tunnel junction structure is further reduced, and the required writing current is further reduced; the size of the magnetic random access memory is smaller than that of the existing magnetic random access memory, and can be obviously reduced to 7 nm-10 nm compared with that of the existing magnetic random access memory.
Drawings
Fig. 1 is a flowchart illustrating a method for manufacturing a magnetic random access memory according to an embodiment of the invention.
Fig. 2 is a schematic partial perspective view of a magnetic random access memory according to a second embodiment of the invention.
Fig. 3 is a schematic diagram showing a three-dimensional structure of a magnetic tunnel junction structure in a magnetic random access memory according to a second embodiment of the present invention.
Description of the element reference numerals
10 substrate
11 write bit line
12U-shaped variable magnet connecting structure
121 bottom edge
122 side wall part
13 read bit line
14 magnetic tunnel junction structure
141 antiferromagnetic layer
142 pinned ferromagnet
143 insulating tunnel barrier layer
144 free ferromagnetic layer
15 word line
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and although the drawings only show the components related to the present invention and are not drawn according to the number, shape and size of the components in the actual implementation, the type, quantity and proportion of the components in the actual implementation may be changed arbitrarily, and the layout of the components may be complicated.
Example one
Referring to fig. 1, the present invention provides a method for manufacturing a magnetic random access memory, which includes the steps of:
1) providing a substrate;
2) forming a bottom edge part of a U-shaped metamagnet connecting structure on the upper surface of the substrate, wherein the bottom edge part extends along a first direction;
3) forming an insulating medium layer on the upper surface of the substrate and the surface of the bottom edge part, wherein the insulating medium layer covers the upper surface of the substrate and the surface of the bottom edge part;
4) forming a reading bit line on the upper surface of the insulating medium layer, wherein the reading bit line extends along the second direction, and the second direction is perpendicular to the first direction; the reading bit line crosses the bottom edge part;
5) forming a magnetic tunnel junction structure on the read bit line corresponding to the upper surface of the bottom edge portion, the magnetic tunnel junction structure including a first side and a second side opposite to each other;
6) forming an insulating protective layer on the upper surface of the insulating medium layer, wherein the insulating protective layer covers the upper surface of the insulating medium layer and the magnetic tunnel junction structure, and the upper surface of the insulating protective layer is flush with the upper surface of the magnetic tunnel junction structure;
7) forming a through hole and a groove in the insulating protective layer and the insulating medium layer, wherein the through hole is respectively positioned on the first side and the second side of the magnetic tunnel junction structure and penetrates through the insulating protective layer and the insulating medium layer along the thickness direction of the insulating protective layer and the insulating medium layer to expose the bottom edge part; the groove is located on the second side of the magnetic tunnel junction structure and communicated with the top of the through hole located on the second side of the magnetic tunnel junction structure;
8) forming a side wall part and a write bit line of the U-shaped metamagnet connecting structure in the through hole, wherein the bottom of the side wall part is connected with the bottom edge part; the write bit line extends along the second direction, and the write bit line is connected with the top of the side wall part at the second side of the magnetic tunnel junction structure;
9) forming a word line on the upper surface of the insulating protection layer, wherein the word line extends along the first direction, the word line is connected with the upper surface of the magnetic tunnel junction structure and the upper surface of the side wall part at the first side of the magnetic tunnel junction structure, and the word line and the writing bit line have a distance.
In step 1), referring to step S1 in fig. 1, the substrate 10 is provided.
By way of example, the substrate 10 may be selected according to actual requirements of a device, the substrate 10 may include any substrate that can serve as a support, and the substrate 10 may include a Silicon substrate, a Germanium (Ge) substrate, a Silicon Germanium (SiGe) substrate, an SOI (Silicon-on-Insulator) substrate, a GOI (Germanium-on-Insulator) substrate, or the like; preferably, in the present embodiment, the substrate 10 includes a silicon substrate.
In step 2), please refer to step S2 in fig. 1, a bottom edge 121 of the U-shaped metamagnet connection structure is formed on the upper surface of the substrate 10, and the bottom edge 121 extends along the first direction.
As an example, in step 2), forming the bottom edge 121 of the U-shaped metamagnet connection structure on the upper surface of the substrate 10 may include:
2-1) forming a conductive material layer (not shown) on the upper surface of the substrate 10;
2-2) patterning the conductive material layer by adopting a photoetching process to obtain a bottom edge part 121 of the U-shaped variable magnet connecting structure.
As an example, the material of the conductive material layer may include, but is not limited to, metal, that is, the material of the bottom edge 121 of the U-shaped metamagnet connecting structure may include, but is not limited to, metal.
As an example, the number of the bottom edge portions 121 formed on the upper surface of the substrate 10 in the step 2) may be set according to actual needs, and is not limited herein.
In step 3), please refer to step S3 in fig. 1, an insulating dielectric layer (not shown) is formed on the upper surface of the substrate 10 and the surface of the bottom edge portion 121, and the insulating dielectric layer covers the upper surface of the substrate 10 and the surface of the bottom edge portion 121.
As an example, the insulating dielectric Layer may be formed on the upper surface of the substrate 10 and the surface of the bottom edge portion 121 by using a Physical Vapor Deposition (PVD) process, a Chemical Vapor Deposition (CVD) process, or an Atomic Layer Deposition (ALD) process.
By way of example, the material of the insulating dielectric layer may include an oxide layer, a nitride layer, or an oxynitride layer, and for example, the insulating dielectric layer may include a silicon oxide layer, a silicon nitride layer, or an oxynitride layer, and the like.
In step 4), please refer to step S4 in fig. 1, forming a read bit line 13 on an upper surface of the insulating dielectric layer, where the read bit line 13 extends along the second direction, and the second direction is perpendicular to the first direction; the read bit line 13 crosses the bottom edge portion 121.
As an example, forming the read bit line 13 on the upper surface of the insulating dielectric layer may include the steps of:
4-1) forming a conductive material layer (not shown) on the upper surface of the insulating medium layer;
4-2) patterning the conductive material layer by adopting a photoetching process to obtain the reading bit line 13.
As an example, the material of the conductive material layer in step 4) may include, but is not limited to, metal, that is, the material of the read bit line 13 may include, but is not limited to, metal.
As an example, the number of the read bit lines 13 can be set according to actual needs. When the number of the read bit lines 13 is multiple, the multiple read bit lines 13 are arranged at intervals along the first direction; the number of the read bit lines 13 is the same as the number of the bottom edge portions 121, and each of the read bit lines 13 crosses a different one of the bottom edge portions 121.
In step 5), referring to step S5 in fig. 1, a magnetic tunnel junction structure 14 is formed on the upper surface of the read bit line 13 corresponding to the portion of the bottom edge portion 121, where the magnetic tunnel junction structure 14 includes a first side and a second side opposite to each other.
As an example, the number of the magnetic tunnel junction structures 14 is the same as the number of the read bit lines 13, and the magnetic tunnel junction structures 14 are arranged in one-to-one correspondence with the read bit lines 13.
As an example, forming a magnetic tunnel junction structure on the upper surface of the portion of the read bit line 13 corresponding to the bottom edge portion 121 includes the following steps:
an antiferromagnetic layer 141, a pinned ferromagnetic layer 142, an insulating tunnel barrier layer 143, and a free ferromagnetic layer 144 are sequentially formed on the upper surface of the read bit line 13 corresponding to the bottom edge portion 121.
As an example, the magnetic tunnel junction structure 14 may include a stacked structure formed by sequentially stacking the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 from bottom to top, as shown in fig. 3, or may include a plurality of stacked structures sequentially stacked one above another; that is, the magnetic tunnel junction structure 14 may be formed to include a stacked structure in which the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 are stacked in this order from bottom to top, or may include a plurality of stacked structures in which the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 are stacked in this order from bottom to top, and a plurality of the stacked structures are stacked in this order from top to bottom.
As an example, the magnetization direction of the pinned ferromagnetic layer 142 is fixed, the antiferromagnetic layer 141 is coupled to the pinned ferromagnetic layer 142 by antiferromagnetic effect, and the magnetization direction of the free ferromagnetic layer 144 can be freely switched between the same as or opposite to the magnetization direction of the pinned ferromagnetic layer 142.
In step 6), please refer to step S6 in fig. 1, an insulating protection layer (not shown) is formed on the upper surface of the insulating dielectric layer, the insulating protection layer covers the upper surface of the insulating dielectric layer and the magnetic tunnel junction structure 14, and the upper surface of the insulating protection layer is flush with the upper surface of the magnetic tunnel junction structure 14.
As an example, the insulating protection Layer may be formed on the upper surface of the insulating dielectric Layer by using a Physical Vapor Deposition (PVD) process, a Chemical Vapor Deposition (CVD) process, or an Atomic Layer Deposition (ALD) process.
As an example, the material of the insulating protective layer may include an oxide layer, a nitride layer, or an oxynitride layer, and for example, the insulating protective layer may include a silicon oxide layer, a silicon nitride layer, or an oxynitride layer, or the like.
In step 7), please refer to S7 in fig. 1, forming a via (not shown) and a trench (not shown) in the insulating protection layer and the insulating dielectric layer, where the via is respectively located at the first side and the second side of the mtj structure 14 and penetrates through the insulating protection layer and the insulating dielectric layer along the thickness direction of the insulating protection layer and the insulating dielectric layer to expose the bottom edge 121; the trench is located at the second side of the magnetic tunnel junction structure 14 and the trench is in communication with the top of the via located at the second side of the magnetic tunnel junction structure 14.
As an example, the via and the trench may be formed using a photolithography etching process.
By way of example, the via defines a sidewall portion of the U-shaped metamagnetic body connection structure to be subsequently formed, and the trench defines the write bit line to be subsequently formed.
In step 8), please refer to step S8 in fig. 1, forming the sidewall portion 122 of the U-shaped metamagnetic body connection structure 12 and the write bit line 11 in the through hole, wherein the bottom of the sidewall portion 122 is connected to the bottom edge portion 121; the write bit line 11 extends along the second direction, and the write bit line 11 is connected to the top of the sidewall portion 122 at the second side of the magnetic tunnel junction structure 14.
As an example, a deposition process is used to deposit a conductive material in the via hole to form the sidewall portion 122 and the write bit line 11, and the sidewall portion 122 located at two opposite sides of the magnetic tunnel junction structure 14 and the bottom edge portion 121 connected to the bottom thereof together form the U-shaped metamagnet connecting structure 12.
As an example, metal may be deposited in the via to form the sidewall portion 122 and the write bit line 11.
As an example, the upper surface of the sidewall portion 122 at the first side of the magnetic tunnel junction structure 14 may be flush with the upper surface of the magnetic tunnel junction structure 14, and the upper surface of the write bit line 11 is lower than the upper surface of the magnetic tunnel junction structure 14; that is, the upper surface of the sidewall portion 122 at the first side of the magnetic tunnel junction structure 14, the upper surface of the magnetic tunnel junction structure 14 and the upper surface of the insulating protection layer are all flush, and the upper surface of the write bit line 11 and the upper surface of the sidewall portion 122 at the second side of the magnetic tunnel junction structure 14 are both lower than the upper surface of the tunnel junction structure 14 and the upper surface of the insulating protection layer.
As an example, step 8) may be further followed by a step of filling the insulating protection layer in the trench.
As an example, in step 9), please refer to step S9 in fig. 1, a word line 15 is formed on the upper surface of the insulating protection layer, the word line 15 extends along the first direction, the word line 15 is connected to the upper surface of the magnetic tunnel junction structure 14 and the upper surface of the sidewall portion 122 located at the first time of the magnetic tunnel junction structure 14, and the word line 15 and the write bit line 11 have a distance therebetween, that is, the lower surface of the word line 15 and the upper surface of the write bit line 11 and the upper surface of the sidewall portion 122 located at the second side of the magnetic tunnel junction structure 14 have a distance therebetween.
As an example, forming the word line 15 on the upper surface of the insulating protection layer may include the following steps:
9-1) forming a conductive material layer (not shown) on the upper surface of the insulating protection layer;
9-2) patterning the conductive material layer by adopting a photoetching process to obtain the word line 15.
As an example, the material of the conductive material layer in step 9) may include, but is not limited to, metal, that is, the material of the word line 15 may include, but is not limited to, metal.
As an example, the number of the word lines 15 may be set according to actual needs, and the number of the word lines 15 may be one, as shown in fig. 2, or may be multiple. When the number of the word lines 15 is plural, each word line 15 sequentially connects the magnetic tunnel junction structures 14 arranged at intervals along the first direction in series.
In the magnetic random access memory prepared in this embodiment, by providing the U-shaped metamagnet connecting structure 12, a magnetic field generated by a current flowing through the U-shaped metamagnet connecting structure 12 assists in flipping of the magnetic tunnel junction structure 14, so that a current required for flipping of the magnetic tunnel junction structure 14 is reduced, and a required write current is further reduced; meanwhile, the side wall parts 122 of the U-shaped varactor connection structure 12 are located at two opposite sides of the magnetic tunnel junction structure 14, and a double equidirectional magnetic field can be generated on the magnetic tunnel junction structure 14 by one current in the U-shaped varactor connection structure 12, so that the current required for turning over the magnetic tunnel junction structure 14 is further reduced, and the required write current is further reduced; the size of the magnetic random access memory prepared by the preparation method of the magnetic random access memory is smaller than that of the existing magnetic random access memory, and can be obviously reduced to 7 nm-10 nm compared with that of the existing magnetic random access memory.
Example two
Referring to fig. 2 and 3, the present invention further provides a magnetic random access memory, including: a magnetic tunnel junction structure 14, said magnetic tunnel junction structure 14 comprising opposing first and second sides; a word line 15, the word line 15 being connected to a top of the magnetic tunnel junction structure 14 and extending along a first direction, the first direction being perpendicular to a height direction of the magnetic tunnel junction structure 14; a read bit line 13, the read bit line 13 being in contact with a bottom of the magnetic tunnel junction structure 14, and the read bit line 13 extending in a second direction, the second direction being perpendicular to both a height direction of the magnetic tunnel junction structure 14 and the first direction; a write bit line 11, the write word line 11 being on a second side of the magnetic tunnel junction structure 14, the write word line 11 having a spacing from both the read bit line 13 and the word line 15; the write bit line 11 extends in the second direction; a U-shaped metamagnet connecting structure 12, wherein the U-shaped metamagnet connecting structure 12 comprises a bottom edge part 121 and a side wall part 122; the bottom edge portion 121 crosses the read bit line 13 in the first direction; the sidewall portions 122 are respectively located at a first side and a second side of the magnetic tunnel junction structure 14, a top of the sidewall portion 122 located at the first side of the magnetic tunnel junction structure 14 is connected to the word line 15, a top of the sidewall portion 122 located at the second side of the magnetic tunnel junction structure 14 is connected to the write bit line 11, and bottoms of the sidewall portions 122 located at the first side and the second side of the magnetic tunnel junction structure 14 are connected to the bottom edge portion 121.
As an example, the number of the magnetic tunnel junction structures 14 is multiple, and multiple magnetic tunnel junction structures 14 are arranged at intervals in multiple rows and multiple columns along the first direction and the second direction; the number of the word lines 15 is multiple, and each word line 15 sequentially connects the magnetic tunnel junction structures 14 arranged at intervals along the first direction in series; the number of the read bit lines 13 is multiple, and each of the read bit lines 13 sequentially connects the magnetic tunnel junction structures 14 arranged at intervals along the second direction in series; the number of the U-shaped variable magnet connecting structures 12 is multiple, and each U-shaped variable magnet connecting structure 12 and each magnetic tunnel junction structure 14 are arranged in a one-to-one correspondence manner; the number of the write bit lines 11 is plural, the write bit lines 11 and the read bit lines 13 are alternately arranged along the first direction, and the write bit lines 11 are respectively located at the same side of the magnetic tunnel junction structures 14 arranged along the second direction.
As an example, the materials of the write word line 11, the U-shaped magnet connection structure 12 and the read bit line 13 all include conductive materials, and specifically, the materials of the write word line 11, the U-shaped magnet connection structure 12 and the read bit line 13 may include, but are not limited to, metals.
By way of example, the sidewall portion 122 may be in contact with a sidewall of the magnetic tunnel junction structure 14.
As an example, the upper surface of the write bit line 11 and the upper surface of the sidewall portion 122 at the second side of the magnetic tunnel junction structure 14 are spaced apart from the lower surface of the word line 15.
Illustratively, the bottom edge portion 122 is spaced from the bottom of the read bit line 13.
As an example, the magnetic random access memory further includes an insulating medium layer (not shown, i.e., the insulating medium layer in the first embodiment), which is at least located between the bottom edge portion 122 and the read bit line 13. Specifically, the insulating medium layer may be located on the upper surface of the write bit line 11.
As an example, the magnetic random access memory further includes an insulating protective layer (not shown, that is, the insulating protective layer in the first embodiment), and the insulating protective layer is filled between the adjacent word lines 15, between the adjacent U-shaped metamagnet connecting structures 12, between the adjacent magnetic tunnel junction structures 14, between the read bit line 13 and the write bit line 11, and between the write bit line 11 and the word lines 15.
By way of example, the insulating dielectric layer and the insulating protection layer may each include an oxide layer, a nitride layer, or an oxynitride layer, and for example, the insulating dielectric layer and the insulating protection layer may each include a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer, or the like.
As an example, as shown in fig. 3, the magnetic tunnel junction structure 14 includes: a pinned ferromagnetic layer 142; an antiferromagnetic 141, the pinned ferromagnetic layer 142 being located at a surface of the pinned ferromagnetic layer 142; a free ferromagnetic layer 144, the free ferromagnetic layer 144 being located on a side of the pinned ferromagnetic layer 142 away from the antiferromagnetic layer 141; an insulating tunnel barrier layer 143, the insulating tunnel barrier layer 143 being located between the pinned ferromagnetic layer 142 and the free ferromagnetic layer 144.
As an example, the magnetization direction of the pinned ferromagnetic layer 142 is fixed, the antiferromagnetic layer 141 is coupled to the pinned ferromagnetic layer 142 by an antiferromagnetic effect, and the magnetization direction of the free ferromagnetic layer 144 may be freely switched between the same direction as or opposite to the magnetization direction of the pinned ferromagnetic layer 142.
As an example, the magnetic tunnel junction structure 14 may include a stacked structure formed by sequentially stacking the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 from bottom to top, as shown in fig. 3, or may include a plurality of stacked structures sequentially stacked one above another; that is, the magnetic tunnel junction structure 14 may include a stacked structure in which the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 are stacked in this order from bottom to top, or may include a plurality of stacked structures in which the antiferromagnetic layer 141, the pinned ferromagnetic layer 142, the insulating tunnel barrier layer 143, and the free ferromagnetic layer 144 are stacked in this order from bottom to top, and the plurality of stacked structures are stacked in this order from top to bottom.
According to the magnetic random access memory, the U-shaped variodel connecting structure 12 is arranged, and a magnetic field generated by current flowing through the U-shaped variodel connecting structure 12 assists in overturning the magnetic tunnel junction structure 14, so that current required by overturning the magnetic tunnel junction structure 14 is reduced, and required writing current is further reduced; meanwhile, the side wall parts 122 of the U-shaped varactor connection structure 12 are located at two opposite sides of the magnetic tunnel junction structure 14, and a double equidirectional magnetic field can be generated on the magnetic tunnel junction structure 14 by one current in the U-shaped varactor connection structure 12, so that the current required for turning over the magnetic tunnel junction structure 14 is further reduced, and the required write current is further reduced; the size of the magnetic random access memory is smaller than that of the existing magnetic random access memory, and can be obviously reduced to 7 nm-10 nm compared with the existing magnetic random access memory.
As described above, the magnetic random access memory and the method for manufacturing the same of the present invention includes: a magnetic tunnel junction structure comprising opposing first and second sides; a word line connected to a top of the magnetic tunnel junction structure and extending in a first direction perpendicular to a height direction of the magnetic tunnel junction structure; a read bit line in contact with a bottom of the magnetic tunnel junction structure and extending in a second direction, the second direction being perpendicular to both the height direction of the magnetic tunnel junction structure and the first direction; a write bit line on a second side of the magnetic tunnel junction structure having a spacing from both the read bit line and the word line; the write bit line extends in the second direction; the U-shaped variable magnet connecting structure comprises a bottom edge part and a side wall part; the bottom edge portion is located below the read bit line, and the bottom edge portion crosses the read bit line along the first direction; the sidewall portions are respectively located on a first side and a second side of the magnetic tunnel junction structure, a top of the sidewall portion located on the first side of the magnetic tunnel junction structure is connected to the word line, a top of the sidewall portion located on the second side of the magnetic tunnel junction structure is connected to the write bit line, and bottoms of the sidewall portions located on the first side and the second side of the magnetic tunnel junction structure are both connected to the bottom side. According to the magnetic random access memory, the U-shaped variable magnet connecting structure is arranged, and a magnetic field generated by current flowing through the U-shaped variable magnet connecting structure assists the overturning of the magnetic tunnel junction structure, so that the current required by the overturning of the magnetic tunnel junction structure is reduced, and the required write-in current is further reduced; meanwhile, the side wall parts of the U-shaped variable magnet connecting structure are positioned at two opposite sides of the magnetic tunnel junction structure, and a double equidirectional magnetic field can be generated on the magnetic tunnel junction structure by passing current once in the U-shaped variable magnet connecting structure, so that the current required by the overturning of the magnetic tunnel junction structure is further reduced, and the required writing current is further reduced; the size of the magnetic random access memory is smaller than that of the existing magnetic random access memory, and can be obviously reduced to 7 nm-10 nm compared with the existing magnetic random access memory.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which may be accomplished by those skilled in the art without departing from the spirit and scope of the present invention as set forth in the appended claims.

Claims (9)

1. A magnetic random access memory, comprising:
a magnetic tunnel junction structure comprising opposing first and second sides;
a word line connected to a top of the magnetic tunnel junction structure and extending in a first direction perpendicular to a height direction of the magnetic tunnel junction structure;
a read bit line contacting a bottom of the magnetic tunnel junction structure and extending in a second direction, the second direction being perpendicular to both the height direction of the magnetic tunnel junction structure and the first direction;
a write bit line on a second side of the magnetic tunnel junction structure having a spacing from both the read bit line and the word line; the write bit line extends in the second direction;
the U-shaped metamagnet connecting structure comprises a bottom edge part and a side wall part; the bottom edge portion is located below the read bit line, and the bottom edge portion crosses the read bit line along the first direction; the side wall parts are respectively positioned on the first side and the second side of the magnetic tunnel junction structure, the top of the side wall part positioned on the first side of the magnetic tunnel junction structure is connected with the word line, the top of the side wall part positioned on the second side of the magnetic tunnel junction structure is connected with the writing bit line, and the bottoms of the side wall parts positioned on the first side and the second side of the magnetic tunnel junction structure are both connected with the bottom edge part, so that a current flowing through the U-shaped metamagnet connecting structure generates a magnetic field to assist the magnetic tunnel junction structure to turn over during writing operation.
2. The magnetic random access memory of claim 1, wherein:
the number of the magnetic tunnel junction structures is multiple, and the multiple magnetic tunnel junction structures are arranged at intervals in multiple rows and multiple columns along the first direction and the second direction;
the number of the word lines is multiple, and each word line sequentially connects the magnetic tunnel junction structures arranged at intervals along the first direction in series;
the number of the reading bit lines is multiple, and each row of the magnetic tunnel junction structures which are arranged at intervals along the second direction are sequentially connected in series by each reading bit line;
the number of the U-shaped variable magnet connecting structures is multiple, and each U-shaped variable magnet connecting structure and each magnetic tunnel junction structure are arranged in a one-to-one correspondence manner;
the number of the write bit lines is multiple, the write bit lines and the read bit lines are alternately arranged along the first direction in sequence at intervals, and the write bit lines are located on the same side of the magnetic tunnel junction structures arranged along the second direction at intervals.
3. The mram of claim 2, further comprising an insulating protective layer filled between adjacent word lines, between adjacent U-shaped varactor connection structures, between adjacent magnetic tunnel junction structures, between the read bit line and the write bit line, between the write bit line and the word lines, and between the bottom edge portion and the read bit line.
4. The mram of claim 1, wherein the bottom edge portion is spaced from a bottom of the read bit line.
5. The magnetic random access memory of claim 4, wherein: the magnetic random access memory further comprises an insulating medium layer, wherein the insulating medium layer is at least positioned between the bottom edge part and the reading bit line.
6. The magnetic random access memory of claim 1, wherein: the sidewall portion is in contact with a sidewall of the magnetic tunnel junction structure.
7. The magnetic random access memory according to any of claims 1 to 6, wherein: the magnetic tunnel junction structure includes:
a pinned ferromagnetic layer;
an antiferromagnetic layer located on a surface of the pinned ferromagnetic layer;
a free ferromagnetic layer on a side of the pinned ferromagnetic layer away from the antiferromagnetic layer;
an insulating tunnel barrier layer between the pinned ferromagnetic layer and the free ferromagnetic layer.
8. A method for manufacturing a magnetic random access memory is characterized by comprising the following steps:
providing a substrate;
forming a bottom edge part of a U-shaped metamagnet connecting structure on the upper surface of the substrate, wherein the bottom edge part extends along a first direction;
forming an insulating medium layer on the upper surface of the substrate and the surface of the bottom edge part, wherein the insulating medium layer covers the upper surface of the substrate and the surface of the bottom edge part;
forming a reading bit line on the upper surface of the insulating medium layer, wherein the reading bit line extends along a second direction, and the second direction is vertical to the first direction; the reading bit line crosses the bottom edge part;
forming a magnetic tunnel junction structure on the read bit line corresponding to the upper surface of the bottom edge portion, the magnetic tunnel junction structure including a first side and a second side opposite to each other;
forming an insulating protective layer on the upper surface of the insulating medium layer, wherein the insulating protective layer covers the upper surface of the insulating medium layer and the magnetic tunnel junction structure, and the upper surface of the insulating protective layer is flush with the upper surface of the magnetic tunnel junction structure;
forming a through hole and a groove in the insulating protective layer and the insulating medium layer, wherein the through hole is respectively positioned at the first side and the second side of the magnetic tunnel junction structure and penetrates through the insulating protective layer and the insulating medium layer along the thickness direction of the insulating protective layer and the insulating medium layer to expose the bottom edge part; the groove is positioned on the second side of the magnetic tunnel junction structure and communicated with the top of the through hole positioned on the second side of the magnetic tunnel junction structure;
forming a side wall part and a write bit line of the U-shaped metamagnet connecting structure in the through hole, wherein the bottom of the side wall part is connected with the bottom edge part; the write bit line extends along the second direction, and is connected with the top of the side wall part at the second side of the magnetic tunnel junction structure, so that the current flowing in the U-shaped metamagnet connecting structure generates a magnetic field to assist the magnetic tunnel junction structure to turn over during the write operation;
and forming a word line on the upper surface of the insulating protection layer, wherein the word line extends along the first direction, the word line is connected with the upper surface of the magnetic tunnel junction structure and the upper surface of the side wall part positioned at the first side of the magnetic tunnel junction structure, and the word line and the writing bit line have a distance.
9. The method of claim 8, wherein forming a magnetic tunnel junction structure on the read bit line corresponding to the top surface of the bottom portion comprises:
and sequentially forming an antiferromagnetic layer, a pinned ferromagnetic layer, an insulating tunnel barrier layer and a free ferromagnetic layer which are sequentially attached from bottom to top on the upper surface of the read bit line corresponding to the bottom edge part.
CN201910323534.0A 2019-04-22 2019-04-22 Magnetic random access memory and preparation method thereof Active CN111833931B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910323534.0A CN111833931B (en) 2019-04-22 2019-04-22 Magnetic random access memory and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910323534.0A CN111833931B (en) 2019-04-22 2019-04-22 Magnetic random access memory and preparation method thereof

Publications (2)

Publication Number Publication Date
CN111833931A CN111833931A (en) 2020-10-27
CN111833931B true CN111833931B (en) 2022-07-08

Family

ID=72912110

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910323534.0A Active CN111833931B (en) 2019-04-22 2019-04-22 Magnetic random access memory and preparation method thereof

Country Status (1)

Country Link
CN (1) CN111833931B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010077599A (en) * 2000-02-03 2001-08-20 윤종용 Magnetic random access memory with circuits for write and read using magnetic tunnel junction (MTJ) devices

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010077599A (en) * 2000-02-03 2001-08-20 윤종용 Magnetic random access memory with circuits for write and read using magnetic tunnel junction (MTJ) devices

Also Published As

Publication number Publication date
CN111833931A (en) 2020-10-27

Similar Documents

Publication Publication Date Title
JP4945592B2 (en) Semiconductor memory device
CN104766865B (en) Vertical-type non-volatile memory part and vertical-channel nonvolatile semiconductor memory member
CN102956645B (en) Data storage device and its manufacture method
JP6146992B2 (en) 3D semiconductor device
US9299392B2 (en) Semiconductor memory devices
US9799383B2 (en) Magnetic memory device
CN103633093A (en) Semiconductor devices including metal-silicon-nitride patterns and methods of forming the same
CN104813468A (en) Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form same
KR20180065071A (en) Semiconductor device
CN101635303A (en) Multi-stacked spin transfer torque magnetic random access memory and method of manufacturing the same
US20150155332A1 (en) Magnetic memory and manufacturing method thereof
CN102629659A (en) Semiconductor device
US20180083067A1 (en) Method of manufacturing magnetoresistive random access memory device
CN107017337A (en) Magnetic memory device and its manufacture method
CN110349962A (en) Semiconductor devices and its manufacturing method
CN110323247A (en) MRAM device and its manufacturing method and electronic equipment including MRAM
KR102081989B1 (en) Magnetic memory device and method of manufacturing the same
KR20030034500A (en) Magnetic random access memory
US20190326355A1 (en) Semiconductor devices
CN111833931B (en) Magnetic random access memory and preparation method thereof
US20230139618A1 (en) Semiconductor devices
US11257863B2 (en) Device and method for disturbance free 3D MRAM fabrication
CN111833930B (en) Magnetic random access memory and preparation method thereof
KR20160037447A (en) Magnetic memory devices
US10985211B1 (en) Embedded MRAM structure and method of fabricating the same

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant