CN111814712A - Grain recognition device and display equipment - Google Patents
Grain recognition device and display equipment Download PDFInfo
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- CN111814712A CN111814712A CN202010682146.4A CN202010682146A CN111814712A CN 111814712 A CN111814712 A CN 111814712A CN 202010682146 A CN202010682146 A CN 202010682146A CN 111814712 A CN111814712 A CN 111814712A
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- G—PHYSICS
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- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/13—Sensors therefor
- G06V40/1318—Sensors therefor using electro-optical elements or layers, e.g. electroluminescent sensing
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06V—IMAGE OR VIDEO RECOGNITION OR UNDERSTANDING
- G06V40/00—Recognition of biometric, human-related or animal-related patterns in image or video data
- G06V40/10—Human or animal bodies, e.g. vehicle occupants or pedestrians; Body parts, e.g. hands
- G06V40/12—Fingerprints or palmprints
- G06V40/1365—Matching; Classification
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
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- H10K50/84—Passivation; Containers; Encapsulations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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Abstract
The application provides a line recognition device and display device. The line recognition device comprises a substrate, a packaging layer and a plurality of film layers which are arranged between the substrate and the packaging layer in a stacked mode in sequence. The line recognition device also comprises a plurality of line recognition electrodes arranged at intervals, the line recognition electrodes are arranged into a single layer, the line recognition electrodes are positioned between the packaging layer and the substrate, and the line recognition electrodes penetrate through at least two film layers. The electronic equipment comprises the line recognition device.
Description
Technical Field
The application relates to the technical field of fingerprint identification, in particular to a line identification device and a display device.
Background
With the rapid development of electronic devices, the requirements of users on screen occupation ratio are higher and higher, so that the comprehensive screen display of the electronic devices is concerned more and more in the industry.
In order to realize full screen display and fingerprint identification, the electronic device usually includes a fingerprint identification sensor. In the existing scheme, the fingerprint identification component is arranged on the upper part (such as a capacitive fingerprint identification component) or the lower part (such as optical fingerprint identification under a screen) of the display screen, so that the thickness of the electronic equipment is increased, and the electronic equipment is not easy to realize lightness and thinness.
Disclosure of Invention
According to a first aspect of an embodiment of the present application, there is provided a texture recognition device, including a substrate, a packaging layer, and a plurality of film layers located between the substrate and the packaging layer and stacked in sequence;
the line recognition device also comprises a plurality of line recognition electrodes arranged at intervals, the line recognition electrodes are arranged into a single layer, the line recognition electrodes are positioned between the packaging layer and the substrate, and the line recognition electrodes penetrate through at least two film layers.
In one embodiment, the substrate is a flexible substrate, and the material of the texture recognition electrode is ionic gel.
In one embodiment, a recess is formed in one side of the substrate facing the packaging layer, and the lower end of the line recognition electrode is located in the recess.
In one embodiment, the texture recognition device further comprises a light emitting layer, the light emitting layer comprises a plurality of sub-pixels, and the texture recognition electrode is arranged between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the line recognition device further comprises a partition structure arranged around the line recognition electrode, and the organic layer and the second electrode are disconnected at the partition structure.
In one embodiment, the texture recognition device further comprises a light emitting layer, the light emitting layer comprises a plurality of sub-pixels, and the texture recognition electrode is arranged between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the grain recognition device further comprises an insulation structure covering the grain recognition electrode.
In one embodiment, the texture recognition device further comprises a light emitting layer, the light emitting layer comprises a plurality of sub-pixels, and the texture recognition electrode is arranged between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the organic layer is provided with a first exposed part exposing the line identification electrode, and the second electrode is provided with a second exposed part exposing the line identification electrode.
In one embodiment, the texture recognition device includes a texture driving circuit for driving the texture recognition electrode, the texture driving circuit corresponds to the texture recognition electrode one to one, the texture recognition device further includes a connecting portion for connecting the texture driving circuit and the corresponding texture recognition electrode, and the connecting portion surrounds the corresponding texture recognition electrode.
In one embodiment, the texture driving circuit comprises a thin film transistor and a capacitor, the thin film transistor comprises a gate electrode, a source electrode and a drain electrode, the capacitor comprises a first polar plate and a second polar plate located on the first polar plate, the gate electrode and the first polar plate are formed in the same process step, and one of the gate electrode, the second polar plate and the source electrode and the connecting portion are formed in the same process step.
In one embodiment, the texture recognition device comprises a driving circuit layer, the driving circuit layer comprises a thin film transistor and a capacitor, the thin film transistor comprises a semiconductor layer, a gate electrode, a source electrode and a drain electrode, and the capacitor comprises a first polar plate and a second polar plate; the gate electrode and the first polar plate are formed in the same process step, and the source electrode and the drain electrode are formed in the same process step;
the driving circuit layer further comprises a gate insulating layer between the semiconductor layer and the gate electrode, a capacitance insulating layer between the gate electrode and the second plate, an interlayer dielectric layer between the second plate and the source electrode, and a planarization layer on the source electrode;
the line identification electrode at least penetrates through the grid electrode insulating layer, the capacitor insulating layer, the interlayer dielectric layer and the planarization layer.
According to a second aspect of the embodiments of the present application, there is provided a display apparatus including the above-described grain recognition device.
In one embodiment, a distance between a surface of the texture recognition electrode facing away from the substrate and a surface of the display device facing away from the substrate is less than 200 μm, and a distance between a surface of the texture recognition electrode facing away from the encapsulation layer and a surface of the display device facing away from the encapsulation layer is less than 200 μm.
The embodiment of the application achieves the main technical effects that:
according to the texture recognition device and the display device provided by the embodiment of the application, the texture recognition electrode is arranged to be a single layer, the texture recognition electrode is positioned between the packaging layer and the substrate and penetrates through at least two film layers, namely the texture recognition electrode is arranged inside the texture recognition device, and compared with a scheme that the texture recognition electrode is arranged to be a single layer alone or a texture recognition sensor is arranged on one side of the texture recognition device to realize texture recognition, the texture recognition device is beneficial to reducing the size of the texture recognition device and realizing the lightness and thinness of the texture recognition device; the line recognition electrode runs through two at least retes, then can set up line recognition electrode and line recognition device and deviate from the surface of substrate and the distance between the surface that line recognition electrode and line preparation facilities deviate from the encapsulation layer all to be less, and then realize carrying out the line discernment respectively on two relative surfaces of line recognition device, the user operates more in a flexible way when carrying out the line discernment.
Drawings
Fig. 1 is a partial cross-sectional view of a texture recognition apparatus provided in an exemplary embodiment of the present application;
fig. 2 is a partial cross-sectional view of a texture recognition apparatus provided in accordance with another exemplary embodiment of the present application;
fig. 3 is a partial cross-sectional view of a texture recognition apparatus provided in accordance with yet another exemplary embodiment of the present application;
fig. 4 is a schematic diagram illustrating a local distribution of pixel units and texture recognition electrodes in a texture recognition device according to an exemplary embodiment of the present disclosure;
fig. 5 is a schematic view of a local distribution of pixel units and texture recognition electrodes in a texture recognition device according to another exemplary embodiment of the present disclosure.
Detailed Description
Reference will now be made in detail to the exemplary embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present application, as detailed in the appended claims.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used herein to describe various information, such information should not be limited to these terms. These terms are only used to distinguish one type of information from another. For example, first information may also be referred to as second information, and similarly, second information may also be referred to as first information, without departing from the scope of the present application. The word "if" as used herein may be interpreted as "at … …" or "when … …" or "in response to a determination", depending on the context.
The embodiment of the application provides a line recognition device and display equipment, and the problem can be solved. The following describes the texture recognition device and the display device in detail in the embodiments of the present application with reference to the drawings. Features in the embodiments described below may complement or be combined with each other without conflict.
The embodiment of the application provides a line recognition device. Referring to fig. 1, the texture recognition device 100 includes a substrate 10, an encapsulation layer 20, and a plurality of film layers sequentially stacked between the substrate 10 and the encapsulation layer 20. The grain recognition device 100 further includes a plurality of spaced grain recognition electrodes 30, the grain recognition electrodes 30 are arranged as a single layer, the grain recognition electrodes 30 are located between the encapsulation layer 20 and the substrate 10, and the grain recognition electrodes 30 penetrate through at least two film layers.
In the texture recognition device provided by the embodiment of the application, the texture recognition electrode 30 is arranged as a single layer, the texture recognition electrode 30 is located between the encapsulation layer 20 and the substrate 10 and penetrates through at least two film layers, that is, the texture recognition electrode 30 is arranged inside the texture recognition device, and compared with a scheme that the texture recognition electrode 30 is arranged as one layer alone or a texture recognition sensor is arranged on one side of the texture recognition device to realize texture recognition, the size of the texture recognition device 100 is reduced; line identification electrode 30 runs through two at least retes, then helps setting up the distance between the surface that deviates from substrate 10 with line identification electrode 30 and line identification device 100 and the surface that line identification electrode 30 and line preparation facilities 100 deviate from encapsulation layer 20 all to be less, and then realizes carrying out the line discernment respectively on two relative surfaces of line identification device 100, and the user operates more in a flexible way when carrying out the line discernment.
When the texture recognition device provided by the embodiment of the application is used for texture detection, a part of a user to be recognized with a texture is placed on a surface of the texture recognition device 100, which is far away from the encapsulation layer 20, or a surface of the texture recognition device 100, which is far away from the substrate 10. The capacitance is formed between the line identification electrode 30 and the part of the user to be identified with the line, the capacitance between the valley of the line and the line identification electrode 30 is different from the capacitance between the ridge of the line and the line identification electrode 30, the pattern of the line to be identified by the user can be determined through the capacitance between the part of the line to be identified and the line identification electrode 30, and then the pattern of the line to be identified by the user is identified.
The lines to be identified of the user comprise fingerprints, palm lines, toe lines and the like, and the parts of the lines to be identified of the user comprise fingers, palms, toes and the like.
In one embodiment, the substrate 10 is a flexible substrate, and the material of the texture recognition electrode 30 is an ionic gel. The ionic gel is generally formed by mixing a high-molecular organic polymer and a salt electrolyte material capable of being electrolyzed into ions, and has flexibility, the grain identification device can be a flexible device, and the grain identification electrode 30 is not easy to break when the grain identification device 100 is stretched or bent. The material of the substrate 10 may be one or more of PET (polyethylene terephthalate), PI (polyimide), and PC (polycarbonate).
Further, a recess is formed in a side of the substrate 10 facing the encapsulation layer 20, and a lower end of the line recognition electrode 30 is located in the recess. That is, the grain recognition device 100 is provided with a receiving hole for receiving the grain recognition electrode 30, the receiving hole extends to the substrate 10, and the thickness of the portion of the substrate 10 below the grain recognition electrode 30 is smaller than the thickness of the portion of the substrate 10 in other regions. The accommodation hole separates at least part of the film layers of the grain recognition device 100, and when the grain recognition device 100 is in a stretching state or a bending state, the stress on the film layers separated by the grain recognition electrode 30 is reduced, so that the risk of breakage of the film layers is reduced, and the service life of the grain recognition device 100 is prolonged. Moreover, the thickness of the flexible substrate is generally large, and by arranging the groove on the substrate 10, the distance between the surface of the texture recognition electrode 30 departing from the packaging layer 20 and the surface of the texture recognition device 100 departing from the packaging layer 20 can be reduced, and the texture recognition sensitivity of the surface of the texture recognition device 100 departing from the packaging layer 20 is improved.
When the texture recognition device may be a flexible device, the encapsulation layer 20 is TFE (thin film encapsulation layer), and TFE includes an inorganic film layer and an organic film layer which are alternately stacked. In one exemplary embodiment, TFE includes two inorganic film layers and an organic film layer positioned between the two inorganic film layers.
In other embodiments, the texture recognition device 100 may be a non-bendable or stretchable device, the substrate 10 may be a rigid substrate, the material of the substrate 10 may be glass, metal, etc., and the material of the texture recognition electrode 30 may be a metal material.
In one embodiment, the texture recognition device 100 further includes a driving circuit layer, the driving circuit layer includes a texture driving circuit for driving the texture recognition electrode 30, the texture driving circuit may correspond to the texture recognition electrode 30 one by one, and the texture recognition electrode 30 is electrically connected to the corresponding texture driving circuit.
In one embodiment, the texture recognition electrodes 30 are electrically connected to the corresponding texture driving circuits through connection portions 40, and the connection portions 40 surround the corresponding texture recognition electrodes 30. So set up, the area of contact of connecting portion 40 and line identification electrode 30 is great, and the contact resistance of connecting portion 40 and line identification electrode 30 is less, helps promoting the user and treats the electric capacity between position and the line identification electrode 30 of discerning, and then promotes line identification device 100's sensitivity.
In one embodiment, the texture driver circuit includes a thin film transistor 51 and a capacitor 61. The thin film transistor 51 includes a semiconductor layer 511, a gate electrode 512, a source electrode 513, and a drain electrode 514. The capacitor 61 includes a first plate 611 and a second plate 612 positioned on the first plate 611. The gate electrode 512 is formed in the same process step as the first plate 611, and the source electrode 513 is formed in the same process step as the drain electrode 514. One of the gate electrode 512, the second plate 612, and the source electrode 513 is formed in the same process step as the connection part 40. With this arrangement, the connection portion 40 is formed simultaneously with other conductive portions, which contributes to simplification of the manufacturing process. In the illustrated embodiment, the connection portion 40 is formed in the same process step as the gate electrode 512, and in other embodiments, the connection portion 40 may be formed in the same process step as the second plate 612, or the connection portion 40 may be formed in the same process step as the source electrode 513.
In some embodiments, the connection portion 40 and which conductive structure are formed at the same time may be selected according to a film layer through which the texture recognition electrode 30 passes, so that the texture recognition electrode 30 is in direct contact with the connection portion 40.
The grain recognition device 100 further includes a gate insulating layer 71 between the semiconductor layer 511 and the gate electrode 512, a capacitor insulating layer 72 between the gate electrode 512 and the second plate 612, an interlayer dielectric layer 73 between the second plate 612 and the source electrode 513, a planarization layer 74 on the source electrode 513, a barrier layer 75 between the substrate 10 and the semiconductor layer 511, and a buffer layer 76, wherein the buffer layer 76 is located on a side of the barrier layer 75 facing away from the substrate 10.
In one embodiment, the texture recognition device 100 further includes a light emitting layer 80, and the light emitting layer 80 includes a plurality of sub-pixels. The line recognition electrode 30 is disposed between the adjacent sub-pixels. The sub-pixel 80 includes a first electrode 81, an organic layer 82 on the first electrode 81, and a second electrode 83 on the organic layer 82. The first electrodes 81 are of a block structure, the first electrodes 81 are uniformly distributed, the first electrodes 81 can be anodes, the second electrodes 83 can be cathodes, and the cathodes are full-surface electrodes. The organic layer 82 may include an organic light emitting material and at least one of an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer. Like this, line recognition device 100 possesses display function and line recognition function simultaneously, and line recognition device 100 for example can be display panel, more helps promoting user's use experience.
The texture recognition device 100 further includes a pixel defining layer 77 on the first electrode 81 and a support pillar (not shown) on the pixel defining layer 77. The pixel defining layer 77 is provided with a plurality of pixel openings corresponding to the first electrodes 81 one to one, and the pixel openings expose partial regions of the corresponding first electrodes 81. The organic layer 82 and the second electrode 83 are partially located in the pixel opening.
In one embodiment, where the texture recognition electrode 30 is an ionic gel, the texture recognition electrode 30 may be formed after the support posts 78. The processes after forming the supporting pillars 78 (including the processes of forming the organic layer 82, the second electrode 83 and the encapsulation layer 20) are low temperature processes, and do not affect the performance of the ionic gel.
In one embodiment, the driving circuit layer further includes a plurality of pixel driving circuits, the pixel driving circuits may correspond to the sub-pixels one by one, and the pixel driving circuits drive the corresponding sub-pixels. The pixel drive circuit includes a thin film transistor 52 and a capacitor 62. The thin film transistor 52 includes a semiconductor layer 521, a gate electrode 522, a source electrode 523, and a drain electrode 524. The capacitor 62 includes a first plate 621 and a second plate 622 on the first plate 621. The gate electrode 522 and the first plate 621 are formed in the same process step, and the source electrode 523 and the drain electrode 524 are formed in the same process step. The semiconductor layer 521 and the semiconductor layer 511 can be formed in the same process step; gate electrode 522 and gate electrode 521 can be formed in the same process step; the source electrode 523 and the source electrode 513 may be formed in the same process step; second plate 612 and second plate 622 may be formed in the same process step.
In one embodiment, referring to fig. 1, the texture recognition device 100 further includes a blocking structure 91 disposed around the texture recognition electrode 30, and the organic layer 82 and the second electrode 83 are disconnected at the blocking structure 91. By such arrangement, the texture recognition electrode 30 can be prevented from being electrically connected with the organic layer 82 and the second electrode 83, and further the texture recognition electrode 30 is prevented from influencing the display of the sub-pixels, or the organic layer 82 and the second electrode 83 influence the work of the texture recognition electrode 30.
In the illustrated embodiment, the partition structure 91 is an isolation groove. The partition structure 91 includes a first insulating layer 912 and a second insulating layer 913 located on a side of the first insulating layer 912 facing away from the substrate 10. The etching selection ratios of the first insulating layer 912 and the second insulating layer 913 are different, so that an isolation trench is obtained by etching the first insulating layer 912 and the second insulating layer 913, an orthographic projection of an opening formed by etching the first insulating layer 912 on the substrate 10 covers an orthographic projection of an opening formed by etching the second insulating layer 913 on the substrate 10, and the size of the opening on the first insulating layer 912 is larger than that of the opening on the second insulating layer 913, that is, a concave structure is formed on the sidewall of the isolation trench, so that the organic layer 82 is disconnected from the second electrode 83 on the sidewall of the isolation trench. The first insulating layer 912 may be formed simultaneously with the planarization layer 74 to simplify the fabrication process. The second insulating layer 913 may be an inorganic layer.
In other embodiments, the partition structure 91 may also be an isolation pillar, a recessed structure is formed on a sidewall of the isolation pillar, and the organic layer 82 is disconnected from the second electrode 83 at the sidewall of the isolation pillar.
In another embodiment, referring to fig. 2, the texture recognition device 100 further includes an insulating structure 92 covering the texture recognition electrode 30. Thus, the insulating structure 92 can prevent the texture recognition electrode 30 from being electrically connected to the organic layer 82 or the second electrode 83, which may affect the texture recognition device 100 to display or perform texture recognition. The material of the insulating structure 92 may be an inorganic material or an organic material. When the material of the insulating structure 92 is an organic material, the insulating structure 92 may be formed in the same process step as the pixel defining layer 77. Alternatively, the insulating structure 92 may be formed by a separate process step, and the material of the insulating structure 92 may be a photosensitive resin, for example, an optical paste. The optical adhesive is a low-temperature organic film, and the performance of the ionic gel cannot be influenced in the forming process.
In another embodiment, referring to fig. 3, the organic layer 82 is provided with a first exposed portion exposing the texture recognition electrode 30, the second electrode 83 is provided with a second exposed portion exposing the texture recognition electrode 30, and a gap exists between each of the organic layer 82 and the second electrode 83 and the texture recognition electrode 30. That is, the organic layer 82 and the second electrode 83 are patterned films, and the surface of the texture recognition electrode 30 away from the substrate 10 is not covered by the organic layer 82 and the second electrode 83. In some embodiments, the organic layer 82 and the second electrode 83 may be patterned by an exposure and development process to form a first exposed portion and a second exposed portion. Thus, the organic layer 82 and the second electrode 83 are not in contact with the texture recognition electrode 30, so that the organic layer 82 and the second electrode 83 are prevented from being electrically connected with the texture recognition electrode 30, and the texture recognition device 100 is prevented from being influenced to display or perform texture recognition. In order to prevent water oxygen from invading the organic layer 82, the patterning process for the organic layer 82 is performed in an anhydrous oxygen environment.
In one embodiment, the line recognition electrode 30 penetrates at least the gate insulating layer 71, the capacitor insulating layer 72, the interlayer dielectric layer 73, and the planarization layer 74. So, line identification electrode 30 is great in size on vertical, can make line identification electrode 30 deviate from the surface of substrate 10 and the distance between the surface that line identification device 100 deviates from substrate 10 less, can promote the sensitivity of the line identification of line identification device 100 surface that deviates from substrate 10, and also can make line identification electrode 30 deviate from the distance between the surface of encapsulation layer 20 and the surface that line identification device 100 deviates from encapsulation layer 20 less, promote the sensitivity of the line identification of line identification device 100 surface that deviates from encapsulation layer 20. In the illustrated embodiment, the texture recognition device 100 includes a barrier layer 75 and a buffer layer 76, and the texture recognition electrode 30 penetrates through the gate insulating layer 71, the capacitor insulating layer 72, the interlayer dielectric layer 73, the planarization layer 74, the barrier layer 75 and the buffer layer 76. In other embodiments, the texture recognition electrode 30 may penetrate the gate insulating layer 71, the capacitor insulating layer 72, the interlayer dielectric layer 73, the planarization layer 74, the barrier layer 75, the buffer layer 76, and the pixel defining layer 77.
In one embodiment, the encapsulation layer 20 of the texture recognition device 100 is located on a side of the luminescent layer 80 facing away from the substrate 10. The packaging layer 20 packages the grain recognition device 100, separates water and oxygen in the air, and prevents water and oxygen in the air from invading the inside of the grain recognition device 100, thereby affecting the service life of the grain recognition device 100.
In one embodiment, the texture recognition device 100 may further include a polarizer and a cover plate. The polarizer is located on a side of the package layer 20 away from the substrate 10, and the polarizer may reduce the emission rate of the ambient light incident to the texture recognition device 100, which is helpful to improve the user experience. The cover plate is located on a side of the polarizer away from the substrate 10, and the cover plate can protect other film layers of the texture recognition device 100. The polarizer and the cover plate may be transparent so as not to affect the display of the grain recognition device 100. When the texture recognition device 100 is a flexible device 100, the polarizer and the cover plate are flexible.
In one implementation, the grain recognition device 100 includes a grain recognition area, the grain recognition area may be a part of the grain recognition device, the grain recognition electrode 30 and the grain driving circuit may be disposed only in the grain recognition area, and other areas of the grain recognition device 100 do not have a grain recognition function and are not disposed with the grain recognition electrode 30 and the grain driving circuit. Alternatively, the grain identifying electrode 30 and the grain driving circuit may be uniformly dispersed in all regions of the grain identifying device 100, and each region of the grain identifying device 100 may implement grain identification.
In one embodiment, referring to fig. 4 and 5, the plurality of texture recognition electrodes 30 of the texture recognition device 100 are uniformly spaced, and the pixel units 801 of the light emitting layer 80 are uniformly spaced, each pixel unit including a plurality of sub-pixels 802. The uniform interval arrangement of a plurality of line identification electrodes 30 can make the effect of the regional discernment fingerprint that sets up line identification electrode 30 better, avoids appearing some line identification electrodes 30 interval far away, and leads to the problem of some regional unable effective discernment lines. The pixel units 801 are uniformly arranged at intervals, so that the grain identification device 100 has a good display effect, the brightness is uniformly dispersed, and the problem of dark areas of the grain identification device 100 caused by the arrangement of the grain identification electrode 30 is avoided. In the illustrated embodiment, the pixel unit 802 includes a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B.
In the embodiment shown in fig. 4, the pattern recognition electrode 30 includes two electrode portions extending in different directions, the two electrode portions are arranged in a crossing manner, and the orthographic projection of the pattern recognition electrode 30 on the substrate 10 is substantially in a cross shape. Thus, the area of the line identification electrode 30 is large, and the sensitivity of line identification is improved. In other embodiments, the texture recognition electrode 30 may include three electrode portions, and the orthographic projection of the texture recognition electrode 30 on the substrate 10 may be substantially in the shape of an i. In the embodiment shown in fig. 5, the ridge recognition electrode 30 includes an electrode portion extending in one direction. Thus, the texture recognition electrode 30 is relatively simple to manufacture, the length of the texture recognition circuit 30 in the extension direction can be set to be large, and the surface area of the texture recognition electrode 30 is increased. These shaped vein recognition electrodes 30 are less likely to break when stretched, and are more suitable for use in the flexible vein recognition apparatus 100. In other embodiments, the orthographic projection of the texture recognition electrode 30 on the substrate 10 may take other shapes.
In some embodiments, the texture recognition device 100 may be a display panel, an electronic lock with texture recognition function, or an identification device (e.g., bank card, membership card, identification card, driver's license).
In some embodiments, the distance between the surface of the textured identification electrode 30 facing away from the encapsulation layer 20 and the surface of the textured identification device 100 facing away from the encapsulation layer 20, and the distance between the surface of the textured identification electrode 30 facing away from the substrate 10 and the surface of the textured identification device 100 facing away from the substrate 10, are approximately equal. So, sensitivity is roughly the same when two relative surface identification lines of line recognition device, helps promoting user's use and experiences.
The embodiment of the application also provides a display device. The display device includes the grain recognition apparatus 100 according to any of the above embodiments. The display apparatus may further include a housing in which the grain recognition device 100 may be embedded.
In one embodiment, the distance between the surface of the texture recognition electrode 30 facing away from the substrate 10 and the surface of the display device facing away from the substrate 10 is less than 200 μm, and the distance between the surface of the texture recognition electrode 30 facing away from the encapsulation layer 20 and the surface of the display device facing away from the encapsulation layer 20 is less than 200 μm. Therefore, the two opposite surfaces of the grain identification device can be subjected to grain identification, and the identification sensitivity is high.
In some embodiments, the distance between the surface of the texture recognition electrode 30 facing away from the substrate 10 and the surface of the display device facing away from the substrate 10, and the distance between the surface of the texture recognition electrode 30 facing away from the encapsulation layer 20 and the surface of the display device facing away from the encapsulation layer 20 are substantially the same in the display device. The distance between the surface of the texture recognition electrode 30 facing away from the substrate 10 and the surface of the display device facing away from the substrate 10 may be, for example, 50 μm, 70 μm, 100 μm, 150 μm, etc.
The display device provided by the embodiment of the application can be any equipment with a display function, such as a mobile phone, a tablet computer, a television, a notebook computer and the like.
It is noted that in the drawings, the sizes of layers and regions may be exaggerated for clarity of illustration. Also, it will be understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element or layer or intervening layers may also be present. In addition, it will be understood that when an element or layer is referred to as being "under" another element or layer, it can be directly under the other element or intervening layers or elements may also be present. In addition, it will also be understood that when a layer or element is referred to as being "between" two layers or elements, it can be the only layer between the two layers or elements, or more than one intermediate layer or element may also be present. Like reference numerals refer to like elements throughout.
Other embodiments of the present application will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the invention following, in general, the principles of the application and including such departures from the present disclosure as come within known or customary practice within the art to which the invention pertains.
It will be understood that the present application is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.
Claims (11)
1. The grain identification device is characterized by comprising a substrate, a packaging layer and a plurality of film layers which are positioned between the substrate and the packaging layer and are sequentially stacked;
the line recognition device also comprises a plurality of line recognition electrodes arranged at intervals, the line recognition electrodes are arranged into a single layer, the line recognition electrodes are positioned between the packaging layer and the substrate, and the line recognition electrodes penetrate through at least two film layers.
2. The texture recognition device of claim 1, wherein the substrate is a flexible substrate and the material of the texture recognition electrode is an ionic gel.
3. The texture recognition device of claim 2, wherein a recess is formed in a side of the substrate facing the encapsulation layer, and a lower end of the texture recognition electrode is located in the recess.
4. The texture recognition device according to claim 1, further comprising a light-emitting layer including a plurality of sub-pixels, the texture recognition electrode being provided between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the line recognition device further comprises a partition structure arranged around the line recognition electrode, and the organic layer and the second electrode are disconnected at the partition structure.
5. The texture recognition device according to claim 1, further comprising a light-emitting layer including a plurality of sub-pixels, the texture recognition electrode being provided between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the grain recognition device further comprises an insulation structure covering the grain recognition electrode.
6. The texture recognition device according to claim 1, further comprising a light-emitting layer including a plurality of sub-pixels, the texture recognition electrode being provided between the adjacent sub-pixels; the sub-pixel comprises a first electrode, an organic layer positioned on the first electrode and a second electrode positioned on the organic layer;
the organic layer is provided with a first exposed part exposing the line identification electrode, and the second electrode is provided with a second exposed part exposing the line identification electrode.
7. The texture recognition device according to claim 1, wherein the texture recognition device includes a texture driving circuit for driving the texture recognition electrodes, the texture driving circuit corresponds to the texture recognition electrodes one to one, the texture recognition device further includes a connecting portion for connecting the texture driving circuit and the corresponding texture recognition electrodes, and the connecting portion surrounds the corresponding texture recognition electrodes.
8. The texture recognition device according to claim 7, wherein the texture driving circuit comprises a thin film transistor and a capacitor, the thin film transistor comprises a gate electrode, a source electrode and a drain electrode, the capacitor comprises a first plate and a second plate located on the first plate, the gate electrode and the first plate are formed in the same process step, and one of the gate electrode, the second plate and the source electrode and the connection portion are formed in the same process step.
9. The texture recognition device of claim 1, wherein the texture recognition device comprises a driver circuit layer, the driver circuit layer comprises a thin film transistor and a capacitor, the thin film transistor comprises a semiconductor layer, a gate electrode, a source electrode and a drain electrode, and the capacitor comprises a first plate and a second plate; the gate electrode and the first polar plate are formed in the same process step, and the source electrode and the drain electrode are formed in the same process step;
the driving circuit layer further comprises a gate insulating layer between the semiconductor layer and the gate electrode, a capacitance insulating layer between the gate electrode and the second plate, an interlayer dielectric layer between the second plate and the source electrode, and a planarization layer on the source electrode;
the line identification electrode at least penetrates through the grid electrode insulating layer, the capacitor insulating layer, the interlayer dielectric layer and the planarization layer.
10. A display device, characterized in that the display device comprises the grain recognition apparatus according to any one of claims 1 to 9.
11. The display device of claim 10, wherein a distance between a surface of the texture recognition electrode facing away from the substrate and a surface of the display device facing away from the substrate is less than 200 μ ι η, and wherein a distance between a surface of the texture recognition electrode facing away from the encapsulation layer and a surface of the display device facing away from the encapsulation layer is less than 200 μ ι η.
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