CN111801584B

CN111801584B - Capacitance detection circuit, touch device and terminal equipment

Info

Publication number: CN111801584B
Application number: CN202080001582.9A
Authority: CN
Inventors: 汪正锋
Original assignee: Shenzhen Goodix Technology Co Ltd
Current assignee: Shenzhen Goodix Technology Co Ltd
Priority date: 2020-03-06
Filing date: 2020-03-06
Publication date: 2022-05-03
Anticipated expiration: 2040-03-06
Also published as: WO2021174543A1; CN111801584A

Abstract

The application discloses electric capacity detection circuitry, touch-control device and terminal equipment, electric capacity detection circuitry is connected to the detection condenser, includes: calibrating the capacitor; a shield electrode, the shield electrode and a detection electrode of the detection capacitor forming a first capacitor, the shield electrode and a system ground forming a shield capacitor; a charging and discharging module including a first current source for charging or discharging the detection capacitor, the first capacitor and the shielding capacitor, and a second current source for charging or discharging the calibration capacitor; a shield electrode driving module for charging or discharging the shield capacitor and the first capacitor; the integrator is used for converting the capacitance of the detection capacitor into a voltage signal; the control module is used for controlling the working states of the charge-discharge module, the integrator and the shielding electrode driving module.

Description

Capacitance detection circuit, touch device and terminal equipment

Technical Field

The embodiment of the application relates to the field of capacitance detection, and more particularly to a capacitance detection circuit, a touch device and a terminal device.

Background

Capacitive sensors are widely used in electronic devices, for example, as input devices to provide input information, such as position, motion, force and duration. The capacitive sensor is characterized in that a core part of the capacitive sensor is a capacitance detection circuit, the capacitance detection circuit comprises a sensor capacitor, an integrator and an Analog-to-Digital Converter (ADC), the charge amount of the sensor capacitor can be changed when a user operates the capacitive sensor, the integrator is used for converting a capacitance effect generated when the user operates the capacitive sensor into a voltage signal, the voltage signal is converted into a Digital signal after being sampled by the ADC, and then capacitance detection can be performed according to the Digital signal.

However, in application, if water drops drop on the sensing area of the sensor, a large capacitance is formed between the water drops and the system ground to affect the capacitance of the sensor, and the equivalent circuit is basically the same as that when a user touches the sensor with a finger, thereby causing false detection.

Disclosure of Invention

The embodiment of the application provides a capacitance detection circuit, a touch device and terminal equipment, and waterproof capacitance detection can be achieved.

In a first aspect, a capacitance detection circuit is provided, connected to a detection capacitor, the capacitance detection circuit comprising: calibrating the capacitor;

a shield electrode, the shield electrode and a detection electrode of the detection capacitor forming a first capacitor, the shield electrode and a system ground forming a shield capacitor;

a charge and discharge module including a first current source for charging or discharging the detection capacitor, the first capacitor and the shielding capacitor, and a second current source for charging or discharging the calibration capacitor;

a shield electrode driving module for charging or discharging the shield capacitor and the first capacitor;

the integrator is used for converting the capacitance of the detection capacitor into a voltage signal;

the control module is used for controlling the working states of the charge-discharge module, the integrator and the shielding electrode driving module;

in a first charging and discharging stage, the shielding electrode driving module charges or discharges the shielding capacitor and the first capacitor so that the voltage on the shielding capacitor is a reference voltage;

a second charge-discharge phase following the first charge-discharge phase, the first current source charging or discharging the detection capacitor, the first capacitor and the shield capacitor, the second current source for charging or discharging the calibration capacitor, wherein in the second charge-discharge phase, the voltage on the detection capacitor is charged to or discharged to the reference voltage.

In some possible implementation manners, the capacitance detection circuit further includes a charge-discharge switch group, a zero-clearing switch group, and an integration switch group, the integrator includes an integration capacitor and an amplifier, and the shielding electrode driving module includes a voltage buffer;

the control module is specifically configured to:

in the charge zero clearing stage, the charges stored on the integrating capacitor are cleared through the zero clearing switch group;

in the first charging and discharging stage, the voltage buffer is controlled to charge or discharge the detection capacitor, the first capacitor and the shielding capacitor through the charging and discharging switch group;

in the second charging and discharging stage, the first current source and the second current source are controlled by the charging and discharging switch group to respectively charge or discharge the detection capacitor and the calibration capacitor, wherein the charging time period of the calibration capacitor is equal to the charging time period of the detection capacitor, or the discharging time period of the calibration capacitor is equal to the discharging time period of the detection capacitor;

during a charge transfer phase, controlling a portion of the charge stored on the calibration capacitor to be transferred to the integration capacitor via the set of integration switches.

In some possible implementations, the charge and discharge switch group includes a first switch, a second switch, a third switch, a fourth switch, a seventh switch, and an eighth switch, the integration switch group includes a fifth switch, and the clear switch group includes a sixth switch;

one end of the first switch is connected with one end of the first current source, the other end of the first current source is connected with a power supply voltage, the other end of the first switch is connected with one end of the detection capacitor, one end of the third switch and one end of the first capacitor, and the other end of the detection capacitor and the other end of the third switch are grounded;

one end of the second switch is connected with one end of the second current source, the other end of the second current source is connected with a power supply voltage, the other end of the second switch is connected with one end of the calibration capacitor and one end of the fourth switch, and the other end of the calibration capacitor and the other end of the fourth switch are grounded;

one end of the fifth switch is connected with one end of the calibration capacitor, the other end of the fifth switch is connected with a first input end of the amplifier, and a second input end of the amplifier is used for inputting the reference voltage;

the sixth switch is connected in parallel with the integrating capacitor, which is connected in parallel with the amplifier;

one end of the seventh switch is grounded, and the other end of the seventh switch is connected with one end of the eighth switch and one end of the shielding capacitor;

the other end of the eighth switch is connected with the output end of the capacitance buffer, and the output voltage of the capacitance buffer is the reference voltage.

In some possible implementations, a full discharge phase is further included between the charge clearing phase and the first charge-discharge phase, and in the full discharge phase, the charges on the detection capacitor, the calibration capacitor, the first capacitor, and the shielding capacitor are cleared.

In some possible implementations, in the charge clearing stage, the sixth switch is turned on, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the seventh switch and the eighth switch are all turned off, so as to clear the charge stored in the integration capacitor;

in the full discharge stage, the third switch, the fourth switch and the seventh switch are closed, the first switch, the second switch, the fifth switch, the sixth switch and the eighth switch are all opened, and the charges stored on the detection capacitor, the calibration capacitor, the first capacitor and the shielding capacitor are cleared;

in the first charge-discharge stage, the eighth switch is turned on, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch and the seventh switch are all turned off, and the capacitance buffer charges the detection capacitor and the first capacitor;

in the second charge and discharge phase, the first switch, the second switch and the eighth switch are closed, the third switch, the fourth switch, the fifth switch, the sixth switch and the seventh switch are all opened, the voltage on the detection capacitor is charged to the reference voltage, and after the voltage on the detection capacitor is charged to the reference voltage, the first switch and the second switch are opened;

in the charge transfer phase, the fifth switch is closed, the first switch, the second switch, the third switch, the fourth switch, the sixth switch, the seventh switch, and the eighth switch are all open, and a portion of the charge on the calibration capacitor is transferred to the integration capacitor.

In some possible implementations, a first buffer phase is further included between the second charge-discharge phase and the charge transfer phase, and a second buffer phase is further included after the charge transfer phase, and the first buffer phase and the second buffer phase are used for keeping the charges on the detection capacitor, the calibration capacitor, and the integration capacitor unchanged;

wherein in the first snubber phase and the second snubber phase, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch, the seventh switch, and the eighth switch are all off.

In some possible implementations, the control module is further configured to:

and controlling the charge and discharge switch group, the integral switch group and the zero clearing switch group to repeatedly execute the operation from the complete discharge phase to the second buffer phase for multiple times.

In some possible implementations, the output voltage V of the integrator_outComprises the following steps:

wherein, the V_RFor the reference voltage, the Δ C_xFor the amount of change of the detection capacitor with respect to the base capacitance of the detection capacitor, C_SIs the capacitance value of the integrating capacitor, I₁Is the current value of the first current source, I₂And N is the current value of the second current source, and the execution times from the charging and discharging stage to the second buffering stage.

one end of the first switch is connected with one end of the first current source, the other end of the first current source is grounded, the other end of the first switch is connected with one end of the detection capacitor, one end of the third switch and one end of the first capacitor, the other end of the detection capacitor is grounded, and the other end of the third switch is connected with a power supply voltage;

one end of the second switch is connected with one end of the second current source, the other end of the second current source is grounded, the other end of the second switch is connected with one end of the calibration capacitor and one end of the fourth switch, the other end of the calibration capacitor is grounded, and the other end of the fourth switch is connected with a power supply voltage;

one end of the fifth switch is connected with one end of the calibration capacitor, the other end of the fifth switch is connected with a first input end of the amplifier, and a second input end of the amplifier is used for inputting the reference voltage; the sixth switch is connected in parallel with the integrating capacitor, which is connected in parallel with the amplifier;

one end of the seventh switch is connected with a power supply voltage, and the other end of the seventh switch is connected with one end of the shielding capacitor and one end of the eighth switch;

the other end of the eighth switch is connected with the output end of the voltage buffer, and the output voltage of the capacitance buffer is the reference voltage.

In some possible implementations, a full charge phase is further included between the charge clearing phase and the first charge-discharge phase, and in the full charge phase, one end of the detection capacitor, the calibration capacitor, the shielding capacitor, and the first capacitor is charged to a power supply voltage.

In some possible implementations, in the charge clearing stage, the sixth switch is turned on, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the seventh switch, and the eighth switch are all turned off, and the charge stored in the integration capacitor is cleared;

during the full charge phase, the third, fourth and seventh switches are closed, the first, second, fifth, sixth and eighth switches are all open, and the voltages on the detection capacitor, the calibration capacitor, the shielding capacitor and the first capacitor are all charged to the supply voltage;

in the first charge-discharge stage, the eighth switch is turned on, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the sixth switch and the seventh switch are all turned off, and the capacitance buffer discharges the detection capacitor, the shielding capacitor and the first capacitor;

in the second charge-discharge phase, the first switch, the second switch and the eighth switch are closed, the third switch, the fourth switch, the fifth switch, the sixth switch and the seventh switch are all open, the voltage on the detection capacitor is discharged from the power supply voltage to the reference voltage, and after the voltage on the detection capacitor is discharged to the reference voltage, the first switch and the second switch are open;

In some possible implementations, a first buffer phase is further included between the second discharging phase and the charge transfer phase, and a second buffer phase is further included after the charge transfer phase, and the first buffer phase and the second buffer phase are used for keeping the charges on the detection capacitor, the calibration capacitor, the first capacitor and the second capacitor, and the integration capacitor unchanged;

In some possible implementations, the control module is further configured to:

and controlling the charge and discharge switch group, the integral switch group and the zero clearing switch group to repeatedly execute the operation from the charge and discharge phase to the second buffer phase for multiple times.

wherein, V_RFor the reference voltage, the Δ C_xThe amount of change of the detection capacitor relative to a reference capacitance value, C_SIs the capacitance value of the integrating capacitor, I₁Is the current value of the first current source, I₂Is a current value of the second current source, the V_DDAnd N is the execution times from the charging and discharging stage to the second buffer stage.

In some possible implementations, the capacitance detection circuit further includes a comparator, a first input terminal of the comparator is connected to the detection capacitor, a second input terminal of the comparator is used for inputting the reference voltage, and an output terminal of the comparator is connected to the control module;

when the voltage of the detection capacitor reaches the reference voltage, the output signal of the comparator is turned over, and the control module controls the charge-discharge module to stop charging or discharging the detection capacitor and the calibration capacitor.

In some possible implementations, the capacitance detection circuit further includes a processing module configured to determine a variation of the capacitance value of the detection capacitor with respect to a base capacitance of the detection capacitor according to the output voltage of the integrator.

In some possible implementations, the calibration capacitor is configured to make the output voltage of the integrator a reference voltage when the capacitance value of the detection capacitor is a reference capacitance value, where a ratio of the reference capacitance value and the capacitance value of the calibration capacitor is equal to a ratio of a current value of the first current source and a current value of the second current source.

In some possible implementations, a current value of the first current source is greater than a current value of the second current source.

In some possible implementations, the capacitance detection circuit is applied to a capacitive sensor, the detection capacitor is a sensor capacitance of the capacitive sensor, and a capacitance value of the sensor capacitance when the capacitive sensor is not operated is a reference capacitance value.

In a second aspect, a touch device is provided, which includes the capacitance detection circuit in the first aspect and any possible implementation manner of the first aspect.

In a third aspect, a terminal device is provided, which includes the first aspect and the capacitance detection circuit in any possible implementation manner of the first aspect.

Therefore, in the embodiment of the present application, the shielding electrode and the detection electrode are driven in a time-sharing manner, so that the output voltage of the integrator is independent of the first capacitor formed by the shielding electrode and the detection electrode, and thus, even if there is a water droplet to cause a change in the capacitance value of the first capacitor, the output of the integrator is not affected, that is, a good waterproof function can be realized, and there is no delay problem caused by simultaneous driving. And because the charging of the shielding electrode and the charging of the detection electrode are carried out in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and the power consumption are reduced.

Drawings

Fig. 1 is a schematic diagram of waveforms of a sensing electrode and a shielding electrode.

Fig. 2 is a schematic structural diagram of a capacitance detection circuit according to an embodiment of the present application.

FIG. 3 is a schematic diagram of a capacitance detection circuit according to an embodiment of the present application.

FIG. 4 is a logic timing diagram of a capacitance detection circuit according to an embodiment of the present application.

FIG. 5 is a schematic diagram of a capacitance detection circuit according to another embodiment of the present application.

FIG. 6 is a logic timing diagram of a capacitance detection circuit according to another embodiment of the present application.

Fig. 7 is a schematic structural diagram of a touch device according to an embodiment of the present application.

Fig. 8 is a schematic structural diagram of a terminal device according to an embodiment of the present application.

Detailed Description

The embodiments of the present application will be described below with reference to the drawings.

In the related art of capacitive detection, a waterproof implementation is to arrange a shielding electrode around the sensing electrode of the capacitive sensor, shield the capacitance of water dripping to the system ground, and make the levels of the sensing electrode and the shielding electrode consistent during the capacitive detection, so that the capacitance formed by the sensing electrode and the shielding electrode does not absorb or release charges, as opposed to the capacitance being invisible.

In order to more effectively detect the charge variation of the sensor capacitance caused by the user operation, a calibration capacitor may be added to the capacitance detection circuit, and the capacitance value of the calibration capacitor is usually set to be approximately equal to the capacitance value (or referred to as the base capacitance) of the sensor capacitance when the capacitive sensor is not operated.

However, in the process of capacitance detection, the detection capacitor Cx and the calibration capacitor are charged and discharged so that the calibration capacitor cancels out the contribution of the basic capacitance of the detection capacitor Cx, and the charging and discharging speed is relatively fast. In practical application, due to the delay of the driving circuit of the shielding circuit, a voltage difference exists between the voltage of the shielding electrode and the voltage of the sensing electrode at the end of charging and discharging, as shown in fig. 1, so that the waterproof function of the shielding electrode is weakened.

In view of this, the embodiments of the present application provide a capacitance detection circuit, which can achieve good waterproof performance, and can reduce requirements on the response speed and/or the driving capability of a driving circuit of a shielding electrode, so as to reduce design difficulty and system functions.

Fig. 2 is a schematic structural diagram of a capacitance detection circuit 100 according to an embodiment of the application, where, as shown in fig. 2, the capacitance detection circuit 100 is connected to a detection capacitor 110, and the capacitance detection circuit 100 includes: a calibration capacitor 120;

a shield electrode 170, said shield electrode 170 and a detection electrode of said detection capacitor 110 forming a first capacitor, said shield electrode 170 and a system ground forming a shield capacitor;

a charge and discharge module 140 including a first current source 141 and a second current source 142, the first current source 141 being configured to charge or discharge the detection capacitor, the first capacitor, and the shielding capacitor, and the second current source 142 being configured to charge or discharge the calibration capacitor;

a shield electrode driving module 180 for charging or discharging the shield capacitor and the first capacitor;

the integrator 150 is used for converting the capacitance effect of the detection capacitor 110, such as the charge amount or the charge variation on the capacitor, into a voltage signal;

the control module 130 is configured to control working states of the charging and discharging module 140, the integrator 150, and the shielding electrode driving module 180;

in a first charge and discharge phase, the shielding electrode driving module 180 charges or discharges the shielding capacitor and the first capacitor so that a voltage on the shielding capacitor is a reference voltage;

the first current source 141 charges or discharges the detection capacitor, the first capacitor and the shielding capacitor, and the second current source 142 charges or discharges the calibration capacitor in a second charge and discharge phase after the first charge and discharge phase, wherein the voltage on the detection capacitor is charged to or discharged to the reference voltage in the second charge and discharge phase.

It should be understood that, in the embodiment of the present application, the first capacitor and the shielding capacitor are equivalent capacitors, that is, the shielding electrode and the detecting electrode may serve as two plates of the capacitor to form the first capacitor, but do not indicate that the shielding electrode and the detecting electrode are used in a circuit to form the first capacitor, and it is understood that the shielding electrode is used to shield the influence of interferents such as water drops on capacitance detection, and the detecting electrode is used to receive the touch of a user's finger, and further detect a capacitance value change caused by the touch of the user's finger through a subsequent detecting circuit. This is also true for the shield capacitor, which is not described in detail here.

Optionally, in some embodiments, the detection capacitor is a detection capacitance (measurement capacitor) formed by a driving electrode and a sensing electrode (i.e., a detection electrode) on a touch panel (touch panel), where the driving electrode is grounded, or the detection capacitor may be a detection capacitance formed by a sensing electrode and a ground.

Optionally, in this embodiment, the calibration capacitor 120 is configured to make the output voltage of the integrator 150 be a reference voltage when the capacitance value of the detection capacitor 110 is a reference capacitance value, where a ratio of the reference capacitance value and the capacitance value of the calibration capacitor is equal to a ratio of a current value of the first current source 141 and a current value of the second current source 142.

It should be noted that, for convenience of description, the embodiment of the present application introduces a concept of detecting a capacitance value of a capacitor, and determines whether there is a touch by detecting a change in the capacitance value of the capacitor, it should be noted that, whether a user touches the capacitor, the capacitance value of the capacitor can be regarded as a constant, and the change in the capacitance value of the capacitor described in the present application refers to a change in an equivalent capacitance of an integrator connected to a subsequent stage The new capacitance generated when the sensing capacitor is touched is added to generate an equivalent capacitor.

It should be understood that the capacitance detection circuit of the embodiments of the present application can be applied to various circuits or systems requiring capacitance detection, and particularly, the capacitance detection circuit may be applied in a capacitive sensor, in which case, the detection capacitor may be the sensor capacitance of the capacitive sensor, when the user does not operate the capacitance sensor, the capacitance value of the detection capacitor is a reference capacitance value, the reference capacitance value may also be referred to as a base capacitance, or self capacitance, nominal capacitance value, etc., which, when the capacitive sensor is operated by a user, corresponds to the formation of a new capacitance at the user's finger and terrain, the capacitance value of the detection capacitor changes relative to the base capacitance, and the integrator can convert the capacitance signal (or capacitance effect) of the detection capacitor into a voltage signal, and further, can determine the capacitance value of the detection capacitor according to the voltage signal.

The capacitance detection circuit of the embodiment of the present application may include a first current source and a second current source, which are respectively used to charge or discharge the detection capacitor and the calibration capacitor. The calibration capacitor is configured to make the output voltage of the integrator a reference voltage when the capacitance value of the detection capacitor is a reference capacitance value, or the calibration capacitor is configured to cancel a contribution amount to the output voltage of the integrator when the capacitance value of the detection capacitor is the reference capacitance value. Therefore, in the embodiment of the present application, the purpose of adjusting the capacitance value of the calibration capacitor may be achieved by adjusting a proportional relationship between the current value of the first current source and the current value of the second current source, for example, the current value of the first current source may be set to be greater than the current value of the second current source, so that the capacitance value of the calibration capacitor may be smaller than the reference capacitance value of the detection capacitor.

Optionally, in this embodiment of the present application, the calibration capacitor may be a capacitor or a capacitor array with a variable capacitance value, or may also be a capacitor or a capacitor array with a fixed capacitance value, which is not limited in this embodiment of the present application. The first current source and the second current source may be current sources having a proportional relationship, for example, the first current source and the second current source may be obtained by mirroring a current source, and the proportional relationship between the current value of the first current source and the current value of the second current source may be fixed or adjustable, which is not limited in this embodiment of the present application.

Optionally, in this embodiment of the application, the capacitance detection circuit 100 further includes a charge/discharge switch group, a clear switch group, and an integration switch group, the integrator includes an integration capacitor and an amplifier, and the shielding electrode driving module includes a voltage buffer;

the control module 130 may control the working states of the charge-discharge module, the shielding electrode driving module and the integrator through the charge-discharge switch group, the clear switch group and the integration switch group, for example, control when the shielding electrode driving module charges or discharges the detection capacitor and the shielding capacitor, control when the charge-discharge module charges the detection capacitor and the calibration capacitor, and discharge when the detection capacitor and the calibration capacitor, and control when the integrator performs integration.

In one embodiment of the present application, the control module is configured to:

during a charge transfer phase, controlling the transfer of a portion of the charge stored on the calibration capacitor to the integration capacitor via the integration switch bank.

Therefore, in the embodiment of the application, a good waterproof function can be realized by time-sharing charging and discharging of the shielding electrode and the induction electrode, the driving capability requirement of the shielding electrode can be greatly reduced, and the design difficulty and the system power consumption are further reduced.

Optionally, in this embodiment of the present application, a first buffer phase may be further included between the second charge-discharge phase and the charge transfer phase, and a second buffer phase may be further included after the charge transfer phase, where the first buffer phase and the second buffer phase are used to avoid a charge leakage problem caused by frequent switching of switches, and charges on the detection capacitor, the shielding capacitor, the first capacitor, the calibration capacitor, and the integration capacitor are unchanged in the first buffer phase and the second buffer phase.

Alternatively, in some embodiments, the shielding electrode driving circuit may include a voltage buffer capable of outputting a stable voltage, or in other embodiments, the voltage buffer may be implemented by using other equivalent circuits, only it is capable of outputting a stable voltage.

Optionally, in some embodiments, the capacitance detection circuit 100 may further include a comparator, a first input terminal of the comparator is connected to the detection capacitor, a second input terminal of the comparator is used for inputting the reference voltage, and an output terminal of the comparator is connected to the control module;

specifically, when the voltage of the detection capacitor reaches the reference voltage, the output signal of the comparator is inverted (for example, from a low level to a high level, or from a high level to a low level), and the control module controls the charging and discharging module to stop charging or discharging the detection capacitor and the calibration capacitor when the output signal of the comparator is inverted.

That is, when the voltage on the detection capacitor reaches the reference voltage (for example, the voltage of the detection capacitor is charged to the reference voltage, or the voltage of the detection capacitor is discharged to the reference voltage), the output signal of the comparator is inverted, the output signal can be used as the input signal of the control module, and the control module can control the charge-discharge module to stop charging or discharging the detection capacitor and the calibration capacitor, that is, control the first current source to stop charging or discharging the detection capacitor, and control the second current source to stop charging or discharging the calibration capacitor when the output signal of the comparator is inverted. Specifically, the control module may control the charge-discharge module to stop charging or discharging the detection capacitor and the calibration capacitor through the charge-discharge switch set.

It should be understood that, in the embodiment of the present application, the equivalent circuit of the comparator may also be used to implement the above function, as long as the charging and discharging module is controlled to stop charging or discharging the detection capacitor and the calibration capacitor when the voltage of the detection capacitor reaches the reference voltage, which is not specifically limited in the embodiment of the present application.

Optionally, in some embodiments, the capacitance detection circuit 100 further includes a processing module, configured to determine, according to the output voltage of the integrator, a variation of the capacitance value of the detection capacitor with respect to the reference capacitance value.

For example, the processing module may be an ADC, or may also be other circuits or modules having a processing function, which is not limited in this embodiment of the present application. The processing module may determine a capacitance value of the detection capacitor from the output voltage of the integrator. Specifically, the processing module may convert the voltage signal output by the integrator into a digital signal, and determine the capacitance value of the detection capacitor according to the digital signal, for example, if the capacitance detection circuit is applied to a capacitance sensor, the processing module may determine one digital signal when the capacitance sensor is not operated by a user, determine the other digital signal when the capacitance sensor is operated by the user, and then may determine the change amount of the capacitance value of the sensor capacitance according to the difference between the two digital signals.

In the following, with reference to specific examples of fig. 3 to 6, an implementation of the capacitance detection circuit according to the embodiment of the present application is described in detail.

It should be understood that the examples shown in fig. 3-6 are for the purpose of helping those skilled in the art better understand the embodiments of the present application, and are not intended to limit the scope of the embodiments of the present application. It will be apparent to those skilled in the art from the description of fig. 3 to 6 that various equivalent modifications or changes may be made, and such modifications or changes also fall within the scope of the embodiments of the present application.

Fig. 3 is a circuit configuration diagram of the capacitance detection circuit 200 according to an embodiment of the present application. As shown in fig. 3, the capacitance detection circuit 200 is connected to a detection capacitor Cx, and includes:

a shield electrode, the shield electrode and the detection electrode of the detection capacitor Cx forming a first capacitor Cm, the shield electrode and the system ground forming a shield capacitor Cshd, the lower electrode of the first capacitor and the upper electrode of the shield capacitor can be regarded as an equivalent circuit structure schematic diagram of the shield electrode in fig. 3;

the shield electrode driving circuit includes a voltage buffer 270;

calibration capacitor Cc, control module 230, charge and discharge module 240, integrator 250, processing module 260, and comparator 290.

The charge-discharge module 240 includes a first current source 241 and a second current source 242, and the integrator 250 includes an integrating capacitor Cs and an amplifier 252.

The capacitance detection circuit further comprises a charge and discharge switch group, a zero clearing switch group and an integral switch group, wherein the charge and discharge switch group comprises a first switch S1, a second switch S2, a third switch S3, a fourth switch S4, a seventh switch S7 and an eighth switch S8, the integral switch group comprises a fifth switch S5, and the zero clearing switch group comprises a sixth switch S6.

The charge and discharge switch group is configured to control a charge and discharge module 240 to charge or discharge the detection capacitor Cx, the calibration capacitor Cc, the first capacitor or the shielding capacitor, specifically, the first switch S1 is configured to control the first current source 241 to charge the detection capacitor Cx, the second switch S2 is configured to control the second current source 242 to charge the calibration capacitor Cc, the third switch is configured to control the detection capacitor Cx and the first capacitor Cm to be discharged, the fourth switch is configured to control the calibration capacitor Cc to be discharged, the seventh switch S7 is configured to control the shielding capacitor to be discharged, and the eighth switch is configured to control a voltage buffer 270 to charge the first capacitor Cm.

The integration switch set is used for integrating the integration capacitor, and specifically, the fifth switch S5 is used for controlling the integration of the integration capacitor Cs. The zero clearing switch group is used for clearing the charges stored in the integrating capacitor, and specifically, the sixth switch is used for controlling to clear the charges stored in the integrating capacitor Cs.

Specifically, one end of the first switch S1 is connected to one end of the first current source 241, and the other end of the first current source 241 is connected to the power supply voltage (i.e., V)_DD) The other end of the first switch S1 is connected to one end of the detection capacitor Cx, one end of the third switch S3, and one end of the first capacitor Cm, both the other end of the detection capacitor Cx and the other end of the third switch S3 are grounded, and the other end of the first capacitor Cm is connected to one end of a shield capacitor Cshd;

one end of the second switch S2 is connected to one end of the second current source 242, and the other end of the second current source is connected to the power supply voltage (i.e., V)_DD) The other end of the second switch S2 is connected to one end of the calibration capacitor Cc and one end of the fourth switch S4, and the other end of the calibration capacitor Cc and the other end of the fourth switch S4 are both grounded, that is, one end (e.g., the upper plate) of the calibration capacitor Cc is connected to the power supply voltage V through the second switch S2 and the second current source 242_DDAnd said schoolThe same end (e.g., the upper plate) of the quasi-capacitor Cc is grounded through the fourth switch S4, and the other end (e.g., the lower plate) of the quasi-capacitor Cc is grounded, and as is clear from this, the quasi-capacitor Cc and the detection capacitor Cx are independent capacitors without a common plate therebetween;

one end of the fifth switch S5 is connected to one end of the calibration capacitor Cc, the other end of the fifth switch S5 is connected to the first input end (i.e., the negative input end) of the amplifier 252, and the second input end (i.e., the positive input end) of the amplifier 252 is used for inputting the reference voltage (denoted as V)_R)；

The sixth switch S6 is connected in parallel with the integrating capacitor Cs, which is connected in parallel with the amplifier 252, i.e. the integrating capacitor Cs is connected across the negative input and output of the amplifier 252;

one end of the seventh switch S7 is grounded, the other end of the seventh switch S7 is connected to one end of the eighth switch S8 and one end of the shielding capacitor Cshd, and the other end of the shielding capacitor Cshd is grounded;

the other end of the eighth switch S8 is connected to the output end of the capacitor buffer 270, and the output voltage of the capacitor buffer 270 is the reference voltage V_R；

A first input terminal (e.g., a positive input terminal) of the comparator 290 is connected to one terminal of the detection capacitor Cx, and a second input terminal (e.g., a negative input terminal) of the comparator 290 is used for inputting the reference voltage V_RThe output end of the comparator 290 is connected to the control module 230, and the control module 230 is used for controlling the switches S1-S8 to be turned on and off. Of course, the connection of the positive and negative inputs of the comparator 290 can be reversed, and the disclosure is not limited thereto.

Further, the output terminal of the integrator 250 may be further connected to a processing module 260, and the processing module 260 may be configured to compare the output voltage V of the integrator 250_outProcessing is performed to determine the capacitance value of the sensing capacitor Cx or the amount of charge on the sensing capacitor Cx to further determine whether there is a touch.

The operation of the capacitance detection circuit shown in fig. 3 will be described in detail below with reference to the logic timing diagram shown in fig. 4.

In fig. 4, the curves corresponding to S1 to S8 are waveform diagrams of control signals of the first switch S1 to the eighth switch S8, respectively, and when the control signal is at a high level, the corresponding switch is closed, and when the control signal is at a low level, the corresponding switch is opened, and V is set_x、V_nAnd V_shdRespectively a detection capacitor Cx, a calibration capacitor Cc and a shielding capacitor C_shdVoltage curve of_outIs the output voltage of the integrator 250.

In the charge clearing phase (corresponding to time period t in fig. 4)₀～t₁) The sixth switch S6 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the seventh switch S7 and the eighth switch S8 are all opened, and the charge stored on the integrating capacitor Cs is cleared, i.e., at t₁At the moment, the charge amount on the integrating capacitor Cs is zero, and the output voltage V of the integrator 250 is zero according to the pseudo-short characteristic of the amplifier_out＝V_R。

In this embodiment, a full discharge phase (corresponding to time period t in fig. 4) is also included before the first charge-discharge phase₁～t₂) In the full discharge phase, the third switch S3, the fourth switch S4 and the seventh switch S7 are closed, and the first switch S1, the second switch S2, the fifth switch S5, the sixth switch S6 and the eighth switch S8 are all opened, so that the first capacitor Cm formed by the sensing capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the shielding electrode and the sensing electrode is fully discharged. At t₂At the moment, the amount of charge stored on the sensing capacitor Cx, the calibration capacitor Cc, the first capacitor Cm and the shield capacitor Cshd is zero, and the output voltage V of the integrator 250 is zero_out＝V_R。

In a first charge-discharge phase (corresponding to time period t in fig. 4)₂～t₃) The eighth switch S8 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, andthe fifth switch S5, the sixth switch S6, and the seventh switch S7 are all turned off, and the capacitance buffer 270 charges the detection capacitor Cx and the first capacitor Cm. At t₃At the moment, the amounts of charges stored on the detection capacitor Cx and the first capacitor Cm are respectively:

wherein Q is_Cx,t3Is at t₃At the moment, the charge amount, Q, on the capacitor Cx is detected_Cm,t3Is at t₃At that moment, the amount of charge on the first capacitor Cm.

In a second charge-discharge phase (corresponding to time period t in fig. 4)₃～t₄) The first switch S1, the second switch S2, and the eighth switch S8 are closed, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the seventh switch S7 are all open, and the first current source 241 and the second current source 242 charge the sensing capacitor Cx and the calibration capacitor Cc, respectively. When the voltage V on the detection capacitor Cx_xUp to the reference voltage V_RWhen the output state of the comparator 290 is inverted, the control module 230 controls the first switch S1 and the second switch S2 to be turned off, that is, controls the first current source 241 and the second current source 242 to stop charging the detection capacitor Cx and the calibration capacitor Cc.

At t₄At this time, the amounts of charges stored in the detection capacitor Cx and the first capacitor Cm are:

Q_Cx,t4＝V_RC_xformula (3)

Q_Cm,t4＝(V_R-V_R)C_m0 formula (4)

Then the voltage on the detection capacitor Cx charges to the referenceReference voltage V_RRequired time period t_chComprises the following steps:

wherein, the C_xRepresents a reference capacitance value (i.e., base capacitance) of the detection capacitor Cx, the I₁Is the current value of the first current source 241.

Since the charging time periods of the calibration capacitor Cc and the detection capacitor Cx are equal, then at t₄At the moment, the quantity of charge Q stored on said calibration capacitor Cc_Cc,t4Comprises the following steps:

wherein, the I₂Is the current value of the second current source.

Since the detection capacitor Cx is charged to the reference voltage V_RRequired time t_chThus, the time period t₃～t₄Is required to be greater than or equal to the duration t_chI.e. t_ch≤t₄-t₃。

Optionally, in order to avoid charge leakage caused by frequent switching of the switch, a first buffer phase (corresponding to time period t in fig. 4) may be further included after the second charge-discharge phase₄～t₅) The charges on the detection capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm and the integration capacitor Cs remain unchanged during said first snubber phase, in particular the first through eighth switches S1-S8 are all open during said first snubber phase.

Thereafter, in the charge transfer phase (corresponding to the time period t in fig. 4)₅～t₆) With the fifth switch S5 closed and the first, second, third, fourth, sixth, seventh and eighth switches S1, S2, S3, S4, S6, S7 and S8 all open, the negative input of amplifier 252 and the positive input of amplifier 252 are electrically connected due to the virtual short nature of the amplifierVoltage equalisation, i.e. both being said reference voltage V_RTherefore, the voltages of the upper plate of the calibration capacitor Cc and the left plate of the integration capacitor Cs are clamped to the reference voltage V_RAt time t, due to the virtual-off nature of the amplifier₅～t₆In this case, the charge stored on the calibration capacitor Cc is redistributed over the calibration capacitor Cc and the integrating capacitor Cs, and the charge balance equation is shown in equation (7):

wherein, the C_cIs the capacitance value of the calibration capacitor Cc, C_sIs the capacitance value of the integrating capacitor Cs, said V_RC_cIs the amount of charge stored on the calibration capacitor Cc after charge transfer, the (V)_R-V_OUT)·C_SIs the amount of charge stored on the integrating capacitor Cs after charge transfer.

The output voltage V of the integrator 250 can be obtained according to the formula (7)_outAs shown in the following formula:

as can be seen from equation (8), the capacitance C of the calibration capacitor Cc is controlled_cA current value I of the first current source₁A current value I of the second current source₂Satisfies C_C-C_XI₂/I₁0, i.e. C_C＝C_XI₂/I₁Thereby enabling the output voltage V of the integrator 250 to be set to the reference capacitance value when the capacitance value of the detection capacitor Cx is the reference capacitance value_outFor said reference voltage V_RThat is, when the user does not operate the capacitance sensor, the output voltage of the integrator is the reference voltage V_R。

From formula C_C＝C_XI₂/I₁It can be seen that as long as I is set₂/I₁<1, canCan make C_C<C_XAnd therefore, the purpose of reducing the capacitance value of the calibration capacitor can be achieved, and the capacitance value and the size of the capacitor are in direct proportion, and the purpose of offsetting the reference capacitance value of the detection capacitor Cx can be achieved through the smaller calibration capacitor by setting the current value of the first current source to be smaller than that of the second current source.

Optionally, in order to avoid charge leakage caused by frequent switching of the switch, a second buffer phase (corresponding to time period t in fig. 4) may be further included after the charge transfer phase₆～t₇) The charges on the detection capacitor Cx, the calibration capacitor Cc, the first capacitor Cm, the shielding capacitor Cshd and the integration capacitor Cs remain unchanged during said second snubber phase, in particular the first switch S1 to the eighth switch S8 are all open during said second snubber phase.

Optionally, in this embodiment of the application, the actions from the charge-discharge phase to the second buffer phase may be repeatedly performed for multiple times, for example, at time t₇After a time period t₇～t₈In (1), the time period t may be performed₁～t₂At time period t₈～t₉In (1), the time period t may be performed₂～t₃At time period t₁₀～t₁₁In (1), the time period t may be performed₃～t₄At time period t₁₂～t₁₃In (1), the time period t may be performed₄～t₅At time period t₁₃～t₁₄In (1), the time period t may be performed₅～t₆The next repeated execution process is similar to the related operation in (1), and is not described again here.

Then, when the above-mentioned t is repeatedly performed₁～t₇During the process N times, the output voltage V of the integrator_outComprises the following steps:

under the condition of satisfying C_C＝C_XI₂/I₁When the capacitance value of the detection capacitor Cx changes (for example, when touched by a finger), for example, the capacitance value of the detection capacitor Cx is changed from the reference capacitance value C_xIs changed into C_x+ΔC_xWhen (C)_x+ΔC_xCapacitance value of equivalent capacitance generated when a touch object such as a finger touches the sensor capacitance), the output voltage V of the integrator 250_outComprises the following steps:

in one embodiment, the capacitance variation of the detection capacitor can be calculated according to Vout and N, so as to determine whether there is a touch. As can be seen from the formula (10), the above process is repeatedly performed for a plurality of times, which is beneficial to improving the sensitivity of capacitance detection. For example, when N is 1, V is for a smaller Δ Cx_outIs almost equal to V_RIt may be erroneously determined that there is no object touch, and when N is large, even a small Δ Cx can be changed to a large value by multiplying N, and thus V is obtained_outAnd V_RThere may be a large difference from which it is determined whether a touch is present to increase the sensitivity of detection.

Therefore, the capacitance detection circuit of the embodiment of the application charges the detection capacitor and the calibration capacitor through the first current source and the second current source respectively, so that the purpose of controlling the proportional relation between the reference capacitance value and the capacitance value of the calibration capacitor through the proportional relation between the current values of the first current source and the second current source can be achieved, and therefore, as long as the current value of the first current source is set to be larger than the current value of the second current source, the purpose of reducing the capacitance value of the calibration capacitor can be achieved, the area of the capacitance detection circuit can be reduced, and the cost of a chip is reduced.

Further, by time-sharing driving of the shielding electrode and the sensing electrode, it can be seen from formula (10) that the output voltage of the integrator is independent of the first capacitor Cm formed by the shielding electrode and the sensing electrode, so that even if there is a water droplet to cause a change in Cm, the output of the integrator will not be affected, i.e. a good waterproof function can be achieved, and there will be no delay problem caused by simultaneous driving. And because the shielding electrode charging and the induction electrode charging are carried out in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and the power consumption are reduced.

Fig. 5 is a schematic block diagram of a capacitance detection circuit 400 according to another embodiment of the present application, and as shown in fig. 5, the capacitance detection circuit 400 is connected to a detection capacitor Cx, and the capacitance detection circuit 400 includes:

a shielding electrode, a first capacitor Cm is formed between the shielding electrode and the detection electrode of the detection capacitor Cx, a shielding capacitor Cshd is formed between the shielding electrode and the system ground, and the lower electrode of the first capacitor and the upper electrode of the shielding capacitor can be regarded as an equivalent circuit structure schematic diagram of the shielding electrode in fig. 5;

the shield electrode driving circuit includes a voltage buffer 470;

calibration capacitor Cc, control module 430, charge and discharge module 440, integrator 450, processing module 460, and comparator 490.

The charge-discharge module 440 includes a first current source 441 and a second current source 442, and the integrator 450 includes an integrating capacitor Cs and an amplifier 452.

The charge and discharge switch group is configured to control a charge and discharge module 440 to charge or discharge the detection capacitor Cx, the calibration capacitor Cc, the first capacitor or the shielding capacitor, specifically, the first switch S1 is configured to control the first current source 441 to discharge the detection capacitor Cx, the second switch S2 is configured to control the second current source 442 to discharge the calibration capacitor Cc, the third switch is configured to control the detection capacitor Cx and the first capacitor Cm to be charged, the fourth switch is configured to control the calibration capacitor Cc to be charged, the seventh switch S7 is configured to control the shielding capacitor Cc to be charged, and the eighth switch is configured to control a voltage buffer 270 to discharge the first capacitor Cm.

It should be noted that the circuit structures of the embodiments shown in fig. 5 and fig. 3 are similar, and the differences are that: in the embodiment shown in fig. 3, one end of the first current source and one end of the second current source are connected to the power supply voltage, and one end of the third switch, the fourth switch and the seventh switch are connected to ground, in the embodiment shown in fig. 5, one end of the first current source and one end of the second current source are connected to ground, one end (for example, the upper plate) of the calibration capacitor Cc is connected to ground through the second switch S2 and the second current source 442, and the same end (for example, the upper plate) of the calibration capacitor Cc is connected to the power supply voltage V through the fourth switch S4_DDAnd the other end (e.g., the lower plate) of the calibration capacitor Cc is grounded, one end of the first capacitor Cm is connected to one end of the third switch, the other end of the shield capacitor is grounded, one end of the seventh switch is connected to one end of the shield capacitor and one end of the eighth switch, the other end of the seventh switch is connected to the power supply voltage, and the other end of the eighth switch is connected to the capacitive buffer. The connection relationship of the other elements in fig. 5 is not described in detail here.

The operation of the capacitance detection circuit shown in fig. 5 will be described in detail below with reference to the logic timing diagram shown in fig. 6.

In fig. 6, the curves corresponding to S1 to S8 are waveforms of control signals of the first switch S1 to the eighth switch S8, respectivelyIn the figure, when the control signal is at a high level, the corresponding switch is closed, and when the control signal is at a low level, the corresponding switch is opened, although the switch may be closed or opened corresponding to the low level and the high level, respectively. V_x、V_nAnd V_shdRespectively a detection capacitor Cx, a calibration capacitor Cc and a shielding capacitor C_shdVoltage curve of_outIs the output voltage of the integrator 250.

Similar to the previous embodiment, during the charge clearing phase (corresponding to the time period t in fig. 6)₀～t₁) The sixth switch S6 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the fifth switch S5, the seventh switch S7 and the eighth switch S8 are all opened, and the charge stored on the integrating capacitor Cs is cleared, i.e., at t₁At the moment, the charge on the integrating capacitor Cs is zero, and the output voltage V of the integrator 450 is zero according to the pseudo-short characteristic of the amplifier_out＝V_R。

In this embodiment, a full charge phase (corresponding to time period t in fig. 6) is further included before the first charge-discharge phase₁～t₂) In the full charge phase, the third switch S3, the fourth switch S4 and the seventh switch S7 are closed, and the first switch S1, the second switch S2, the fifth switch S5, the sixth switch S6 and the eighth switch S8 are all opened, so that the first capacitor Cm formed by the sensing capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the shielding electrode and the sensing electrode is fully charged. At t₂At the moment, the charge amount stored on the sensing capacitor Cx, the calibration capacitor Cc, and the first capacitor Cm are:

Q_Cx,t2＝C_xV_DDformula (11)

Q_Cc,t2＝C_cV_DDFormula (12)

Q_Cm,t20 formula (13)

Output voltage V of integrator 450_outIs a V_R。

In a first charge-discharge phase (corresponding to time period t in fig. 6)₂～t₃) The first to seventh switches S1 to S7 are opened, the eighth switch S8 is closed, and the voltage buffer 470 simultaneously charges the detection capacitor Cx, the shield capacitor Cshd, and the first capacitor Cm. At time t3, the amounts of charge stored on the detection capacitor Cx, the shield capacitor Cshd, and the first capacitor Cm are:

in the second charge-discharge phase (corresponding to time period t in fig. 6)₃～t₄) The first switch S1, the second switch S2, and the eighth switch S8 are closed, the third switch S3, the fourth switch S4, the fifth switch S5, the sixth switch S6, and the seventh switch S7 are all opened, and the detection capacitor Cx and the calibration capacitor Cc are discharged by the first current source 441 and the second current source 442, respectively. When the voltage V on the detection capacitor Cx_xDischarging to the reference voltage V_RAt this time, the output state of the comparator 490 is reversed, and at this time, the control module 430 controls the first switch S1 and the second switch S2 to be turned off, i.e., controls the first current source 441 and the second current source 442 to stop discharging the detection capacitor Cx and the calibration capacitor Cc.

Q_Cx,t4＝V_RC_xformula (16)

Q_Cm,t4＝(V_R-V_R)C_m0 formula (17)

Then, the voltage on the detection capacitor Cx is derived from the supply voltage V_DDDischarging to a reference voltage V_RRequired time period t_disComprises the following steps:

wherein, the C_xIs a reference capacitance value of the detection capacitor Cx, I₁Is the current value of the first current source 441.

Since the discharge time periods of the calibration capacitor Cc and the detection capacitor Cx are equal, then at t₄At the moment, the charge Q stored on the capacitor Cc is calibrated_Cc,t4Comprises the following steps:

wherein, the C_cFor the capacitance value of the calibration capacitor, I₂Is the current value of the second current source 442.

Due to the discharge of the sensing capacitor 420 from the supply voltage to the reference voltage V_RRequired time t_disThus, the time period t₃～t₄Is required to be greater than or equal to the duration t_disI.e. t_dis≤t₄-t₃。

Similar to the previous embodiment, in order to avoid charge leakage caused by frequent switching of the switch, a first buffer phase (corresponding to time period t in fig. 6) may be further included after the charge-discharge phase₄～t₅) The charges on the detection capacitor Cx, the calibration capacitor Cc, the shielding capacitor Cshd, the first capacitor Cm and the integration capacitor 451 remain unchanged during said first snubber phase, in particular the first through eighth switches S1-S8 are all open during said first snubber phase.

Thereafter, in the charge transfer phase (corresponding to the time period t in fig. 6)₅～t₆) The fifth switch S5 is closed, the first switch S1, the second switch S2, the third switch S3, the fourth switch S4, the sixth switch S6, the seventh switch S7 and the eighth switch S8 are all open, and the voltages of the negative input terminal of the amplifier 452 and the positive input terminal of the amplifier are equal due to the virtual short characteristic of the amplifier, that is, the reference voltage V is the reference voltage V_RThus, the capacitor is calibratedThe voltages of the upper plate of Cc and the left plate of integrating capacitor 451 are clamped to the reference voltage V_RAt time t, due to the virtual-off nature of the amplifier₅～t₆In this regard, the charge stored on the calibration capacitor 420 is redistributed over the calibration capacitor Cc and the integrating capacitor 451, and the charge balance equation is shown in equation (20):

wherein, the C_sIs the capacitance value of the integrating capacitor 451, the V_RC_cThe (V) is the amount of charge stored on the calibration capacitor 420 after charge transfer_R-V_OUT)·C_SIs the amount of charge stored on the integrating capacitor 451 after charge transfer.

The output voltage V of the integrator 450 can be obtained according to the equation (9)_outAs shown in the following formula:

as can be seen from equation (21), the capacitance C of the calibration capacitor is controlled_cA current value I of the first current source₁A current value I of the second current source₂Satisfies C_C-C_XI₂/I₁0, so that when the capacitance value of the detection capacitor is the reference capacitance value, the output voltage of the integrator 450 is the reference voltage V_RThat is, when the user does not operate the capacitance sensor, the output voltage of the integrator is the reference voltage V_R。

From the formula C_C＝C_XI₂/I₁It can be seen that as long as I is set₂/I₁<1, can make C_C<C_XThereby achieving the purpose of reducing the capacitance value of the calibration capacitor.

Similar to the previous embodiment, a second buffer may also be included after the charge transfer phaseThe flushing phase (corresponding to time period t in fig. 6)₆～t₇) The charges on the detection capacitor 410, the calibration capacitor 420, the shielding capacitor Cshd, the first capacitor Cm and the integration capacitor 451 remain unchanged during said second buffer phase, in particular, the first switch S1 to the eighth switch S8 are all open during said second buffer phase.

Optionally, in this embodiment, the actions from the charge and discharge phase to the second buffer phase may also be repeatedly performed for multiple times, which is not described herein again. Then, when the above operation process is repeatedly performed N times, the output voltage of the integrator 450 is:

under the condition of satisfying C_C＝C_XI₂/I₁When the capacitance value of the detection capacitor changes, for example, when the capacitance value of the detection capacitor is changed from the reference capacitance value C_xIs changed into C_x+ΔC_xThe output voltage of the integrator 450 is:

as can be seen from the formula (23), the above operation process is repeatedly performed for a plurality of times, which is beneficial to improving the sensitivity of capacitance detection.

Therefore, the capacitance detection circuit of the embodiment of the application charges the detection capacitor and the calibration capacitor firstly, and then discharges the detection capacitor and the calibration capacitor through the first current source and the second current source respectively, so that the purpose of controlling the proportional relation between the reference capacitance value and the capacitance value of the calibration capacitor through the proportional relation between the current values of the first current source and the second current source can be achieved, and therefore, as long as the current value of the first current source is larger than the current value of the second current source, the purpose of reducing the capacitance value of the calibration capacitor can be achieved, the area of the capacitance detection circuit can be reduced, and the cost of a chip is reduced.

Through carrying out the timesharing drive to shielding electrode and response electrode, can see from equation (10), the output voltage of integrator is irrelevant with the first capacitor Cm that forms between shielding electrode and the response electrode, like this, even there is the water droplet to exist and leads to Cm to change, can not influence the output of integrator yet, can realize good waterproof function to there is not the delay problem that the drive brought simultaneously. And because the shielding electrode charging and the induction electrode charging are carried out in a time-sharing manner, the requirement on the driving capability of the shielding electrode can be greatly reduced, and the design difficulty and the power consumption are reduced.

In other embodiments, the circuits shown in fig. 3 and fig. 5 may also be used to form a differential circuit, and further, the difference between the output voltages of the two integrators is used to determine whether there is a touch, which is beneficial to suppress common mode noise and improve the accuracy of touch detection.

Fig. 7 shows a schematic structure diagram of a touch device 600 according to an embodiment of the present application, and as shown in fig. 7, the touch device 600 may include a capacitance detection circuit 601, where the capacitance detection circuit 601 may be the capacitance detection circuit described in the foregoing embodiment. Alternatively, the touch device may be a capacitive sensor, and a user may operate a sensing area of the capacitive sensor, so that a capacitive effect may be generated between the user and the sensing area, further, the capacitive detection circuit may convert the capacitive effect into a voltage signal, and then may convert the voltage signal into a digital signal, and further, information that the user operates the capacitive sensor, for example, information such as a touch position may be determined according to the digital signal.

Fig. 8 shows a schematic structural diagram of a terminal device 700 according to an embodiment of the present application, and as shown in fig. 8, the terminal device may include a capacitance detection circuit 701, where the capacitance detection circuit 701 may be the capacitance detection circuit described in the above embodiment, and the capacitance detection circuit may be used to detect information that a user operates the capacitance detection circuit, for example, information such as a touch position.

By way of example and not limitation, the terminal device 700 may be a mobile phone, a tablet computer, a notebook computer, a desktop computer, a vehicle-mounted electronic device, or a wearable smart device.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. A capacitance sensing circuit connected to a sensing capacitor, comprising:

calibrating the capacitor;

an integrator for converting the capacitance of the detection capacitor into a voltage signal;

a second charge-discharge phase following the first charge-discharge phase, the first current source charging or discharging the detection capacitor, the first capacitor and the shield capacitor, the second current source for charging or discharging the calibration capacitor, wherein in the second charge-discharge phase the voltage on the detection capacitor is charged to the reference voltage or discharged to the reference voltage, the voltage on the shield capacitor remains unchanged;

wherein the shield electrode and the detection electrode are time-divisionally driven.

2. The capacitance detection circuit according to claim 1, further comprising a charge-discharge switch group, a clear switch group, and an integration switch group, wherein the integrator comprises an integration capacitor and an amplifier, and the shielding electrode driving module comprises a voltage buffer;

the control module is specifically configured to:

3. The capacitance detection circuit according to claim 2, wherein the charge and discharge switch group comprises a first switch, a second switch, a third switch, a fourth switch, a seventh switch and an eighth switch, the integration switch group comprises a fifth switch, and the clear switch group comprises a sixth switch;

one end of the first switch is connected with one end of the first current source, the other end of the first current source is connected with a power supply voltage, the other end of the first switch is connected with one end of the detection capacitor, one end of the third switch and one end of the first capacitor, the other ends of the detection capacitor and the third switch are grounded, the other end of the first capacitor is connected with one end of the shielding capacitor, and the other end of the shielding capacitor is grounded;

one end of the second switch is connected with one end of the second current source, the other end of the second current source is connected with a power supply voltage, the other end of the second switch is connected with one end of the calibration capacitor and one end of the fourth switch, and the other end of the calibration capacitor and the other end of the fourth switch are both grounded;

4. The capacitance detection circuit according to claim 3, further comprising a full discharge phase between the charge clearing phase and the first charge-discharge phase, in which the charges on the detection capacitor, the calibration capacitor, the first capacitor, and the shield capacitor are cleared.

5. The capacitance detection circuit according to claim 4,

in the charge clearing stage, the sixth switch is turned on, the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the seventh switch and the eighth switch are all turned off, and the charge stored in the integrating capacitor is cleared;

6. A capacitance detection circuit according to claim 4 or 5, further comprising a first buffer phase between the second charge-discharge phase and the charge transfer phase, and a second buffer phase after the charge transfer phase, the first buffer phase and the second buffer phase being configured to keep the charge on the detection capacitor, the calibration capacitor and the integration capacitor unchanged;

7. The capacitance detection circuit of claim 6, wherein the control module is further configured to:

8. The capacitance detection circuit according to claim 7, wherein the integrator has an output voltage V_outComprises the following steps:

9. The capacitance detection circuit according to claim 2, wherein the charge and discharge switch group comprises a first switch, a second switch, a third switch, a fourth switch, a seventh switch and an eighth switch, the integration switch group comprises a fifth switch, and the clear switch group comprises a sixth switch;

one end of the first switch is connected with one end of the first current source, the other end of the first current source is grounded, the other end of the first switch is connected with one end of the detection capacitor, one end of the third switch and one end of the first capacitor, the other end of the detection capacitor is grounded, the other end of the third switch is connected with a power supply voltage, the other end of the first capacitor is connected with one end of the shielding capacitor, and the other end of the shielding capacitor is grounded;

10. The capacitance detection circuit according to claim 9, further comprising a full charge phase between the charge clearing phase and the first charge-discharge phase, in which one end of the detection capacitor, the calibration capacitor, the shield capacitor and the first capacitor is charged to a supply voltage.

11. The capacitance detection circuit according to claim 10, wherein in the charge clearing stage, the sixth switch is turned on, and the first switch, the second switch, the third switch, the fourth switch, the fifth switch, the seventh switch, and the eighth switch are all turned off, so as to clear the charge stored in the integration capacitor;

12. The capacitance detection circuit according to claim 11, further comprising a first buffer phase between the second charge-discharge phase and the charge transfer phase, and a second buffer phase after the charge transfer phase, wherein the first buffer phase and the second buffer phase are configured to keep the charge on the detection capacitor, the calibration capacitor, the first and second capacitors, and the integration capacitor unchanged;

13. The capacitance detection circuit of claim 12, wherein the control module is further configured to:

14. The capacitance detection circuit according to claim 13, wherein the integrator has an output voltage V_outComprises the following steps:

wherein, V_RFor the reference voltage, the Δ C_xThe amount of change of the detection capacitor relative to a reference capacitance value, C_SIs the capacitance value of the integrating capacitor, I₁Is the current value of the first current source, I₂Is the current value of the second current source, the V_DDAnd N is the execution times from the charging and discharging stage to the second buffer stage.

15. The capacitance detection circuit according to any one of claims 1 to 5, further comprising a comparator, a first input terminal of the comparator is connected to the detection capacitor, a second input terminal of the comparator is used for inputting the reference voltage, and an output terminal of the comparator is connected to the control module;

16. A capacitance detection circuit according to any one of claims 1 to 5, further comprising a processing module for determining the amount of change in the capacitance value of the detection capacitor relative to the base capacitance of the detection capacitor from the output voltage of the integrator.

17. The capacitance detection circuit according to any one of claims 1 to 5, wherein the calibration capacitor is configured to make the output voltage of the integrator a reference voltage when the capacitance value of the detection capacitor is a reference capacitance value, wherein a ratio of the reference capacitance value and the capacitance value of the calibration capacitor is equal to a ratio of a current value of the first current source and a current value of the second current source.

18. The capacitance detection circuit according to any one of claims 1 to 5, wherein a current value of the first current source is larger than a current value of the second current source.

19. The capacitance detection circuit according to any one of claims 1 to 5, applied to a capacitive sensor, wherein the detection capacitor is a sensor capacitance of the capacitive sensor, and a capacitance value of the sensor capacitance when the capacitive sensor is not operated is a reference capacitance value.

20. A touch device, comprising:

the capacitance detection circuit of any one of claims 1 to 19.

21. A terminal device, comprising:

the capacitance detection circuit of any one of claims 1 to 19.