CN111800935A

CN111800935A - Circuit board structure

Info

Publication number: CN111800935A
Application number: CN201911316291.4A
Authority: CN
Inventors: 丘建华; 黄黎明; 邓琪馨; 吴俊明
Original assignee: Thinflex Corp
Current assignee: Thinflex Corp
Priority date: 2019-04-01
Filing date: 2019-12-19
Publication date: 2020-10-20
Also published as: TWI713420B; TW202038685A

Abstract

The invention provides a circuit board structure, which comprises a plurality of circuit boards, wherein adjacent two of the circuit boards are bonded and protected by a single-layer covering layer. The single-layer coating layer is formed by a resin composition with specific components and using amount, has good adhesion to copper and polyimide resin, and has enough flame resistance, heat resistance, toughness and ion migration resistance.

Description

Circuit board structure

Technical Field

The invention provides a circuit board structure, which comprises a plurality of circuit boards, wherein adjacent two of the circuit boards are bonded through a single-layer covering layer. In particular, in the circuit board structure of the present invention, the single-layer covering layer has the functions of both the adhesive layer and the protective layer through the specific composition and the usage amount thereof, and the thickness of the circuit board structure is greatly reduced.

Background

With the rapid development of the electronic industry, electronic devices are gradually developing towards multi-functionality and high performance, and in order to meet the requirements of high integration and miniaturization of electronic devices and to improve the performance of single device packages, multi-chip modular packages are often used to meet the trend and requirements of miniaturization, high capacity and high speed of electronic devices. The package can reduce the volume of the whole package and improve the electrical function, so the package becomes the mainstream of the package. The circuit board for providing active and passive elements and circuit carrying is also developed from double-layer circuit board to multi-layer circuit board, and the available circuit area of the circuit board is enlarged by interlayer connection technology under limited space, so as to meet the requirement of integrated circuit with high electronic density.

Generally, after the circuit of the circuit board is manufactured, a covering layer is attached to the circuit to protect the circuit and prevent the circuit from being oxidized. The common cover layer has a two-layer structure including a polyimide cover layer and a glue layer, which can increase the adhesion between the polyimide cover layer and the circuit layer.

The multilayer flexible circuit board structure (such as four-layer board) is formed by sequentially stacking a single-sided substrate, a double-sided substrate and a single-sided substrate, wherein the circuit layers of the substrates are respectively provided with a protective covering layer, and two adjacent substrates can be bonded through a bonding layer (bonding sheet). This adhesive layer may, for example, bond the polyimide-based layer of the single-sided board to the cover layer of the double-sided board. On the other hand, in the multi-layer circuit board structure combining the soft board and the hard board, a protective covering layer is also arranged on the circuit layer of the substrate, and an additional adhesive layer (e.g. prepreg (PP) composed of glass fiber non-woven fabric and epoxy resin) is required to be adhered between the soft board and the hard board.

Therefore, in the flexible multi-layer circuit board structure or the multi-layer circuit board structure combined by the flexible and rigid boards, the following layer occupies a certain thickness. As the number of layers of the multilayer circuit board structure increases, the number of the following layers also increases, and further, the influence of the following layers on the overall thickness of the multilayer circuit board structure increases.

In view of the above-mentioned problems, it is desirable to provide a circuit board structure that can avoid the use of an adhesive layer, so that the protective cover layer can also serve as an adhesive layer (or called adhesive layer), thereby reducing the thickness of the multi-layer circuit board structure. The covering layer has good adhesion to the polyimide substrate and the conductive layer (or called circuit layer), and also has the characteristics of enough heat resistance, flame resistance, ion migration resistance, toughness and the like.

Disclosure of Invention

One aspect of the present invention is to provide a circuit board structure. In some embodiments, the circuit board structure includes a first substrate, a first single-layer cover layer, a double-sided substrate, a second single-layer cover layer, and a second substrate. The first single-layer covering layer is arranged on the first substrate, and a first interface is arranged between the first substrate and the first single-layer covering layer. The double-sided substrate is provided with a first surface and an opposite second surface, wherein the double-sided substrate is arranged on the first single-layer covering layer, and a second interface is arranged between the first surface and the first single-layer covering layer. The second single-layer covering layer is arranged on the double-sided substrate, and a third interface is formed between the second surface and the second single-layer covering layer. The second substrate is disposed on the second single-layer covering layer, wherein the second substrate and the second single-layer covering layer have a fourth interface.

According to some embodiments of the present invention, the first single-layered cover layer and the second single-layered cover layer are formed of a resin composition, and the resin composition includes an epoxy resin (a), a curing agent (B), a catalyst (C), a flame retardant (D), a toughening agent (E) including a polyester resin, and a solvent (F). The epoxy resin (A) includes a first epoxy resin (a-1) and a second epoxy resin (a-2) having a structure represented by the following formula (I).

In the formula (I), R¹Is composed of

R²Is composed of

a is an integer of 0 to 2, and is a bond.

According to some embodiments of the present invention, the first epoxy resin (a-1) is used in an amount of 30 to 60 parts by weight, the second epoxy resin (a-2) is used in an amount of 40 to 70 parts by weight, the curing agent (B) is used in an amount of 10 to 15 parts by weight, the catalyst (C) is used in an amount of 0.8 to 1.0 part by weight, the flame retardant (D) is used in an amount of 65 to 90 parts by weight, the toughening agent (E) is used in an amount of 40 to 80 parts by weight, and the solvent (F) is used in an amount of 160 to 210 parts by weight, based on 100 parts by weight of the epoxy resin (a).

According to some embodiments of the invention, the first single-layer cover layer and the second single-layer cover layer are each a single-layer structure.

According to some embodiments of the invention, the thickness of the single-layer structure is 10 μm to 50 μm.

According to some embodiments of the present invention, the first substrate includes a first base material and a first conductive layer, the first conductive layer is disposed on the first base material, and the first base material and the first single-layer cover layer have the first interface. The second substrate comprises a second base material and a second conducting layer, the second conducting layer is arranged on the second base material, and the second base material and the second single-layer covering layer are provided with a fourth interface.

According to some embodiments of the present invention, the first substrate includes a first substrate, a first conductive layer and a second conductive layer, the first conductive layer and the second conductive layer are oppositely disposed on two surfaces of the first substrate, and the first conductive layer and the first substrate together have a first interface with the first single-layer cover layer. The second substrate comprises a second base material, a third conducting layer and a fourth conducting layer, the third conducting layer and the fourth conducting layer are oppositely arranged on two surfaces of the second base material, and the third conducting layer and the second base material and the second single-layer covering layer jointly form a fourth interface.

According to some embodiments of the present invention, the circuit board structure further includes a first passivation layer disposed on the first substrate, and a second passivation layer disposed on the second substrate.

According to some embodiments of the present invention, the first substrate includes a plurality of first hard type circuit boards, the second substrate includes a plurality of second hard type circuit boards, and the first hard type circuit boards are respectively disposed on two end portions of the first surface, and the second hard type circuit boards are respectively disposed on two end portions of the second surface to respectively expose a portion of the first single-layer cover layer and a portion of the second single-layer cover layer.

According to some embodiments of the present invention, the circuit board structure further comprises a first solder mask ink disposed on the first substrate, and a second solder mask ink disposed on the second substrate.

Drawings

The foregoing and other objects, features, and advantages of the invention will be apparent from the following more particular description of the embodiments of the invention, as illustrated in the accompanying drawings in which:

fig. 1A to 1F are schematic cross-sectional views of intermediate processes of a method of manufacturing a circuit board structure according to an embodiment of the present invention;

FIG. 2 is a schematic cross-sectional view of a package structure;

FIG. 3 is a schematic cross-sectional view of a circuit board structure according to further embodiments of the present invention;

FIGS. 4A-4C are schematic cross-sectional views of intermediate processes of methods of fabricating circuit board structures according to further embodiments of the present invention;

FIG. 4D is a schematic top view of a multi-layer circuit board structure with soft and hard boards;

FIG. 5 is a schematic cross-sectional view of a circuit board structure according to further embodiments of the present invention;

FIG. 6 is a graph showing the results of ion migration resistance of the single-layer cover layer of example 3.

[ notation ] to show

100. 300, 400, 500: circuit board structure

110. 330, 340: double-sided substrate

111: first surface

112. 132, 142, 332, 342, 414, 424, 434, 444, 512, 522, 532, 542: base material

113: second surface

114. 116, 134, 144, 180, 334, 336, 344, 346, 412, 416, 422, 426, 432, 436, 442, 446, 514, 524, 534, 544: conductive layer

120. 122: single layer cover

121. 123, 125, 127: end part

130. 140: substrate

150. 152, 154, 156, 161, 163, 350, 352, 450, 452, 550, 552: interface (I)

160. 162: protective layer

170. 172, 470: through hole

200: packaging structure

210: release layer

220: plastic substrate

410. 420, 430, 440, 510, 520, 530, 540: hard circuit board

460: welding-proof layer

472: front conductor exposure part

474: back conductor exposure part

Detailed Description

One aspect of the present invention provides a circuit board structure comprising a plurality of circuit boards, wherein adjacent two of the circuit boards are bonded and protected by a single cover layer. In some embodiments, the single-layer covering layer is formed by specific components and using amount of resin composition, and has good adhesion to the circuit board, and meanwhile, has enough flame resistance, heat resistance, ion migration resistance and toughness. Therefore, in the circuit board structure of the invention, the single-layer covering layer can be used as the adhesive layer and the protective layer of two adjacent circuit boards, so as to reduce the thickness of the circuit board structure and prevent the problem of board explosion of the circuit board structure.

Please refer to fig. 1A to 1F, which are schematic cross-sectional views of a plurality of intermediate processes of a method for manufacturing a circuit board structure according to an embodiment of the present invention. As shown in fig. 1A, in some embodiments, a double-sided substrate 110 is first provided. The double-sided substrate 110 includes a substrate 112, a conductive layer 114 and a conductive layer 116, wherein the substrate 112 has a first surface 111 and an opposite second surface 113, the conductive layer 114 is disposed on the first surface 111, and the conductive layer 116 is disposed on the second surface 113. In some embodiments, the substrate 112 may be a flexible substrate, such as: polyimide (polyimide), and the

conductive layers

114 and 116 may each be a copper foil layer. In this embodiment, the double-sided substrate 110 is a double-sided flexible copper clad laminate (D/S FCCL).

With reference to fig. 1A, the first single-layer covering layer 120 and the second single-layer covering layer 122 are disposed on the first surface 111 and the second surface 113 of the double-sided substrate 110, respectively. The first cover layer 120 and the second cover layer 122 are each a single layer structure, and the single layer structure simultaneously functions as a cover layer and a glue layer in the circuit board structure. In some embodiments, the first single-layer cover layer 120 and the second single-layer cover layer 122 may be respectively protected by the package structure 200 as shown in fig. 2 before being disposed on the double-sided substrate 110. The package structure 200 includes a release layer 210 and a plastic substrate 220, and a single-layer cover layer 120 or 122 (hereinafter referred to as "120/122") is sandwiched between the release layer 210 and the plastic substrate 220.

In some embodiments, the steps of disposing the first single-layer cover layer 120 and the second single-layer cover layer 122 on the double-sided substrate 110 further include the following steps. First, the release layer 210 is removed to expose the single covering layer 120/122. Thereafter, a single-layer overlay 120/122 is provided over

conductive layers

114 and 116 of double-sided substrate 210 and pre-applied for 10 seconds. The pre-application is carried out, for example, at 90 ℃ to 110 ℃. The individual plastic substrates 220 of the single cover layer 120/122 are then removed.

Next, as shown in fig. 1B, a first substrate 130 is disposed on the first single-layer covering layer 120, and a second substrate 140 is disposed on the second single-layer covering layer 122. In this embodiment, the first substrate 130 and the second substrate 140 are each a single-sided flexible copper clad substrate (S/S FCCL). For example: the first substrate 130 includes a base material 132 and a conductive layer 134, and the second substrate 140 includes a base material 142 and a conductive layer 144, wherein the base material 132 is positioned between the conductive layer 134 and the first single-layer cover layer 120, and the base material 142 is positioned between the conductive layer 144 and the second single-layer cover layer 122. Substrate 132 and substrate 142 can, for example, be the same as substrate 112, while conductive layer 134 and conductive layer 144 can, for example, be the same as conductive layer 114 and conductive layer 116. In some embodiments, after the first substrate 130 and the second substrate 140 are disposed on the first single-layer covering layer 120 and the second single-layer covering layer 122, the pre-attaching step may be performed again to fix the first substrate 130 and the second substrate 140 on the first single-layer covering layer 120 and the second single-layer covering layer 122. Alternatively, in some other embodiments, the first substrate 130, the first single-layer cover layer 120, the double-sided substrate 110, the second single-layer cover layer 122 and the second substrate 140 may be stacked and then pre-attached.

Next, the intermediate structure of fig. 1B is subjected to a hot pressing step, melting the first single-layer cover layer 120 and the second single-layer cover layer 122, and attaching the first substrate 130 and the second substrate 140 to the first surface 111 and the second surface 113 of the double-sided substrate 110, respectively, as shown in fig. 1C. In some embodiments, this hot pressing step may be performed, for example, at 185 ℃ to 165 ℃ for about 2 minutes to 3 minutes. If the temperature of the hot pressing step is too low or the time is too short, the bonding effect is not good; however, if the temperature of the hot pressing step is too high or the time is too long, the conductive layers on the first substrate 130 and the second substrate 140 may be damaged. After the hot pressing step, the first single-layer covering layer 120 and the first substrate 130 have an interface 150, and the first single-layer covering layer 120 and the first surface 111 of the double-sided substrate 110 also have an interface 152. In other words, the first single-layer cover layer 120 is in contact with both the first substrate 130 and the double-sided substrate 110 (including the base material 112 and the conductive layer 114). In addition, after the hot pressing step, the second single-layer covering layer 122 has an interface 156 with the second substrate 140, and the second single-layer covering layer 122 also has an interface 154 with the second surface 113 of the double-sided substrate 110. In other words, the second single-layer cover layer 122 is in contact with both the second substrate 140 and the double-sided substrate 110 (including the base material 112 and the conductive layer 116).

The first cover layer 120 and the second cover layer 122 are formed by a specific composition and amount, have sufficient heat resistance, flame resistance, adhesion, and mechanical strength (e.g., sufficient toughness and elongation), and can function as both a glue layer and a cover layer. Therefore, only a single layer of the first single-layer covering layer 120 and the second single-layer covering layer 122 is needed to prevent the conductive layer 114 and the conductive layer 116 on the double-sided substrate 110 from being oxidized, and simultaneously, the double-sided substrate 110 is bonded to the first substrate 130 and the second substrate 140 respectively, and the problem of board explosion does not occur.

Next, as shown in fig. 1D, in some embodiments, a protective layer 160 and a protective layer 162 may be disposed on the conductive layer 134 and the conductive layer 144, respectively, and pre-pasting and hot-pressing steps are performed to make the protective layer 160 adhere to the conductive layer 134 and the substrate 132 and form an interface 161, and to make the protective layer 162 adhere to the conductive layer 144 and the substrate 142 and form an interface 163. In some embodiments, the

protective layers

160 and 162 can be formed of the same materials as the first single-layer covering layer 120 and the second single-layer covering layer 122, so that the step of attaching the

protective layers

160 and 162 to the

conductive layers

134 and 144 can be performed with reference to the above-mentioned attaching process conditions of the single-sided substrate and the double-sided substrate.

Next, as shown in fig. 1E, a through hole 170 and a through hole 172 are formed in the structure of fig. 1D, wherein the through hole 170 and the through hole 172 respectively penetrate through the protection layer 160, the first substrate 130, the first single-layer covering layer 120, the double-sided substrate 110, the second single-layer covering layer 122, the second substrate 140, and the protection layer 162. It is noted that although the through holes are formed in the view of fig. 1D, the through holes may not be formed in other views, and thus the layers are connected to each other in other views to fix the overall structure. In some embodiments, the steps of forming

vias

170 and 172 may be performed, for example, by mechanical drilling, laser drilling, or stamping.

Then, as shown in fig. 1F, a conductive layer 180 is formed on the walls of the through

holes

170 and 172. The conductive layer 180 may be formed by electroless plating or resin hole wall metallization (shadow plating), for example. In general, conductive layer 180 can be formed using the same materials as conductive layer 114, conductive layer 116, conductive layer 134, and conductive layer 144, for example. For example: conductive layer 180 may be copper.

With continued reference to fig. 1F, after forming the conductive layer 180, a curing step is performed on the structure of fig. 1F to obtain the circuit board structure 100 of the present invention. In some embodiments, the curing step is performed, for example, at 150 ℃ to 165 ℃ for 2 hours to 1 hour to cure the first monolayer overlay layer 120, the second monolayer overlay layer 122, the protective layer 160, and the protective layer 162. When the curing step is too short or the temperature is too low, the protection provided by the first single-layer cover layer 120, the second single-layer cover layer 122, the protection layer 160 and the protection layer 162 is insufficient, so that the risk of damage in the application of the circuit board structure 100 is increased; however, when the time course or temperature of this curing step is too high, damage may be caused to the

conductive layers

134 and 144 during the curing.

Specifically, the embodiment of fig. 1A to 1F only stacks 3 substrates (the double-sided substrate 110, the first substrate 130 and the second substrate 140), but those skilled in the art can stack more substrates according to the disclosure, so that other numbers of substrate stacking structures also fall within the scope of the present invention.

Please refer to fig. 3, which is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. In fig. 3, the same elements as those shown in fig. 1A to 1F are denoted by the same reference numerals. In the circuit board structure 300, the double-sided substrate 110 is sandwiched between a double-sided substrate 330 and a double-sided substrate 340. The double-sided substrate 330 includes a substrate 332, a first conductive layer 334 and a second conductive layer 336, wherein the first conductive layer 334 and the second conductive layer 336 are respectively disposed on two surfaces of the substrate 332. The double-sided substrate 340 includes a base 342, a third conductive layer 344 and a fourth conductive layer 346, wherein the third conductive layer 344 and the fourth conductive layer 346 are respectively disposed on two surfaces of the base 342. In this embodiment, the substrate 332 and the first conductive layer 334 together have an interface 350 with the first single-layer cladding layer 120, while the substrate 342 and the third conductive layer 344 together have an interface 352 with the second single-layer cladding layer 122.

Fig. 4A to 4C are schematic cross-sectional views of intermediate processes of a method of manufacturing a circuit board structure according to other embodiments of the present invention. Similar to the description of fig. 1A to 1B, the first single-layer covering layer 120 and the second single-layer covering layer 122 are firstly disposed on the first surface 111 and the second surface 113 of the double-sided substrate 120, respectively. Next, the first hard type circuit board 410 and the second hard type circuit board 420 are disposed on the two

opposite end portions

121 and 123 of the first single-layered cover layer 120; and, the third hard type circuit board 430 and the fourth hard type circuit board 440 are disposed on the two

opposite end portions

125 and 127 of the second single-layered cover layer 122. The above-described setting step also includes the pre-pasting step as described in fig. 1A and 1B.

In this embodiment, the first hard board 410, the second hard board 420, the third hard board 430 and the fourth hard board 440 are double-sided hard boards, respectively. However, in other embodiments, one or more single-sided rigid circuit boards may be used to form the structure shown in fig. 4A, depending on the device design requirements. In some embodiments, the first hard type circuit board 410 includes

conductive layers

412 and 416 and a substrate 414 sandwiched between the

conductive layers

412 and 416. The second hard type circuit board 420 includes

conductive layers

422 and 426 and a substrate 424 sandwiched between the

conductive layers

422 and 426. The third hard type circuit board 430 includes

conductive layers

432 and 436 and a base 434 sandwiched between these

conductive layers

432 and 436. The fourth hard type circuit board 440 includes

conductive layers

442 and 446 and a substrate 444 sandwiched between the

conductive layers

442 and 446. The

substrates

414, 424, 434, and 444 may be flame resistant hard substrates such as: glass cloth (FR-4), etc., and the

conductive layers

412, 416, 422, 426, 432, 436, 442, and 446 may be the same material as the

conductive layers

114 and 116.

Specifically, only a single cover film is disposed between the

hard circuit boards

410, 420, 430, and 440 and the double-sided substrate 110. Because the single-layer covering film can have the characteristics of both an adhesive layer and a covering layer, the soft circuit board and the hard circuit board can be connected without using an insulating preimpregnation material in a multi-layer circuit board structure with soft and hard boards connected. Therefore, the single-layer cover film of the invention also facilitates the thinning of the multi-layer circuit board structure of the rigid-flexible board.

Next, similarly to the step of fig. 1C, the structure of fig. 4A is subjected to a hot pressing step to obtain the structure shown in fig. 4B. For example, the specific parameters of the hot pressing step can refer to the hot pressing step described above with reference to fig. 1C, which is not described herein again. After this hot pressing step, as shown in fig. 1C, the double-sided substrate 110 has

interfaces

152 and 154 with the first single-layer cover layer 120 and the second single-layer cover layer 122, respectively. In addition, after the thermal pressing step, the conductive layer 412 of the first hard board 410 and the conductive layer 422 of the second hard board 420 have an interface 450 with the first single-layer cover layer 120. The conductive layer 432 of the third hard circuit board 430 and the conductive layer 442 of the fourth hard circuit board 440 together have an interface 452 with the second single-layer cover layer 122. In other words, the first single-layer cover layer 120 is simultaneously in contact with the double-sided substrate 110, the first hard circuit board 410 and the second hard circuit board 420, and the second single-layer cover layer 122 is simultaneously in contact with the double-sided substrate 110, the third hard circuit board 430 and the fourth hard circuit board 440.

Next, similar to the steps shown in fig. 1E and fig. 1F, a via 470 is formed in the structure shown in fig. 4B, and a conductive layer 180 is formed on the wall of the via 470. In some embodiments, the through hole 470 is formed through the first hard circuit board 410, the first single-layer cover layer 120, the double-sided substrate 110, the second single-layer cover layer 122, and the third hard circuit board 430. Next, a solder mask layer 460 may be further formed on the

conductive layers

416, 426, 436 and 446, so as to form the multi-layer pcb structure 400 shown in fig. 4C. In some embodiments, the solder mask layer 460 may be formed by using an ink such as an epoxy IR baking type, a UV curing type, a liquid photosensitive type, etc., but the invention is not limited thereto. The solder mask layer 460 can protect the circuit on the circuit board, prevent short circuit and open circuit caused by scratching, and achieve the solder mask function. In some embodiments, portions of conductive layer 426 and conductive layer 446 may be exposed from solder mask layer 460 to form front conductor exposure 472 and back conductor exposure 474, respectively.

Next, please refer to fig. 4C and fig. 4D simultaneously, wherein fig. 4D is a schematic top view of a flexible-rigid board multi-layer circuit board structure. In the circuit board structure 400, the first hard circuit board 410 and the second hard circuit board 420 are respectively disposed at two end portions of the double-sided substrate 110, and the first single-layer cover layer 120 is sandwiched between the first hard circuit board 410, the second hard circuit board 420 and the double-sided substrate 110, and a portion of the first single-layer cover layer 120 is exposed from a space between the first hard circuit board 410 and the second hard circuit board 420.

The embodiment of fig. 4A to 4D only stacks 3 layers of substrates (layers of the double-sided substrate 110, the first hard type circuit board 410 and the second hard type circuit board 420, and layers of the third hard type circuit board 430 and the fourth hard type circuit board 440), but those skilled in the art can stack more layers of substrates according to the disclosure, so that other numbers of substrate stacking structures also fall within the scope of the present invention.

Please refer to fig. 5, which is a schematic cross-sectional view of a circuit board structure according to another embodiment of the present invention. In fig. 5, the same elements as those shown in fig. 4A to 4D are denoted by the same reference numerals. In the circuit board structure 500, the double-sided substrate 110 is sandwiched between a first single-sided hard circuit board 510, a second single-sided hard circuit board 520, a third single-sided hard circuit board 530 and a fourth single-sided hard circuit board 540. The first single-sided hard type circuit board 510 includes a substrate 512 and a conductive layer 514 disposed on the substrate 512. The second single-sided hard type circuit board 520 includes a substrate 522 and a conductive layer 524 disposed on the substrate 522. The third single-sided hard type circuit board 530 includes a substrate 532 and a conductive layer 534 disposed on the substrate 532. The fourth single-sided hard-wired board 540 includes a substrate 542 and a conductive layer 544 disposed on the substrate 542. Here,

substrates

512, 522, 532, and 542 are the same as

substrates

414, 424, 434, and 444 of fig. 4A, and

conductive layers

514, 524, 534, and 544 are also the same as

conductive layers

412, 416, 422, 426, 432, 436, 442, and 446 of fig. 4A, as previously described. In this embodiment,

substrates

512 and 522 together have an interface 550 with first single-layer overlayer 120, while

substrates

532 and 542 together have an interface 552 with second single-layer overlayer 122.

As described above, the single-layer cover layers 120 and 122 are polyimide films formed of a resin composition having a specific composition and use amount. In some embodiments, the resin composition comprises an epoxy resin (a), a curing agent (B), a catalyst (C), a flame retardant (D), a toughening agent (E), and a solvent (F). The components of the resin composition are described below.

Epoxy resin (A)

In some embodiments, the epoxy resin (a) comprises a first epoxy resin (a-1) and a second epoxy resin (a-2). In other embodiments, other epoxy resins may additionally be used.

First epoxy resin (a-1)

The first epoxy resin (a-1) referred to herein in the present invention may comprise a structure represented by the following formula (I):

in the above formula (I), R¹Is composed of

R²Is composed of

a is an integer of 0 to 2, and represents a bond site.

Specifically, the first epoxy resin (a-1) may be a compound having a structure represented by the following formulas (I-1) to (I-3) or any combination of the above compounds.

In one example, the first epoxy resin (a-1) may be a commercially available resin such as those manufactured by Kadela Corporation (Cardolite Corporation) under the types NC-513, NC-514, NC-547, or any combination thereof.

The first epoxy resin (a-1) may be used in an amount of 30 to 60 parts by weight, based on 100 parts by weight of the epoxy resin (a). If the first epoxy resin (a-1) is not contained in the epoxy resin (A) or the amount thereof used is too small, the resulting single-layer coverlay is poor in peel strength, flame resistance and solder heat resistance. On the other hand, if the amount of the first epoxy resin (a-1) is too large, the single-layer cover layer is not easily cured since the first epoxy resin (a-1) is a low-viscosity epoxy resin.

Second epoxy resin (a-2)

The second epoxy resin (a-2) described herein of the present invention may comprise a novolac epoxy resin, a bisphenol a type epoxy resin, an alicyclic type epoxy resin, a heterocyclic type epoxy resin, a glycidyl ester type epoxy resin, or any combination thereof.

The novolac epoxy resin may be, for example, NPPN-431a70 or NPEB-454a80, manufactured by south asia plastic industries, ltd, CNE-200EL series, manufactured by vinpocetine chemicals, ltd, d.e.n438, or any combination thereof, but the present invention is not limited thereto.

The bisphenol A epoxy resin may be a bisphenol A epoxy resin having a low epoxy equivalent, for example, the epoxy equivalent may be less than 500 g/eq. Specifically, bisphenol A type epoxy resins available are, for example, BE-188 available from Vinca resin Ltd, and D.E.R. available from Dow chemical Co^TM671-X75, the product of Kukdo chemical company having the commercial model number KD-211E, or any combination thereof, although the present invention is not limited thereto. When the epoxy equivalent of the bisphenol A type epoxy resin is 500g/eq or more, the high temperature fluidity of the material is limited, and the filling property and adhesion of the single-layer covering layer to the wiring are affected.

The alicyclic epoxy resin may be, for example, 3, 4-epoxycyclohexylmethyl-3 ', 4' -epoxycyclohexanecarboxylate, a dimer adduct of 3, 4-epoxycyclohexylmethyl-3 ', 4' -epoxycyclohexanecarboxylate and caprolactone, 1,2,8, 9-diepoxygienene, or any combination thereof. Specifically, for example, a product of the DAICEL corporation having a trade name of CELLOXIDE2021, 2081 or 3000 may be mentioned, but the present invention is not limited thereto.

The heterocyclic epoxy resin may be, for example, a product of the hensmei advanced material trade name araldite pt810, a product of the japanese chemical industry corporation trade name TEPIC, or a combination thereof, but the present invention is not limited thereto.

The aforementioned epoxy resin of the glycidyl ester type may comprise a glycidyl methacrylate copolymer epoxy resin, a copolymer epoxy resin of cyclohexylmaleimide and glycidyl methacrylate, or a combination thereof, but the present invention is not limited thereto.

In a preferred example, the first epoxy resin (a-1) may be used, for example, together with a novolac epoxy resin and a bisphenol A type epoxy resin.

The second epoxy resin (a-2) may be used in an amount of 40 to 70 parts by weight, based on 100 parts by weight of the epoxy resin (a). If the second epoxy resin (a-2) is not used in the resin composition, the single-layer cover layer is not easily cured.

Hardener (B)

The hardener (B) referred to herein in the present invention may comprise a polyamine-based compound, a phthalic anhydride compound, or any combination thereof.

Specifically, the polyamino compound may be, for example, diethylenetriamine, diaminodiphenylmethane, 3 '-diaminodiphenyl sulfone, 4' -diaminodiphenyl sulfone, dinitrile amine, or any combination thereof.

Specifically, the phthalic anhydride compound may be phthalic anhydride, tetrahydrophthalic anhydride, or any combination thereof.

In a preferred embodiment, curing agents having different reaction temperatures can be optionally used in the resin composition, such as: the simultaneous use of diaminodiphenyl sulfone and dicyandiamide can make the resin composition possess different heat curing degrees at different temperatures.

The hardener (B) may be used in an amount of 10 to 15 parts by weight, based on 100 parts by weight of the above epoxy resin (a). In particular, the amount of the curing agent (B) is matched with the epoxy equivalent of the epoxy resin (A) to obtain a proper degree of crosslinking, so that the single-layer covering layer has sufficient toughness and elongation to be simultaneously used as a glue layer and a covering layer of a multi-layer circuit board structure, and the problem of high-temperature board explosion of the multi-layer circuit board structure is solved. If the amount of the curing agent (B) is not within the above-mentioned range, particularly if the amount is less than the above-mentioned range, the single-layer coverlay layer has problems of poor flame resistance, solder heat resistance, peel strength, toughness and elongation, and further, when applied to a multi-layer circuit board structure, high-temperature board explosion occurs.

Catalyst (C)

The catalyst (C) referred to herein in the present invention may comprise an imidazole compound, a tertiary phosphine, a boron fluoride complex, or any combination thereof.

In a specific example, the imidazole compound may include, but is not limited to, 1-methylimidazole, 2-ethyl-4-methylimidazole, or a combination thereof.

In one embodiment, the tertiary phosphine can be triphenylphosphine, tributylphosphine, or a combination thereof.

In one embodiment, the boron fluoride complex may be, for example, a complex of boron trifluoride and monoethylamine, a complex of boron trifluoride and n-butylamine, a complex of boron trifluoride and aniline, zinc fluoroborate, or a combination thereof.

In a preferred embodiment, the catalyst (C) may be a combination of a boron fluoride complex and an imidazole compound.

The catalyst (C) may be used in an amount of 0.8 to 1.0 part by weight based on 100 parts by weight of the above epoxy resin (a). The catalyst of the present invention is used as a hardening accelerator, which contributes to curing of the resin composition. If the amount of the catalyst (C) used is too small, the flame resistance and solder heat resistance of the single-layer coating layer obtained from the resin composition are poor.

Flame retardant (D)

The flame retardant (D) of the present invention may be composed of a phosphorus-containing compound and a metal-containing compound. The metal-containing compound contains a metal oxide or a metal hydroxide. Preferably, the metal-containing compound has an average particle size of 1 μm to 5 μm.

Specifically, the above-mentioned phosphorus-containing compounds include, but are not limited to, bisphenol biphenyl phosphate, ammonium polyphosphate, hydroquinone-bis- (biphenyl phosphate), potassium phosphite, sodium phosphite, diethyl aluminum phosphate, or any combination thereof.

Specifically, the above metal oxide may contain antimony trioxide.

Specifically, the metal hydroxide may be, for example, aluminum hydroxide, magnesium hydroxide, or a combination thereof.

The flame retardant (D) may be used in an amount of 65 to 90 parts by weight, based on 100 parts by weight of the above epoxy resin (a). In a preferred example, the metal-containing compound is used in an amount of 30 to 45 parts by weight based on 100 parts by weight of the flame retardant (D). When the amount of the flame retardant is too small, the interface between the colloid and the substrate is affected, and the peel strength at the interface is reduced, in addition to the deterioration of flame resistance. However, since the flame retardant includes the metal-containing compound (or inorganic metal filler), too much flame retardant may also cause too high content of the metal-containing compound, which may affect the interface between the colloid and the substrate, and further decrease the peel strength of the interface.

Note that, if the average particle diameter of the metal-containing compound is not less than 5 μm, the flame retardant (D) cannot be uniformly dispersed in the resin composition, so that the resin composition cannot be uniformly coated on the substrate.

Flexibilizer (E)

The toughening agent (E) referred to herein in the present invention comprises at least a polyester resin. In one example, the polyester resin may preferably be a polyaminomethyl ester.

In an embodiment, the toughening agent (E) may further comprise other toughening agents, such as: nitrile rubber, phenoxy resin, polyamideimide resin, or any combination of the foregoing.

In one example, the nitrile rubber may be, for example, a carboxy-propenyl nitrile butadiene rubber, a butadiene-acrylonitrile copolymer, an epoxy-denatured butadiene rubber, or any combination of the foregoing.

Based on the use amount of the epoxy resin (A) being 100 parts by weight, the toughening agent (E) can enhance the flexibility of the single-layer covering layer prepared from the resin composition and improve the use operability of the material. The amount may be 40 to 80 parts by weight, preferably 40 to 60 parts by weight. In the present invention, polyester resin is preferably used as the toughening agent (E) to improve the brittleness of the epoxy resin, and the higher the content of the toughening agent, the better the flexibility of the formed film, but the deterioration of the mechanical strength may cause the high temperature plate explosion, so the range disclosed herein is preferable. Furthermore, since the polyester resin does not contain a large amount of impurities (ions) like a toughening agent such as nitrile rubber, the ion migration resistance of the single-layer cover layer can be further increased.

Solvent (F)

The solvent (F) referred to herein in the present invention is not particularly limited, and is preferably one which dissolves the epoxy resin (A) and disperses the curing agent (B), the catalyst (C), the flame retardant (D) and the toughening agent (E), but does not react with the above components.

In a specific example, the solvent (F) may include, but is not limited to, acetone, butanone, toluene, xylene, dimethylformamide, ethylene glycol monomethyl ether, propylene glycol methyl ether, or any combination of the foregoing. The solvent (F) may be used in an amount of 160 to 210 parts by weight, based on 100 parts by weight of the above epoxy resin (a).

Additive (G)

The resin composition of the present invention may further comprise an additive (G). The additive (G) may include, but is not limited to, an antioxidant, a cation scavenger, an anion scavenger, a dispersant, a leveling agent, or any combination thereof.

The antioxidant may be, for example, distearyl pentaerythritol diphosphite, monobenzenediisodecyl phosphite, and a C-alkyl-4, 4-diiso-methylene-fatty alcohol-phosphorous acid chelating polymer, or any combination thereof. Specifically, the antioxidant may be a product of STAB PEP-8T (AR-2) manufactured by ADEKA, Inc.

The dispersant may be, for example, polyester-modified polydimethylsilane. Specifically, the dispersant may be a product of BYK-310 manufactured by Pico Chemicals & instruments. As the leveling agent, for example, a BYK-W903 product manufactured by Bick chemical assistant and apparatus can be used.

It is specifically noted that, although a cation scavenger and/or an anion scavenger may be additionally added to the resin composition of the present invention to increase the ion migration resistance. However, in the present invention, the cation scavenger and/or the anion scavenger are not necessarily added, and it means that the resin composition of the present invention has good ion migration resistance satisfying the current market demand.

Method for producing resin composition

The resin composition of the present invention is produced by first adding a curing agent (B), a catalyst (C), an additive (G) and a solvent (F) to a reactor and mixing them. Then, the epoxy resin (a) and the flame retardant (D) are added to the reactor and mixed. Then, adding the toughening agent (E) into the reactor, and mixing and stirring at room temperature to prepare the resin composition of the invention. Wherein, the viscosity of the resin composition is preferably 600cps to 1200cps at 25 deg.C.

Method for manufacturing single-layer covering layer with composite function of covering film and pure glue

The method for manufacturing a single-layer cover layer herein refers to a method for forming the package structure 200 shown in fig. 2. The method comprises the steps of coating the resin composition, baking, pressing and curing, and then forming a single covering layer on the surface of the substrate 220.

Specifically, the above-mentioned manufacturing method is to coat the resin composition on the surface of the substrate 220. In one example, the substrate may be a polyethylene terephthalate (PET) plastic substrate. The coated substrate 220 is subjected to a baking step to remove the solvent from the resin composition. Then, the release film 210 is provided on the resin composition of the substrate 220. Then, the temperature was adjusted to 70 ℃ and 1.6kgf/cm²To obtain the package structure 200 shown in fig. 2. In fig. 2, the single-layer covering layer 120/122 is disposed between the plastic substrate 220 and the release paper 210 to protect the single-layer covering layer 120/122 from being damaged during transportation. To controlThe glue overflow, the single layer covering 120/122 is cured at a temperature of 50 ℃ to 70 ℃.

Example 1

First, 12.8 parts by weight of 4, 4' -diaminodiphenyl sulfone (B-1), 1.3 parts by weight of diethylene triamine (B-2), 0.4 part by weight of boron trifluoride and monoethylamine complex (C-1), 0.3 part by weight of 2-methylimidazole (C-2), 1.6 parts by weight of distearyl pentaerythritol diphosphite (G-1), 0.04 part by weight of dispersant (BYK-310; G-2, manufactured by Bick Chemicals & instruments), 2 parts by weight of leveling agent (BYK-W903; G-3, 110 parts by weight of butanone (F-1) and 45 parts by weight of toluene (F-2) are added into a reactor for mixing. Then, 40 parts by weight of the first epoxy resin (a-1-1) represented by the formula (I-2), 10 parts by weight of a novolac epoxy resin (CNE-200 ELB; a-2-1, manufactured by Vinca-R, Ltd.), 50 parts by weight of a bisphenol A epoxy resin (BE-188; a-2-2, manufactured by Vinca-R, Ltd.), 45 parts by weight of diethyl aluminum phosphate (D-1), and 35 parts by weight of aluminum hydroxide (D-2) having an average particle diameter of 3 μm were charged into the above reactor and mixed. Then, 60 parts by weight of polyaminomethyl ester (model SD-5000; E-1, manufactured by TOYOBO) was added thereto and mixed at room temperature to prepare the resin composition of example 1. Wherein the resin composition of example 1 had a viscosity of 800cps at 25 ℃.

Next, the resin composition of example 1 was coated on a plastic substrate. Then, a baking step is performed to remove the solvent in the resin composition. Thereafter, the single-layer coating of example 1 was obtained by performing a thermal press and a curing step to control the amount of the glue overflow. The evaluation results of the single-layer cover layer of example 1 are shown in table 1.

Examples 2 to 3 and comparative examples 1 to 8

Examples 2 to 3 and comparative examples 1 to 8 were conducted in the same manner as in example 1, except that the kinds or the amounts of the respective components in the resin composition were changed in examples 2 to 3 and comparative examples 1 to 8. The specific component types, usage amounts and evaluation results of examples 2 to 3 and comparative examples 1 to 8 are shown in table 1, and are not described herein.

Evaluation method

1. Peel strength (to copper or to polyimide resin)

The peel strength referred to herein is a single-layer coating layer formed of the resin compositions of examples 1 to 3 and comparative examples 1 to 8, respectively, on a copper base material or a polyimide resin base material to test the adhesion of the single-layer coating layer of the present invention to the above two base materials.

Specifically, the resin compositions of the foregoing examples 1 to 3 and comparative examples 1 to 8 were first coated on a substrate (copper substrate or polyimide resin substrate). Then, at 185 ℃ and 100kgf/cm²And (3) thermocompression bonding the coated substrate for 2 minutes. Thereafter, hardening was performed at 150 ℃ for 2 hours to form a single-layer coating layer on the surface of the substrate. The single cover layer was then cut into test pieces having a width of 1 cm and a length of 10 cm. The test piece was pulled in a 180-degree direction at a speed of 50mm/min to measure the pressure applied to the single-layer cover layer when the base material was peeled.

When the glass strength to the copper substrate and to the polyimide resin substrate is 0.8kgf/cm or more, it means that the single-layer cover layer is excellent in adhesion to the substrate. Further, when the single-layer cover layer has good adhesion to both the copper base material and the polyimide resin base material, the characteristic of the single-layer cover layer as the glue layer can be ensured.

2. Solder heat resistance

The test of solder heat resistance was carried out by first forming the single-layer coating layer of the present invention on a copper base material in the manner described above for the evaluation of peel strength, and therefore, it is not described herein.

The substrate with the single-layer cover layer was cut into a test piece of 5 cm × 5 cm. Thereafter, the test piece was immersed in a tin solution at 288 ℃ for 30 seconds. After the test piece was taken out, it was observed whether the test piece was delaminated or discolored. The evaluation criteria of the solder heat resistance of the present invention are as follows:

o: no delamination and no discoloration.

X: delamination or discoloration.

3. Flame resistance

The flame resistance referred to herein in the present invention is defined in UL 94-V0. Specifically, the polyimide cover layer of the present invention was subjected to 2 burning tests for 10 seconds each, and flame resistance was excellent if flame was extinguished within 30 seconds and no combustible substance dropped. Otherwise, the flame resistance is poor. The specific evaluation criteria are as follows:

o: the flame is extinguished within 30 seconds, no combustible substance falls, and the flame resistance is good.

X: the flame was not extinguished within 30 seconds, or the flame did not drop, and the flame resistance was poor.

4. Resistance to ion migration

The test of the ion migration resistance of the invention is that a single covering layer is firstly attached to the copper circuit wiring layer of the flexible printed circuit board. Then, the flexible printed circuit board is hardened to obtain a test piece required by the test of the ion migration resistance, and the specific forming conditions are the same as the peeling strength test. Next, a voltage of 100V was applied to the test piece at 85 ℃ and a relative humidity of 85% for 1000 hours, and the change in the insulation resistance was recorded. Generally, the insulation resistance remained at 10 after 1000 hours of testing⁹Omega is more than or equal to 1 order of magnitude (10) of insulation resistance difference before and after testing¹) Within, i.e., meeting the specification (O stands for pass; x represents failure), which represents that the ion migration resistance is good, and the evaluation results are shown in fig. 6. The insulation resistance difference is calculated as shown in the following formula (II).

Insulation resistance difference (insulation resistance before test/insulation resistance after test) (II)

5. Appearance of attached circuit

The single-layer coverlay prepared by the resin compositions of the embodiment and the comparative example is attached to the flexible printed circuit board with the circuit (namely the conductive layer) by the steps of pre-pasting, hot pressing, curing and the like, and whether the appearance of the film surface is damaged due to lines or breakage and the like on the flexible printed circuit board with the single-layer coverlay caused by high-temperature pressing is observed, so that the protection of the single-layer coverlay as the coverlay can be ensured. The specific evaluation criteria are as follows:

o: the appearance was intact and not damaged.

X: the appearance is impaired.

6. Tensile modulus

The single-layer coating layers obtained from the resin compositions of examples and comparative examples were cut into test pieces having a size of 152.4mm × 12.7 mm. Then, the test pieces were respectively drawn in the long and wide directions of the test pieces by a universal drawing machine to measure the tensile modulus.

As can be seen from table 1, the single-layer coverlay obtained using the resin compositions of the examples had good adhesion, flame resistance and heat resistance to both copper substrates and polyimide, had sufficient tensile modulus, and had considerable protection to wires. Therefore, the single-layer covering layer of the embodiment is suitable for being used as a multifunctional film layer with the functions of both the adhesive layer and the covering layer. Furthermore, as can be seen from FIG. 6, the single-layer coating has good ion migration resistance. In addition, when the single-layer covering layer is applied to the multi-layer circuit board structure, the thickness of the multi-layer circuit board structure can be greatly reduced, for example, reduced by about 30%.

On the other hand, a single-layer cover layer obtained by using a resin composition of other composition is poor in peeling resistance, heat resistance, flame resistance and/or tensile modulus. In particular, the resin composition of comparative example 1 did not use the first epoxy resin (a-1) and had insufficient flame resistance. Comparative example 2 had insufficient first epoxy resin (a-1) added and poor heat resistance. Furthermore, comparative example 3 added a large amount of hardener and toughener, resulting in poor flame resistance and heat resistance of the single-layer overlay. As shown in comparative examples 4 and 5, when the amount of the curing agent (B) used does not fall within the specified range, there are also problems of poor heat resistance and insufficient peel strength resistance. As shown in comparative example 6, too much toughening agent (E) causes the single-layer cover layer to have poor heat resistance. Further, as shown in comparative examples 7 and 8, the amount of the flame retardant (D) used was too small, and the peel strength could not meet the applicable standards, except that the heat resistance and the flame resistance were not good. If the single-layer cover layer is used for bonding the substrate, the multilayer circuit board structure may have problems of board explosion and embrittlement, resulting in defects of the electronic device.

The circuit board structure of the invention uses a single-layer structure film layer composed of specific components and using amount of resin composition, and simultaneously achieves the functions of jointing two adjacent circuit boards and protecting a composite glue layer and a covering layer of a circuit on the circuit boards, thereby greatly reducing the thickness of the circuit board structure. In addition, the single-layer covering layer has good flame resistance, heat resistance, ion migration resistance and toughness, and reduces the problems of board explosion and embrittlement of the multi-layer circuit board structure, so that the efficiency of an electronic device comprising the multi-layer circuit board structure can be improved.

While the invention has been described with reference to various embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

TABLE 1

a-1-1 Compound of formula (I-2) (manufactured by Kadeli Co., Ltd.; NC-514)

a-2-1 novolac epoxy resin (available from Changchun Artificial resins Ltd.; type CNE-200 ELB; epoxy equivalent: 200g/eq)

a-2-2 bisphenol A type epoxy resin (manufactured by Changchun synthetic resins Ltd.; type BE-188; epoxy equivalent: 187g/eq)

a-3-1 bisphenol A type epoxy resin (manufactured by Changchun artificial resins Co., Ltd.; type BE-501X-75; epoxy resin)

Amount 500g/eq)

B-14, 4' -diaminodiphenyl sulfone (manufactured by Atul corporation; trade name Atul Sulpho 44DDS)

B-2 diethylene triamine (manufactured by the Qiyu corporation)

Complex of C-1 boron trifluoride and monoethylamine (manufactured by Toxico Chemicals)

C-22-methylimidazole (made by four kingdoms)

D-1 diethyl aluminum phosphate (made by Kelaien chemical Co., Ltd.; model No. OP935)

D-2 aluminum hydroxide (available from Showa chemical Co., Ltd.; type H-42M (FAL): average particle diameter: 3 μm)

E-1 Polyaminomethyl ester (manufactured by TOYOBO, model SD-5000)

E-2 acrylonitrile-butadiene rubber (manufactured by Nandi chemical industry; model number Hycarl042)

F-1 butanone

F-2 toluene

G-1 distearylpentaerythritol diphosphite (antioxidant; manufactured by ADEKA Co., Ltd.; model: STAB PEP-8T (AR-2))

G-2 dispersant (Bike chemical auxiliary and instrument; model number BYK-310)

G-3 leveling agent (Bike chemical auxiliary and instrument; model BYK-W903)

Claims

1. A circuit board structure, comprising:

a first substrate;

a first single-layer covering layer disposed on the first substrate, wherein a first interface is formed between the first substrate and the first single-layer covering layer;

a double-sided substrate having a first surface and an opposite second surface, wherein the double-sided substrate is disposed on the first single-layer covering layer, and a second interface is disposed between the first surface and the first single-layer covering layer;

a second single-layer covering layer arranged on the double-sided substrate, wherein the second surface and the second single-layer covering layer have a third interface; and

and a second substrate disposed on the second single-layer cover layer, wherein the second substrate and the second single-layer cover layer have a fourth interface.

2. The circuit board structure of claim 1, wherein the first single-layered cover layer and the second single-layered cover layer are formed of a resin composition, and the resin composition comprises:

an epoxy resin (A) comprising:

a first epoxy resin (a-1), wherein the first epoxy resin (a-1) has a structure represented by the following formula (I):

in the formula (I), the R¹Is composed of

The R is²Is composed of

A is an integer of 0 to 2, and a is a bond; and

a second epoxy resin (a-2);

a hardening agent (B);

a catalyst (C);

a flame retardant (D);

a toughening agent (E), wherein the toughening agent (E) comprises a polyester resin; and

a solvent (F).

3. The circuit board structure according to claim 2, wherein the first epoxy resin (a-1) is used in an amount of 30 to 60 parts by weight, the second epoxy resin (a-2) is used in an amount of 40 to 70 parts by weight, the hardener (B) is used in an amount of 10 to 15 parts by weight, the catalyst (C) is used in an amount of 0.7 to 1.0 part by weight, the flame retardant (D) is used in an amount of 65 to 90 parts by weight, the toughening agent (E) is used in an amount of 40 to 80 parts by weight, and the solvent (F) is used in an amount of 160 to 210 parts by weight, based on 100 parts by weight of the epoxy resin (a).

4. The circuit board structure of claim 1, wherein the first single-layer cover layer and the second single-layer cover layer are each a single-layer structure.

5. The circuit board structure according to claim 4, wherein the single-layer structure has a thickness of 10 μm to 50 μm.

6. The circuit board structure of claim 1, wherein the first substrate comprises a first substrate and a first conductive layer, the first conductive layer is disposed on the first substrate, and the first substrate and the first single-layer cover layer have the first interface; and

the second substrate comprises a second base material and a second conducting layer, the second conducting layer is arranged on the second base material, and the second base material and the second single-layer covering layer are provided with the fourth interface.

7. The circuit board structure of claim 1, wherein the first substrate comprises a first substrate, a first conductive layer and a second conductive layer, the first conductive layer and the second conductive layer are disposed on two surfaces of the first substrate, and the first conductive layer and the first substrate together have the first interface with the first single-layer cover layer; and

the second substrate comprises a second base material, a third conducting layer and a fourth conducting layer, the third conducting layer and the fourth conducting layer are arranged on two surfaces of the second base material oppositely, and the third conducting layer and the second base material and the second single-layer covering layer jointly have the fourth interface.

8. A circuit-board structure according to claim 6 or 7, characterized in that the circuit-board structure further comprises:

a first protective layer disposed on the first substrate; and

a second passivation layer disposed on the second substrate,

wherein a material forming the first protective layer and the second protective layer is substantially the same as a material forming the first single-layer capping layer and the second single-layer capping layer.

9. The circuit board structure of claim 1, wherein the first substrate comprises a plurality of first hard type circuit boards, the second substrate comprises a plurality of second hard type circuit boards, the first hard type circuit boards are respectively disposed on two end portions of the first surface, the second hard type circuit boards are respectively disposed on two end portions of the second surface, so as to respectively expose a portion of the first single-layer cover layer and a portion of the second single-layer cover layer.

10. The circuit board structure of claim 9, further comprising:

a first solder mask ink disposed on the first substrate; and

and the second solder mask ink is arranged on the second substrate.