CN111786611B - SVPWM-based converter level control method - Google Patents
SVPWM-based converter level control method Download PDFInfo
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
- H02P27/12—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation pulsing by guiding the flux vector, current vector or voltage vector on a circle or a closed curve, e.g. for direct torque control
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
- H02M7/53871—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0048—Circuits or arrangements for reducing losses
- H02M1/0054—Transistor switching losses
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The invention provides a SVPWM-based converter level control method, which comprises the following steps: step 1, selecting a sector; step 2, vector selection; step 3, calculating a vector time slice; step 4, selecting a vector combination mode and controlling a midpoint potential; step 5, determining a control sequence of vector combination; and 6, controlling the output level of the converter according to the determined control sequence. The level control method of the converter effectively avoids the condition that positive level, negative level and zero level exist in one switching period at the same time, and further reduces the jump times of the levels, namely reduces the action times of a switching tube, so that the loss is reduced, the output ripple is also reduced and the energy utilization rate is high in the level control process of the converter.
Description
Technical Field
The invention relates to the technical field of level control of converters, in particular to a SVPWM-based level control method of a converter.
Background
In the application occasion of a high-power inverter, the multi-level converter is increasingly widely applied due to the advantages of low voltage born by a switching device, small harmonic content of output voltage, low switching frequency and the like. The three-level converter is a commonly applied multi-level switch structure, and correspondingly controls the level output voltage by adopting a three-level modulation method.
The three-level modulation method usually adopts space voltage vector pulse width modulation (SVPWM) and Sinusoidal Pulse Width Modulation (SPWM), which are used for decomposing target output voltage of the three-phase inverter into space voltage vectors in an alpha beta 0 coordinate system and approximating the target space voltage vectors by utilizing different space voltage vector combinations; compared with the traditional Sinusoidal Pulse Width Modulation (SPWM), the space voltage vector pulse width modulation (SVPWM) has relatively high DC voltage utilization rate, and can obtain relatively good output waveforms. However, based on the control of the existing SVPWM algorithm, the output voltage of the three-phase bridge arm simultaneously has three levels of positive, negative and zero in one switching period, so that the switching tube of the converter has more operation times and has great loss, and the problems of larger loss, increased output ripple and low energy utilization rate in the working process of the three-level converter are caused.
Disclosure of Invention
The invention aims to provide a SVPWM-based converter level control method, which aims to solve the problems of larger loss, increased output ripple and low energy utilization rate in the converter level control process in the prior art.
In order to achieve the above object, the present invention provides the following technical solutions:
A converter level control method based on SVPWM comprises the following steps:
step 1, selecting a sector;
Determining the sector position of the target voltage in a space voltage vector formed by three-phase bridge arms of the converter; the sector comprises a middle sector, and the middle sector is provided with a redundancy vector;
Step 2, vector selection;
vector selection is carried out according to the sectors determined in the step 1;
step 3, calculating a vector time slice;
Synthesizing the space voltage vector corresponding to the vector selected in the step 2 into a target voltage vector;
Step 4, selecting a vector combination mode and controlling a midpoint potential;
Processing to obtain a vector combination mode of the sector according to the calculation result of the vector time slice in the step 3; then determining and selecting a vector combination mode which is most favorable for neutral point potential balance according to the calculation result of the neutral point balance factor of each vector combination mode, wherein the most favorable mode is that the absolute value of the neutral point balance factor is the largest;
step 5, determining a control sequence of vector combination;
based on the vector combination mode which is most favorable for neutral point potential balance control and selected in the step 4, arranging target vectors, and selecting an arrangement sequence with the least IGBT action times as a control sequence;
And 6, controlling the output level of the converter according to the determined control sequence.
Further, in step 4, when the sector is a middle sector, the processing means determining vector combinations by excluding redundant vectors.
Further, the step of determining the vector combination by the middle sector by excluding the redundant vector includes;
(1) All vector combinations of sectors in enumeration:
(2) The method comprises the steps that through a redundant vector elimination mode, vector combinations with positive level, negative level and zero level existing in one switching period in all vector combination modes are eliminated;
(3) And determining the vector combination mode of the middle sector according to the excluding result.
Further, in the step 1, 27 space voltage vectors of the output voltage of the three-level bridge arm form a triangle sector in a gh plane coordinate system; the sector position where the target voltage is determined by selecting the sector.
Further, the sectors in step 1 further include a long sector and a short sector, where the long sector has no redundant vector; the short sector has 2 redundant vectors.
Further, in step 4, when the sector is a short sector, the processing means that the target voltage vector is prevented from entering the short sector by adjusting the dc side voltage.
Further, the calculation formula of the spatial voltage vector synthesis in the step 3 is as follows:
Vr＝Vxtx+Vyty+Vztz
Wherein: v r is the target voltage vector; v x is the voltage vector in the x direction; v y is the voltage vector in the y direction; v z is the voltage vector in the z direction; t x is the percentage of x-direction on time relative to the sampling period; t y is the percentage of the y-direction on time relative to the sampling period; t z is the percentage of z-direction on time relative to the sampling period.
Further, in step 5, when the space voltage vectors are 3, 6 vector arrangement modes are provided for the synthesized target voltage vectors; when the space voltage vectors are 4, the synthesized target voltage vectors have 24 vector arrangement modes.
Compared with the prior art, the invention has the outstanding beneficial effects that:
according to the SVPWM-based converter level control method, the bridge arm level is controlled in a mode of eliminating redundant vectors and adjusting direct-current side voltage, so that target voltage does not enter a short sector, and output control of the bridge arm level of the converter is realized. The output level of each phase bridge arm does not generate positive level, negative level and zero level in one switching period at the same time, namely, the positive level and the zero level or the negative level and the zero level are output in one switching period, so that the change condition and the frequency of pulse output voltage are reduced.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the application. Wherein:
FIG. 1 is a three-phase four-wire system three-bridge arm neutral line direct connection topological structure diagram of the invention;
FIG. 2 is a three-level space voltage vector diagram in the gh coordinate system of the present invention;
FIG. 3 is a flow chart of a SVPWM-based converter level control method of the present invention;
FIG. 4 is a diagram of a prior SVPWM one-phase bridge arm voltage waveform;
fig. 5 is a waveform of a voltage of a bridge arm of one phase of the level control method of the current transformer based on SVPWM according to the present invention.
Detailed Description
The invention will be described in detail below with reference to the drawings in connection with embodiments. The examples are provided by way of explanation of the invention and not limitation of the invention. Indeed, it will be apparent to those skilled in the art that modifications and variations can be made in the present invention without departing from the scope or spirit of the invention. For example, features illustrated or described as part of one embodiment can be used on another embodiment to yield still a further embodiment. Accordingly, it is intended that the present invention encompass such modifications and variations as fall within the scope of the appended claims and their equivalents.
As shown in fig. 1, the topological structure of the three-phase four-wire system three-bridge-arm neutral line direct connection topological structure comprises three-phase bridge arms, each bridge arm is provided with two switching tubes, the voltage at the middle points of the two switching tubes on each bridge arm is the phase voltage of the phase, namely the output voltage of the phase bridge arm, each phase bridge arm can output positive and negative 3 levels, the three-phase bridge arm can form 27 space voltage vectors, an abc coordinate system and an alpha beta 0 coordinate system have a fixed conversion relation, and the three-level space vectors are shown in table 1.
Table 1 three-level space vector correspondence conversion relationship
The existing SVPWM control algorithm mainly comprises sector selection, vector time slice calculation, vector combination mode listing, vector combination mode selection, midpoint potential control and vector sending sequence optimization. The vector combination mode selection and midpoint potential control process mainly takes unbalance of capacitor voltage at the direct current side of a three-level three-bridge arm into consideration to model and analyze the direct current voltage at the direct current side of the three-level three-bridge arm, then a midpoint balance factor is determined, and three-dimensional vector modulation strategy effective control is carried out on midpoint potential by taking the midpoint balance factor as a theoretical basis. Based on the existing SVPWM control algorithm, in the vector selection of partial sectors, under the selected certain vector combination modes, under the neutral point potential control result, three level signals of positive, negative and zero are output in one switching period.
In order to reduce the number of level signals in one switching period, the invention is mainly improved and innovated for the step of selecting a vector combination mode and controlling a midpoint potential, and particularly controls the bridge arm level in a mode of eliminating redundant vectors and adjusting direct-current side voltage so that target voltage does not enter a short sector, thereby realizing the output control of the bridge arm level of the converter.
The invention mainly selects a vector combination mode and controls midpoint potential: the sectors 13-24 have 12 sectors without redundant vectors, each sector has only 1 vector combination, and ABC three phases only have positive level, zero level or negative level and zero level in the same switching period, so that the problems can not occur, and special treatment is not needed; sectors 7-12 have a total of 6 sectors with 1 redundant vector and 4 vector combinations per sector. The vector combination of positive and negative zero 3 levels simultaneously exists in 21 switching periods is eliminated, the vector combination is half, and at the moment, the ABC three phases can only generate positive level, zero level or negative level and zero level in the same switching period; sectors 1-6 have 2 redundant vectors for a total of 6 sectors, each sector having 12 vector combinations. For 12 vector combinations, it is not guaranteed that positive and negative levels do not occur at the same time.
The SVPWM algorithm itself is relatively complex, and this embodiment only focuses on the content of vector combination mode selection and midpoint potential control in the present invention, and the rest is the prior art, and only briefly described. Therefore, the three-level converter level control method based on SVPWM of the invention is shown in fig. 3, and comprises the following steps:
Step 1, sector selection
As shown in fig. 3, the 27 space vectors can form 24 triangular sectors in the gh plane coordinate system, and the sectors are numbered 1-24 sectors counterclockwise from inside to outside, and the sector selection is to determine which sector the target voltage is specifically located in.
The gh coordinate system and the alpha beta 0 coordinate system have a fixed conversion relation, and a simplifying algorithm of a non-orthogonal gh coordinate system is adopted, so that the algorithm can greatly simplify the calculation amount required by sector selection; moreover, the sector judgment is not needed, complex trigonometric function operation can be avoided, and the real-time control of the multi-level system is easy to realize.
Step 2, vector selection
The space voltage vector in the gh coordinate system is used only for sector selection, and the vector synthesis uses a three-level space vector in the αβ0 coordinate system. The three-phase target voltage is transformed to an alpha beta 0 coordinate system after per unit of the three-phase target voltage to obtain a target voltage vector V r. The target voltage vector in the αβ0 coordinate system is finally synthesized by 3 or 4 of the 27 space vectors, wherein the x-direction vector requires 1 vector V x, the y-direction vector requires 1 vector V y, and the z-direction vector requires 1or 2 vectors V z, and which vectors can be determined according to the sector selected in step 1.
For different sectors, the x, y, z directions are defined as follows:
for sectors 1-6, the z-direction vectors are S1, S2, S3, the x-direction vector is the head-end vector encountered by counterclockwise rotation, and the y-direction vector is the tail-end vector encountered by counterclockwise rotation;
For the sectors 13-24, the z-direction vector is the vector corresponding to the intersection point of the sector and the sectors 1-6, the x-direction vector is the head-end vector encountered by anticlockwise rotation, and the y-direction vector is the tail-end vector encountered by anticlockwise rotation;
For the sectors 7-12, the z-direction vector is the head vector encountered by counterclockwise rotation, the x-direction vector is the vector corresponding to the intersection point of the sector and the regular hexagon outside the space vector, and the y-direction vector is the tail vector encountered by counterclockwise rotation.
Step 3, vector time slice calculation
After the vectors are selected, the vectors are respectively acted for a certain time, and the space voltage vector is used for synthesizing the target voltage vector, wherein the synthesized calculation formula is as follows:
Vr＝Vxtx+Vyty+Vztz
Wherein: v r is the target voltage vector; v x is the voltage vector in the x direction; v y is the voltage vector in the y direction; v z is the voltage vector in the z direction; t x is the percentage of x-direction on time relative to the sampling period; t y is the percentage of the y-direction on time relative to the sampling period; t z is the percentage of z-direction on time relative to the sampling period.
The x and y axes of the sectors 13-24 are only 1 vector, and the z axis is 2 vectors with equal size and opposite directions, and no redundant vector exists.
The y and z axes of sectors 7-12 each have 2 vectors, the x axis has 1 vector, and the x axis has 1 redundant vector. According to the different redundancy vectors, the method is divided into 4 vector combination modes.
The x and y axes of sectors 1-6 each have 2 vectors, and the z axis has 3 vectors, for a total of 2 redundant vectors. According to the different selected redundant vectors, the method is divided into 12 vector combination modes.
Step 4, selecting a vector combination mode and controlling a midpoint potential:
The sectors 1 to 12 each have redundant vectors, and there are a plurality of vector combination modes, each vector combination mode has different control actions on the midpoint potential, so that the vector combination mode which is most favorable for midpoint potential balance needs to be determined as the selected vector combination by calculating the midpoint balance factor. The larger the absolute value of the midpoint balance factor is, the more obvious the effect of increasing or inhibiting offset is, namely, the vector combination which is most favorable for midpoint potential balance is.
Selection is based on analysis of different sectors:
The total of 12 sectors from sector 13 to 24 are long sectors, no redundant vectors, and each sector has only 1 vector combination, as shown in table 2.
Table 2 vector combinations and output levels for sectors 13-24
By observing the vector combinations of the sectors 13-24, it is found that the ABC three phases only have positive level, zero level or negative level, zero level in the same switching period, and the above problem does not occur. For example, sector 13 has a corresponding phase A level of (1 11 0), i.e., phase A only exhibits positive and zero levels; sector 13 has a level (-1 0-1) corresponding to phase B, i.e., phase B has only a level of negative and zero; sector 13 has a corresponding C-phase level (-1-1 0-1), i.e., the C-phase also exhibits only negative and zero levels, i.e., sector 13 does not exhibit positive, negative and zero levels during a switching cycle.
The total of 6 sectors from 7 to 12 are middle sectors, and each sector has 1 redundancy vector, and each sector has 4 vector combinations. The vector combinations and output levels for sectors 7-12 are shown in Table 3, and the redundant vectors for sectors 7-12 and their vector combinations are shown in Table 4.
Table 3 sector 7-12 vector combinations and output levels
TABLE 4 sector 7-12 vector combining scheme
It should be noted that, for the vector combination of the number 1 in table 4, V xVypVzp/Vzn is related to the sign and the value of the time slice tz, specifically, one of the combination cases VxVypVzp、VxVypVzn、VxVypVzpVzn; the vector combination mode V xVynVzp/Vzn with the same sequence number 2 may be one of the combination cases of VxVynVzp、VxVynVzn、VxVynVzpVzn.
By observing the vector combinations of sectors 7-12, it is found that:
The simultaneous occurrence of the vector V yp and the vector V zn in the sector 7, the sector 9 and the sector 11 results in the simultaneous occurrence of the positive level, the negative level and the zero level of the B-phase level corresponding to the sector 7, the C-phase level corresponding to the sector 9 and the a-phase level corresponding to the sector 11, and the corresponding redundancy vector and the vector combination relationship thereof are shown as the sequence number 1 and the sequence number 4 in the table 4.
For example, the vector combination corresponding to the number 4 in table 4 is selected, and the vector V yp and the vector V zn are simultaneously present in the sector 7, and at this time, the vector V xVypVynVzn is selected, and the B-phase output level is (0 1-1). Thus, positive level, negative level and zero level can be simultaneously generated, based on the control requirement of the invention, namely, three levels of positive and negative zero are not allowed to exist in the bridge arm output voltage in one switching period, the vector combination of positive level, negative level and zero level is required to be eliminated in 1 switching period, so that the vector combination of the observation table 4 finds that the vector combination mode of the sequence number 1 and the sequence number 4 can not be used because of the simultaneous generation of the vector V yp and the vector V zn, and only the vector combination mode of the sequence number 2 and the sequence number 3 can be used, so that the vector combination is left to be half, and the ABC three phases can only generate the positive level, the zero level or the negative level and the zero level in the same switching period.
The simultaneous occurrence of the vector V yn and the vector V zp in the sector 8, the sector 10 and the sector 12 results in the simultaneous occurrence of the positive level, the negative level and the zero level in the sector 8 corresponding to the a-phase level, the sector 10 corresponding to the B-phase level and the sector 12 corresponding to the C-phase level, and the corresponding redundancy vector and the vector combination relationship thereof are shown as sequence number 2 and sequence number 3 in table 4.
Therefore, based on the analysis, it is necessary to exclude 1 switching period from having a vector combination of positive level, negative level and zero level at the same time, so that the vector combination is half left, and it is ensured that ABC three phases can only have positive level, zero level or negative level and zero level in the same switching period.
The total of 6 sectors from 1 to 6 are short sectors, and each sector has 12 kinds of vector combinations, and 2 redundant vectors are provided. The vector combinations and output levels for sectors 1-6 are shown in Table 5, and the redundant vectors for sectors 1-6 and their vector combinations are shown in Table 6.
Table 5 sector 1-6 vector combinations and output levels
TABLE 6 sector 1-6 vector combining mode
First, in table 6, the vector combination scheme V xpVypVzp/VznVz0 of the number 1 indicates two combinations, V xpVypVzpVz0 and V xpVypVznVz0, respectively, and specifically, which is determined based on the calculated time slice tz is selected, V xpVypVzpVz0 is selected if tz is positive, and V xpVypVznVz0 is selected if tz is negative. Similarly, the vector combination mode V xnVypVzp/VznVz0 of the sequence number 2 may be specifically one of the combination cases V xnVypVznVz0 or V xnVypVzpVz0.
By observing and analyzing the vector combinations of the sectors 1-6, it is found that for 12 vector combination modes existing in the sectors, positive level, negative level and zero level cannot be ensured to be different at the same time by a method of eliminating redundant vectors, but the target voltage cannot enter the short sector by a method of adjusting the direct current side voltage. If the target voltage enters the middle sector or the long sector after the control of the short sector, the subsequent control process is performed according to the control of the middle sector and the control of the long sector described above.
Step5, vector sending sequence optimization:
According to different time slice calculation results, the target voltage vector may be synthesized by 3 or 4 space voltage vectors, where the 3 space voltage vectors are synthesized corresponding to 6 vector arrangement conditions, and the 4 space voltage vectors are synthesized corresponding to 24 vector arrangement conditions. And respectively calculating the IGBT action times of all the vector arrangement conditions, and selecting the minimum IGBT action times as a final vector sending sequence.
The PSCAD simulation verification is carried out on the level control method of the converter. Firstly, a PSCAD simulation model is established as shown in fig. 1, and the main parameters of the simulation model are as follows: the three-phase voltage source has a rated line voltage of 390V, a corresponding phase voltage of about 225V, a system frequency of 50Hz, a power supply inductance of 100 mu H and a DC side capacitance of 2 11480 mu F. The inverter adopts LCL filtering, the IGBT side inductance is 0.3mH, the power grid side inductance is 0.065mH, the filtering capacitance is 15 mu F, and the damping resistance is 0.75Ω. When the inverter switching frequency is 10kHz, namely the control period is 100 mu s, and 100A fundamental wave reactive current is output in a grid connection mode, and the output level of the converter is controlled by adopting the existing SVPWM control algorithm, the corresponding A phase bridge arm output voltage waveform is shown as a graph in fig. 4, positive and negative zero 3 levels are output in each 100 mu s switching period by the conventional SVPWM control algorithm in 16 control periods near the zero crossing point of the target voltage, so that ripple wave is increased and loss is increased; when the SVPWM control algorithm is adopted to improve and control the output level of the converter, the corresponding A-phase bridge arm output voltage waveform is shown in fig. 5, and the SVPWM-based three-level converter level control method only outputs positive level, zero level 2 levels or negative level and zero level 2 levels in each 100 mu s switching period near the zero crossing point of the target voltage, and the output level meets the expected requirement, so that the positive level, the negative level and the zero level cannot be generated simultaneously in one switching period, jump signals of different levels are reduced, and ripple and loss can be reduced.
From the above description, it can be seen that the above embodiments of the present invention achieve the following technical effects:
According to the control method of the three-level converter based on the SVPWM algorithm, only one vector combination, namely, the sector without redundant vector combination is not processed, the sector with 4 vector combinations, namely, 1 redundant vector is processed in a removing way, and the sector with 12 vector combinations, namely, 3 redundant vectors is processed in a way of adjusting direct current side voltage; therefore, the whole sector can be ensured not to generate positive level, negative level and zero level at the same time, the ripple generated in the jump process of different levels is reduced, and the loss of a switch is also reduced; unnecessary heating value in the control process of the converter can be reduced along with the reduction of the switching loss, so that the energy loss can be reduced, the driving force of the motor can be reduced, and the service performance of the converter can be provided.
The above description is only of the preferred embodiments of the present invention and is not intended to limit the present invention, but various modifications and variations can be made to the present invention by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. A converter level control method based on SVPWM is characterized by comprising the following steps:
step 1, selecting a sector;
Determining the sector position of the target voltage in a space voltage vector formed by three-phase bridge arms of the converter; the sector comprises a middle sector, and the middle sector is provided with a redundancy vector;
Step 2, vector selection;
vector selection is carried out according to the sectors determined in the step 1;
step 3, calculating a vector time slice;
Synthesizing the space voltage vector corresponding to the vector selected in the step 2 into a target voltage vector;
Step 4, selecting a vector combination mode and controlling a midpoint potential;
Processing to obtain a vector combination mode of the sector according to the calculation result of the vector time slice in the step 3; then determining and selecting a vector combination mode which is most favorable for neutral point potential balance according to the calculation result of the neutral point balance factor of each vector combination mode, wherein the most favorable mode is that the absolute value of the neutral point balance factor is the largest;
step 5, determining a control sequence of vector combination;
based on the vector combination mode which is most favorable for neutral point potential balance control and selected in the step 4, arranging target vectors, and selecting an arrangement sequence with the least IGBT action times as a control sequence;
step 6, controlling the output level of the converter according to the determined control sequence;
In the step4, when the sector is a middle sector, the processing means that the vector combination is determined by a mode of eliminating redundant vectors;
The step of determining the vector combination by the middle sector through the mode of eliminating redundant vectors comprises the following steps;
(1) All vector combinations of sectors in enumeration:
(2) The method comprises the steps that through a redundant vector elimination mode, vector combinations with positive level, negative level and zero level existing in one switching period in all vector combination modes are eliminated;
(3) Determining a vector combination mode of the middle sector according to the elimination result;
Step 1, forming a triangular sector by 27 space voltage vectors of the output voltage of a three-level bridge arm in a gh plane coordinate system; determining the sector position of the target voltage by selecting the sector;
The sector in the step 1 further comprises a long sector and a short sector, wherein the long sector has no redundant vector; the short sector has 2 redundant vectors;
In step 4, when the sector is a short sector, the process refers to avoiding the target voltage vector from entering the short sector by adjusting the dc side voltage.
2. The SVPWM-based converter level control method according to claim 1, wherein the calculation formula of the space voltage vector synthesis in the step 3 is:
Vr＝Vxtx+Vyty+Vztz
Wherein: v r is the target voltage vector; v x is the voltage vector in the x direction; v y is the voltage vector in the y direction; v z is the voltage vector in the z direction; t x is the percentage of x-direction on time relative to the sampling period; t y is the percentage of the y-direction on time relative to the sampling period; t z is the percentage of z-direction on time relative to the sampling period.
3. The SVPWM-based converter level control method of claim 1, wherein in step 5, when the space voltage vectors are 3, the synthesized target voltage vectors have 6 vector arrangements; when the space voltage vectors are 4, the synthesized target voltage vectors have 24 vector arrangement modes.
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