CN111769806A - Power stabilizing method for power amplifier - Google Patents
Power stabilizing method for power amplifier Download PDFInfo
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- CN111769806A CN111769806A CN202010504256.1A CN202010504256A CN111769806A CN 111769806 A CN111769806 A CN 111769806A CN 202010504256 A CN202010504256 A CN 202010504256A CN 111769806 A CN111769806 A CN 111769806A
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- H03—ELECTRONIC CIRCUITRY
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- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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Abstract
The invention relates to the technical field of power amplifiers, in particular to a power stabilizing method of a power amplifier, which comprises the steps of firstly adjusting the input power of the power amplifier at each sampling frequency point according to power steps, establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point, setting a reference temperature and a reference voltage, establishing a third corresponding table of a voltage difference and a temperature difference, then obtaining a working frequency and a target power at the working power according to the second corresponding table, setting the input power of the power amplifier as the target power, and obtaining the working frequency, the working voltage at the working power and a real-time voltage difference; finally, the sum of the working voltage and the real-time voltage difference is used as a final feedback voltage, and the feedback voltage is output to the OPA in real time through the FPGA so as to control the power of the power amplifier; the invention can effectively meet the requirements of both the test precision and the test speed in the radio frequency chip test.
Description
Technical Field
The invention relates to the technical field of power amplifiers, in particular to a power stabilizing method of a power amplifier.
Background
In the rf chip Test, many chip tests (such as the Test of an rf switch) require a large power, and a power amplifier is usually added at an rf output terminal of an ATE (Automatic Test Equipment) to perform power boosting. The test precision and test speed of ATE have very important influence on production efficiency, the test precision directly influences the accuracy and reliability of a chip test result, the test speed is very important for the yield of chip test, and in radio frequency test equipment, the test precision and test speed are both key indexes, which puts high requirements on the power stability speed and output power stability of a power amplifier.
In the existing communication equipment detection technology, the power stabilizing speed of a power amplifier is not required to be high, the time for the power amplifier to reach power stabilization is not restricted, after the power amplifier is excited, the power of the power amplifier has a climbing process of 0.2dB within the first 20m of the excitation, and power stabilization and power control are not carried out;
this can cause a significant problem in rf chip testing:
firstly, the output power deviation is generally required to be not more than 0.1dB in the radio frequency chip test, and the measurement deviation of the performance of the chip to be tested can be caused by the overlarge output power deviation;
secondly, in order to achieve stable gain of the power amplifier, the power amplifier needs to wait for a period of time after being excited, which causes delay of hundreds of milliseconds, which causes the test speed of the radio frequency chip to be reduced, and the long-term low test speed seriously affects the test productivity of the radio frequency chip;
thirdly, the power stability of the power amplifier is not enough, when the power amplifier works in a power range at a working temperature, the power stability of any frequency in a working frequency band can not meet the requirement, and the power stability is very important for the test precision of the radio frequency chip;
therefore, the requirement of both the test precision and the test speed in the radio frequency chip test is difficult to achieve by adopting the power stabilization mode of the traditional power amplifier.
Disclosure of Invention
The present invention is directed to a power stabilizing method for a power amplifier, which solves one or more of the problems in the prior art and provides at least one of the advantages of the present invention.
In order to achieve the purpose, the invention provides the following technical scheme:
a power stabilizing method of a power amplifier is characterized in that the input end of the power amplifier is connected with a VGA, the output end of the power amplifier is connected with a detector, the detector is connected with the VGA through an FPGA and a control switch in sequence, the input end of the control switch is also connected with an OPA, and the input end of the OPA is respectively connected with the output end of the detector and the output end of the FPGA;
the method comprises the following steps:
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier.
Further, the step 200 includes:
step 210, obtaining a frequency response curve of the attenuator through scanning of a network analyzer, obtaining a corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, and using the corresponding relation as a first corresponding table, wherein the frequency response of the attenuator is the power attenuation values of the attenuator at each frequency point in a working frequency band;
step 220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator to a power meter;
step 230, selecting one sampling frequency point from the n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring 3 groups of corresponding relations (f11, att (f11)), (f12, att (f12)), (f13, att (f13)) of the frequency points and power attenuation values according to the first corresponding table, wherein f11 is more than f12 and less than f 13;
step 240, a piecewise least square method parabolic curve fitting is adopted for (f11, att (f11)), (f12, att (f12)), (f13, att (f13)), so that a first fitting formula att (f0) ═ k2*f02+k1*f0+k0Wherein, f0 ∈ [ f11, f13]Att (f0) is a power attenuation function, and the sampling frequency point is substituted into a first fitting formula to obtain a power attenuation value at the sampling frequency point;
step 250, reading the measured power measured by the power meter at a sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein Pout is Pt + att (f0), Pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power stepping at sampling frequency points, decreasing the input power from large to small according to power stepping when the output power reaches a maximum power value until the output power reaches a minimum power value, and performing signal sampling on the analog voltage signal demodulated by the detector at each power sampling point to obtain output voltage, so that m corresponding relations among the input power, the output voltage and the output power are obtained at each sampling frequency point;
and 270, judging whether the n sampling frequency points all obtain the corresponding relations of m input powers, output voltages and output powers, if so, establishing the corresponding relations of the m input powers, the output voltages and the output powers at the n sampling frequency points to obtain a second corresponding table, wherein the second corresponding table has m × n corresponding relations.
Further, the step 300 includes:
step 310, setting a reference temperature and a reference power, reading detection voltages when a power amplifier outputs the reference power at n frequency points at the reference temperature to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference Δ V-V0, and setting a temperature difference Δ T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is a reference voltage, and T0 is a reference temperature;
and step 320, setting w temperature values in the working temperature, reading the measured power at the w temperature values at each frequency point through a power meter, counting n sampling points, performing power compensation on the measured power at each frequency point again, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference delta V corresponding to the w temperature differences delta T at each frequency point, and obtaining a third correspondence table of the voltage difference delta V and the temperature differences delta T, wherein the third correspondence table has n corresponding relations.
Further, in step 400, the obtaining the target power of the working frequency and the working power according to the second mapping table includes:
step 410, selecting three frequency points f1, f2 and f3 of adjacent working frequencies according to a second mapping table, and respectively selecting 3 output powers of the adjacent working powers at the frequency points f1, f2 and f3, wherein each frequency point obtains 3 output powers, and f1 is larger than f2 is larger than f 3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second mapping table, obtaining the corresponding relation between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square method parabola curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a12*Pout2+a11*Pout+a10，
Pin(f2)＝a22*Pout2+a21*Pout+a20，
Pin(f3)＝a32*Pout2+a31*Pout+a30；
wherein Pin (f1) is the input power function at the frequency point f1, Pin (f2) is the input power function at the frequency point f2, and Pin (f3) is the input power function at the frequency point f 3;
step 430, substituting the working power into a second fitting formula group to obtain input power Pin1 of the working power at a frequency point f1, input power Pin2 of the working power at a frequency point f2 and input power Pin3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Pi1), (f2, Pi2), (f3 and Pi3) of three groups of frequency points and input power;
step 440, performing curve fitting on (f1, Pi1), (f2, Pi2), (f3, and Pi3) by using a piecewise least square method parabolic curve fitting algorithm to obtain a third fitting formula pin (f) ═ a2*f2+a1*f+a0Wherein, f ∈ [ f1, f3]And Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, so that the target power at the working frequency and the working power is obtained.
Further, the step 500 includes:
step 510, respectively obtaining output voltages of 9 output powers at frequency points f1, f2, and f3 according to the second mapping table, obtaining a corresponding relationship between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relationship between 3 groups of output voltages and output powers at each frequency point by using a piecewise least square method parabolic curve fitting algorithm, so as to obtain a fourth fitting formula group:
V(f1)＝b12*Pout2+b11*Pout+b10，
V(f2)＝b22*Pout2+b21*Pout+b20，
V(f3)＝b32*Pout2+b31*Pout+b30；
wherein V (f1) is the output voltage function at the frequency point f1, V (f2) is the output voltage function at the frequency point f2, and V (f3) is the output voltage function at the frequency point f 3;
step 520, substituting the working power into a fourth fitting formula group to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2 and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Vo1), (f2, Vo2), (f3 and Vo3) of three groups of frequency points and output voltages;
step 530, performing curve fitting on (f1, Vo1), (f2, Vo2) and (f3, Vo3) by adopting a piecewise least square method parabola curve fitting algorithm to obtain a fifth fitting formula v (f) ═ b2*f2+b1*f+b0And V (f) is a working voltage function, and the working frequency is substituted into a fifth fitting formula, so that the working voltage at the working frequency and the working power is obtained.
Further, the step 600 includes:
step 610, acquiring real-time temperature T of the detector through the FPGA to obtain real-time temperature difference Δ T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference Δ T at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third correspondence table, obtaining the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square method parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c12*△T2+c11*△T+c10，
△V(f2)＝c22*△T2+c21*△T+c20，
△V(f3)＝c32*△T2+c31*△T+c30；
wherein Δ V (f1) is a function of the voltage difference at frequency point f1, Δ V (f2) is a function of the voltage difference at frequency point f2, and Δ V (f3) is a function of the voltage difference at frequency point f 3;
step 630, substituting the real-time temperature difference Δ T into a sixth fitting formula group to obtain a voltage difference Δ V1 of the real-time temperature difference Δ T at a frequency point f1, a voltage difference Δ V2 of the real-time temperature difference Δ T at a frequency point f2, and a voltage difference Δ V3 of the real-time temperature difference Δ T at a frequency point f3, so as to obtain three groups of corresponding relations (f1, Δ V1), (f2, Δ V2), (f3, Δ V3) of the frequency points and the voltage differences;
step 640, performing curve fitting on (f1, △ V1), (f2, △ V2), and (f3, △ V3) by using a piecewise least squares method parabolic curve fitting algorithm to obtain a seventh fitting formula △ V (f) ═ c2*f2+c1*f+c0Wherein △ V (f) is a voltage difference function, and the operating frequency is substituted into the seventh fitting formula, so as to obtain the real-time voltage difference △ V at the operating frequency and the operating power.
Further, the working frequency range of the power amplifier is 700MHz to 6000MHz, and the power range is 0dBm to 40 dBm.
As a further improvement of the above technical solution, the control switch is controlled by the FPGA, and when the power amplifier is calibrated, the control switch is connected to a preset voltage, which is a reference voltage of the VGA; when the power amplifier works, the control switch is connected to the OPA end, and the DA voltage signal and the detection voltage signal given by the FPGA jointly regulate the input voltage of the VGA through the OPA. The preset voltage is a fixed voltage and is set according to rated voltages of different VGAs.
Further, the control resolution of the FPGA is less than 0.005 dB.
The invention has the beneficial effects that: the invention provides a power stabilizing method of a power amplifier, which comprises the steps of firstly adjusting the input power of the power amplifier at each sampling frequency point according to power steps, establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point, setting a reference temperature and a reference voltage, establishing a third corresponding table of a voltage difference and a temperature difference, then switching and connecting a control switch to an OPA output end, obtaining the working frequency and the working power of the power amplifier, obtaining the working frequency and the target power at the working power according to the second corresponding table, and setting the input power of the power amplifier as the target power; working voltage at the working frequency and the working power is obtained according to the second mapping table; acquiring the real-time temperature of the detector through the FPGA to obtain a real-time temperature difference, and calculating the real-time voltage difference of the working frequency and the working power according to a third mapping table; taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier; the invention can set the working frequency and the working power of the input power amplifier according to the test requirement, and carry out real-time accurate compensation on the power amplifier at any frequency position in the working frequency band within the power range under the working temperature, thereby effectively meeting the requirements of both the test precision and the test speed in the radio frequency chip test.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without inventive exercise.
Fig. 1 is a flow chart illustrating a power stabilizing method for a power amplifier according to an embodiment of the invention;
fig. 2 is a block diagram of a circuit structure for power stabilization according to an embodiment of the present invention.
Detailed Description
The conception, the specific structure and the technical effects of the present invention will be clearly and completely described in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the schemes and the effects of the present invention. It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict.
With reference to fig. 1 and fig. 2, an embodiment of the present invention provides a power stabilization method for a power amplifier, where an input end of the power amplifier is connected to a VGA, an output end of the power amplifier is connected to a detector, the detector is connected to the VGA through an FPGA and a control switch in sequence, an input end of the control switch is further connected to an OPA (operational amplifier), and an input end of the OPA is respectively connected to an output end of the detector and an output end of the FPGA (Field Programmable Gate Array);
the method comprises the following steps:
the input power is the power of a radio frequency signal input into the VGA, the output voltage is obtained by performing signal sampling on an analog voltage signal demodulated by the detector, and the output power is the power of the input power amplified and output by the power amplifier;
the temperature difference delta T-T0, V is real-time voltage, T is real-time temperature, V0 is reference voltage, T0 is reference temperature, the real-time voltage is obtained by signal sampling according to an analog voltage signal demodulated by the detector, the real-time temperature is obtained by detecting the temperature of the detector in real time through a temperature sensor, the temperature sensor is connected with an FPGA, and the FPGA can obtain the real-time temperature of the detector;
the working frequency is the frequency set by the power amplifier according to the test requirement, and the working power is the output power set by the power amplifier according to the test requirement;
it can be understood that the operating frequency and the operating power of the power amplifier are preset data, the operating frequency should be within the operating frequency band, and the operating power should be within the power range.
The output end of the power amplifier is connected with a processing module, the processing module is connected with the FPGA, and the processing module is used for recording the obtained target power and feeding the target power back to the FPGA;
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to perform power compensation on the power amplifier.
The invention can set the working frequency and the working power of the input power amplifier according to the test requirement, and carry out real-time and accurate power compensation on the power amplifier at any frequency position in the working frequency band within the power range under the working temperature, thereby effectively meeting the requirements of both the test precision and the test speed in the radio frequency chip test.
As a further improvement of the above technical solution, the step 200 includes:
step 210, obtaining a frequency response curve of the attenuator through scanning of a network analyzer, obtaining a corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, and using the corresponding relation as a first corresponding table, wherein the frequency response of the attenuator is the power attenuation values of the attenuator at each frequency point in a working frequency band;
step 220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator to a power meter;
the control end of the power meter is connected with a processing module, the processing module is connected with the FPGA, and the processing module is used for acquiring the measurement power acquired by the power meter in real time and feeding back the measurement power to the FPGA;
step 230, selecting one sampling frequency point from the n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring 3 groups of corresponding relations (f11, att (f11)), (f12, att (f12)), (f13, att (f13)) of the frequency points and power attenuation values according to the first corresponding table, wherein f11 is more than f12 and less than f 13;
step 240, a piecewise least square method parabolic curve fitting is adopted for (f11, att (f11)), (f12, att (f12)), (f13, att (f13)), so that a first fitting formula att (f0) ═ k2*f02+k1*f0+k0Wherein, f0 ∈ [ f11, f13]Att (f0) is a power attenuation function, and the sampling frequency point is substituted into a first fitting formula to obtain a power attenuation value at the sampling frequency point;
step 250, reading the measured power measured by the power meter at a sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein Pout is Pt + att (f0), Pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power stepping at sampling frequency points, decreasing the input power from large to small according to power stepping when the output power reaches a maximum power value until the output power reaches a minimum power value, and performing signal sampling on the analog voltage signal demodulated by the detector at each power sampling point to obtain output voltage, so that m corresponding relations among the input power, the output voltage and the output power are obtained at each sampling frequency point;
and 270, judging whether the n sampling frequency points all obtain the corresponding relations of m input powers, output voltages and output powers, if so, establishing the corresponding relations of the m input powers, the output voltages and the output powers at the n sampling frequency points to obtain a second corresponding table, wherein the second corresponding table has m × n corresponding relations.
It should be noted that, after one sampling frequency point is selected from the n sampling frequency points to execute step 230 to step 260 and the corresponding relationship of the sampling frequency point is obtained, it is necessary to determine whether the remaining sampling frequency points also obtain the corresponding relationship, that is, it is determined whether the n sampling frequency points all obtain the corresponding relationship of m input powers, output voltages and output powers, if not, the next sampling frequency point is continuously selected until the n sampling frequency points all obtain the corresponding relationship of m input powers, output voltages and output powers, so as to obtain a second correspondence table.
The output power is a power value actually output by the power amplifier, the measured power is a power value of the output power attenuated by the attenuator, and the measured power is obtained by measuring through a power meter; the power meter is used for measuring the output power of the power meter, and the output power is measured by the power meter at the sampling frequency point.
In this embodiment, the working frequency band is 700MHz to 6000MHz, the working frequency band is divided into n-1 segments to obtain n sampling frequency points, and then power compensation is performed on the measurement power of each sampling frequency point. When the power amplifier normally works, the minimum power value output by the power amplifier in the working frequency band is 0, the maximum power value output by the power amplifier in the working frequency band is 40dBm, namely the power range of the power amplifier is 0-40 dBm, m output powers are obtained by equally dividing the power range, and each output power is generated by amplifying the corresponding input power by the power amplifier and has m input powers in total.
In this embodiment, because the gain of the power amplifier is not known, the rf signal input to the VGA should use a sufficiently low input power, and the input power of the rf signal is gradually increased to increase the output power until the maximum power value (i.e., 40dBm) is reached, so as to avoid the damage to the power amplifier due to the output power of the power amplifier exceeding the power range caused by the excessive input power.
Referring to fig. 2, after an output signal at the output end of the power amplifier passes through the detector, the detector converts the radio frequency signal into an analog voltage signal, the analog voltage signal is an output voltage after signal sampling, and the output voltage is recorded by the processing module and fed back to the FPGA.
In the technical field, since the frequency response curve of the attenuator at each frequency is not flat, that is, the power attenuation value of the attenuator in the working frequency band is not fixed, the attenuation value can be accurately compensated at different frequencies by establishing a functional relationship between the frequency and the attenuation value, so as to perform accurate power compensation on the measured power, thereby obtaining the output power. In this embodiment, the value of n is set manually, and in the existing power compensation technology, when the value of n is large, the distance between two adjacent frequency points will be large, which will reduce the power compensation time, but may cause the measured power between some two adjacent frequency points to be missed due to power mutation; when the value of n is smaller, the distance between two adjacent frequency points is smaller, so that the measured power is more accurate, but the corresponding power compensation time is longer; the power compensation is carried out through the first fitting formula, the output power obtained through the power compensation is ensured not to vibrate in a full frequency band, and the output power can be ensured to obtain stable accuracy when n is a larger value.
As a further improvement of the above technical solution, the step 300 includes:
step 310, setting a reference temperature and a reference power, reading detection voltages when a power amplifier outputs the reference power at n frequency points at the reference temperature to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference Δ V-V0, and setting a temperature difference Δ T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is a reference voltage, and T0 is a reference temperature;
and step 320, setting w temperature values in the working temperature, reading the measured power at the w temperature values at each frequency point through a power meter, counting n sampling points, performing power compensation on the measured power at each frequency point again, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference delta V corresponding to the w temperature differences delta T at each frequency point, and obtaining a third correspondence table of the voltage difference delta V and the temperature differences delta T, wherein the third correspondence table has n corresponding relations.
The reference power is any power value in a power range, and at the same frequency point, the corresponding relation between the voltage difference delta V and the temperature difference delta T obtained by any power value in the power range is the same.
As a further improvement of the foregoing technical solution, in step 400, the obtaining the target power at the operating frequency and the operating power according to the second mapping table includes:
step 410, selecting three frequency points f1, f2 and f3 of adjacent working frequencies according to a second mapping table, and respectively selecting 3 output powers of the adjacent working powers at the frequency points f1, f2 and f3, wherein each frequency point obtains 3 output powers, and f1 is larger than f2 is larger than f 3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second mapping table, obtaining the corresponding relation between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square method parabola curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a12*Pout2+a11*Pout+a10，
Pin(f2)＝a22*Pout2+a21*Pout+a20，
Pin(f3)＝a32*Pout2+a31*Pout+a30；
wherein Pin (f1) is the input power function at the frequency point f1, Pin (f2) is the input power function at the frequency point f2, and Pin (f3) is the input power function at the frequency point f 3;
step 430, substituting the working power into a second fitting formula group to obtain input power Pin1 of the working power at a frequency point f1, input power Pin2 of the working power at a frequency point f2 and input power Pin3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Pi1), (f2, Pi2), (f3 and Pi3) of three groups of frequency points and input power;
step 440, performing curve fitting on (f1, Pi1), (f2, Pi2), (f3, and Pi3) by using a piecewise least square method parabolic curve fitting algorithm to obtain a third fitting formula pin (f) ═ a2*f2+a1*f+a0Wherein, f ∈ [ f1, f3]And Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, so that the target power at the working frequency and the working power is obtained.
As a further improvement of the above technical solution, the step 500 includes:
step 510, respectively obtaining output voltages of 9 output powers at frequency points f1, f2, and f3 according to the second mapping table, obtaining a corresponding relationship between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relationship between 3 groups of output voltages and output powers at each frequency point by using a piecewise least square method parabolic curve fitting algorithm, so as to obtain a fourth fitting formula group:
V(f1)＝b12*Pout2+b11*Pout+b10，
V(f2)＝b22*Pout2+b21*Pout+b20，
V(f3)＝b32*Pout2+b31*Pout+b30；
wherein V (f1) is the output voltage function at the frequency point f1, V (f2) is the output voltage function at the frequency point f2, and V (f3) is the output voltage function at the frequency point f 3;
step 520, substituting the working power into a fourth fitting formula group to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2 and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Vo1), (f2, Vo2), (f3 and Vo3) of three groups of frequency points and output voltages;
step 530, performing curve fitting on (f1, Vo1), (f2, Vo2) and (f3, Vo3) by adopting a piecewise least square method parabola curve fitting algorithm to obtain a fifth fitting formula v (f) ═ b2*f2+b1*f+b0And V (f) is a working voltage function, and the working frequency is substituted into a fifth fitting formula, so that the working voltage at the working frequency and the working power is obtained.
As a further improvement of the above technical solution, the step 600 includes:
step 610, acquiring real-time temperature T of the detector through the FPGA to obtain real-time temperature difference Δ T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference Δ T at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third correspondence table, obtaining the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square method parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c12*△T2+c11*△T+c10，
△V(f2)＝c22*△T2+c21*△T+c20，
△V(f3)＝c32*△T2+c31*△T+c30；
wherein Δ V (f1) is a function of the voltage difference at frequency point f1, Δ V (f2) is a function of the voltage difference at frequency point f2, and Δ V (f3) is a function of the voltage difference at frequency point f 3;
step 630, substituting the real-time temperature difference Δ T into a sixth fitting formula group to obtain a voltage difference Δ V1 of the real-time temperature difference Δ T at a frequency point f1, a voltage difference Δ V2 of the real-time temperature difference Δ T at a frequency point f2, and a voltage difference Δ V3 of the real-time temperature difference Δ T at a frequency point f3, so as to obtain three groups of corresponding relations (f1, Δ V1), (f2, Δ V2), (f3, Δ V3) of the frequency points and the voltage differences;
step 640, adopting (f1, △ V1), (f2, △ V2), (f3, △ V3)Performing curve fitting by using a piecewise least square method parabolic curve fitting algorithm to obtain a seventh fitting formula △ V (f) ═ c2*f2+c1*f+c0Wherein △ V (f) is a voltage difference function, and the operating frequency is substituted into the seventh fitting formula, so as to obtain the real-time voltage difference △ V at the operating frequency and the operating power.
As a further improvement of the above technical solution, the control switch is controlled by the FPGA, and when the power amplifier is calibrated, the control switch is connected to a preset voltage, which is a reference voltage of the VGA; when the power amplifier works, the control switch is connected to the OPA end, and the DA voltage signal and the detection voltage signal given by the FPGA jointly regulate the input voltage of the VGA through the OPA. The preset voltage is a fixed voltage, and the size of the preset voltage is set according to rated voltages of different VGAs.
In the prior art, the VGA only generates weak power compensation effect, but not power setting in a full-frequency-band full-temperature range, and the VGA is required to have smaller voltage resolution ratio for improving the power stability and accuracy of the power amplifier.
As a further improvement of the above technical solution, in the embodiment provided by the present invention, the VGA has a small gain change in a large control voltage range through the feedback control of the FPGA, and the output gain change is 5dB when the control voltage is 2.5V, that is, the control range of the FPGA is 5dB/2.5V ═ 0.002 dB/mV; in this embodiment, the number of bits of the analog-to-digital converter used by the FPGA is 16 bits, and the reference voltage is 5V, so that the resolution of the analog-to-digital converter is 0.15mV 16 mV — 2.44mV, and the resolution of the FPGA is 2.44mV 0.002dB/mV — 0.005dB, which can perform accurate feedback control on the power amplifier.
While the present invention has been described in considerable detail and with particular reference to a few illustrative embodiments thereof, it is not intended to be limited to any such details or embodiments or any particular embodiments, but rather it is to be construed that the invention effectively covers the intended scope of the invention by virtue of the prior art providing a broad interpretation of such claims in view of the appended claims. Furthermore, the foregoing describes the invention in terms of embodiments foreseen by the inventor for which an enabling description was available, notwithstanding that insubstantial modifications of the invention, not presently foreseen, may nonetheless represent equivalent modifications thereto.
Claims (9)
1. The power stabilizing method of the power amplifier is characterized in that the input end of the power amplifier is connected with a VGA, the output end of the power amplifier is connected with a detector, the detector is connected with the VGA through an FPGA and a control switch in sequence, the input end of the control switch is also connected with an OPA, and the input end of the OPA is respectively connected with the output end of the detector and the output end of the FPGA;
the method comprises the following steps:
step 100, equally dividing the working frequency band of the power amplifier into n sampling frequency points, and equally dividing the power range of the power amplifier to obtain m power sampling points;
step 200, adjusting the input power of the power amplifier at each sampling frequency point according to power steps, and establishing a second corresponding table of the input power, the output voltage and the output power at each frequency point; the input power is the power of a radio frequency signal input into the VGA, the output voltage is obtained by performing signal sampling on an analog voltage signal demodulated by the detector, and the output power is the power of the input power amplified and output by the power amplifier;
step 300, setting a reference temperature and a reference voltage, and establishing a third corresponding table of the voltage difference and the temperature difference; the voltage difference delta V is V-V0, the temperature difference delta T is T-T0, V is real-time voltage, T is real-time temperature, V0 is reference voltage, and T0 is reference temperature;
step 400, switching and connecting the control switch to the OPA output end, acquiring the working frequency and the working power of the power amplifier, obtaining the working frequency and the target power at the working power according to a second mapping table, and setting the input power of the power amplifier as the target power; the working frequency is the frequency set by the power amplifier according to the test requirement, and the working power is the output power set by the power amplifier according to the test requirement;
step 500, working voltage at the working frequency and the working power is obtained according to a second mapping table;
step 600, acquiring the real-time temperature of the detector through the FPGA to obtain a real-time temperature difference, and calculating the real-time voltage difference of the working frequency and the working power according to a third mapping table;
and 700, taking the sum of the working voltage and the real-time voltage difference as a final feedback voltage, and outputting the feedback voltage to the OPA in real time through the FPGA so as to control the power of the power amplifier.
2. The method of claim 1, wherein the step 200 comprises:
step 210, obtaining a frequency response curve of the attenuator through scanning of a network analyzer, obtaining a corresponding relation between k frequency points and power attenuation values according to the frequency response curve of the attenuator, and using the corresponding relation as a first corresponding table, wherein the frequency response of the attenuator is the power attenuation values of the attenuator at each frequency point in a working frequency band;
step 220, connecting the output end of the power amplifier with an attenuator, and connecting the other end of the attenuator to a power meter;
step 230, selecting one sampling frequency point from the n sampling frequency points, selecting three frequency points f11, f12 and f13 adjacent to the sampling frequency point from a first corresponding table, and acquiring 3 groups of corresponding relations (f11, att (f11)), (f12, att (f12)), (f13, att (f13)) of the frequency points and power attenuation values according to the first corresponding table, wherein f11 is more than f12 and less than f 13;
step 240, a piecewise least square method parabolic curve fitting is adopted for (f11, att (f11)), (f12, att (f12)), (f13, att (f13)), so that a first fitting formula att (f0) ═ k2*f02+k1*f0+k0Wherein, f0 ∈ [ f11, f13]Att (f0) is a power attenuation function, and the sampling frequency point is substituted into a first fitting formula to obtain a power attenuation value at the sampling frequency point;
step 250, reading the measured power measured by the power meter at a sampling frequency point, and performing power compensation on the measured power to obtain output power, wherein Pout is Pt + att (f0), Pt is the measured power, and Pout is the output power;
step 260, increasing the input power from small to large according to power stepping at sampling frequency points, decreasing the input power from large to small according to power stepping when the output power reaches a maximum power value until the output power reaches a minimum power value, and performing signal sampling on the analog voltage signal demodulated by the detector at each power sampling point to obtain output voltage, so that m corresponding relations among the input power, the output voltage and the output power are obtained at each sampling frequency point;
and 270, judging whether the n sampling frequency points all obtain the corresponding relations of m input powers, output voltages and output powers, if so, establishing the corresponding relations of the m input powers, the output voltages and the output powers at the n sampling frequency points to obtain a second corresponding table, wherein the second corresponding table has m × n corresponding relations.
3. The method according to claim 2, wherein the step 300 comprises:
step 310, setting a reference temperature and a reference power, reading detection voltages when a power amplifier outputs the reference power at n frequency points at the reference temperature to obtain n detection voltages, setting the n detection voltages as the reference voltages, setting a voltage difference Δ V-V0, and setting a temperature difference Δ T-T0, wherein V is a real-time voltage, T is a real-time temperature, V0 is a reference voltage, and T0 is a reference temperature;
and step 320, setting w temperature values in the working temperature, reading the measured power at the w temperature values at each frequency point through a power meter, counting n sampling points, performing power compensation on the measured power at each frequency point again, so that the measured power at the same frequency point is compensated to the reference power at the w temperature values, reading the voltage difference delta V corresponding to the w temperature differences delta T at each frequency point, and obtaining a third correspondence table of the voltage difference delta V and the temperature differences delta T, wherein the third correspondence table has n corresponding relations.
4. The method according to claim 3, wherein the step 400 of finding the target power at the operating frequency and the operating power according to the second mapping table comprises:
step 410, selecting three frequency points f1, f2 and f3 of adjacent working frequencies according to a second mapping table, and respectively selecting 3 output powers of the adjacent working powers at the frequency points f1, f2 and f3, wherein each frequency point obtains 3 output powers, and f1 is larger than f2 is larger than f 3;
step 420, respectively obtaining input powers of 9 output powers at the frequency points f1, f2 and f3 according to a second mapping table, obtaining the corresponding relation between 3 groups of input powers and output powers at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of input powers and output powers at each frequency point by adopting a piecewise least square method parabola curve fitting algorithm to obtain a second fitting formula group:
Pin(f1)＝a12*Pout2+a11*Pout+a10，
Pin(f2)＝a22*Pout2+a21*Pout+a20，
Pin(f3)＝a32*Pout2+a31*Pout+a30；
wherein Pin (f1) is the input power function at the frequency point f1, Pin (f2) is the input power function at the frequency point f2, and Pin (f3) is the input power function at the frequency point f 3;
step 430, substituting the working power into a second fitting formula group to obtain input power Pin1 of the working power at a frequency point f1, input power Pin2 of the working power at a frequency point f2 and input power Pin3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Pi1), (f2, Pi2), (f3 and Pi3) of three groups of frequency points and input power;
step 440, performing curve fitting on (f1, Pi1), (f2, Pi2), (f3, and Pi3) by using a piecewise least square method parabolic curve fitting algorithm to obtain a third fitting formula pin (f) ═ a2*f2+a1*f+a0Wherein, f ∈ [ f1, f3]And Pin (f) is a target power function, and the working frequency is substituted into a third fitting formula, so that the target power at the working frequency and the working power is obtained.
5. The method as claimed in claim 4, wherein the step 500 comprises:
step 510, respectively obtaining output voltages of 9 output powers at frequency points f1, f2, and f3 according to the second mapping table, obtaining a corresponding relationship between 3 groups of output voltages and output powers at each frequency point, and performing curve fitting on the corresponding relationship between 3 groups of output voltages and output powers at each frequency point by using a piecewise least square method parabolic curve fitting algorithm, so as to obtain a fourth fitting formula group:
V(f1)＝b12*Pout2+b11*Pout+b10，
V(f2)＝b22*Pout2+b21*Pout+b20，
V(f3)＝b32*Pout2+b31*Pout+b30；
wherein V (f1) is the output voltage function at the frequency point f1, V (f2) is the output voltage function at the frequency point f2, and V (f3) is the output voltage function at the frequency point f 3;
step 520, substituting the working power into a fourth fitting formula group to obtain an output voltage Vo1 of the working power at a frequency point f1, an output voltage Vo2 of the working power at a frequency point f2 and an output voltage Vo3 of the working power at a frequency point f3, and obtaining corresponding relations (f1, Vo1), (f2, Vo2), (f3 and Vo3) of three groups of frequency points and output voltages;
step 530, performing curve fitting on (f1, Vo1), (f2, Vo2) and (f3, Vo3) by adopting a piecewise least square method parabola curve fitting algorithm to obtain a fifth fitting formula v (f) ═ b2*f2+b1*f+b0And V (f) is a working voltage function, and the working frequency is substituted into a fifth fitting formula, so that the working voltage at the working frequency and the working power is obtained.
6. The method according to claim 5, wherein the step 600 comprises:
step 610, acquiring real-time temperature T of the detector through the FPGA to obtain real-time temperature difference Δ T-T0, respectively selecting 3 temperature differences adjacent to the real-time temperature difference Δ T at frequency points f1, f2 and f3, and obtaining 3 temperature differences at each frequency point;
step 620, respectively obtaining voltage differences of 9 temperature differences at the frequency points f1, f2 and f3 according to a third correspondence table, obtaining the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point, and performing curve fitting on the corresponding relation between 3 groups of temperature differences and voltage differences at each frequency point by adopting a piecewise least square method parabolic curve fitting algorithm to obtain a sixth fitting formula group:
△V(f1)＝c12*△T2+c11*△T+c10，
△V(f2)＝c22*△T2+c21*△T+c20，
△V(f3)＝c32*△T2+c31*△T+c30；
wherein Δ V (f1) is a function of the voltage difference at frequency point f1, Δ V (f2) is a function of the voltage difference at frequency point f2, and Δ V (f3) is a function of the voltage difference at frequency point f 3;
step 630, substituting the real-time temperature difference Δ T into a sixth fitting formula group to obtain a voltage difference Δ V1 of the real-time temperature difference Δ T at a frequency point f1, a voltage difference Δ V2 of the real-time temperature difference Δ T at a frequency point f2, and a voltage difference Δ V3 of the real-time temperature difference Δ T at a frequency point f3, so as to obtain three groups of corresponding relations (f1, Δ V1), (f2, Δ V2), (f3, Δ V3) of the frequency points and the voltage differences;
step 640, performing curve fitting on (f1, △ V1), (f2, △ V2), and (f3, △ V3) by using a piecewise least squares method parabolic curve fitting algorithm to obtain a seventh fitting formula △ V (f) ═ c2*f2+c1*f+c0Wherein △ V (f) is a voltage difference function, and the operating frequency is substituted into the seventh fitting formula, so as to obtain the real-time voltage difference △ V at the operating frequency and the operating power.
7. A method of power stabilization of a power amplifier according to claim 1, characterized by: the working frequency range of the power amplifier is 700MHz to 6000MHz, and the power range is 0dBm to 40 dBm.
8. The method of claim 1, wherein the control switch is controlled by the FPGA, and when calibrating the power amplifier, the control switch is connected to a preset voltage, the preset voltage being a reference voltage of the VGA; when the power amplifier works, the control switch is connected to an OPA end, a DA voltage signal and a detection voltage signal which are provided by the FPGA jointly regulate the input voltage of the VGA through the OPA, the preset voltage is a fixed voltage, and the preset voltage is set according to the rated voltages of different VGAs.
9. The method of claim 1, wherein the control resolution of the FPGA is less than 0.005 dB.
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