CN111768740B - Display panel, driving method thereof and display device - Google Patents

Display panel, driving method thereof and display device Download PDF

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Publication number
CN111768740B
CN111768740B CN202010553487.1A CN202010553487A CN111768740B CN 111768740 B CN111768740 B CN 111768740B CN 202010553487 A CN202010553487 A CN 202010553487A CN 111768740 B CN111768740 B CN 111768740B
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signal line
voltage
display area
data signal
electrically connected
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CN111768740A (en
Inventor
余艳平
王志杰
周婷
李俊谊
杨雁
钟彩娇
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Xiamen Tianma Microelectronics Co Ltd
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Xiamen Tianma Microelectronics Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The invention discloses a display panel, a driving method thereof and a display device, wherein the display panel comprises a display area and a non-display area surrounding the display area, and the display area comprises a first display area and a second display area; the circuit also comprises a plurality of booster circuits, a plurality of first data signal lines and a plurality of second data signal lines, wherein the first data signal lines and the second data signal lines are arranged along a second direction in an extending manner; the first data signal line is connected to the first display area to provide a first voltage, the second data signal line is connected to the second display area to provide a second voltage, the first end of the booster circuit is electrically connected with the first data signal line, the second end of the booster circuit is electrically connected with the second data signal line, and the booster circuit receives the first voltage and boosts the first voltage to the second voltage and sends the second voltage to the second data signal line. The display panel provided by the invention utilizes the booster circuit to enable the signal received by the second display area to be larger than the signal received by the first display area, compensates the problem that the brightness of the second display area is different from that of the first display area, and improves the uniformity of the display panel.

Description

Display panel, driving method thereof and display device
Technical Field
The invention relates to the technical field of display, in particular to a display panel, a driving method thereof and a display device.
Background
With the rapid development of internet technology and display technology, intelligent mobile terminal devices in people's daily life play an increasingly important role. The intelligent mobile terminal equipment can acquire the latest information at any time and any place, realize real-time interaction with other intelligent equipment and meet various requirements in life and work. Meanwhile, people also put forward more requirements on the display effect of the intelligent mobile terminal with the display screen, and the display screens such as 'frameless' and 'full screen' become research hotspots in the display field. The larger screen occupation ratio brings more excellent visual experience to users and can display more information, so that the pursuit of the larger screen occupation ratio becomes the mainstream development trend of display products.
For realizing the full-face screen display, need directly place the camera in liquid crystal display panel curtain below, the camera corresponds the region and will realize high penetrating, and the formation of image quality is better relatively like this, and then needs the camera to correspond regional backlight unit and dig the hole. However, when displaying, the backlight module at the corresponding position of the camera cannot provide a light source, which may cause the brightness of the camera area to be lower than that of the normal display area.
Disclosure of Invention
In view of the above, the present invention provides a display panel, a driving method thereof, and a display device, in which a boost circuit is disposed in the display panel to compensate for the brightness of the second display region, so that the brightness of the first display region and the brightness of the second display region are consistent, thereby improving the brightness uniformity of the display panel.
In one aspect, the present invention provides a display panel including a display area and a non-display area surrounding the display area, the display area including a first display area and a second display area;
the multi-channel data signal line driving circuit further comprises a plurality of boosting circuits, a plurality of first data signal lines and a plurality of second data signal lines, wherein the first data signal lines and the second data signal lines are arranged along a first direction extending along a second direction, and the second direction is intersected with the first direction;
the first data signal line is connected to the first display region to provide a first voltage for the first display region, the second data signal line is connected to the second display region to provide a second voltage for the second display region,
and the first end of the booster circuit is electrically connected with the first data signal line, the second end of the booster circuit is electrically connected with the second data signal line, and the booster circuit receives the first voltage sent by the first data signal line, boosts the first voltage to a second voltage and sends the second voltage to the second data signal line.
In another aspect, the present invention provides a driving method of a display panel, the display panel including: the display device comprises a display area and a non-display area surrounding the display area, wherein the display area comprises a first display area and a second display area;
the multi-channel data signal line driving circuit further comprises a plurality of boosting circuits, a plurality of first data signal lines and a plurality of second data signal lines, wherein the first data signal lines and the second data signal lines are arranged along a first direction extending along a second direction, and the second direction is intersected with the first direction;
the first data signal line is connected to the first display region to provide a first voltage for the first display region, the second data signal line is connected to the second display region to provide a second voltage for the second display region,
the first end of the booster circuit is electrically connected with the first data signal line, the second end of the booster circuit is in point connection with the second data signal line, and the booster circuit receives the first voltage sent by the first data signal line, boosts the first voltage to a second voltage and sends the second voltage to the second data signal line;
the driving method includes the steps of:
the first voltage is sent to the booster circuit through the first data signal line, the booster circuit receives the first voltage and boosts the first voltage into a second voltage, and the second voltage is sent to the second display area through the second data signal line.
In another aspect, the present invention provides a display device including any one of the display panels described above.
Compared with the prior art, the problem that the brightness of the first display area is inconsistent with that of the second display area when the display panel displays the full-screen display is solved. The invention provides a display panel, a driving method thereof and a display device.A first data signal line in the display panel is connected to a first display area to provide a first voltage for the first display area, and a second data signal line is connected to a second display area to provide a second voltage for the second display area; and meanwhile, the booster circuit is arranged, receives the first voltage sent by the first data signal line, boosts the first voltage to a second voltage, and sends the second voltage to the second data signal line. The first voltage is used for displaying in the first display area, the second voltage is used for displaying in the second display area, and the second voltage is larger than the first voltage, so that the problem that the brightness of the second display area is smaller than that of the first display area can be compensated, and the brightness uniformity of the display panel is improved.
Of course, it is not necessary for any product in which the present invention is practiced to specifically achieve all of the above technical effects simultaneously.
Other features of the present invention and advantages thereof will become apparent from the following detailed description of exemplary embodiments thereof, which proceeds with reference to the accompanying drawings.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description, serve to explain the principles of the invention.
FIG. 1 is a schematic diagram of a display panel in the prior art;
fig. 2 is a schematic structural diagram of a display panel according to the present invention;
FIG. 3 is a flowchart illustrating a driving method of a display panel according to the present invention;
FIG. 4 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 5 is an enlarged view of a portion of W in FIG. 4;
FIG. 6 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 7 is a schematic diagram of the circuit structure of M in FIG. 6;
FIG. 8 is a flowchart illustrating a driving method of a display panel according to the present invention;
FIG. 9 is a timing diagram of a display panel according to the present invention;
FIG. 10 is a timing diagram of another display panel according to the present invention;
FIG. 11 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 12 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 13 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 14 is a schematic structural diagram of another display panel provided in the present invention;
FIG. 15 is a schematic view of a display device according to the present invention;
fig. 16 is a cross-sectional view taken along the direction of N-N' in fig. 15.
Detailed Description
Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that: the relative arrangement of the components and steps, the numerical expressions and numerical values set forth in these embodiments do not limit the scope of the present invention unless specifically stated otherwise.
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the invention, its application, or uses.
Techniques, methods, and apparatus known to those of ordinary skill in the relevant art may not be discussed in detail, but are intended to be part of the specification where appropriate.
In all examples shown and discussed herein, any particular value should be construed as merely illustrative, and not limiting. Thus, other examples of the exemplary embodiments may have different values.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.
In order to implement full-screen display in the prior art and ensure that a corresponding area of a camera can also perform display, a display panel in the prior art refers to fig. 1, and fig. 1 is a schematic structural diagram of the display panel in the prior art. The prior art provides a display panel 100, which includes a display area 01 and a non-display area 02 surrounding the display area 01, wherein the display area includes a first display area 011 and a second display area 012, and the second display area 02 is provided with a plurality of second sub-pixel units 04; the first display area 011 is a camera area, and the second display area 02 is a normal display area other than the camera area. In order that the first display region 011 can realize display, a plurality of first sub-pixel units 03 are provided in the first display region; meanwhile, in order to ensure high transmittance of the first display region 011, the density of the first sub-pixel unit 03 is smaller than that of the second sub-pixel unit 04. However, since the voltage values of the display signals received by the first sub-pixel unit 03 in the first display area 01 and the second sub-pixel unit 04 in the second display area 02 are the same, and the density of the first sub-pixel unit 03 is less than that of the second sub-pixel unit 04, the luminance of the first display area 01 is lower than that of the second display area 02, which affects the uniformity of the luminance of the display panel 100.
In order to solve the above technical problems, the present invention provides a display panel, a driving method thereof, and a display device. Embodiments of the display panel, the driving method thereof, and the display device provided by the present invention will be described in detail below.
In the embodiment, please refer to fig. 2, and fig. 2 is a schematic structural diagram of a display panel according to the present invention. The display panel 200 in the present embodiment includes: a display area AA and a non-display area BB surrounding the display area AA, the display area AA including a first display area AA1 and a second display area AA 2; the display device further comprises a plurality of booster circuits 1, a plurality of first data signal lines 2 and a plurality of second data signal lines 3 which are arranged along a second direction Y in an extending manner along a first direction X, wherein the second direction Y is intersected with the first direction X; the first data signal line 2 is connected to the first display area AA1 to provide a first voltage for the first display area AA1, the second data signal line 3 is connected to the second display area AA2 to provide a second voltage for the second display area AA2, the first end of the voltage boost circuit 1 is electrically connected to the first data signal line 2, the second end of the voltage boost circuit is electrically connected to the second data signal line 3, and the voltage boost circuit 1 receives the first voltage sent by the first data signal line 2, boosts the first voltage to the second voltage, and sends the second voltage to the second data signal line 3. It can be understood that, in the display panel 200 provided in this embodiment, the first data signal line 2 sends the first voltage to the first display area AA1 and the voltage boost circuit 1 respectively, the first display area AA1 receives the first voltage sent by the first data signal line 2 to perform display, the voltage boost circuit 1 receives the first voltage sent by the first data signal line 2 to boost the first voltage into the second voltage, and then sends the second voltage to the second display area AA2 through the second data signal line 3, the second display area AA2 receives the second voltage sent by the second data signal line 3 to perform display, since the voltage value of the second voltage is greater than that of the first voltage, the signal for display received by the second display area AA2 is greater than that received by the first display area AA1, the problem that the luminance of the second display area AA2 is lower than that of the luminance of the first display area AA1 can be compensated, the brightness of the second display area AA2 is consistent with the brightness of the first display area AA1, thereby improving the brightness uniformity of the display panel 200.
The first data signal line 2 is connected to the first display area AA1 to provide a first voltage to the first display area AA1, and since a part of the first data signal line 2 transmits the first voltage to the first display area AA1 and the voltage boost circuit 1, respectively, the connection of the first data signal line 2 to the first display area AA1 is not limited to the disconnection of the first data signal line 2 and the first display area AA1, and the first data signal line 2 can continue to extend to the non-display area BB to be electrically connected to the voltage boost circuit 1, so the first data signal line 2 required to be electrically connected to the voltage boost circuit 1 can cross the first display area AA and the non-display area BB; certainly, the first data signal line 2 is connected to the first display area AA1 to provide the first voltage for the first display area AA1, or the first data signal line 2 is disconnected from the first display area AA, that is, the first data signal line is located in the first display area AA1, and further a connection line is required to be additionally arranged in the voltage boost circuit 1 to be electrically connected to the first data signal line 2, so that the first data signal line 2 respectively sends the first voltage to the first display area AA1 and to the voltage boost circuit 1. In the present invention, only the first data signal line 2 is understood as the first mode described above.
Referring to fig. 3, fig. 3 is a flowchart of a driving method of a display panel according to the present invention, and with continued reference to fig. 2 and fig. 3, the present embodiment provides a driving method of a display panel, for the display panel shown in fig. 2, the driving method includes the steps of:
step 101, a first voltage is sent to a boost circuit through a first data signal line.
Step 102, the voltage boost circuit receives the first voltage and boosts it to a second voltage.
Step 103, sending the second voltage to the second display area through the second data signal line.
It can be understood that, in order to solve the problem of uneven brightness of the first display area and the second display area in the prior art, the present invention utilizes the boost circuit to boost the first voltage received from the first data signal line into the second voltage, and then sends the second voltage to the second display area through the second data signal line.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another display panel provided by the present invention. The display panel 200 in this embodiment further includes a plurality of voltage compensation signal lines V arranged in the non-display area BB along the first direction X and the second direction Y, and a gate control signal line V extending along the first direction XSW(ii) a A voltage compensation signal line V for providing a potential signal to the booster circuit 1 to cause the booster circuit 1 to boost the received first voltage to a second voltage; grid control signal line VSWAnd is used for providing a control signal for the voltage boost circuit 1 and controlling whether the first voltage sent by the first data signal line 2 can be transmitted into the voltage boost circuit 1. FIG. 4 shows only one gate control signal line VSWCorresponding to each booster circuit 1, for controlling whether the first voltage sent by the first data signal line 2 can be transmitted to the booster circuit 1, when the grid control signal line VSWWhen the first voltage sent by the first data signal line 2 is controlled to be transmitted into the voltage boost circuit 1, the voltage compensation signal line provides a potential signal for the voltage boost circuit 1 to enable the voltage boost circuit 1 to boost the received first voltage to the second voltage, so that the signal received by the second display area AA2 for displaying is larger than the signal received by the first display area AA1 for displaying, the problem that the brightness of the second display area AA2 is lower than that of the first display area AA1 can be compensated, the brightness of the second display area AA2 is consistent with that of the first display area AA1, and the brightness uniformity of the display panel 200 is improved. Meanwhile, FIG. 3 only shows that the voltage compensation circuit includes 6 voltage compensation signal lines V, which are the first voltage compensation signal lines V respectively1A second voltage compensation signal line V2A third voltage compensation signal line V3And a fourth voltage compensation signal line V4The fifth voltage compensation signal line V5And a sixth voltage compensation signal line V6Each voltage ofThe compensation signal line corresponds to one booster circuit 1.
Referring to fig. 4 and 5, fig. 5 is a partial enlarged view of W in fig. 4, and the voltage boost circuit 1 in the display panel 200 in the present embodiment includes a first transistor T1 and a first capacitor C1; a first transistor T1 having a first end electrically connected to the first data signal line 2, a second end connected to the first node N1, a control end and a gate control signal line VSWElectrically connecting; a first capacitor C1, one end of which is electrically connected to the voltage compensation signal line V and the other end of which is connected to a first node N1; the first node N1 is connected to the second data signal line 3. The first node N1 is electrically connected to the first capacitor C1 and the second terminal of the first transistor T1. Since fig. 5 illustrates only a portion W in fig. 4, fig. 5 includes only one booster circuit 1 and a gate control signal line V electrically connected to the booster circuit 1SWAnd a first voltage compensation signal line V1
It is understood that the voltage boost circuit 1 provided by the present embodiment includes a first transistor T1 and a first capacitor C1, wherein the first terminal of the voltage boost circuit 1 can be understood as the connection point of the first transistor T1 and the first data signal line 2, and the second terminal can be understood as the first node N1. When the display panel 200 displays, the gate control signal line VSWProviding a control signal to control whether the first transistor T1 is turned on or not, and the first voltage compensation signal line V1For providing the voltage boost circuit 1 with potential signals, the potential signals may include white potential signals such as zero potential signals and high voltage potential signals such as positive voltage potential signals and negative voltage potential signals; wherein, the positive voltage potential signal can be 5V, and the negative voltage potential signal can be-5V. In a state where the first transistor T1 is turned on, the first voltage transmitted from the first data signal line 2 may be transmitted to the first node N1 through the first transistor T, and the first signal may be boosted to the second signal by the voltage signal stored in the first capacitor C1. And then the second voltage is sent to the second display area AA2, so that the signal for display received by the second display area AA2 is greater than the signal for display received by the first display area AA1, the problem that the brightness of the second display area AA2 is lower than that of the first display area AA1 can be compensated, and the brightness of the second display area AA2 and the brightness of the first display area AA1 are enabledThe luminance of a display area AA1 is uniform, improving the luminance uniformity of the display panel 200.
Referring to fig. 6, fig. 6 is a schematic structural diagram of another display panel provided by the present invention, the display panel 200 further includes a plurality of first scanning signal lines 4 and a plurality of second scanning signal lines 5 arranged along a second direction Y extending along a first direction X, the first scanning signal lines 4 are connected to the first display area AA1, and the second scanning signal lines 5 are connected to the second display area AA 2; the first scanning signal line 4 crosses the first data signal line 2 to define a plurality of first sub-pixel units P1 located in the first display area AA 1; the second scan signal lines 5 and the second data signal lines 3 cross to define a plurality of second sub-pixel units P2 located in the second display area AA 2; one booster circuit 1 corresponding to one column of the second sub-pixel units P2 and the gate control signal line VSWElectrically connected to each of the booster circuits 1, one booster circuit 1 is electrically connected to one voltage compensation signal line V.
Wherein, the first scan line 4 is used to control whether the second transistor (not shown in the figure) in the first sub-pixel unit P1 is turned on, the second scan line 5 is used to control whether the third transistor (not shown in the figure) in the second sub-pixel unit P2 is turned on, and the first display area AA1 and the second display area AA2 need to display simultaneously, and further the first sub-pixel unit P1 and the second sub-pixel unit P2 disposed in the same row may be simultaneously controlled, the first sub-pixel unit P1 located in the same row as the second sub-pixel unit P2 can control its light emitting display through the second scan line 5, or the second sub-pixel unit P2 located in the same row as the first sub-pixel unit P1 may control its light emitting display through the first scan line 4, fig. 6 only illustrates a case where the first sub-pixel unit P1 located in the same row as the second sub-pixel unit P2 can control its light emitting display by the second scan line 5.
It is understood that one boosting circuit 1 corresponds to one column of the second sub-pixel units P2, and the gate control signal line VSWThe second sub-pixel cells P2 in the same row need to be controlled simultaneously, electrically connected to each boosting circuit 1, so that the same gate control signal line V can be usedSwThe control may be beneficial to the narrow bezel of the display panel 200. Due to the fact thatThe signals required for the second sub-pixel unit P2 in the same column are different, so one booster circuit 1 is electrically connected to one voltage compensation signal line V.
Referring to fig. 7, fig. 7 is a schematic diagram of the circuit structure M in fig. 6, in the display panel 200 of the present embodiment, the first sub-pixel unit P1 includes a second transistor T2 and a second capacitor C2; a second transistor T2, having a first end electrically connected to the first data signal line 2, a second end electrically connected to the second capacitor C2, and a control end electrically connected to the first scan signal line 4; a second capacitor C2 having one end electrically connected to the second transistor T2 and the other end electrically connected to the common electrode O;
the second sub-pixel unit P2 includes a third transistor T3 and a third capacitor C3; a third transistor T3, having a first end electrically connected to the second data signal line 3, a second end electrically connected to the third capacitor C3, and a control end electrically connected to the second scan signal line 5; and a third capacitor C3 having one end electrically connected to the third transistor T3 and the other end electrically connected to the common electrode O.
It can be understood that the second scan signal line 5 controls whether the third transistor T3 is turned on, and controls whether the boost circuit 1 sends the boosted second voltage to the second sub-pixel unit P2, when the third transistor T3 is turned on, the third capacitor C3 may be charged, store the second voltage and maintain the second voltage in the second sub-pixel unit P2, and further send the second voltage to the second display area AA2, so that the signal for display received by the second display area AA2 is greater than the signal for display received by the first display area AA1, and the problem that the luminance of the second display area AA2 is lower than the luminance of the first display area AA1 can be compensated, so that the luminance of the second display area AA2 is consistent with the luminance of the first display area AA1, and the luminance uniformity of the display panel 200 is improved. Meanwhile, the first scan signal line 4 controls whether the second transistor T2 is turned on, and may control whether the first voltage transmitted from the first data signal line 2 is transmitted to the first sub-pixel unit P1.
With continuing reference to fig. 6 and 7, the present embodiment provides the display panel 200 in which the second sub-pixel units P2 of two adjacent columns receive signals from the voltage compensation signal line V with opposite voltage polarities. Further, the voltage polarity of the first voltage transmitted by the first data signal line 2 received by the first subpixel unit P1 in two adjacent columns is opposite, and the voltage polarity of the second voltage received by the second data signal line 3 received by the second subpixel unit P2 in two adjacent columns is opposite. Meanwhile, since the driving waveform for column inversion is low frequency inversion in units of one frame time (1Vsync period), it may be advantageous for the display panel 200 to reduce power consumption. Of course, the boost circuit in the invention is not only suitable for the column inversion display panel, but also suitable for the row inversion and the dot inversion, and can be suitable for the column 2 dot inversion and the row 2 dot inversion, and only needs to replace the circuit wiring and the time sequence to be matched with the driving mode, which driving mode can be specifically selected and set according to the actual situation, and the invention does not make specific requirements for this.
Referring to fig. 7 and 8, fig. 8 is a flowchart of a driving method of a display panel according to the present invention, and with continued reference to fig. 7 and 8, the present embodiment provides a driving method of a display panel, for the display panel shown in fig. 7, the driving method includes the steps of:
step 201, a first stage: the grid control signal line controls the first transistor to be conducted, the first voltage sent by the first data signal line is sent to the first node, the voltage compensation signal line provides a first potential signal, the second scanning signal line controls the third transistor to be conducted, and the third capacitor stores the first voltage provided by the first node. The first potential signal is a white voltage signal, such as a zero potential signal. At the moment, the first capacitor keeps zero potential, and the third capacitor stores the first voltage which is the same as the display signal of the first display area.
Step 202, the second stage: the grid control signal line controls the first transistor to be turned off, the voltage compensation signal line provides a second potential signal to the first capacitor, the first capacitor provides the second potential signal for the first node, and the first node provides the second potential signal to enable the first voltage of the third capacitor to be boosted to the second voltage. The second potential signal is a high potential signal, the "high potential signal" is not the magnitude of the potential signal value, the high potential signal can be a positive potential signal or a negative potential signal, and the absolute value of the "second potential signal" value is greater than the zero potential signal and is greater than the normal first voltage value. At this time, the voltage stored in the first capacitor provides a second potential signal for the voltage compensation signal line, and the stored voltage of the third capacitor is boosted to a second voltage from the first voltage in the previous stage under the action of the second potential signal.
Step 203, the third stage: the second scanning signal line controls the third transistor to be turned off, and the second voltage stored by the third capacitor is kept. And then the second voltage can be sent to the second display area through the second data signal line, and the second display area displays.
It can be understood that the second voltage is sent to the second display area, so that the signal received by the second display area for displaying is greater than the signal received by the first display area for displaying, the problem that the brightness of the second display area is lower than that of the first display area can be compensated, the brightness of the second display area is consistent with that of the first display area, and the brightness uniformity of the display panel is improved.
Referring to fig. 7, 9 and 10, fig. 9 is a timing diagram of a display panel according to the present invention, fig. 10 is a timing diagram of another display panel according to the present invention, in this embodiment, a driving manner of column inversion is taken as an example, fig. 9 takes a case where a polarity of a white pixel is positive as an example, and fig. 10 takes a case where a polarity of a white pixel is negative as an example. With continued reference to fig. 7, only the second scanning signal lines 5 are illustrated as second scanning signal lines 51 and second scanning signal lines 52, respectively, and 6 second data signal lines 31 to 36 and 6 first data signal lines 21 to 26 corresponding to the booster circuits 1 one to one. Of course, other first data signal lines 27 not electrically connected to the voltage boost circuit 1 are also included, and the first data signal lines 27 are only used for providing the first voltage to the first display area AA1 for displaying.
As shown in fig. 9, when the white pixel is positive, and the first transistor T1, the second transistor T2, and the third transistor T3 are all N-type transistors, the present invention does not require the specific types of the first transistor T1, the second transistor T2, and the third transistor T3, or all P-type transistors may be provided according to actual requirements. Meanwhile, the first sub-pixel unit P1 and the second sub-pixel unit P2 may be divided into a red sub-pixel unit, a green sub-pixel unit, and a blue sub-pixel unit, and certainly, the first sub-pixel unit P1 and the second sub-pixel unit P2 may also be a white pixel unit, and the white pixel unit may be understood as a pixel unit performing transparent display or high light transmittance, that is, no color resistance or a white color resistance is set at a position corresponding to the white pixel unit. In the present embodiment, taking as an example that only the first and second sub-pixel units P1 and P2 include only red, green, and blue sub-pixel units, the second data signal lines 31 and 34 are electrically connected to the red sub-pixel unit, the second data signal lines 32 and 35 are electrically connected to the blue sub-pixel unit, and the second data signal lines 33 and 36 are electrically connected to the green sub-pixel unit. The first data signal lines 21 and 24 may be disposed opposite to the second data signal lines 31 and 34, that is, the first data signal lines 21 and 24 may be electrically connected to the red sub-pixel unit, the first data signal lines 22 and 25 may be disposed opposite to the second data signal lines 32 and 35, that is, the first data signal lines 22 and 25 may be electrically connected to the blue sub-pixel unit, and the first data signal lines 23 and 26 may be disposed opposite to the second data signal lines 33 and 36, that is, the first data signal lines 23 and 26 may be electrically connected to the green sub-pixel unit. Meanwhile, the plurality of first data signal lines 27 may be electrically connected to the red, blue and green sub-pixel units, respectively, so that the adjacent first data signal lines 2 are electrically connected to the sub-pixels of different colors. Of course, the present invention does not require the position relationship between the first sub-pixel unit P1 and the second sub-pixel unit P2, that is, the first data signal lines 21 and 24 may be connected to the second data signal lines 31 and 34 to form sub-pixel units of different colors, and the sub-pixel units may be configured according to actual needs, which is not described in detail below.
Meanwhile, since the driving method of the display panel is column inversion, and the signal polarity of each adjacent data line is opposite, it can be seen that the signal polarity of the first data signal lines 21, 23 and 25 is the same and opposite to the first data signal lines 22, 24 and 26; the signal polarity of the second data signal lines 31, 33, and 35 is the same and opposite to that of the second data signal lines 32, 34, and 36; meanwhile, the signal polarities of the first data signal lines 21, 23, and 25 and the second data signal lines 31, 33, and 35 are the same, and are not described in detail below.
The first stage is as follows: the first data signal lines 21, 23, and 25 transmit a first voltage, which is a positive voltage signal, to the booster circuit. Grid control signal line VSwThe control signal is provided, and the control signal is a high signal, which controls the first transistor T1 to be turned on, and transmits the first voltage to the first node, where the first voltage is a high signal. First voltage compensation signal line V1A third voltage compensation signal line V3And a fifth voltage compensation signal line V5The first potential signal is provided to the first capacitor C1, and the first potential signal is a zero potential signal. The second scanning signal line 51 transmits a control signal, which is a high signal to control the third transistor T3 to be turned on, and the third capacitor C3 stores the first voltage provided by the first node N1.
And a second stage: grid control signal line VSwThe control signal is provided, and the control signal is a low signal to control the first transistor T1 to turn off. First voltage compensation signal line V1A third voltage compensation signal line V3And a fifth voltage compensation signal line V5The second voltage signal is provided to the first capacitor C1, and the second voltage signal is a positive voltage signal with a value greater than the first voltage. The first capacitor C1 stores the second potential signal and provides the second potential signal to the first node N1, and the first node N1 provides the second potential signal to boost the first voltage of the third capacitor C3 to the second voltage.
And a third stage: the second scanning signal line 51 transmits a control signal, which is a low-level signal, and controls the third transistor T3 to turn off, so as to maintain the second voltage stored in the third capacitor C3. The second voltage may be further transmitted to the red, green and blue sub-pixel cells of the second display area AA2 through the second data signal lines 31, 33 and 35, and the second display area AA2 displays the second voltage.
It can be understood that the second voltage is sent to the second display area, so that the signal received by the second display area for displaying is greater than the signal received by the first display area for displaying, the problem that the brightness of the second display area is lower than that of the first display area can be compensated, the brightness of the second display area is consistent with that of the first display area, and the brightness uniformity of the display panel is improved.
Referring to fig. 10, when the polarity of the white pixel is negative, and the first transistor T1, the second transistor T2, and the third transistor T3 are all N-type transistors, for example, but the present invention does not require the specific types of the first transistor T1, the second transistor T2, and the third transistor T3, and may all be P-type transistors, which may be set according to actual requirements.
The first stage is as follows: the first data signal lines 21, 23, and 25 transmit a first voltage, which is a negative voltage signal, to the booster circuit. Grid control signal line VSwThe control signal is provided, and the control signal is a high signal, which controls the first transistor T1 to be turned on, and transmits the first voltage to the first node, and the first voltage is a low signal. First voltage compensation signal line V1A third voltage compensation signal line V3And a fifth voltage compensation signal line V5The first potential signal is provided to the first capacitor C1, and the first potential signal is a zero potential signal. The second scanning signal line 51 transmits a control signal, which is a high signal to control the third transistor T3 to be turned on, and the third capacitor C3 stores the first voltage provided by the first node N1.
And a second stage: grid control signal line VSwThe control signal is provided, and the control signal is a low signal to control the first transistor T1 to turn off. First voltage compensation signal line V1A third voltage compensation signal line V3And a fifth voltage compensation signal line V5Providing a second potential signal to the first capacitor C1, wherein the second potential signal is a negative potential signalAnd the value of the potential signal is greater than that of the first voltage. The first capacitor C1 stores the second potential signal and provides the second potential signal to the first node N1, and the first node N1 provides the second potential signal to boost the first voltage of the third capacitor C3 to the second voltage.
And a third stage: the second scanning signal line 51 transmits a control signal, which is a low-level signal, and controls the third transistor T3 to turn off, so as to maintain the second voltage stored in the third capacitor C3. The second voltage may be further transmitted to the red, green and blue sub-pixel cells of the second display area AA2 through the second data signal lines 31, 33 and 35, and the second display area AA2 displays the second voltage.
It can be understood that the second voltage is sent to the second display area, so that the signal received by the second display area for displaying is greater than the signal received by the first display area for displaying, the problem that the brightness of the second display area is lower than that of the first display area can be compensated, the brightness of the second display area is consistent with that of the first display area, and the brightness uniformity of the display panel is improved.
With continued reference to fig. 2, the present embodiment provides a display panel 200 in which the density of the first sub-pixel unit P1 in the first display area AA1 is greater than the density of the second sub-pixel unit P2 in the second display area AA 2. It can be understood that, a camera (not shown in the figure) is disposed at a position of the backlight surface of the display panel 200 corresponding to the second display area AA2, and then the density of the second sub-pixel unit P2 is set to be smaller than the density of the first sub-pixel unit P1, so that the light transmittance of the second display area AA2 can be enhanced, which is beneficial to improving the image pickup quality of the display panel 200.
With continued reference to fig. 2, the present embodiment provides the display panel 200 in which the area of the second sub-pixel unit P2 is larger than the area of the first sub-pixel unit P1 in the direction perpendicular to the display panel 200. Under the condition that the total display area of the second display area AA2 is fixed, the number of the second sub-pixel units P2 in the second display area AA2 can be reduced, and the occupied area of the circuit can be further reduced, so that the light transmittance of the second display area AA2 can be further improved, and the improvement of the image pickup quality of the display panel 200 is facilitated.
Referring to fig. 11, fig. 11 is a schematic structural diagram of another display panel provided in the present invention. The display panel 200 provided in this embodiment further includes a plurality of gate circuits demux and a driving chip IC, each gate circuit demux includes N output terminals and an input terminal; the input end of the multi-path gating circuit is electrically connected with the driving chip IC, and the output end of the multi-path gating circuit is electrically connected with the first data signal line 2 and is used for receiving the first voltage provided by the driving chip IC and sending the first voltage to the first data signal line 2 in a time-sharing manner.
It will be appreciated that the invention is based on the example where the demultiplexer comprises 3 outputs and one input, and that the above description of the timing diagram is based on the example where the uniform demultiplexer comprises 3 outputs and one input. However, the demux circuit is not limited thereto and may include 2 outputs and 1 input, 6 outputs and 1 input, 4 outputs and 2 inputs, or 6 outputs and 2 inputs. Of course, the number of the corresponding output terminals of one demultiplexer may be determined according to the actual application environment, and is not limited herein. The number of the wires connected with the drive chip IC can be reduced by arranging the multi-path gating circuit demux, so that the occupied area of a non-display area is favorably reduced, and a narrow frame is realized.
With continuing reference to fig. 12 to 14, fig. 12 is a schematic structural diagram of another display panel provided by the present invention, fig. 13 is a schematic structural diagram of another display panel provided by the present invention, and fig. 14 is a schematic structural diagram of another display panel provided by the present invention. Fig. 12 illustrates that a demultiplexer may comprise 2 outputs and 1 input, and that a demultiplexer controls the adjacent first data signal line 2 that transmits the same signal, and that the control of the first data signal line in the corresponding timing diagram is adjusted accordingly with respect to the timing diagram of the demultiplexer comprising three outputs. Fig. 13 illustrates that one demultiplexer may include 4 output terminals and 1 input terminal, which is equivalent to electrically connecting the two demultiplexers demux shown in fig. 12 to the driving chip IC through one input terminal, and further, signals of the 4 first data signal lines correspondingly connected thereto may be the same, and controlled by the same timing. Fig. 14 illustrates that one demultiplexer may include 6 output terminals and 1 input terminal, which is equivalent to electrically connecting the two demultiplexers demux shown in fig. 11 to the driving chip IC through one input terminal, and further, may make the signals of the 6 first data signal lines connected correspondingly to the demultiplexers identical through the same timing control. Moreover, the operation and structure of the demultiplexer may be substantially the same as those in the prior art, and will not be described herein.
With continued reference to fig. 2, the non-display area BB of the display panel 200 provided in the present embodiment further includes a lower bezel area BB1, and an upper bezel area BB2 disposed opposite to the lower bezel area BB 1; the second display area AA2 is located between the first display area AA1 and the upper frame BB2 area, and the booster circuit 1 is located in the upper frame BB2 area. It can be understood that the second display area AA2 is located on the side of the display panel 200 close to the upper frame BB2, and the boost circuit 1 is disposed in the upper frame BB2, which can simplify the routing of the second data signal line 3, and can reduce the length of the second data signal line 3, so as to save raw materials, and prevent the aperture ratio of the display area AA of the display panel 200 from being affected because the second data signal line 3 is opaque to the metal routing.
Optionally, the first voltage is boosted to obtain a second voltage, and the voltage of the second voltage is greater than 5V. Since the voltage value of the first voltage generally used for displaying in the first display area AA1 is less than 5V, and may be +4.6V, and the voltage of the second voltage is set to be greater than 5V, it is ensured that the voltage value of the second voltage is greater than the voltage value of the first voltage, and the display signal received by the second display area AA2 is greater than the display signal received by the first display area AA1, so as to compensate the luminance of the second display area AA2 being lower than the luminance of the first display area AA1, and improve the luminance uniformity of the display panel 200.
The present invention further provides a display device 300 including the display panel 200 according to any of the above embodiments of the present invention. Fig. 15 is a schematic view of a display device according to the present invention, and referring to fig. 15, a display device 300 includes the display panel 200 according to any of the embodiments of the present invention. The embodiment of fig. 15 is only an example of a mobile phone, and the display device 300 is described, it is understood that the display device 300 provided in the embodiment of the present invention may be other display devices with a display function, such as a computer, a television, and a vehicle-mounted display device, and the present invention is not limited thereto. The display device 300 provided in the embodiment of the present invention has the beneficial effects of the display panel 200 provided in the embodiment of the present invention, and specific reference is specifically made to the detailed description of the display device in the foregoing embodiments, which is not repeated herein.
With continued reference to fig. 16 and 15, fig. 16 is a cross-sectional view taken in the direction N-N' of fig. 15. The display device 300 of the present embodiment further includes a backlight module 6, the backlight module 6 includes a hollow area 61, and in a direction perpendicular to the plane of the display panel 200, the hollow area 61 and the second display area AA2 are at least partially overlapped. The display panel further comprises a camera 7, and in a direction perpendicular to the plane of the display panel 200, the camera 7 overlaps with the hollow area 61, and further overlaps with the second display area AA2 at least partially. Because the position department that second display area AA2 corresponds sets up camera 7, digs out backlight unit 6 of this position department, and hollow area 61 can further improve the light transmissivity of second display area AA2, is favorable to improving the quality of making a video recording of display panel 200.
As can be seen from the above embodiments, the display panel, the driving method thereof, and the display device provided by the present invention at least achieve the following advantages:
the display panel, the driving method thereof and the display device provided by the invention at least realize the following beneficial effects:
compared with the prior art, the problem that the brightness of the first display area is inconsistent with that of the second display area when the display panel displays the full-screen display is solved. The invention provides a display panel, a driving method thereof and a display device.A first data signal line in the display panel is connected to a first display area to provide a first voltage for the first display area, and a second data signal line is connected to a second display area to provide a second voltage for the second display area; and meanwhile, the booster circuit is arranged, receives the first voltage sent by the first data signal line, boosts the first voltage to a second voltage, and sends the second voltage to the second data signal line. The first voltage is used for displaying in the first display area, the second voltage is used for displaying in the second display area, and the second voltage is larger than the first voltage, so that the problem that the brightness of the second display area is smaller than that of the first display area can be compensated, and the brightness uniformity of the display panel is improved.
Although some specific embodiments of the present invention have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustrative purposes only and are not intended to limit the scope of the present invention. It will be appreciated by those skilled in the art that modifications may be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims (14)

1. A display panel characterized by comprising a display area and a non-display area surrounding the display area, the display area comprising a first display area and a second display area;
the multi-channel data signal line driving circuit further comprises a plurality of boosting circuits, a plurality of first data signal lines and a plurality of second data signal lines, wherein the first data signal lines and the second data signal lines are arranged along a first direction extending along a second direction, and the second direction is intersected with the first direction;
the first data signal line is connected to the first display area to provide a first voltage for the first display area, the second data signal line is connected to the second display area to provide a second voltage for the second display area,
the first end of the boosting circuit is electrically connected with the first data signal line, the second end of the boosting circuit is electrically connected with the second data signal line, and the boosting circuit receives the first voltage sent by the first data signal line, boosts the first voltage to the second voltage and sends the second voltage to the second data signal line;
the display panel further comprises a plurality of first scanning signal lines and a plurality of second scanning signal lines which extend along the first direction and are arranged in the second direction, wherein the first scanning signal lines are connected to the first display area, and the second scanning signal lines are connected to the second display area;
the first scanning signal line and the first data signal line are crossed to define a plurality of first sub-pixel units positioned in the first display area; the second scanning signal line and the second data signal line are crossed to define a plurality of second sub-pixel units positioned in the second display area;
in a direction perpendicular to the display panel, the area of the second sub-pixel unit is larger than that of the first sub-pixel unit.
2. The display panel according to claim 1, further comprising a plurality of voltage compensation signal lines arranged in the non-display region extending in the first direction and the second direction, and a gate control signal line extending in the first direction;
the voltage compensation signal line is used for providing a potential signal for the booster circuit, so that the booster circuit boosts the received first voltage to the second voltage;
the grid control signal line is used for providing a control signal for the booster circuit and controlling whether the first voltage sent by the first data signal line can be transmitted into the booster circuit.
3. The display panel according to claim 2, wherein the voltage boosting circuit includes a first transistor and a first capacitor;
the first transistor is electrically connected with the first data signal line at a first end, connected with a first node at a second end and electrically connected with the grid control signal line at a control end;
the first capacitor, one end of which is electrically connected with the voltage compensation signal line, and the other end of which is connected to the first node;
the first node is connected to the second data signal line.
4. The display panel according to claim 2,
one of the boosting circuits corresponds to one column of the second sub-pixel units, the gate control signal line is electrically connected with each boosting circuit, and one of the boosting circuits is electrically connected with one of the voltage compensation signal lines.
5. The display panel according to claim 4, wherein the voltage polarities of the signals provided by the voltage compensation signal lines received by the second sub-pixel units of two adjacent columns are opposite.
6. The display panel according to claim 4, wherein the first sub-pixel unit comprises a second transistor and a second capacitor;
a first end of the second transistor is electrically connected with the first data signal line, a second end of the second transistor is electrically connected with the second capacitor, and a control end of the second transistor is electrically connected with the first scanning signal line;
the second capacitor is electrically connected with the second transistor at one end and the common electrode at the other end;
the second sub-pixel unit comprises a third transistor and a third capacitor;
a first end of the third transistor is electrically connected with the second data signal line, a second end of the third transistor is electrically connected with the third capacitor, and a control end of the third transistor is electrically connected with the second scanning signal line;
and one end of the third capacitor is electrically connected with the third transistor, and the other end of the third capacitor is electrically connected with the common electrode.
7. The display panel according to claim 1, wherein the density of the first sub-pixel units in the first display region is greater than the density of the second sub-pixel units in the second display region.
8. The display panel according to claim 1, further comprising a plurality of gate circuits and a driving chip, each of the plurality of gate circuits including N output terminals and one input terminal;
the input end of the multi-path gating circuit is electrically connected with the driving chip, and the output end of the multi-path gating circuit is electrically connected with the first data signal line and is used for receiving the first voltage provided by the driving chip and sending the first voltage to the first data signal line in a time-sharing manner.
9. The display panel according to claim 1, wherein the non-display region further includes a lower bezel region, and an upper bezel region disposed opposite to the lower bezel region;
the second display area is located between the first display area and the upper frame area, and the booster circuit is located in the upper frame area.
10. The display panel according to claim 1, wherein the second voltage has a voltage greater than 5V.
11. A display device comprising the display panel according to any one of claims 1 to 10.
12. The display device according to claim 11, further comprising a backlight module, wherein the backlight module comprises a hollow area, and the hollow area and the second display area at least partially overlap in a direction perpendicular to a plane of the display panel.
13. A driving method of a display panel, the display panel comprising: the display device comprises a display area and a non-display area surrounding the display area, wherein the display area comprises a first display area and a second display area;
the multi-channel data signal line driving circuit further comprises a plurality of boosting circuits, a plurality of first data signal lines and a plurality of second data signal lines, wherein the first data signal lines and the second data signal lines are arranged along a first direction extending along a second direction, and the second direction is intersected with the first direction;
the first data signal line is connected to the first display area to provide a first voltage for the first display area, the second data signal line is connected to the second display area to provide a second voltage for the second display area,
the first end of the boosting circuit is electrically connected with the first data signal line, the second end of the boosting circuit is in point connection with the second data signal line, and the boosting circuit receives the first voltage sent by the first data signal line, boosts the first voltage to the second voltage and sends the second voltage to the second data signal line;
the display panel further comprises a plurality of first scanning signal lines and a plurality of second scanning signal lines which extend along the first direction and are arranged in the second direction, wherein the first scanning signal lines are connected to the first display area, and the second scanning signal lines are connected to the second display area;
the first scanning signal line and the first data signal line are crossed to define a plurality of first sub-pixel units positioned in the first display area; the second scanning signal line and the second data signal line are crossed to define a plurality of second sub-pixel units positioned in the second display area;
in the direction vertical to the display panel, the area of the second sub-pixel unit is larger than that of the first sub-pixel unit;
the driving method includes the steps of:
and sending a first voltage to the booster circuit through the first data signal line, receiving the first voltage by the booster circuit, boosting the first voltage into a second voltage, and sending the second voltage to the second display area through the second data signal line.
14. The driving method according to claim 13,
the display panel further comprises a plurality of voltage compensation signal lines and grid control signal lines, wherein the voltage compensation signal lines are positioned in the non-display area and arranged along the first direction and the second direction, and the grid control signal lines extend along the first direction;
the voltage compensation signal line is used for providing a potential signal for the booster circuit, so that the booster circuit boosts the received first voltage to the second voltage;
the grid control signal line is used for providing a control signal for the booster circuit and controlling whether the first voltage sent by the first data signal line can be transmitted into the booster circuit;
the boost circuit comprises a first transistor and a first capacitor;
the first transistor is electrically connected with the first data signal line at a first end, connected with a first node at a second end and electrically connected with the grid control signal line at a control end;
the first capacitor, one end of which is electrically connected with the voltage compensation signal line, and the other end of which is connected to the first node;
the first node is connected to the second data signal line;
the display panel further comprises a plurality of first scanning signal lines and a plurality of second scanning signal lines which extend along the first direction and are arranged in the second direction, wherein the first scanning signal lines are connected to the first display area, and the second scanning signal lines are connected to the second display area;
the first scanning signal line and the first data signal line are crossed to define a plurality of first sub-pixel units positioned in the first display area; the second scanning signal line and the second data signal line are crossed to define a plurality of second sub-pixel units positioned in the first display area;
each boosting circuit corresponds to one column of the second sub-pixel units, the grid control signal line is electrically connected with each boosting circuit, and one boosting circuit is electrically connected with one voltage compensation signal line;
the first sub-pixel unit comprises a second transistor and a second capacitor;
a first end of the second transistor is electrically connected with the first data signal line, a second end of the second transistor is electrically connected with the second capacitor, and a control end of the second transistor is electrically connected with the first scanning signal line;
the second capacitor is electrically connected with the second transistor at one end and the common electrode at the other end;
the second sub-pixel unit comprises a third transistor and a third capacitor;
a first end of the third transistor is electrically connected with the second data signal line, a second end of the third transistor is electrically connected with the third capacitor, and a control end of the third transistor is electrically connected with the second scanning signal line;
the third capacitor, one end of which is electrically connected to the third transistor and the other end of which is electrically connected to the common electrode;
the driving method includes the steps of:
the first stage is as follows: the gate control signal line controls the first transistor to be turned on, the first voltage transmitted from the first data signal line is transmitted to the first node, the voltage compensation signal line provides a first potential signal, the second scan signal line controls the third transistor to be turned on, and the third capacitor stores the first voltage provided from the first node;
and a second stage: the gate control signal line controls the first transistor to be turned off, the voltage compensation signal line provides a second potential signal to the first capacitor, the first capacitor provides a second potential signal at the first node, and the first node provides the second potential signal to boost the first voltage of the third capacitor to a second voltage;
and a third stage: and the second scanning signal line controls the third transistor to be turned off, and the second voltage stored by the third capacitor is kept.
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