CN111756394A - Zero intermediate frequency receiver and communication equipment - Google Patents

Zero intermediate frequency receiver and communication equipment Download PDF

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Publication number
CN111756394A
CN111756394A CN201910244300.7A CN201910244300A CN111756394A CN 111756394 A CN111756394 A CN 111756394A CN 201910244300 A CN201910244300 A CN 201910244300A CN 111756394 A CN111756394 A CN 111756394A
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pin
resistor
signal
power
capacitor
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CN111756394B (en
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高存浩
高媛菲
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Hytera Communications Corp Ltd
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Hytera Communications Corp Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/30Circuits for homodyne or synchrodyne receivers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/10Means associated with receiver for limiting or suppressing noise or interference
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/30Circuits for homodyne or synchrodyne receivers
    • H04B2001/307Circuits for homodyne or synchrodyne receivers using n-port mixer

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Noise Elimination (AREA)

Abstract

The application discloses a zero intermediate frequency receiver and communication equipment, wherein the zero intermediate frequency receiver comprises an antenna, a low-noise amplifier and a power limiting circuit, wherein the antenna is used for receiving radio-frequency signals; the low-noise amplifier is connected with the antenna and used for amplifying the radio-frequency signal; the power limiting circuit is connected with the low-noise amplifier and used for controlling the output power of the low-noise amplifier according to the power of the radio-frequency signal, so that the power of an interference signal in the demodulated signal is smaller than a first preset power. By the mode, the output power of the low-noise amplifier can be controlled, so that the power of an interference signal in a signal output by the demodulation circuit is smaller than that of the background noise, and the receiving quality of a receiver is improved.

Description

Zero intermediate frequency receiver and communication equipment
Technical Field
The application relates to the technical field of communication, in particular to a zero intermediate frequency receiver and communication equipment.
Background
The radio Frequency part of a Zero Intermediate Frequency receiver (ZIF) only comprises a high-Frequency low-noise amplifier and a mixer, the gain is not high, the requirement of a linear dynamic range is easily met, and the interference of image Frequency is avoided; when the receiver works in an analog channel of a zero intermediate frequency receiver, if the power of an input signal is large enough, even a continuous signal can generate a noise which is not needed by a user, the noise can make a whining sound on a loudspeaker, the noise amplitude is small, the signal energy is only a little larger than the background noise, but under the amplification action of an audio power amplifier, obvious sound can be heard in the loudspeaker to influence the use of the user, and under the normal condition, only white noise of the noise can be heard.
When two intercoms are in near field communication, a user of one of the two intercoms only presses one-touch (PTT) and does not speak, a loudspeaker in the interphone of the opposite party sends a single tone of whining a horn, and the tone is relatively small and can be heard when ears are close to the loudspeaker; when the zero intermediate frequency interphone receives an in-band signal, the local oscillation signal of the zero intermediate frequency interphone theoretically has the same frequency with the in-band signal, but the same frequency cannot be achieved under the general condition due to the difference of crystal oscillation frequencies of different interphones, a frequency difference of dozens to hundreds of HZ always exists, after the frequency difference is subjected to frequency mixing and demodulation by a mixer, a single frequency which is twice of the difference frequency can be generated, the single frequency is unwanted noise of people, and the noise cannot be filtered by an audio filter; the noise generation is related to the input equivalent Second-Order intercept Point (IIP2, Second Order input intercept Point) of the mixer, and the problem is inherent in the development of zero intermediate frequency walkie-talkie.
The inventor of the application finds that two means for solving the problem generally exist in the prior art in long-term research and development, one is a low-intermediate frequency scheme, the scheme enables the frequency of a local oscillation signal to shift by several KHZ, generated noise is far away from a useful signal after frequency multiplication, and then the noise is filtered by an audio filter; however, the bandwidth of a useful signal is increased, the input bandwidth of the signal after down-conversion is expanded to more than 6KHz from 3KHz of zero intermediate frequency, the integral bandwidth of noise is increased, and the sensitivity is deteriorated; the other is that when the input power is larger than-25 dBm, the receiving system is automatically switched to a low intermediate frequency state, if the input power is smaller than-25 dBm, the receiving system keeps a zero intermediate frequency state, when the input signal is small, the sensitivity is not influenced, but when the receiving system is switched, another noise is generated, and the purpose of eliminating the noise cannot be achieved.
Disclosure of Invention
The problem that this application mainly solved provides a zero intermediate frequency receiver and communication equipment, can control low noise amplifier's output power for the power of interfering signal is less than the power of ground noise in the signal of demodulation circuit output, improves the reception quality of zero intermediate frequency receiver.
In order to solve the above technical problem, a technical solution adopted in the present application is to provide a zero intermediate frequency receiver, including: the antenna is used for receiving radio frequency signals; the low-noise amplifier is connected with the antenna and used for amplifying the radio-frequency signal; the power limiting circuit is connected with the low-noise amplifier and used for controlling the output power of the low-noise amplifier according to the power of the radio-frequency signal, so that the power of an interference signal in the demodulated signal is smaller than a first preset power.
In order to solve the above technical problem, another technical solution adopted by the present application is to provide a communication device, where the communication device includes a transmitter and a receiver connected to each other, and the transmitter is configured to generate a radio frequency signal and transmit the radio frequency signal; the receiver is used for receiving the radio frequency signal and processing the radio frequency signal to obtain a baseband signal; wherein, the receiver is the zero intermediate frequency receiver.
Through the scheme, the beneficial effects of the application are that: the zero intermediate frequency receiver utilizes the antenna to receive radio frequency signals, the low-noise amplifier amplifies the radio frequency signals, in order to control the power of interference signals in the signals output by the demodulation circuit, the power limiting circuit controls the output power of the low-noise amplifier according to the power of the radio frequency signals, the power of the interference signals in the demodulated signals is smaller than first preset power when the demodulation is carried out, the output power of the low-noise amplifier can be controlled, the power of the interference signals in the signals output by the demodulation circuit is smaller than the power of bottom noise, the receiving quality of the zero intermediate frequency receiver is improved, and a user is prevented from hearing noise caused by the interference signals when baseband signals are output through a loudspeaker.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts. Wherein:
fig. 1 is a schematic structural diagram of an embodiment of a zero intermediate frequency receiver provided in the present application;
fig. 2 is a schematic structural diagram of another embodiment of a zero intermediate frequency receiver provided in the present application;
fig. 3 is a schematic circuit diagram of a switching circuit and a low noise amplifier in another embodiment of the zero intermediate frequency receiver provided in the present application;
fig. 4 is a schematic structural diagram of an embodiment of a communication device provided in the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a zero intermediate frequency receiver provided in the present application, where the zero intermediate frequency receiver includes: an antenna 11, a low noise amplifier 12, and a power limiting circuit 13.
The antenna 11 is used for receiving a radio frequency signal transmitted by a transmitter (not shown in the figure), wherein the radio frequency signal is a modulated signal; the low noise amplifier 12 is connected to the antenna 11 for amplifying the radio frequency signal, and the low noise amplifier 12 is a small signal linear amplifier, and an input end of the low noise amplifier is connected to the antenna 11 for receiving the radio frequency signal, amplifying the radio frequency signal, and outputting the amplified radio frequency signal.
The power limiting circuit 13 is connected to the low noise amplifier 12, and configured to control an output power of the low noise amplifier 12 according to a power of the radio frequency signal, so that a power of an interference signal in the demodulated signal is smaller than a first preset power.
The power limiting circuit 13 may be a switch switching circuit, an attenuation circuit, a limiting diode, and a power limiting circuit (not shown in the figure), where the attenuation circuit is used to attenuate the radio frequency signal; the switch switching circuit is used for selecting different paths according to the power of the radio frequency signal so as to control the power of the radio frequency signal; the amplitude limiting diode is used for limiting the power of the radio frequency signal, so that the power of the interference signal is smaller than a first preset power; the power amplitude limiting circuit is used for switching the working state of the amplitude limiting circuit according to the power of the radio-frequency signal, so that the power of the interference signal is smaller than a first preset power.
In a specific embodiment, when demodulating the signal output from the power limiting circuit 13, the mixer 14 and the demodulation circuit 15 may be used.
The mixer 14 is connected to the low noise amplifier 12, and is configured to mix the signal output by the low noise amplifier 12 with the local oscillation signal, so as to obtain a down-converted signal.
The demodulation circuit 15 is connected to the mixer 14, and is configured to demodulate the mixed signal to obtain a baseband signal, so that a power of an interference signal in the signal output by the demodulation circuit 15 is smaller than a first preset power, where the first preset power may be a power of a noise floor, and in a specific embodiment, may be a power of a white noise.
The zero intermediate frequency receiver in this embodiment receives a radio frequency signal using an antenna 11, a low noise amplifier 12 amplifies the radio frequency signal, in order to control the power of the interference signal in the signal outputted from the demodulation circuit 15, the power limiting circuit 13 controls the output power of the low noise amplifier 12 according to the power of the radio frequency signal, the signal outputted from the low noise amplifier 12 is mixed with the local oscillation signal by the mixer 14, the mixed signal is demodulated by the demodulation circuit 15, thereby obtaining a baseband signal and making the power of the interference signal smaller than the first preset power, it is possible to obtain the interference signal by controlling the output power of the low noise amplifier 12, the power of the interference signal in the signal output by the demodulation circuit 15 is smaller than the power of the background noise, so that the receiving quality of the zero intermediate frequency receiver is improved, and the noise caused by the interference signal is prevented from being heard by a user when the baseband signal is output through a loudspeaker.
Referring to fig. 2, fig. 2 is a schematic structural diagram of another embodiment of a zero if receiver provided in the present application, where the zero if receiver includes: an antenna 21, a low noise amplifier 22, a switching circuit 23, a mixer 24, a power supply 25, and a demodulation circuit 26.
The antenna 21 is used for receiving radio frequency signals, the input signals are radio frequency signals, and the low noise amplifier 22 is connected with the antenna 21 and used for amplifying the radio frequency signals.
The switch switching circuit 23 is connected to the low noise amplifier 22, and is configured to control the output power of the low noise amplifier 22 according to the power of the radio frequency signal, so that the power of the interference signal in the signal output by the demodulation circuit 26 is smaller than a first preset power.
The switch switching circuit 23 includes a first switch circuit 231, a second switch circuit 232, a first resistor 233, and a second resistor 234, an input terminal of the first switch circuit 231 receives the first enable signal, an input terminal of the second switch circuit 232 receives the second enable signal, an output terminal of the first switch circuit 231 is coupled to the input terminal of the low noise amplifier 22 through the first resistor 233, and an output terminal of the second switch circuit 232 is coupled to the input terminal of the low noise amplifier 22 through the second resistor 234. Wherein, the first enable signal and the second enable signal may be rectangular waves, and the waveforms of the first enable signal and the second enable signal are opposite.
When the power of the radio frequency signal is smaller than the second preset power, the first enable signal is at a high level, the second enable signal is at a low level, the first switch circuit 231 is closed, the second switch circuit 232 is opened, the power supply 25 is connected with the first resistor 233 through the first switch circuit 231, and at this time, the amplification factor of the low noise amplifier 22 is the first amplification factor.
When the power of the radio frequency signal is greater than the third preset power, the first enable signal is at a low level, the second enable signal is at a high level, the first switch circuit 231 is turned off, the second switch circuit 232 is turned on, the power supply 25 is connected with the second resistor 234 through the second switch circuit 232, and at this time, the amplification factor of the low noise amplifier 22 is the second amplification factor, so that the power of the interference signal is less than the first preset power.
The second preset power is smaller than the third preset power, when the power of the radio frequency signal is larger than the third preset power, the power of the radio frequency signal is larger, and if the low noise amplifier 22 directly amplifies the radio frequency signal, the power of the interference signal in the signal output by the demodulation circuit 26 is larger than the first preset power, and it is impossible to eliminate the noise output by the speaker (not shown in the figure), so in order to reduce the power of the interference signal, the amplification factor of the low noise amplifier 22 should be reduced, that is, the first amplification factor is larger than the second amplification factor.
The resistance of the first resistor 233 is smaller than that of the second resistor 234, and in one embodiment, the resistance of the first resistor 233 may be 33 Ω, and the resistance of the second resistor 234 may be 5K Ω; the second switch 2321 may connect the second resistor 234 to the power supply 25, and since the second resistor 234 is connected to the input terminal of the low noise amplifier 22, the voltage input to the low noise amplifier 22 may be suppressed, thereby reducing the output power of the low noise amplifier 22.
Specifically, as shown in fig. 3, the first switch circuit 231 includes a first switch tube 2311 and a third resistor R3, a first pin of the first switch tube 2311 is grounded, a second pin of the first switch tube 2311 receives the first enable signal E1, a third pin of the first switch tube 2311 is connected to the input terminal of the low noise amplifier 22 through a first resistor R1, a fourth pin of the first switch tube 2311 is connected to the power supply VCC, and a fifth pin and a sixth pin of the first switch tube 2311 are connected to the fourth pin of the first switch tube through a third resistor R3. The first switch tube 2311 may include two N-channel enhancement mode field effect tubes, where the first, second, and sixth pins are a gate, a source, and a drain of a field effect tube, respectively, and the third, fourth, and fifth pins are a drain, a source, and a gate of a field effect tube, respectively.
The second switching circuit 232 includes a second switching tube 2321 and a fourth resistor R4, a first pin of the second switching tube 2321 is grounded, a second pin of the second switching tube 2321 receives the second enable signal E2, a third pin of the second switching tube 2321 is connected to the input terminal of the low noise amplifier 22 through the second resistor R2, a fourth pin of the second switching tube 2321 is connected to the power source VCC, and a fifth pin and a sixth pin of the second switching tube 2321 are connected to the fourth pin of the second switching tube 2321 through the fourth resistor R4. The circuit structure of the second switching tube 2321 may be the same as that of the first switching tube 2311.
The low noise amplifier 22 includes a first control circuit 221, a second control circuit 222, a third control circuit 223, and a first transistor T1, wherein the first control circuit 221 and the third control circuit 223 are respectively connected to a second pin of the first transistor T1, the second control circuit 222 is connected to a first pin of the first transistor T1, and a third pin of the first transistor T1 is grounded.
Further, the first transistor T1 is a dual emitter transistor, a first pin of the first transistor T1 is connected to the antenna 21 through a first capacitor C1 and a second capacitor C2, specifically, the first pin of the first transistor T1 is connected to one end of a first capacitor C1, the other end of the first capacitor C1 is connected to one end of a second capacitor C2, and the other end of the second capacitor C2 is connected to the antenna 21; a second pin of the first transistor T1 is connected to a third pin of the first switch 2311 and a third pin of the second switch 2321 through a first resistor R1 and a second resistor R2, respectively, a second pin of the first transistor T1 is connected to a first pin of the first transistor T1 through a rc filter circuit 225, the rc filter circuit 225 includes a third capacitor C3 and a fifth resistor R5 connected to each other, the third pin of the first transistor T1 is connected to the second capacitor C2 through a fourth capacitor C4, specifically, the third pin of the first transistor T1 is connected to one end of a fourth capacitor C4, and the other end of the fourth capacitor C4 is connected to one end of a second capacitor C2; the third pin of the first transistor T1 is grounded, and the fourth pin of the first transistor T1 is connected to the third pin; the first pin is a base electrode of the double-emitter triode, the second pin is a collector electrode of the double-emitter triode, and the third pin and the fourth pin are emitting electrodes of the double-emitter triode.
The first control circuit 221 is configured to control a collector voltage of the dual emitter triode, and includes a first inductor L1, a fifth capacitor C5, a sixth resistor R6, and a seventh resistor R7, wherein one end of the first inductor L1 is connected to the second resistor R2 and the second pin of the first transistor T1, the other end of the first inductor L1 is connected to one ends of the fifth capacitor C5, the first resistor R1, and the sixth resistor R6, the other end of the sixth resistor R6 is connected to the power source VCC through the seventh resistor R7, and the other end of the fifth capacitor C5 is grounded.
The second control circuit 222 is configured to control a base voltage of the dual emitter triode, and includes a sixth capacitor C6, a seventh capacitor C7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and a second transistor T2, one end of the sixth capacitor C6 is connected to the power supply VCC, the other end of the sixth capacitor C6 is grounded, the first pin of the second transistor T2 is connected to the power supply VCC through the eighth resistor R8, the second pin, the fifth pin, and the sixth pin of the second transistor T2 are grounded through the ninth resistor R9, the third pin of the second transistor T2 is grounded through the seventh capacitor C7, the third pin of the second transistor T2 is connected to the first pin of the first transistor T1 through the tenth resistor R10, and the fourth pin of the second transistor T2 is connected to the other end of the sixth resistor R6; the second transistor T2 may include two NPN transistors (not shown), the first, second and sixth pins are an emitter, a base and a collector of one transistor, respectively, and the fourth, fifth and third pins are an emitter, a base and a collector of the other transistor, respectively.
The third control circuit 233 is used for controlling the output voltage of the low noise amplifier 22, and includes a second inductor L2, an eighth capacitor C8, a ninth capacitor C9, a tenth capacitor C10, an eleventh resistor R11, a twelfth resistor R12, and a thirteenth resistor R13, one end of the eighth capacitor C8 is connected to the second pin of the first transistor T1, the other end of the eighth capacitor C8 is connected to one end of the second inductor L2 and the ninth capacitor C9, the other end of the ninth capacitor C9 is grounded, the other end of the second inductor L2 is connected to one end of the eleventh resistor R11 and the twelfth resistor R12, the other end of the eleventh resistor R11 is grounded, the other end of the twelfth resistor R12 is connected to one end of the thirteenth resistor R13 and the tenth capacitor C10, the other end of the thirteenth resistor R13 is grounded, and the other end of the tenth capacitor C10 is connected to the input terminal of the mixer 24.
The mixer 24 is connected to the low noise amplifier 22, and mixes the signal output from the low noise amplifier 22 with the local oscillation signal.
The demodulation circuit 26 is connected to the mixer 24, and is configured to demodulate the mixed signal to obtain an output signal, i.e., a baseband signal, where a power of an interference signal in the output signal is smaller than a first preset power.
Further, the local oscillation signal may be generated by an oscillator (not shown in the figure), and the frequency of the local oscillation signal is equal to the frequency of the radio frequency signal; two input ends of the mixer 24 are respectively connected with the oscillator and the low noise amplifier 22, and multiply and convert the local oscillation signal and the radio frequency signal into a baseband signal; in order to filter out a plurality of interference signals included in the output signal of the mixer 24, a low-pass filter (not shown) may be disposed after the demodulation circuit 26, and the zero-if receiver does not need to use a special if filter to select a channel, and only needs to use the low-pass filter to select a useful channel, so as to obtain a baseband signal.
In a specific embodiment, the Received Signal Strength (RSSI) of the rf Signal input to the lna 22 is monitored in real time, the initial operating state of the lna 22 is state 1, and state 1 corresponds to the connection of the second resistor R2 with the lna 22.
When the RSSI is detected to be greater than the preset value a (for example, -30dBm), the operating state of the low noise amplifier 22 is switched to operate in state 1, the P1dB (the input (or output) power value when the gain is reduced by 1 dB) of the low noise amplifier 22 is reduced, so that the output power is controlled to be less than the preset power value (for example, greater than-15 dBm), when the power entering the mixer 24 is small, the amplitude of the generated noise is small, and the speaker cannot hear the noise sound below the bottom noise.
When the RSSI is detected to be less than the preset value B (for example, -40dBm), the operating state of the low noise amplifier 22 is switched to the state 2, and the state 2 corresponds to the connection of the first resistor R1 with the low noise amplifier 22, because the amplitude of the useful signal is relatively large and the signal-to-noise ratio is relatively high (for narrowband communication, the signal-to-noise ratio is greater than 45dB), the sound quality of the speaker is not affected.
When the RSSI gradually increases from less than the preset value B to the preset value a, the working state of the low noise amplifier 22 is maintained in the state 2; when the RSSI is gradually decreased from greater than the preset value a to the preset value B, the operating state of the low noise amplifier 22 is maintained in the state 1, so as to avoid frequently switching the operating state of the switch switching circuit 23.
In the zero intermediate frequency receiver in this embodiment, the maximum output power of the low noise amplifier 22 is limited, and the mixer 24 is used to perform down-conversion on the signal output by the low noise amplifier 22, so that the power of the interference signal in the signal output by the demodulation circuit 26 is smaller than the power of the bottom noise, the reception quality of the zero intermediate frequency receiver is improved, and a user is prevented from hearing noise caused by the interference signal when the baseband signal is output through a speaker.
Referring to fig. 4, fig. 4 is a schematic structural diagram of an embodiment of the communication device provided in the present application, the communication device includes a transmitter 41 and a receiver 42 connected to each other, the transmitter 41 is configured to generate a radio frequency signal and transmit the radio frequency signal; the receiver 42 is configured to receive a radio frequency signal and process the radio frequency signal to obtain a baseband signal; wherein the receiver 42 is a zero intermediate frequency receiver in the above embodiments.
The above embodiments are merely examples, and not intended to limit the scope of the present application, and all modifications, equivalents, and flow charts using the contents of the specification and drawings of the present application, or those directly or indirectly applied to other related arts, are included in the scope of the present application.

Claims (10)

1. A zero intermediate frequency receiver, comprising:
an antenna for receiving a radio frequency signal;
the low-noise amplifier is connected with the antenna and used for amplifying the radio-frequency signal;
and the power limiting circuit is connected with the low-noise amplifier and used for controlling the output power of the low-noise amplifier according to the power of the radio-frequency signal so as to enable the power of an interference signal in the demodulated signal to be smaller than a first preset power.
2. A zero intermediate frequency receiver according to claim 1, characterized in that the zero intermediate frequency receiver further comprises:
a mixer, connected to the low noise amplifier, for mixing a signal output by the low noise amplifier with a local oscillation signal;
and the demodulation circuit is connected with the frequency mixer and used for demodulating the frequency-mixed signal to obtain a baseband signal, so that the power of an interference signal in the signal output by the demodulation circuit is smaller than a first preset power.
3. A zero intermediate frequency receiver according to claim 1,
the power limiting circuit is a switch switching circuit, the switch switching circuit includes a first switch circuit and a second switch circuit, an input terminal of the first switch circuit receives a first enable signal, an input terminal of the second switch circuit receives a second enable signal, an output terminal of the first switch circuit is coupled to an input terminal of the low noise amplifier, and an output terminal of the second switch circuit is coupled to an input terminal of the low noise amplifier.
4. A zero intermediate frequency receiver according to claim 3,
when the power of the radio frequency signal is smaller than a second preset power, the first enabling signal is at a high level, the second enabling signal is at a low level, the first switch circuit is closed, the second switch circuit is opened, and the amplification factor of the low-noise amplifier is a first amplification factor, so that the power of the interference signal is smaller than the first preset power.
5. A zero intermediate frequency receiver according to claim 4,
when the power of the radio frequency signal is greater than a third preset power, the first enabling signal is at a low level, the second enabling signal is at a high level, the first switch circuit is switched off, the second switch circuit is switched on, and the amplification factor of the low-noise amplifier is a second amplification factor, so that the power of the interference signal is less than the first preset power; the second preset power is smaller than the third preset power, and the first amplification factor is larger than the second amplification factor.
6. A zero intermediate frequency receiver according to claim 3,
the first switching circuit comprises a first switching tube and a third resistor, wherein a first pin of the first switching tube is grounded, a second pin of the first switching tube receives the first enabling signal, a third pin of the first switching tube is connected to the input end of the low noise amplifier through the first resistor, a fourth pin of the first switching tube is connected with a power supply, and a fifth pin and a sixth pin of the first switching tube are connected to the fourth pin of the first switching tube through the third resistor; the second switch circuit comprises a second switch tube and a fourth resistor, a first pin of the second switch tube is grounded, a second pin of the second switch tube receives the second enabling signal, a third pin of the second switch tube is connected to the input end of the low noise amplifier through the second resistor, a fourth pin of the second switch tube is connected with the power supply, and a fifth pin and a sixth pin of the second switch tube are connected to the fourth pin of the second switch tube through the fourth resistor.
7. A zero intermediate frequency receiver according to claim 6,
the low noise amplifier comprises a first control circuit, a second control circuit, a third control circuit and a first transistor, wherein the first control circuit and the third control circuit are respectively connected with a second pin of the first transistor, the second control circuit is connected with a first pin of the first transistor, and a third pin of the first transistor is grounded.
8. A zero intermediate frequency receiver according to claim 7,
the first transistor is a double-emitter triode, a first pin of the first transistor is connected to the antenna through a first capacitor and a second capacitor, a second pin of the first transistor is connected with a third pin of the first switch tube and a third pin of the second switch tube through a first resistor and a second resistor respectively, a second pin of the first transistor is connected to the first pin of the first transistor through a resistance-capacitance filter circuit, the resistance-capacitance filter circuit comprises a third capacitor and a fifth resistor which are connected with each other, the third pin of the first transistor is connected to the second capacitor through a fourth capacitor, the third pin of the first transistor is grounded, and the fourth pin of the first transistor is connected with the third pin.
9. A zero intermediate frequency receiver according to claim 8,
the first control circuit comprises a first inductor, a fifth capacitor, a sixth resistor and a seventh resistor, one end of the first inductor is connected with the second resistor and the second pin of the first transistor, the other end of the first inductor is respectively connected with one ends of the fifth capacitor, the first resistor and the sixth resistor, the other end of the sixth resistor is connected to the power supply through the seventh resistor, and the other end of the fifth capacitor is grounded;
the second control circuit comprises a sixth capacitor, a seventh capacitor, an eighth resistor, a ninth resistor, a tenth resistor and a second transistor, one end of the sixth capacitor is connected with the power supply, the other end of the sixth capacitor is grounded, a first pin of the second transistor is connected to the power supply through the eighth resistor, a second pin, a fifth pin and a sixth pin of the second transistor are grounded through the ninth resistor, a third pin of the second transistor is grounded through the seventh capacitor, a third pin of the second transistor is connected with the first pin of the first transistor through the tenth resistor, and a fourth pin of the second transistor is connected with the other end of the sixth resistor;
the third control circuit comprises a second inductor, an eighth capacitor, a ninth capacitor, a tenth capacitor, an eleventh resistor, a twelfth resistor and a thirteenth resistor, one end of the eighth capacitor is connected with the second pin of the first transistor, the other end of the eighth capacitor is connected with the second inductor and one end of the ninth capacitor, the other end of the ninth capacitor is grounded, the other end of the second inductor is connected with one ends of the eleventh resistor and the twelfth resistor, the other end of the eleventh resistor is grounded, the other end of the twelfth resistor is connected with one ends of the thirteenth resistor and the tenth capacitor, the other end of the thirteenth resistor is grounded, and the other end of the tenth capacitor is connected with the input end of the mixer.
10. A communication device, comprising a transmitter and a receiver connected to each other, wherein the transmitter is configured to generate the radio frequency signal and transmit the radio frequency signal; the receiver is used for receiving the radio frequency signal and processing the radio frequency signal to obtain a baseband signal; wherein the receiver is a zero intermediate frequency receiver as claimed in any one of claims 1 to 9.
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Publication number Priority date Publication date Assignee Title
CN101277121A (en) * 2008-05-22 2008-10-01 高拓讯达(北京)科技有限公司 Low-power consumption receiver capable of dynamically detecting barrage jamming signal
CN104135298A (en) * 2013-05-03 2014-11-05 联发科技股份有限公司 Portable device
CN104158552A (en) * 2014-08-01 2014-11-19 华为技术有限公司 Zero intermediate frequency transmitter, receiver and related method and system
CN205232209U (en) * 2015-12-17 2016-05-11 深圳市金溢科技股份有限公司 Signal reception circuit, phased array antenna and trackside unit based on zero intermediate frequency
CN106936394A (en) * 2017-01-12 2017-07-07 西南电子技术研究所(中国电子科技集团公司第十研究所) Distortion low-noise amplifier after Larger Dynamic

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101277121A (en) * 2008-05-22 2008-10-01 高拓讯达(北京)科技有限公司 Low-power consumption receiver capable of dynamically detecting barrage jamming signal
CN104135298A (en) * 2013-05-03 2014-11-05 联发科技股份有限公司 Portable device
CN104158552A (en) * 2014-08-01 2014-11-19 华为技术有限公司 Zero intermediate frequency transmitter, receiver and related method and system
CN205232209U (en) * 2015-12-17 2016-05-11 深圳市金溢科技股份有限公司 Signal reception circuit, phased array antenna and trackside unit based on zero intermediate frequency
CN106936394A (en) * 2017-01-12 2017-07-07 西南电子技术研究所(中国电子科技集团公司第十研究所) Distortion low-noise amplifier after Larger Dynamic

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